mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-13 13:27:14 +02:00
changed cleanfifo and setdaq
git-svn-id: file:///afs/psi.ch/project/sls_det_software/svn/slsDetectorSoftware@367 951219d9-93cf-4727-9268-0efd64621fa3
This commit is contained in:
@ -5,7 +5,7 @@
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CROSS = bfin-uclinux-
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CROSS = bfin-uclinux-
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CC = $(CROSS)gcc
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CC = $(CROSS)gcc
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CFLAGS += -Wall -DMCB_FUNCS -DDACS_INT #-DVERBOSE -DVERYVERBOSE #-DVIRTUAL #-DDACS_INT_CSERVER
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CFLAGS += -Wall -DMCB_FUNCS -DDACS_INT -DDEBUG #-DVERBOSE -DVERYVERBOSE #-DVIRTUAL #-DDACS_INT_CSERVER
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PROGS= gotthardDetectorServer
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PROGS= gotthardDetectorServer
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@ -250,13 +250,17 @@ int cleanFifo(){
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u_int32_t addr, reg, val;
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u_int32_t addr, reg, val;
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printf("\nCleaning FIFO\n");
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printf("\nCleaning FIFO\n");
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addr=ADC_SYNC_REG;
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addr=ADC_SYNC_REG;
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val=ADCSYNC_VAL | ADCSYNC_CLEAN_FIFO_BITS;
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//88322114
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val=ADCSYNC_VAL | ADCSYNC_CLEAN_FIFO_BITS | TOKEN_RESTART_DELAY;
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bus_w(addr,val);
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bus_w(addr,val);
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val=ADCSYNC_VAL;
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//88022114
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val=ADCSYNC_VAL | TOKEN_RESTART_DELAY;
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bus_w(addr,val);
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bus_w(addr,val);
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reg=bus_r(addr);
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reg=bus_r(addr);
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#ifdef VERBOSE
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#ifdef DDEBUG
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printf("\nADC SYNC reg:%d\n",reg);
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printf("\nADC SYNC reg:%d\n",reg);
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#endif
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#endif
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return OK;
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return OK;
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@ -266,11 +270,21 @@ int cleanFifo(){
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int setDAQRegister(int adcval)
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int setDAQRegister(int adcval)
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{
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{
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u_int32_t addr, reg, val;
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u_int32_t addr, reg, val;
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addr=DAQ_REG;
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addr=DAQ_REG;
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int value=0x7f;
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if(adcval==-1) value=0x13f;
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//depended on adcval
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val=34+(42<<8)+(value<<16);
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int packetlength=0x7f;
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if(adcval==-1) packetlength=0x13f;
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//depended on pcb rev
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int tokenTiming = 0x2010;
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if(bus_r(PCB_REV_REG)==1)
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tokenTiming=0x2018;
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val = (packetlength<<16) + tokenTiming;
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//val=34+(42<<8)+(packetlength<<16);
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reg=bus_r(addr);
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reg=bus_r(addr);
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bus_w(addr,val);
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bus_w(addr,val);
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reg=bus_r(addr);
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reg=bus_r(addr);
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@ -1259,18 +1273,19 @@ int configureMAC(int ipad,long long int macad,long long int servermacad,int ival
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break;
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break;
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//for all adcs
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//for all adcs
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default:
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default:
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bus_w(DAQ_REG,0x13f2a22);
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reg = (NCHAN*NCHIP)<<CHANNEL_OFFSET;
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reg = (NCHAN*NCHIP)<<CHANNEL_OFFSET;
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reg&=CHANNEL_MASK;
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reg&=CHANNEL_MASK;
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reg|=ACTIVE_ADC_MASK;
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reg|=ACTIVE_ADC_MASK;
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bus_w(CHIP_OF_INTRST_REG,reg);
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bus_w(CHIP_OF_INTRST_REG,reg);
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break;
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break;
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}
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}
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//#ifdef VERBOSE
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#ifdef DDEBUG
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printf("Chip of Intrst Reg:%x\n",bus_r(CHIP_OF_INTRST_REG));
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printf("Chip of Intrst Reg:%x\n",bus_r(CHIP_OF_INTRST_REG));
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printf("IP Packet Size:%d\n",ipPacketSize);
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printf("IP Packet Size:%d\n",ipPacketSize);
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printf("UDP Packet Size:%d\n",udpPacketSize);
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printf("UDP Packet Size:%d\n",udpPacketSize);
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//#endif
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#endif
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//configuring mac
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//configuring mac
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u_int32_t addrr=MULTI_PURPOSE_REG;
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u_int32_t addrr=MULTI_PURPOSE_REG;
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@ -1285,9 +1300,9 @@ int configureMAC(int ipad,long long int macad,long long int servermacad,int ival
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mac_conf_regs=(mac_conf*)(CSP0BASE+offset*2);
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mac_conf_regs=(mac_conf*)(CSP0BASE+offset*2);
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tse_conf_regs=(tse_conf*)(CSP0BASE+offset2*2);
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tse_conf_regs=(tse_conf*)(CSP0BASE+offset2*2);
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//#ifdef VERBOSE
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#ifdef DDEBUG
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printf("***Configuring MAC***\n");
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printf("***Configuring MAC***\n");
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//#endif
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#endif
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if(ival)
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if(ival)
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bus_w(addrr,(RESET_BIT|DIGITAL_TEST_BIT)); //0x080,reset mac (reset)
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bus_w(addrr,(RESET_BIT|DIGITAL_TEST_BIT)); //0x080,reset mac (reset)
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@ -20,6 +20,7 @@
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/* registers defined in FPGA */
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/* registers defined in FPGA */
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#define PCB_REV_REG 0x2c<<11
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#define GAIN_REG 0x10<<11
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#define GAIN_REG 0x10<<11
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//#define FLOW_CONTROL_REG 0x11<<11
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//#define FLOW_CONTROL_REG 0x11<<11
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//#define FLOW_STATUS_REG 0x12<<11
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//#define FLOW_STATUS_REG 0x12<<11
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@ -33,8 +33,9 @@
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#define ADCSYNC_VAL 0x32113
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#define ADCSYNC_VAL 0x22114
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//#define ADCSYNC_VAL 0x22113
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#define TOKEN_RESTART_DELAY 0x88000000
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#ifdef VIRTUAL
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#ifdef VIRTUAL
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