mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-04-23 23:10:02 +02:00
changed cleanfifo and setdaq
git-svn-id: file:///afs/psi.ch/project/sls_det_software/svn/slsDetectorSoftware@367 951219d9-93cf-4727-9268-0efd64621fa3
This commit is contained in:
parent
788bc9cfd7
commit
452812aaf8
@ -5,7 +5,7 @@
|
||||
|
||||
CROSS = bfin-uclinux-
|
||||
CC = $(CROSS)gcc
|
||||
CFLAGS += -Wall -DMCB_FUNCS -DDACS_INT #-DVERBOSE -DVERYVERBOSE #-DVIRTUAL #-DDACS_INT_CSERVER
|
||||
CFLAGS += -Wall -DMCB_FUNCS -DDACS_INT -DDEBUG #-DVERBOSE -DVERYVERBOSE #-DVIRTUAL #-DDACS_INT_CSERVER
|
||||
|
||||
|
||||
PROGS= gotthardDetectorServer
|
||||
|
@ -250,13 +250,17 @@ int cleanFifo(){
|
||||
u_int32_t addr, reg, val;
|
||||
printf("\nCleaning FIFO\n");
|
||||
addr=ADC_SYNC_REG;
|
||||
val=ADCSYNC_VAL | ADCSYNC_CLEAN_FIFO_BITS;
|
||||
|
||||
//88322114
|
||||
val=ADCSYNC_VAL | ADCSYNC_CLEAN_FIFO_BITS | TOKEN_RESTART_DELAY;
|
||||
bus_w(addr,val);
|
||||
|
||||
val=ADCSYNC_VAL;
|
||||
//88022114
|
||||
val=ADCSYNC_VAL | TOKEN_RESTART_DELAY;
|
||||
bus_w(addr,val);
|
||||
|
||||
reg=bus_r(addr);
|
||||
#ifdef VERBOSE
|
||||
#ifdef DDEBUG
|
||||
printf("\nADC SYNC reg:%d\n",reg);
|
||||
#endif
|
||||
return OK;
|
||||
@ -266,11 +270,21 @@ int cleanFifo(){
|
||||
int setDAQRegister(int adcval)
|
||||
{
|
||||
u_int32_t addr, reg, val;
|
||||
|
||||
addr=DAQ_REG;
|
||||
int value=0x7f;
|
||||
if(adcval==-1) value=0x13f;
|
||||
val=34+(42<<8)+(value<<16);
|
||||
|
||||
//depended on adcval
|
||||
int packetlength=0x7f;
|
||||
if(adcval==-1) packetlength=0x13f;
|
||||
|
||||
//depended on pcb rev
|
||||
int tokenTiming = 0x2010;
|
||||
if(bus_r(PCB_REV_REG)==1)
|
||||
tokenTiming=0x2018;
|
||||
|
||||
|
||||
val = (packetlength<<16) + tokenTiming;
|
||||
//val=34+(42<<8)+(packetlength<<16);
|
||||
|
||||
reg=bus_r(addr);
|
||||
bus_w(addr,val);
|
||||
reg=bus_r(addr);
|
||||
@ -1259,18 +1273,19 @@ int configureMAC(int ipad,long long int macad,long long int servermacad,int ival
|
||||
break;
|
||||
//for all adcs
|
||||
default:
|
||||
bus_w(DAQ_REG,0x13f2a22);
|
||||
reg = (NCHAN*NCHIP)<<CHANNEL_OFFSET;
|
||||
reg&=CHANNEL_MASK;
|
||||
reg|=ACTIVE_ADC_MASK;
|
||||
bus_w(CHIP_OF_INTRST_REG,reg);
|
||||
break;
|
||||
}
|
||||
//#ifdef VERBOSE
|
||||
|
||||
|
||||
#ifdef DDEBUG
|
||||
printf("Chip of Intrst Reg:%x\n",bus_r(CHIP_OF_INTRST_REG));
|
||||
printf("IP Packet Size:%d\n",ipPacketSize);
|
||||
printf("UDP Packet Size:%d\n",udpPacketSize);
|
||||
//#endif
|
||||
#endif
|
||||
|
||||
//configuring mac
|
||||
u_int32_t addrr=MULTI_PURPOSE_REG;
|
||||
@ -1285,9 +1300,9 @@ int configureMAC(int ipad,long long int macad,long long int servermacad,int ival
|
||||
mac_conf_regs=(mac_conf*)(CSP0BASE+offset*2);
|
||||
tse_conf_regs=(tse_conf*)(CSP0BASE+offset2*2);
|
||||
|
||||
//#ifdef VERBOSE
|
||||
#ifdef DDEBUG
|
||||
printf("***Configuring MAC***\n");
|
||||
//#endif
|
||||
#endif
|
||||
|
||||
if(ival)
|
||||
bus_w(addrr,(RESET_BIT|DIGITAL_TEST_BIT)); //0x080,reset mac (reset)
|
||||
|
@ -20,6 +20,7 @@
|
||||
|
||||
|
||||
/* registers defined in FPGA */
|
||||
#define PCB_REV_REG 0x2c<<11
|
||||
#define GAIN_REG 0x10<<11
|
||||
//#define FLOW_CONTROL_REG 0x11<<11
|
||||
//#define FLOW_STATUS_REG 0x12<<11
|
||||
|
@ -33,8 +33,9 @@
|
||||
|
||||
|
||||
|
||||
#define ADCSYNC_VAL 0x32113
|
||||
//#define ADCSYNC_VAL 0x22113
|
||||
#define ADCSYNC_VAL 0x22114
|
||||
#define TOKEN_RESTART_DELAY 0x88000000
|
||||
|
||||
|
||||
|
||||
#ifdef VIRTUAL
|
||||
|
Loading…
x
Reference in New Issue
Block a user