detectors/slsDetectorPackage
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This commit is contained in:
maliakal_d
2020-01-22 13:55:10 +01:00
parent d8fccdcefa
commit 3ea2520615
15 changed files with 54 additions and 55 deletions
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slsDetectorServers/ctbDetectorServer/bin/ctbDetectorServer_developer
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slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c
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@ -56,9 +56,9 @@ uint32_t adcEnableMask_1g = 0;
uint8_t adcEnableMask_10g = 0; uint8_t adcEnableMask_10g = 0;
int32_t clkPhase[NUM_CLOCKS] = {0, 0, 0, 0}; int32_t clkPhase[NUM_CLOCKS] = {};
uint32_t clkFrequency[NUM_CLOCKS] = {40, 20, 20, 200}; uint32_t clkFrequency[NUM_CLOCKS] = {40, 20, 20, 200};
int dacValues[NDAC] = {0}; int dacValues[NDAC] = {};
// software limit that depends on the current chip on the ctb // software limit that depends on the current chip on the ctb
int vLimit = 0; int vLimit = 0;
int highvoltage = 0; int highvoltage = 0;
@ -1420,7 +1420,7 @@ int setHighVoltage(int val){
void setTiming( enum timingMode arg){ void setTiming( enum timingMode arg){
if(arg != GET_TIMING_MODE){ if(arg != GET_TIMING_MODE){
switch((int)arg){ switch(arg){
case AUTO_TIMING: case AUTO_TIMING:
FILE_LOG(logINFO, ("Set Timing: Auto\n")); FILE_LOG(logINFO, ("Set Timing: Auto\n"));
bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) & ~EXT_SIGNAL_MSK); bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) & ~EXT_SIGNAL_MSK);
@ -2559,7 +2559,7 @@ int calculateDataBytes(){
return dataBytes; return dataBytes;
} }
int getTotalNumberOfChannels(){return ((int)getNumberOfChannelsPerChip() * (int)getNumberOfChips());} int getTotalNumberOfChannels() {return (getNumberOfChannelsPerChip() * getNumberOfChips());}
int getNumberOfChips(){return NCHIP;} int getNumberOfChips(){return NCHIP;}
int getNumberOfDACs(){return NDAC;} int getNumberOfDACs(){return NDAC;}
int getNumberOfChannelsPerChip(){return NCHAN;} int getNumberOfChannelsPerChip(){return NCHAN;}

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slsDetectorServers/eigerDetectorServer/bin/eigerDetectorServer_developer
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slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c
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@ -1108,7 +1108,7 @@ int setHighVoltage(int val) {
void setTiming( enum timingMode arg) { void setTiming( enum timingMode arg) {
enum timingMode ret=GET_TIMING_MODE; enum timingMode ret=GET_TIMING_MODE;
if (arg != GET_TIMING_MODE) { if (arg != GET_TIMING_MODE) {
switch((int)arg) { switch(arg) {
case AUTO_TIMING: ret = 0; break; case AUTO_TIMING: ret = 0; break;
case TRIGGER_EXPOSURE: ret = 2; break; case TRIGGER_EXPOSURE: ret = 2; break;
case BURST_TRIGGER: ret = 1; break; case BURST_TRIGGER: ret = 1; break;
@ -2041,7 +2041,7 @@ int calculateDataBytes() {
int getTotalNumberOfChannels() {return ((int)getNumberOfChannelsPerChip() * (int)getNumberOfChips());} int getTotalNumberOfChannels() {return (getNumberOfChannelsPerChip() * getNumberOfChips());}
int getNumberOfChips() {return NCHIP;} int getNumberOfChips() {return NCHIP;}
int getNumberOfDACs() {return NDAC;} int getNumberOfDACs() {return NDAC;}
int getNumberOfChannelsPerChip() {return NCHAN;} int getNumberOfChannelsPerChip() {return NCHAN;}

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slsDetectorServers/gotthard2DetectorServer/bin/gotthard2DetectorServer_developer
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slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c
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@ -37,8 +37,8 @@ int virtual_stop = 0;
#endif #endif
enum detectorSettings thisSettings = UNINITIALIZED; enum detectorSettings thisSettings = UNINITIALIZED;
int32_t clkPhase[NUM_CLOCKS] = {0, 0, 0, 0, 0, 0}; int32_t clkPhase[NUM_CLOCKS] = {};
uint32_t clkFrequency[NUM_CLOCKS] = {0, 0, 0, 0, 0, 0}; uint32_t clkFrequency[NUM_CLOCKS] = {};
int highvoltage = 0; int highvoltage = 0;
int dacValues[NDAC] = {0}; int dacValues[NDAC] = {0};
int onChipdacValues[ONCHIP_NDAC][NCHIP] = {0}; int onChipdacValues[ONCHIP_NDAC][NCHIP] = {0};
@ -51,7 +51,7 @@ enum burstModeType burstType = INTERNAL;
int64_t exptime_ns = 0; int64_t exptime_ns = 0;
int64_t period_ns = 0; int64_t period_ns = 0;
int64_t nframes = 0; int64_t nframes = 0;
int detPos[2] = {0, 0}; int detPos[2] = {};
int isInitCheckDone() { int isInitCheckDone() {
return initCheckDone; return initCheckDone;
@ -171,7 +171,7 @@ int checkType() {
#ifdef VIRTUAL #ifdef VIRTUAL
return OK; return OK;
#endif #endif
volatile u_int32_t type = ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST); u_int32_t type = ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST);
if (type != GOTTHARD2){ if (type != GOTTHARD2){
FILE_LOG(logERROR, ("This is not a Gotthard2 Server (read %d, expected %d)\n", type, GOTTHARD2)); FILE_LOG(logERROR, ("This is not a Gotthard2 Server (read %d, expected %d)\n", type, GOTTHARD2));
return FAIL; return FAIL;
@ -1092,7 +1092,7 @@ int setHighVoltage(int val){
/* parameters - timing */ /* parameters - timing */
void setTiming( enum timingMode arg){ void setTiming( enum timingMode arg){
if(arg != GET_TIMING_MODE){ if(arg != GET_TIMING_MODE){
switch((int)arg){ switch(arg){
case AUTO_TIMING: case AUTO_TIMING:
FILE_LOG(logINFO, ("Set Timing: Auto\n")); FILE_LOG(logINFO, ("Set Timing: Auto\n"));
bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) & ~EXT_SIGNAL_MSK); bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) & ~EXT_SIGNAL_MSK);
@ -1356,8 +1356,8 @@ int setPhase(enum CLKINDEX ind, int val, int degrees) {
relativePhase *= -1; relativePhase *= -1;
direction = 0; direction = 0;
} }
int pllIndex = ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL; int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL);
int clkIndex = ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind; int clkIndex = (int)(ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind);
ALTERA_PLL_C10_SetPhaseShift(pllIndex, clkIndex, relativePhase, direction); ALTERA_PLL_C10_SetPhaseShift(pllIndex, clkIndex, relativePhase, direction);
clkPhase[ind] = valShift; clkPhase[ind] = valShift;
@ -1429,7 +1429,7 @@ int getVCOFrequency(enum CLKINDEX ind) {
FILE_LOG(logERROR, ("Unknown clock index %d to get vco frequency\n", ind)); FILE_LOG(logERROR, ("Unknown clock index %d to get vco frequency\n", ind));
return -1; return -1;
} }
int pllIndex = ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL; int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL);
return ALTERA_PLL_C10_GetVCOFrequency(pllIndex); return ALTERA_PLL_C10_GetVCOFrequency(pllIndex);
} }
@ -1447,7 +1447,7 @@ int setClockDivider(enum CLKINDEX ind, int val) {
} }
char* clock_names[] = {CLK_NAMES}; char* clock_names[] = {CLK_NAMES};
int vcofreq = getVCOFrequency(ind); int vcofreq = getVCOFrequency(ind);
int currentdiv = vcofreq / clkFrequency[ind]; int currentdiv = vcofreq / (int)clkFrequency[ind];
int newfreq = vcofreq / val; int newfreq = vcofreq / val;
FILE_LOG(logINFO, ("\tSetting %s clock (%d) divider from %d (%d Hz) to %d (%d Hz). \n\t(Vcofreq: %d Hz)\n", clock_names[ind], ind, currentdiv, clkFrequency[ind], val, newfreq, vcofreq)); FILE_LOG(logINFO, ("\tSetting %s clock (%d) divider from %d (%d Hz) to %d (%d Hz). \n\t(Vcofreq: %d Hz)\n", clock_names[ind], ind, currentdiv, clkFrequency[ind], val, newfreq, vcofreq));
@ -1463,8 +1463,8 @@ int setClockDivider(enum CLKINDEX ind, int val) {
} }
// Calculate and set output frequency // Calculate and set output frequency
int pllIndex = ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL; int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL);
int clkIndex = ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind; int clkIndex = (int)(ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind);
ALTERA_PLL_C10_SetOuputFrequency (pllIndex, clkIndex, newfreq); ALTERA_PLL_C10_SetOuputFrequency (pllIndex, clkIndex, newfreq);
clkFrequency[ind] = newfreq; clkFrequency[ind] = newfreq;
FILE_LOG(logINFO, ("\t%s clock (%d) divider set to %d (%d Hz)\n", clock_names[ind], ind, val, clkFrequency[ind])); FILE_LOG(logINFO, ("\t%s clock (%d) divider set to %d (%d Hz)\n", clock_names[ind], ind, val, clkFrequency[ind]));
@ -1499,7 +1499,7 @@ int getClockDivider(enum CLKINDEX ind) {
FILE_LOG(logERROR, ("Unknown clock index %d to get clock divider\n", ind)); FILE_LOG(logERROR, ("Unknown clock index %d to get clock divider\n", ind));
return -1; return -1;
} }
return (getVCOFrequency(ind) / clkFrequency[ind]); return (getVCOFrequency(ind) / (int)clkFrequency[ind]);
} }
int setInjectChannel(int offset, int increment) { int setInjectChannel(int offset, int increment) {
@ -2106,7 +2106,7 @@ int calculateDataBytes() {
return getTotalNumberOfChannels() * DYNAMIC_RANGE; return getTotalNumberOfChannels() * DYNAMIC_RANGE;
} }
int getTotalNumberOfChannels() {return ((int)getNumberOfChannelsPerChip() * (int)getNumberOfChips());} int getTotalNumberOfChannels() {return (getNumberOfChannelsPerChip() * getNumberOfChips());}
int getNumberOfChips() {return NCHIP;} int getNumberOfChips() {return NCHIP;}
int getNumberOfDACs() {return NDAC;} int getNumberOfDACs() {return NDAC;}
int getNumberOfChannelsPerChip() {return NCHAN;} int getNumberOfChannelsPerChip() {return NCHAN;}

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slsDetectorServers/gotthardDetectorServer/bin/gotthardDetectorServer_developer
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slsDetectorServers/gotthardDetectorServer/slsDetectorFunctionList.c
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@ -30,10 +30,10 @@ int virtual_status = 0;
int virtual_stop = 0; int virtual_stop = 0;
int highvoltage = 0; int highvoltage = 0;
#endif #endif
int detPos[2] = {0, 0}; int detPos[2] = {};
int detectorFirstServer = 1; int detectorFirstServer = 1;
int dacValues[NDAC] = {0}; int dacValues[NDAC] = {};
enum detectorSettings thisSettings = UNINITIALIZED; enum detectorSettings thisSettings = UNINITIALIZED;
enum externalSignalFlag signalMode = 0; enum externalSignalFlag signalMode = 0;
@ -128,7 +128,7 @@ int checkType() {
#ifdef VIRTUAL #ifdef VIRTUAL
return OK; return OK;
#endif #endif
volatile u_int32_t type = ((bus_r(BOARD_REVISION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST); u_int32_t type = ((bus_r(BOARD_REVISION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST);
if (type == DETECTOR_TYPE_MOENCH_VAL){ if (type == DETECTOR_TYPE_MOENCH_VAL){
FILE_LOG(logERROR, ("This is not a Gotthard Server (read %d, expected ?)\n", type)); FILE_LOG(logERROR, ("This is not a Gotthard Server (read %d, expected ?)\n", type));
return FAIL; return FAIL;
@ -1180,7 +1180,7 @@ void setTiming( enum timingMode arg){
u_int32_t addr = EXT_SIGNAL_REG; u_int32_t addr = EXT_SIGNAL_REG;
if (arg != GET_TIMING_MODE){ if (arg != GET_TIMING_MODE){
switch((int)arg){ switch(arg){
case AUTO_TIMING: case AUTO_TIMING:
FILE_LOG(logINFO, ("Set Timing: Auto\n")); FILE_LOG(logINFO, ("Set Timing: Auto\n"));
bus_w(addr, EXT_SIGNAL_OFF_VAL); bus_w(addr, EXT_SIGNAL_OFF_VAL);
@ -1680,7 +1680,7 @@ int calculateDataBytes(){
return DATA_BYTES; return DATA_BYTES;
} }
int getTotalNumberOfChannels(){return ((int)getNumberOfChannelsPerChip() * (int)getNumberOfChips());} int getTotalNumberOfChannels() {return (getNumberOfChannelsPerChip() * getNumberOfChips());}
int getNumberOfChips(){return NCHIP;} int getNumberOfChips(){return NCHIP;}
int getNumberOfDACs(){return NDAC;} int getNumberOfDACs(){return NDAC;}
int getNumberOfChannelsPerChip(){return NCHAN;} int getNumberOfChannelsPerChip(){return NCHAN;}

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slsDetectorServers/jungfrauDetectorServer/bin/jungfrauDetectorServer_developer
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slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c
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@ -38,9 +38,9 @@ int virtual_stop = 0;
enum detectorSettings thisSettings = UNINITIALIZED; enum detectorSettings thisSettings = UNINITIALIZED;
int highvoltage = 0; int highvoltage = 0;
int dacValues[NDAC] = {0}; int dacValues[NDAC] = {};
int adcPhase = 0; int adcPhase = 0;
int detPos[4] = {0, 0, 0, 0}; int detPos[4] = {};
int numUDPInterfaces = 1; int numUDPInterfaces = 1;
@ -171,7 +171,7 @@ int checkType() {
#ifdef VIRTUAL #ifdef VIRTUAL
return OK; return OK;
#endif #endif
volatile u_int32_t type = ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST); u_int32_t type = ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST);
if (type != JUNGFRAU){ if (type != JUNGFRAU){
FILE_LOG(logERROR, ("This is not a Jungfrau Server (read %d, expected %d)\n", type, JUNGFRAU)); FILE_LOG(logERROR, ("This is not a Jungfrau Server (read %d, expected %d)\n", type, JUNGFRAU));
return FAIL; return FAIL;
@ -921,7 +921,7 @@ int setHighVoltage(int val){
void setTiming( enum timingMode arg){ void setTiming( enum timingMode arg){
if(arg != GET_TIMING_MODE){ if(arg != GET_TIMING_MODE){
switch((int)arg){ switch(arg){
case AUTO_TIMING: case AUTO_TIMING:
FILE_LOG(logINFO, ("Set Timing: Auto\n")); FILE_LOG(logINFO, ("Set Timing: Auto\n"));
bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) & ~EXT_SIGNAL_MSK); bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) & ~EXT_SIGNAL_MSK);
@ -1832,7 +1832,7 @@ int calculateDataBytes(){
return DATA_BYTES; return DATA_BYTES;
} }
int getTotalNumberOfChannels(){return ((int)getNumberOfChannelsPerChip() * (int)getNumberOfChips());} int getTotalNumberOfChannels() {return (getNumberOfChannelsPerChip() * getNumberOfChips());}
int getNumberOfChips(){return NCHIP;} int getNumberOfChips(){return NCHIP;}
int getNumberOfDACs(){return NDAC;} int getNumberOfDACs(){return NDAC;}
int getNumberOfChannelsPerChip(){return NCHAN;} int getNumberOfChannelsPerChip(){return NCHAN;}

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slsDetectorServers/mythen3DetectorServer/bin/mythen3DetectorServer_developer
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slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c
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@ -32,12 +32,12 @@ int virtual_status = 0;
int virtual_stop = 0; int virtual_stop = 0;
#endif #endif
int32_t clkPhase[NUM_CLOCKS] = {0, 0, 0, 0, 0}; int32_t clkPhase[NUM_CLOCKS] = {};
uint32_t clkFrequency[NUM_CLOCKS] = {0, 0, 0, 0, 0}; uint32_t clkFrequency[NUM_CLOCKS] = {};
int highvoltage = 0; int highvoltage = 0;
int dacValues[NDAC] = {0}; int dacValues[NDAC] = {0};
int detPos[2] = {0, 0}; int detPos[2] = {};
uint32_t countermask = 0; // will be removed later when in firmware converted to mask uint32_t countermask = 0; // will be removed later when in firmware converted to mask
int isInitCheckDone() { int isInitCheckDone() {
@ -158,7 +158,7 @@ int checkType() {
#ifdef VIRTUAL #ifdef VIRTUAL
return OK; return OK;
#endif #endif
volatile u_int32_t type = ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST); u_int32_t type = ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST);
if (type != MYTHEN3){ if (type != MYTHEN3){
FILE_LOG(logERROR, ("This is not a Mythen3 Server (read %d, expected %d)\n", type, MYTHEN3)); FILE_LOG(logERROR, ("This is not a Mythen3 Server (read %d, expected %d)\n", type, MYTHEN3));
return FAIL; return FAIL;
@ -703,7 +703,7 @@ int setHighVoltage(int val){
/* parameters - timing */ /* parameters - timing */
void setTiming( enum timingMode arg){ void setTiming( enum timingMode arg){
if(arg != GET_TIMING_MODE){ if(arg != GET_TIMING_MODE){
switch((int)arg){ switch (arg) {
case AUTO_TIMING: case AUTO_TIMING:
FILE_LOG(logINFO, ("Set Timing: Auto\n")); FILE_LOG(logINFO, ("Set Timing: Auto\n"));
bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) & ~EXT_SIGNAL_MSK); bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) & ~EXT_SIGNAL_MSK);
@ -714,7 +714,6 @@ void setTiming( enum timingMode arg){
break; break;
default: default:
FILE_LOG(logERROR, ("Unknown timing mode %d\n", arg)); FILE_LOG(logERROR, ("Unknown timing mode %d\n", arg));
return;
} }
} }
} }
@ -1146,8 +1145,8 @@ int setPhase(enum CLKINDEX ind, int val, int degrees) {
relativePhase *= -1; relativePhase *= -1;
direction = 0; direction = 0;
} }
int pllIndex = ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL; int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL);
int clkIndex = ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind; int clkIndex = (int)(ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind);
ALTERA_PLL_C10_SetPhaseShift(pllIndex, clkIndex, relativePhase, direction); ALTERA_PLL_C10_SetPhaseShift(pllIndex, clkIndex, relativePhase, direction);
clkPhase[ind] = valShift; clkPhase[ind] = valShift;
@ -1219,7 +1218,7 @@ int getVCOFrequency(enum CLKINDEX ind) {
FILE_LOG(logERROR, ("Unknown clock index %d to get vco frequency\n", ind)); FILE_LOG(logERROR, ("Unknown clock index %d to get vco frequency\n", ind));
return -1; return -1;
} }
int pllIndex = ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL; int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL);
return ALTERA_PLL_C10_GetVCOFrequency(pllIndex); return ALTERA_PLL_C10_GetVCOFrequency(pllIndex);
} }
@ -1237,7 +1236,7 @@ int setClockDivider(enum CLKINDEX ind, int val) {
} }
char* clock_names[] = {CLK_NAMES}; char* clock_names[] = {CLK_NAMES};
int vcofreq = getVCOFrequency(ind); int vcofreq = getVCOFrequency(ind);
int currentdiv = vcofreq / clkFrequency[ind]; int currentdiv = vcofreq / (int)clkFrequency[ind];
int newfreq = vcofreq / val; int newfreq = vcofreq / val;
FILE_LOG(logINFO, ("\tSetting %s clock (%d) divider from %d (%d Hz) to %d (%d Hz). \n\t(Vcofreq: %d Hz)\n", clock_names[ind], ind, currentdiv, clkFrequency[ind], val, newfreq, vcofreq)); FILE_LOG(logINFO, ("\tSetting %s clock (%d) divider from %d (%d Hz) to %d (%d Hz). \n\t(Vcofreq: %d Hz)\n", clock_names[ind], ind, currentdiv, clkFrequency[ind], val, newfreq, vcofreq));
@ -1252,8 +1251,8 @@ int setClockDivider(enum CLKINDEX ind, int val) {
} }
// Calculate and set output frequency // Calculate and set output frequency
int pllIndex = ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL; int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL);
int clkIndex = ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind; int clkIndex = (int)(ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind);
ALTERA_PLL_C10_SetOuputFrequency (pllIndex, clkIndex, newfreq); ALTERA_PLL_C10_SetOuputFrequency (pllIndex, clkIndex, newfreq);
clkFrequency[ind] = newfreq; clkFrequency[ind] = newfreq;
FILE_LOG(logINFO, ("\t%s clock (%d) divider set to %d (%d Hz)\n", clock_names[ind], ind, val, clkFrequency[ind])); FILE_LOG(logINFO, ("\t%s clock (%d) divider set to %d (%d Hz)\n", clock_names[ind], ind, val, clkFrequency[ind]));
@ -1287,7 +1286,7 @@ int getClockDivider(enum CLKINDEX ind) {
FILE_LOG(logERROR, ("Unknown clock index %d to get clock divider\n", ind)); FILE_LOG(logERROR, ("Unknown clock index %d to get clock divider\n", ind));
return -1; return -1;
} }
return (getVCOFrequency(ind) / clkFrequency[ind]); return (getVCOFrequency(ind) / (int)clkFrequency[ind]);
} }
/* aquisition */ /* aquisition */
@ -1479,7 +1478,7 @@ int calculateDataBytes() {
return 0; return 0;
} }
int getTotalNumberOfChannels() {return ((int)getNumberOfChannelsPerChip() * (int)getNumberOfChips());} int getTotalNumberOfChannels() {return (getNumberOfChannelsPerChip() * getNumberOfChips());}
int getNumberOfChips() {return NCHIP;} int getNumberOfChips() {return NCHIP;}
int getNumberOfDACs() {return NDAC;} int getNumberOfDACs() {return NDAC;}
int getNumberOfChannelsPerChip() {return NCHAN;} int getNumberOfChannelsPerChip() {return NCHAN;}

8
slsDetectorSoftware/src/slsDetector.cpp
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@ -1483,12 +1483,12 @@ int64_t slsDetector::getMeasurementTime() const {
return retval; return retval;
} }
slsDetectorDefs::timingMode slsDetector::setTimingMode(timingMode pol) { slsDetectorDefs::timingMode slsDetector::setTimingMode(timingMode value) {
int fnum = F_SET_TIMING_MODE; int fnum = F_SET_TIMING_MODE;
auto arg = static_cast<int>(pol); //auto arg = static_cast<int>(pol);
timingMode retval = GET_TIMING_MODE; timingMode retval = GET_TIMING_MODE;
FILE_LOG(logDEBUG1) << "Setting communication to mode " << pol; FILE_LOG(logDEBUG1) << "Setting communication to mode " << value;
sendToDetector(fnum, arg, retval); sendToDetector(fnum, static_cast<int>(value), retval);
FILE_LOG(logDEBUG1) << "Timing Mode: " << retval; FILE_LOG(logDEBUG1) << "Timing Mode: " << retval;
return retval; return retval;
} }

4
slsDetectorSoftware/src/slsDetector.h
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@ -626,10 +626,10 @@ class slsDetector : public virtual slsDetectorDefs {
/** /**
* Set/get timing mode * Set/get timing mode
* @param pol timing mode (-1 gets) * @param value timing mode (-1 gets)
* @returns current timing mode * @returns current timing mode
*/ */
timingMode setTimingMode(timingMode pol = GET_TIMING_MODE); timingMode setTimingMode(timingMode value = GET_TIMING_MODE);
/** /**
* Set/get dynamic range * Set/get dynamic range

12
slsSupportLib/include/versionAPI.h
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@ -4,9 +4,9 @@
#define APIRECEIVER 0x190722 #define APIRECEIVER 0x190722
#define APIGUI 0x190723 #define APIGUI 0x190723
#define APIMOENCH 0x190820 #define APIMOENCH 0x190820
#define APIGOTTHARD 0x191127 #define APICTB 0x200122
#define APIJUNGFRAU 0x191127 #define APIGOTTHARD 0x200122
#define APICTB 0x191210 #define APIGOTTHARD2 0x200122
#define APIMYTHEN3 0x200120 #define APIEIGER 0x200122
#define APIGOTTHARD2 0x200121 #define APIJUNGFRAU 0x200122
#define APIEIGER 0x200121 #define APIMYTHEN3 0x200122