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updating to have developer's debug mode, resetfpga, programfpga and added api versioning, changed software date to only have date

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This commit is contained in:
Dhanya Maliakal
2018-01-11 09:14:45 +01:00
parent 68d6c514a9
commit 348a426242
6 changed files with 134 additions and 55 deletions
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46
slsDetectorSoftware/jungfrauDetectorServer/RegisterDefs.h
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@ -62,6 +62,14 @@
#define HARDWARE_VERSION_NUM_MSK (0x0000003F << HARDWARE_VERSION_NUM_OFST) //Not used in software
/* API Version Register */
#define API_VERSION_REG (0x0F << 11)
#define API_VERSION_OFST (0)
#define API_VERSION_MSK (0x00FFFFFF << API_VERSION_OFST)
#define API_VERSION_DETECTOR_TYPE_OFST (24) //Not used in software
#define API_VERSION_DETECTOR_TYPE_MSK (0x000000FF << API_VERSION_DETECTOR_TYPE_OFST) //Not used in software
/* Time from Start 64 bit register */
#define TIME_FROM_START_LSB_REG (0x10 << 11)
#define TIME_FROM_START_MSB_REG (0x11 << 11)
@ -188,7 +196,7 @@
#define CONFIG_TDMA_ENABLE_VAL ((0x1 << CONFIG_TDMA_OFST) & CONFIG_TDMA_MSK)
#define CONFIG_TDMA_TIMESLOT_OFST (25)
#define CONFIG_TDMA_TIMESLOT_MSK (0x0000001F << CONFIG_TDMA_TIMESLOT_OFST)
#define CONFIG_TDMA_TIMESLOT_0_VAL ((0x0 << CONFIG_TDMA_TIMESLOT_OFST) & CONFIG_TDMA_TIMESLOT_MSK)
/* External Signal Register */
#define EXT_SIGNAL_REG (0x4E << 11)
@ -211,6 +219,8 @@
#define CONTROL_DDR3_MEM_RST_MSK (0x00000001 << CONTROL_DDR3_MEM_RST_OFST) //only PHY, not DDR3 PLL ,Not used in software
#define CONTROL_ACQ_FIFO_CLR_OFST (14)
#define CONTROL_ACQ_FIFO_CLR_MSK (0x00000001 << CONTROL_ACQ_FIFO_CLR_OFST)
#define CONTROL_STORAGE_CELL_NUM_OFST (16)
#define CONTROL_STORAGE_CELL_NUM_MSK (0x0000000F << CONTROL_STORAGE_CELL_NUM_OFST)
/* Reconfiguratble PLL Paramater Register */
#define PLL_PARAM_REG (0x50 << 11)
@ -278,7 +288,13 @@
#define SAMPLE_DECMT_FACTOR_4_VAL ((0x2 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK)
/** Vref Comp Mod Register */
#define VREF_COMP_MOD_REG (0x5C << 11) //Not used in software, TBD in firmware
#define VREF_COMP_MOD_REG (0x5C << 11)
#define VREF_COMP_MOD_OFST (0)
#define VREF_COMP_MOD_MSK (0x00000FFF << VREF_COMP_OFST)
#define VREF_COMP_MOD_ENABLE_OFST (31)
#define VREF_COMP_MOD_ENABLE_MSK (0x00000FFF << VREF_COMP_MOD_ENABLE_OFST)
/** DAQ Register */
#define DAQ_REG (0x5D << 11) //TBD in firmware
@ -288,6 +304,21 @@
#define CHIP_POWER_ENABLE_OFST (0)
#define CHIP_POWER_ENABLE_MSK (0x00000001 << CHIP_POWER_ENABLE_OFST)
#define CHIP_POWER_STATUS_OFST (1)
#define CHIP_POWER_STATUS_MSK (0x00000001 << CHIP_POWER_STATUS_OFST)
/** Temperature Control Register */
#define TEMP_CTRL_REG (0x5F << 11)
#define TEMP_CTRL_PROTCT_THRSHLD_OFST (0)
#define TEMP_CTRL_PROTCT_THRSHLD_MSK (0x000007FF << TEMP_CTRL_PRTCT_THRSHLD_OFST)
#define TEMP_CTRL_PROTCT_ENABLE_OFST (16)
#define TEMP_CTRL_PROTCT_ENABLE_MSK (0x00000001 << TEMP_CTRL_PROTCT_ENABLE_OFST)
#define TEMP_CTRL_OVR_TMP_EVNT_OFST (31)
#define TEMP_CTRL_OVR_TMP_EVNT_MSK (0x00000001 << TEMP_CTRL_OVR_TMP_EVNT_OFST)
#define TEMP_CTRL_CLR_OVR_TMP_EVNT_VAL ((0x1 << TEMP_CTRL_OVR_TMP_EVNT_OFST) & TEMP_CTRL_OVR_TMP_EVNT_MSK)
/* Set Delay 64 bit register */
#define SET_DELAY_LSB_REG (0x60 << 11)
@ -309,6 +340,9 @@
#define SET_EXPTIME_LSB_REG (0x68 << 11)
#define SET_EXPTIME_MSB_REG (0x69 << 11)
/* Trigger Delay 32 bit register */
#define SET_TRIGGER_DELAY_REG (0x70 << 11)
/* Module Coordinates Register 0 */
#define COORD_0 (0x7C << 11)
@ -323,6 +357,14 @@
#define COORD_0_Z_OFST (0)
#define COORD_0_Z_MSK (0x0000FFFF << COORD_0_Z_OFST)
/* ASIC Control Register */
#define ASIC_CTRL_REG (0x7F)
#define ASIC_CTRL_PRCHRG_TMR_OFST (0)
#define ASIC_CTRL_PRCHRG_TMR_MSK (0x000000FF << ASIC_CTRL_PRCHRG_TMR_OFST)
#define ASIC_CTRL_DS_TMR_OFST (8)
#define ASIC_CTRL_DS_TMR_MSK (0x000000FF << ASIC_CTRL_DS_TMR_OFST)
#endif //REGISTERS_G_H

8
slsDetectorSoftware/jungfrauDetectorServer/gitInfo.txt
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@ -1,9 +1,9 @@
Path: slsDetectorsPackage/slsDetectorSoftware/jungfrauDetectorServer
URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
Repsitory UUID: 669033597145b4eae2e94f620a4dd50a2fa50231
Revision: 95
Repsitory UUID: 68d6c514a9b9c0f44e53e212f88f29349037c891
Revision: 96
Branch: jungfrauchanges
Last Changed Author: Dhanya_Maliakal
Last Changed Rev: 3331
Last Changed Date: 2017-12-20 16:57:32.000000002 +0100 ./RegisterDefs.h
Last Changed Rev: 3332
Last Changed Date: 2018-01-11 08:42:43.000000002 +0100 ./RegisterDefs.h

6
slsDetectorSoftware/jungfrauDetectorServer/gitInfoJungfrau.h
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@ -1,6 +1,6 @@
#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
#define GITREPUUID "669033597145b4eae2e94f620a4dd50a2fa50231"
#define GITREPUUID "68d6c514a9b9c0f44e53e212f88f29349037c891"
#define GITAUTH "Dhanya_Maliakal"
#define GITREV 0x3331
#define GITDATE 0x20171220
#define GITREV 0x3332
#define GITDATE 0x20180111
#define GITBRANCH "jungfrauchanges"

121
slsDetectorSoftware/jungfrauDetectorServer/slsDetectorFunctionList.c
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@ -46,7 +46,9 @@ void checkFirmwareCompatibility(int flag) {
uint64_t macadd = getDetectorMAC();
int64_t fwversion = getDetectorId(DETECTOR_FIRMWARE_VERSION);
int64_t swversion = getDetectorId(DETECTOR_SOFTWARE_VERSION);
//int64_t sw_fw_apiversion = getDetectorId(SOFTWARE_FIRMWARE_API_VERSION);
int64_t sw_fw_apiversion = 0;
if (fwversion >= MIN_REQRD_VRSN_T_RD_API)
sw_fw_apiversion = getDetectorId(SOFTWARE_FIRMWARE_API_VERSION);
cprintf(BLUE,"\n\n"
"********************************************************\n"
"****************** Jungfrau Server *********************\n"
@ -55,46 +57,49 @@ void checkFirmwareCompatibility(int flag) {
"Hardware Serial Nr:\t\t 0x%x\n"
"Detector IP Addr:\t\t 0x%x\n"
"Detector MAC Addr:\t\t 0x%llx\n"
"Detector MAC Addr:\t\t 0x%llx\n\n"
"Firmware Version:\t\t 0x%llx\n"
"Software Version:\t\t 0x%llx\n"
//"F/w-S/w API Version:\t\t 0x%llx\n"
//"Required Firmware Version:\t 0x%x\n"
"F/w-S/w API Version:\t\t 0x%llx\n"
"Required Firmware Version:\t 0x%x\n"
"\n"
"********************************************************\n",
hversion, hsnumber,
ipadd, macadd,
fwversion, swversion
//, sw_fw_apiversion, REQUIRED_FIRMWARE_VERSION
fwversion, swversion,
sw_fw_apiversion, REQRD_FRMWR_VRSN
);
// return if flag is not zero, debug mode
if (flag)
return;
/*
* printf("Testing firmware capability... ");
//cant read versions
printf("Testing Firmware-software compatibility ...\n");
if(!fwversion || !sw_fw_apiversion){
cprintf(RED,"FATAL ERROR: Cant read versions from FPGA. Please update firmware\n");
cprintf(RED,"Exiting Server. Goodbye!\n\n");
exit(-1);
exit(EXIT_FAILURE);
}
//check for API compatibility - old server
if(sw_fw_apiversion > REQUIRED_FIRMWARE_VERSION){
if(sw_fw_apiversion > REQRD_FRMWR_VRSN){
cprintf(RED,"FATAL ERROR: This software version is incompatible.\n"
"Please update it to be compatible with this firmware\n\n");
cprintf(RED,"Exiting Server. Goodbye!\n\n");
exit(-1);
exit(EXIT_FAILURE);
}
//check for firmware compatibility - old firmware
if( REQUIRED_FIRMWARE_VERSION > fwversion){
if( REQRD_FRMWR_VRSN > fwversion){
cprintf(RED,"FATAL ERROR: This firmware version is incompatible.\n"
"Please update it to v%d to be compatible with this server\n\n", REQUIRED_FIRMWARE_VERSION);
"Please update it to v%d to be compatible with this server\n\n", REQRD_FRMWR_VRSN);
cprintf(RED,"Exiting Server. Goodbye!\n\n");
exit(-1);
exit(EXIT_FAILURE);
}
*/
printf("Compatibility - success\n");
}
@ -176,28 +181,26 @@ int64_t getDetectorId(enum idMode arg){
switch(arg){
case DETECTOR_SERIAL_NUMBER:
retval = getDetectorNumber();// or getDetectorMAC()
break;
return getDetectorNumber();// or getDetectorMAC()
case DETECTOR_FIRMWARE_VERSION:
retval = getFirmwareVersion();
break;
//case SOFTWARE_FIRMWARE_API_VERSION:
//return GetFirmwareSoftwareAPIVersion();
return getFirmwareVersion();
case SOFTWARE_FIRMWARE_API_VERSION:
return getFirmwareAPIVersion();
case DETECTOR_SOFTWARE_VERSION:
retval= GITREV;
retval= (retval <<32) | GITDATE;
break;
return GITDATE;
default:
break;
return retval;
}
return retval;
}
u_int64_t getFirmwareVersion() {
return ((bus_r(FPGA_VERSION_REG) & BOARD_REVISION_MSK) >> BOARD_REVISION_OFST);
}
u_int64_t getFirmwareAPIVersion() {
return ((bus_r(API_VERSION_REG) & API_VERSION_MSK) >> API_VERSION_OFST);
}
u_int16_t getHardwareVersionNumber() {
return ((bus_r(MOD_SERIAL_NUM_REG) & HARDWARE_VERSION_NUM_MSK) >> HARDWARE_VERSION_NUM_OFST);
}
@ -455,33 +458,65 @@ int setSpeed(enum speedVariable arg, int val) {
// setting
if(val >= 0) {
switch(val){
// stop state machine if running
if(runBusy())
stopStateMachine();
// stop state machine if running
if(runBusy())
stopStateMachine();
uint32_t txndelay_msk = 0;
switch(val){
// todo in firmware, for now setting half speed
case FULL_SPEED://40
printf("\nSetting Half Speed (20 MHz):\n");
printf("Setting Sample Reg to 0x%x\n", SAMPLE_ADC_HALF_SPEED); bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED);
printf("Setting Config Reg to 0x%x\n", CONFIG_HALF_SPEED); bus_w(CONFIG_REG, CONFIG_HALF_SPEED);
printf("Setting ADC Ofst Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL); bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL);
printf("Setting ADC Phase Reg to 0x%x\n", ADC_PHASE_HALF_SPEED); adcPhase(ADC_PHASE_HALF_SPEED);
printf("Setting Sample Reg to 0x%x\n", SAMPLE_ADC_HALF_SPEED);
bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED);
txndelay_msk = (bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK); // read config tdma timeslot value
printf("Setting Config Reg to 0x%x\n", CONFIG_HALF_SPEED | txndelay_msk);
bus_w(CONFIG_REG, CONFIG_HALF_SPEED | txndelay_msk);
printf("Setting ADC Ofst Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL);
bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL);
printf("Setting ADC Phase Reg to 0x%x\n", ADC_PHASE_HALF_SPEED);
adcPhase(ADC_PHASE_HALF_SPEED);
break;
case HALF_SPEED:
printf("\nSetting Half Speed (20 MHz):\n");
printf("Setting Sample Reg to 0x%x\n", SAMPLE_ADC_HALF_SPEED); bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED);
printf("Setting Config Reg to 0x%x\n", CONFIG_HALF_SPEED); bus_w(CONFIG_REG, CONFIG_HALF_SPEED);
printf("Setting ADC Ofst Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL); bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL);
printf("Setting ADC Phase Reg to 0x%x\n", ADC_PHASE_HALF_SPEED); adcPhase(ADC_PHASE_HALF_SPEED);
printf("Setting Sample Reg to 0x%x\n", SAMPLE_ADC_HALF_SPEED);
bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED);
txndelay_msk = (bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK); // read config tdma timeslot value
printf("Setting Config Reg to 0x%x\n", CONFIG_HALF_SPEED | txndelay_msk);
bus_w(CONFIG_REG, CONFIG_HALF_SPEED | txndelay_msk);
printf("Setting ADC Ofst Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL);
bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL);
printf("Setting ADC Phase Reg to 0x%x\n", ADC_PHASE_HALF_SPEED);
adcPhase(ADC_PHASE_HALF_SPEED);
break;
case QUARTER_SPEED:
printf("\nSetting Half Speed (10 MHz):\n");
printf("Setting Sample Reg to 0x%x\n", SAMPLE_ADC_QUARTER_SPEED); bus_w(SAMPLE_REG, SAMPLE_ADC_QUARTER_SPEED);
printf("Setting Config Reg to 0x%x\n", CONFIG_QUARTER_SPEED); bus_w(CONFIG_REG, CONFIG_QUARTER_SPEED);
printf("Setting ADC Ofst Reg to 0x%x\n", ADC_OFST_QUARTER_SPEED_VAL); bus_w(ADC_OFST_REG, ADC_OFST_QUARTER_SPEED_VAL);
printf("Setting ADC Phase Reg to 0x%x\n", ADC_PHASE_QUARTER_SPEED); adcPhase(ADC_PHASE_QUARTER_SPEED);
printf("Setting Sample Reg to 0x%x\n", SAMPLE_ADC_QUARTER_SPEED);
bus_w(SAMPLE_REG, SAMPLE_ADC_QUARTER_SPEED);
txndelay_msk = (bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK); // read config tdma timeslot value
printf("Setting Config Reg to 0x%x\n", CONFIG_QUARTER_SPEED | txndelay_msk);
bus_w(CONFIG_REG, CONFIG_QUARTER_SPEED | txndelay_msk);
printf("Setting ADC Ofst Reg to 0x%x\n", ADC_OFST_QUARTER_SPEED_VAL);
bus_w(ADC_OFST_REG, ADC_OFST_QUARTER_SPEED_VAL);
printf("Setting ADC Phase Reg to 0x%x\n", ADC_PHASE_QUARTER_SPEED);
adcPhase(ADC_PHASE_QUARTER_SPEED);
break;
}
printf("\n");

7
slsDetectorSoftware/jungfrauDetectorServer/slsDetectorServer_defs.h
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@ -8,7 +8,8 @@
#define GOODBYE (-200)
//#define REQUIRED_FIRMWARE_VERSION 16
#define MIN_REQRD_VRSN_T_RD_API 0x171113
#define REQRD_FRMWR_VRSN 0x171113
/* Struct Definitions */
@ -92,8 +93,8 @@ enum DACINDEX {VB_COMP, VDD_PROT, VIN_COM, VREF_PRECH, VB_PIXBUF, VB_DS, VREF
#define SAMPLE_ADC_HALF_SPEED (SAMPLE_DECMT_FACTOR_2_VAL + SAMPLE_DGTL_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_ADC_SAMPLE_0_VAL) /* 0x1000 */
#define SAMPLE_ADC_QUARTER_SPEED (SAMPLE_DECMT_FACTOR_4_VAL + SAMPLE_DGTL_SAMPLE_8_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_ADC_SAMPLE_0_VAL) /* 0x2810 */
#define CONFIG_HALF_SPEED (CONFIG_TDMA_TIMESLOT_0_VAL + CONFIG_TDMA_DISABLE_VAL + CONFIG_HALF_SPEED_20MHZ_VAL + CONFIG_MODE_1_X_10GBE_VAL)
#define CONFIG_QUARTER_SPEED (CONFIG_TDMA_TIMESLOT_0_VAL + CONFIG_TDMA_DISABLE_VAL + CONFIG_QUARTER_SPEED_10MHZ_VAL + CONFIG_MODE_1_X_10GBE_VAL)
#define CONFIG_HALF_SPEED (CONFIG_TDMA_DISABLE_VAL + CONFIG_HALF_SPEED_20MHZ_VAL + CONFIG_MODE_1_X_10GBE_VAL)
#define CONFIG_QUARTER_SPEED (CONFIG_TDMA_DISABLE_VAL + CONFIG_QUARTER_SPEED_10MHZ_VAL + CONFIG_MODE_1_X_10GBE_VAL)
#define ADC_OFST_HALF_SPEED_VAL (0x20) //adc pipeline
#define ADC_OFST_QUARTER_SPEED_VAL (0x0f)
#define ADC_PHASE_HALF_SPEED (0x41)

1
slsDetectorSoftware/slsDetectorServer/slsDetectorFunctionList.h
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@ -35,6 +35,7 @@ u_int64_t getFirmwareVersion();
#ifdef MYTHEND
int64_t getModuleId(enum idMode arg, int imod);
#elif JUNGFRAUD
u_int64_t getFirmwareAPIVersion();
u_int16_t getHardwareVersionNumber();
u_int16_t getHardwareSerialNumber();
#endif