gotthard2 changes for first firmware version

slsDetectorServers/gotthard2DetectorServer/RegisterDefs.h

@@ -2,35 +2,67 @@
 #pragma once
 
 /* Definitions for FPGA*/
-#define MEM_MAP_SHIFT 1
+#define BASE_CONTROL                    (0x000)
+#define BASE_PATTERN_CONTROL            (0x200)
+#define BASE_PATTERN_RAM                (0x10000)
 
+/* FPGA Version register */
+#define FPGA_VERSION_REG                (0x04 + BASE_CONTROL)
+
+#define FPGA_COMPILATION_DATE_OFST		(0)
+#define FPGA_COMPILATION_DATE_MSK		(0x00FFFFFF << FPGA_COMPILATION_DATE_OFST)
+#define DETECTOR_TYPE_OFST   			(24)
+#define DETECTOR_TYPE_MSK   			(0x000000FF << DETECTOR_TYPE_OFST)
+
+/* Module Control Board Serial Number register TODO: versionnumber and serial number? */
+#define MCB_SERIAL_NO_REG               (0x00 + BASE_CONTROL)
+
+/* API Version register TODO: MSK and ofst? */
+#define API_VERSION_REG                 (0x08 + BASE_CONTROL)
+
+/* Fix pattern register */
+#define FIX_PATT_REG             	    (0x0C + BASE_CONTROL)
+#define FIX_PATT_VAL                    (0xACDC2019)
 
 /* Status register */
-#define STATUS_REG            			(0x01 << MEM_MAP_SHIFT)
+#define STATUS_REG                      (0x10 + BASE_CONTROL)
 
+// TODO: is this bit implemented (else make it ifdef virtual)
 #define RUN_BUSY_OFST					(0)
 #define RUN_BUSY_MSK      				(0x00000001 << RUN_BUSY_OFST)
 
-/* Set Cycles 64 bit register */
+/* Look at me register TODO: is this a RW register */
-#define SET_CYCLES_LSB_REG    			(0x02 << MEM_MAP_SHIFT)
+#define LOOK_AT_ME_REG          		(0x14 + BASE_CONTROL)	//Not used in firmware or software, good to play with
-#define SET_CYCLES_MSB_REG    			(0x03 << MEM_MAP_SHIFT)
 
-/* Set Frames 64 bit register */
-#define SET_FRAMES_LSB_REG   			(0x04 << MEM_MAP_SHIFT)
-#define SET_FRAMES_MSB_REG    			(0x05 << MEM_MAP_SHIFT)
 
-/* Set Period 64 bit register tT = T x 50 ns */
-#define SET_PERIOD_LSB_REG    			(0x06 << MEM_MAP_SHIFT)
-#define SET_PERIOD_MSB_REG    			(0x07 << MEM_MAP_SHIFT)
 
-/* Set Exptime 64 bit register eEXP = Exp x 25 ns */
+/* Pattern Control FPGA registers --------------------------------------------------*/
-#define SET_EXPTIME_LSB_REG    			(0x08 << MEM_MAP_SHIFT)
-#define SET_EXPTIME_MSB_REG    			(0x09 << MEM_MAP_SHIFT)
 
-/* Get Cycles 64 bit register */
+//TODO: do we really need the get delay and get period?
-#define GET_CYCLES_LSB_REG    			(0x0A << MEM_MAP_SHIFT)
+/* Cycles left 64bit Register */
-#define GET_CYCLES_MSB_REG    			(0x0B << MEM_MAP_SHIFT)
+#define GET_CYCLES_LSB_REG              (0x10 + BASE_PATTERN_CONTROL)
+#define GET_CYCLES_MSB_REG              (0x14 + BASE_PATTERN_CONTROL)
 
-/* Get Frames 64 bit register */
+/* Frames left 64bit Register */
-#define GET_FRAMES_LSB_REG   			(0x0C << MEM_MAP_SHIFT)
+#define GET_FRAMES_LSB_REG              (0x18 + BASE_PATTERN_CONTROL)
-#define GET_FRAMES_MSB_REG    			(0x0D << MEM_MAP_SHIFT)
+#define GET_FRAMES_MSB_REG              (0x1C + BASE_PATTERN_CONTROL)
+
+/* Delay 64bit Write-register */
+#define SET_DELAY_LSB_REG               (0x88 + BASE_PATTERN_CONTROL)
+#define SET_DELAY_MSB_REG               (0x8C + BASE_PATTERN_CONTROL)
+
+/* Cylces 64bit Write-register */
+#define SET_CYCLES_LSB_REG              (0x90 + BASE_PATTERN_CONTROL)
+#define SET_CYCLES_MSB_REG              (0x94 + BASE_PATTERN_CONTROL)
+
+/* Frames 64bit Write-register */
+#define SET_FRAMES_LSB_REG              (0x98 + BASE_PATTERN_CONTROL)
+#define SET_FRAMES_MSB_REG              (0x9C + BASE_PATTERN_CONTROL)
+
+/* Period 64bit Write-register */
+#define SET_PERIOD_LSB_REG              (0xA0 + BASE_PATTERN_CONTROL)
+#define SET_PERIOD_MSB_REG              (0xA4 + BASE_PATTERN_CONTROL)
+
+/* Exptime 64bit Write-register TODO: ?? */
+#define SET_EXPTIME_LSB_REG             (0xA8 + BASE_PATTERN_CONTROL)
+#define SET_EXPTIME_MSB_REG             (0xBC + BASE_PATTERN_CONTROL)

slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c

@@ -1,4 +1,5 @@
 #include "slsDetectorFunctionList.h"
+#include "RegisterDefs.h"
 #include "versionAPI.h"
 #include "clogger.h"
 #include "nios.h"
@@ -31,6 +32,8 @@ int virtual_status = 0;
 int virtual_stop = 0;
 #endif
 
+
+uint32_t clkDivider[NUM_CLOCKS] = {125, 20, 80};
 int highvoltage = 0;
 
 
@@ -60,13 +63,158 @@ void basictests() {
     firmware_check_done = 1;
     return;
 #else
-	// faking it
+
+	FILE_LOG(logINFOBLUE, ("******** Gotthard2 Server *****************\n"));
+	if (mapCSP0() == FAIL) {
+    	strcpy(firmware_message,
+				"Could not map to memory. Dangerous to continue.\n");
+		FILE_LOG(logERROR, ("%s\n\n", firmware_message));
+		firmware_compatibility = FAIL;
 		firmware_check_done = 1;
+		return;
+    }
+	// does check only if flag is 0 (by default), set by command line
+	if ((!debugflag) && ((testFpga() == FAIL))) {
+		strcpy(firmware_message,
+				"Could not pass basic tests of FPGA and bus. Dangerous to continue.\n");
+		FILE_LOG(logERROR, ("%s\n\n", firmware_message));
+		firmware_compatibility = FAIL;
+		firmware_check_done = 1;
+		return;
+	}
 
+	uint32_t ipadd				= getDetectorIP();
+	uint64_t macadd				= getDetectorMAC();
+	int64_t fwversion 			= getDetectorId(DETECTOR_FIRMWARE_VERSION);
+	int64_t swversion 			= getDetectorId(DETECTOR_SOFTWARE_VERSION);
+	int64_t sw_fw_apiversion    = getDetectorId(SOFTWARE_FIRMWARE_API_VERSION);
+	int64_t client_sw_apiversion = getDetectorId(CLIENT_SOFTWARE_API_VERSION);
+	uint32_t requiredFirmwareVersion = REQRD_FRMWRE_VRSN;
 
+	FILE_LOG(logINFOBLUE, ("************ Gotthard2 Server *********************\n"
+			"Detector IP Addr:\t\t 0x%x\n"
+			"Detector MAC Addr:\t\t 0x%llx\n\n"
+
+			"Firmware Version:\t\t 0x%llx\n"
+			"Software Version:\t\t 0x%llx\n"
+			"F/w-S/w API Version:\t\t 0x%llx\n"
+			"Required Firmware Version:\t 0x%x\n"
+			"Client-Software API Version:\t 0x%llx\n"
+			"********************************************************\n",
+			ipadd,
+			(long  long unsigned int)macadd,
+			(long  long int)fwversion,
+			(long  long int)swversion,
+			(long  long int)sw_fw_apiversion,
+			requiredFirmwareVersion,
+			(long long int)client_sw_apiversion
+	));
+
+	// return if flag is not zero, debug mode
+	if (debugflag) {
+		firmware_check_done = 1;
+		return;
+	}
+
+	//cant read versions
+    FILE_LOG(logINFO, ("Testing Firmware-software compatibility:\n"));
+	if(!fwversion || !sw_fw_apiversion){
+		strcpy(firmware_message,
+				"Cant read versions from FPGA. Please update firmware.\n");
+		FILE_LOG(logERROR, (firmware_message));
+		firmware_compatibility = FAIL;
+		firmware_check_done = 1;
+		return;
+	}
+
+	//check for API compatibility - old server
+	if(sw_fw_apiversion > requiredFirmwareVersion){
+		sprintf(firmware_message,
+				"This detector software software version (0x%llx) is incompatible.\n"
+				"Please update detector software (min. 0x%llx) to be compatible with this firmware.\n",
+				(long long int)sw_fw_apiversion,
+				(long long int)requiredFirmwareVersion);
+		FILE_LOG(logERROR, (firmware_message));
+		firmware_compatibility = FAIL;
+		firmware_check_done = 1;
+		return;
+	}
+
+	//check for firmware compatibility - old firmware
+	if( requiredFirmwareVersion > fwversion) {
+		sprintf(firmware_message,
+				"This firmware version (0x%llx) is incompatible.\n"
+				"Please update firmware (min. 0x%llx) to be compatible with this server.\n",
+				(long long int)fwversion,
+				(long long int)requiredFirmwareVersion);
+		FILE_LOG(logERROR, (firmware_message));
+		firmware_compatibility = FAIL;
+		firmware_check_done = 1;
+		return;
+	}
+	FILE_LOG(logINFO, ("Compatibility - success\n"));
+	firmware_check_done = 1;		
 #endif
 }
 
+int checkType() {
+#ifdef VIRTUAL
+    return OK;
+#endif
+	volatile u_int32_t type = ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST);
+	if (type != GOTTHARD2){
+			FILE_LOG(logERROR, ("This is not a Gotthard2 Server (read %d, expected %d)\n", type, GOTTHARD2));
+			return FAIL;
+		}
+	return OK;
+}
+
+int testFpga() {
+#ifdef VIRTUAL
+    return OK;
+#endif
+	FILE_LOG(logINFO, ("Testing FPGA:\n"));
+
+	//fixed pattern
+	int ret = OK;
+	volatile u_int32_t val = bus_r(FIX_PATT_REG);
+	if (val == FIX_PATT_VAL) {
+		FILE_LOG(logINFO, ("Fixed pattern: successful match 0x%08x\n",val));
+	} else {
+		FILE_LOG(logERROR, ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", val, FIX_PATT_VAL));
+		ret = FAIL;
+	}
+	return ret;
+}
+
+int testBus() {
+#ifdef VIRTUAL
+    return OK;
+#endif
+	FILE_LOG(logINFO, ("Testing Bus:\n"));
+
+	int ret = OK;
+	u_int32_t addr = LOOK_AT_ME_REG; //TODO: is this a RW register?
+	int times = 1000 * 1000;
+	int i = 0;
+
+	for (i = 0; i < times; ++i) {
+		bus_w(addr, i * 100);
+		if (i * 100 != bus_r(addr)) {
+			FILE_LOG(logERROR, ("Mismatch! Wrote 0x%x, read 0x%x\n",
+					i * 100, bus_r(addr)));
+			ret = FAIL;
+		}
+	}
+
+	bus_w(addr, 0);
+
+	if (ret == OK) {
+		FILE_LOG(logINFO, ("Successfully tested bus %d times\n", times));
+	}
+	return ret;
+}
+
 /* Ids */
 
 int64_t getDetectorId(enum idMode arg){
@@ -91,21 +239,21 @@ u_int64_t getFirmwareVersion() {
 #ifdef VIRTUAL
     return 0;
 #endif
-	return 0;
+	return ((bus_r(FPGA_VERSION_REG) & FPGA_COMPILATION_DATE_MSK) >> FPGA_COMPILATION_DATE_OFST);
 }
 
 u_int64_t getFirmwareAPIVersion() {
 #ifdef VIRTUAL
     return 0;
 #endif
-    return 0;
+    return ((bus_r(API_VERSION_REG)));//TODO: & API_VERSION_MSK) >> API_VERSION_OFST);
 }
 
 u_int32_t getDetectorNumber(){
 #ifdef VIRTUAL
     return 0;
 #endif
-	return 0;
+	return bus_r(MCB_SERIAL_NO_REG);
 }
 
 
@@ -178,11 +326,18 @@ void initStopServer() {
 void setupDetector() {
     FILE_LOG(logINFO, ("This Server is for 1 Gotthard2 module \n")); 
 
-	// hv
+	clkDivider[RUN_CLK] = DEFAULT_RUN_CLK;
-    DAC6571_SetDefines(HV_HARD_MAX_VOLTAGE, HV_DRIVER_FILE_NAME);
+	clkDivider[TICK_CLK] = DEFAULT_TICK_CLK;
-    setHighVoltage(DEFAULT_HIGH_VOLTAGE);
+	clkDivider[SAMPLING_CLK] = DEFAULT_SAMPLING_CLK;
+	highvoltage = 0;
 
-	//Initialization of acquistion parameters
+	// hv
+#ifndef VIRTUAL
+    DAC6571_SetDefines(HV_HARD_MAX_VOLTAGE, HV_DRIVER_FILE_NAME);
+#endif
+
+	// Default values
+    setHighVoltage(DEFAULT_HIGH_VOLTAGE);
 	setTimer(FRAME_NUMBER, DEFAULT_NUM_FRAMES);
 	setTimer(CYCLES_NUMBER, DEFAULT_NUM_CYCLES);
 	setTimer(ACQUISITION_TIME, DEFAULT_EXPTIME);
@@ -193,7 +348,7 @@ void setupDetector() {
 /* set parameters -  dr, roi */
 
 int setDynamicRange(int dr){
-	return -1;
+	return DYNAMIC_RANGE;
 }
 
 
@@ -203,7 +358,7 @@ int setDynamicRange(int dr){
 int64_t setTimer(enum timerIndex ind, int64_t val) {
 
 	int64_t retval = -1;
-#ifdef VIRTUAL
+
 	switch(ind){
 
 	case FRAME_NUMBER: // defined in sls_detector_defs.h (general)
@@ -217,18 +372,18 @@ int64_t setTimer(enum timerIndex ind, int64_t val) {
 	case ACQUISITION_TIME:
 		if(val >= 0){
 			FILE_LOG(logINFO, ("Setting exptime: %lldns\n", (long long int)val));
-			val *= (1E-3 * TEMP_CLK);
+			val *= (1E-3 * RUN_CLK);
 		}
-		retval = set64BitReg(val, SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG) / (1E-3 * TEMP_CLK); // CLK defined in slsDetectorServer_defs.h
+		retval = set64BitReg(val, SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG) / (1E-3 * RUN_CLK); // CLK defined in slsDetectorServer_defs.h
 		FILE_LOG(logDEBUG1, ("Getting exptime: %lldns\n", (long long int)retval));
 		break;
 
 	case FRAME_PERIOD:
 		if(val >= 0){
 			FILE_LOG(logINFO, ("Setting period: %lldns\n",(long long int)val));
-			val *= (1E-3 * TEMP_CLK);
+			val *= (1E-3 * TICK_CLK);
 		}
-		retval = set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG )/ (1E-3 * TEMP_CLK);
+		retval = set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG )/ (1E-3 * TICK_CLK);
 		FILE_LOG(logDEBUG1, ("Getting period: %lldns\n", (long long int)retval));
 		break;
 	case CYCLES_NUMBER:
@@ -243,9 +398,8 @@ int64_t setTimer(enum timerIndex ind, int64_t val) {
 		FILE_LOG(logERROR, ("Timer Index not implemented for this detector: %d\n", ind));
 		break;
 	}
-#endif
-	return retval;
 
+	return retval;
 }
 
 int validateTimer(enum timerIndex ind, int64_t val, int64_t retval) {
@@ -253,11 +407,18 @@ int validateTimer(enum timerIndex ind, int64_t val, int64_t retval) {
         return OK;
     switch(ind) {
     case ACQUISITION_TIME:
+		// convert to freq
+        val *= (1E-3 * RUN_CLK);
+        // convert back to timer
+        val = (val) / (1E-3 * RUN_CLK);
+        if (val != retval)
+            return FAIL;
+        break;
     case FRAME_PERIOD:
 		// convert to freq
-        val *= (1E-3 * TEMP_CLK);
+        val *= (1E-3 * TICK_CLK);
         // convert back to timer
-        val = (val) / (1E-3 * TEMP_CLK);
+        val = (val) / (1E-3 * TICK_CLK);
         if (val != retval)
             return FAIL;
         break;
@@ -269,10 +430,6 @@ int validateTimer(enum timerIndex ind, int64_t val, int64_t retval) {
 
 
 int64_t getTimeLeft(enum timerIndex ind){
-#ifdef VIRTUAL
-    return 0;
-#endif
-#ifdef VIRTUAL
 	int64_t retval = -1;
 	switch(ind){
 
@@ -290,8 +447,7 @@ int64_t getTimeLeft(enum timerIndex ind){
 		FILE_LOG(logERROR, ("Remaining Timer index not implemented for this detector: %d\n", ind));
 		break;
 	}
-#endif
+	return retval;
-	return -1;
 }
 
 
@@ -329,9 +485,112 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
 	}
     return OK;
 #endif
+	FILE_LOG(logINFOBLUE, ("Configuring MAC\n"));
+	
+	uint32_t sourceport  =  DEFAULT_TX_UDP_PORT;
+	FILE_LOG(logINFO, ("\tSource IP   : %d.%d.%d.%d \t\t(0x%08x)\n",
+	        (sourceip>>24)&0xff,(sourceip>>16)&0xff,(sourceip>>8)&0xff,(sourceip)&0xff, sourceip));
+	FILE_LOG(logINFO, ("\tSource MAC  : %02x:%02x:%02x:%02x:%02x:%02x \t(0x%010llx)\n",
+			(unsigned int)((sourcemac>>40)&0xFF),
+			(unsigned int)((sourcemac>>32)&0xFF),
+			(unsigned int)((sourcemac>>24)&0xFF),
+			(unsigned int)((sourcemac>>16)&0xFF),
+			(unsigned int)((sourcemac>>8)&0xFF),
+			(unsigned int)((sourcemac>>0)&0xFF),
+			(long  long unsigned int)sourcemac));
+	FILE_LOG(logINFO, ("\tSource Port : %d \t\t\t(0x%08x)\n",sourceport, sourceport));
+
+	FILE_LOG(logINFO, ("\tDest. IP    : %d.%d.%d.%d \t\t\t(0x%08x)\n",
+	        (destip>>24)&0xff,(destip>>16)&0xff,(destip>>8)&0xff,(destip)&0xff, destip));
+	FILE_LOG(logINFO, ("\tDest. MAC   : %02x:%02x:%02x:%02x:%02x:%02x \t(0x%010llx)\n",
+			(unsigned int)((destmac>>40)&0xFF),
+			(unsigned int)((destmac>>32)&0xFF),
+			(unsigned int)((destmac>>24)&0xFF),
+			(unsigned int)((destmac>>16)&0xFF),
+			(unsigned int)((destmac>>8)&0xFF),
+			(unsigned int)((destmac>>0)&0xFF),
+			(long  long unsigned int)destmac));
+	FILE_LOG(logINFO, ("\tDest. Port  : %d \t\t\t(0x%08x)\n\n",udpport, udpport));
+
+	// start addr
+	uint32_t addr = BASE_PATTERN_RAM;
+	// calculate rxr endpoint offset
+	//addr += (iRxEntry * RXR_ENDPOINT_OFST);//TODO: is there round robin already implemented?
+	// get struct memory
+	udp_header *udp = (udp_header*) (Nios_getBaseAddress() + addr/(sizeof(u_int32_t)));
+	memset(udp, 0, sizeof(udp_header));
+
+	//  mac addresses	
+	// msb (32) + lsb (16)
+	udp->udp_destmac_msb	= ((destmac >> 16) & BIT32_MASK);
+	udp->udp_destmac_lsb	= ((destmac >> 0) & BIT16_MASK);
+	// msb (16) + lsb (32)
+	udp->udp_srcmac_msb		= ((sourcemac >> 32) & BIT16_MASK);
+	udp->udp_srcmac_lsb		= ((sourcemac >> 0) & BIT32_MASK);
+
+	// ip addresses
+	udp->ip_srcip_msb		= ((sourceip >> 16) & BIT16_MASK);
+	udp->ip_srcip_lsb		= ((sourceip >> 0) & BIT16_MASK);	
+	udp->ip_destip_msb		= ((destip >> 16) & BIT16_MASK);
+	udp->ip_destip_lsb		= ((destip >> 0) & BIT16_MASK);	
+
+	// source port
+	udp->udp_srcport 		= sourceport;
+	udp->udp_destport		= udpport;
+
+	// other defines
+	udp->udp_ethertype		= 0x800;
+	udp->ip_ver				= 0x4;
+	udp->ip_ihl				= 0x5;
+	udp->ip_flags			= 0x2; //FIXME
+	udp->ip_ttl           	= 0x40;
+	udp->ip_protocol      	= 0x11;
+	// total length is redefined in firmware
+
+	calcChecksum(udp);
+
+	//TODO?
+	//cleanFifos();
+	//resetCore();
+	//alignDeserializer();
+
 	return OK;
 }
 
+void calcChecksum(udp_header* udp) {
+	int count = IP_HEADER_SIZE;
+	long int sum = 0;
+	
+	// start at ip_tos as the memory is not continous for ip header
+	uint16_t *addr = (uint16_t*) (&(udp->ip_tos)); 
+
+	sum += *addr++;
+	count -= 2;
+
+	// ignore ethertype (from udp header)
+	addr++;
+
+	// from identification to srcip_lsb
+    while( count > 2 )  {
+		sum += *addr++;
+		count -= 2;
+	}
+
+	// ignore src udp port (from udp header)
+	addr++;
+	
+	if (count > 0)
+	    sum += *addr;                     // Add left-over byte, if any
+	while (sum >> 16)
+	    sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits
+	long int checksum = sum & 0xffff;
+	checksum += UDP_IP_HEADER_LENGTH_BYTES;
+	FILE_LOG(logINFO, ("\tIP checksum is 0x%lx\n",checksum));
+	udp->ip_checksum = checksum;
+}
+
+
+/* aquisition */
 
 int startStateMachine(){
 #ifdef VIRTUAL
@@ -447,7 +706,7 @@ u_int32_t runBusy() {
 /* common */
 
 int calculateDataBytes(){
-	return 0;
+	return getTotalNumberOfChannels() * DYNAMIC_RANGE;
 }
 
 int getTotalNumberOfChannels(){return  ((int)getNumberOfChannelsPerChip() * (int)getNumberOfChips());}

slsDetectorServers/gotthard2DetectorServer/slsDetectorServer_defs.h

@@ -1,19 +1,16 @@
 #pragma once
 #include "sls_detector_defs.h"
-#include "RegisterDefs.h"
 
+#define REQRD_FRMWRE_VRSN     		(0x190708)//TODO
 
 #define CTRL_SRVR_INIT_TIME_US      (300 * 1000)
 
-
-/* Enums */
-enum DACINDEX				{DAC0};
-
 /* Hardware Definitions */
 #define NCHAN 						(128)
 #define NCHIP 						(10)
 #define NDAC 						(16)
-#define TEMP_CLK					(20)	/* MHz */
+#define DYNAMIC_RANGE               (16) //TODO: correct?
+
 #define HV_SOFT_MAX_VOLTAGE         (200)
 #define HV_HARD_MAX_VOLTAGE         (530)
 #define HV_DRIVER_FILE_NAME         ("/root/devlinks/hvdac")
@@ -24,3 +21,43 @@ enum DACINDEX				{DAC0};
 #define DEFAULT_EXPTIME				(1 * 1000 * 1000)	        // 1 ms
 #define DEFAULT_PERIOD				(1 * 1000 * 1000 * 1000)	// 1 s
 #define DEFAULT_HIGH_VOLTAGE		(0)
+#define DEFAULT_RUN_CLK             (125) 
+#define DEFAULT_TICK_CLK            (20) // will be fixed later. Not configurable
+#define DEFAULT_SAMPLING_CLK        (80)
+
+#define DEFAULT_TX_UDP_PORT			(0x7e9a)
+
+/* Firmware Definitions */
+#define IP_HEADER_SIZE              (20)
+
+/** Other Definitions */
+#define BIT16_MASK					(0xFFFF)
+
+/* Enums */
+enum DACINDEX				        {DAC0};
+enum CLKINDEX                       {RUN_CLK, TICK_CLK, SAMPLING_CLK, NUM_CLOCKS};
+
+/* Struct Definitions */
+typedef struct udp_header_struct {
+	uint32_t	udp_destmac_msb;
+	uint16_t	udp_srcmac_msb;
+	uint16_t	udp_destmac_lsb;
+	uint32_t	udp_srcmac_lsb;
+	uint8_t		ip_tos;
+	uint8_t		ip_ihl: 4, ip_ver: 4;
+	uint16_t	udp_ethertype;
+	uint16_t	ip_identification;
+	uint16_t	ip_totallength;
+	uint8_t		ip_protocol;
+	uint8_t		ip_ttl;
+	uint16_t	ip_fragmentoffset: 13, ip_flags: 3;
+	uint16_t	ip_srcip_msb;
+	uint16_t	ip_checksum;
+	uint16_t	ip_destip_msb;
+	uint16_t	ip_srcip_lsb;
+	uint16_t	udp_srcport;
+	uint16_t	ip_destip_lsb;
+	uint16_t	udp_checksum;
+	uint16_t	udp_destport;
+} udp_header;
+#define UDP_IP_HEADER_LENGTH_BYTES	(28)

slsDetectorServers/slsDetectorServer/include/nios.h

@@ -69,3 +69,8 @@ u_int32_t writeRegister(u_int32_t offset, u_int32_t data);
  * Map FPGA
  */
 int mapCSP0(void);
+
+/**
+ * Get Nios base address
+ */
+u_int32_t* Nios_getBaseAddress();

slsDetectorServers/slsDetectorServer/include/slsDetectorFunctionList.h

@@ -19,7 +19,7 @@ enum interfaceType {OUTER, INNER};
 int			isFirmwareCheckDone();
 int			getFirmwareCheckResult(char** mess);
 void 		basictests();
-#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD)
+#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(GOTTHARD2D)
 int 		checkType();
 int 		testFpga();
 int 		testBus();
@@ -250,6 +250,8 @@ int 	getNumberofUDPInterfaces();
 void 	selectPrimaryInterface(int val);
 int 	getPrimaryInterface();
 void 	setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip, uint64_t destmac, uint32_t destport, uint64_t sourcemac, uint32_t sourceip, uint32_t sourceport);
+#endif
+#if defined(JUNGFRAUD) || defined(GOTTHARD2D)
 void 	calcChecksum(udp_header* udp);
 #endif
 #if defined(CHIPTESTBOARDD) || defined(MOENCHD)

slsDetectorServers/slsDetectorServer/src/nios.c

@@ -62,11 +62,11 @@ void setU64BitReg(uint64_t value, int aLSB, int aMSB){
 }
 
 u_int32_t readRegister(u_int32_t offset) {
-	return bus_r(offset << MEM_MAP_SHIFT);
+	return bus_r(offset);
 }
 
 u_int32_t writeRegister(u_int32_t offset, u_int32_t data) {
-	bus_w(offset << MEM_MAP_SHIFT, data);
+	bus_w(offset, data);
 	return readRegister(offset);
 }
 
@@ -104,3 +104,6 @@ int mapCSP0(void) {
 }
 
 
+u_int32_t* Nios_getBaseAddress() {
+	return csp0base;
+}

slsSupportLib/include/versionAPI.h

@@ -9,4 +9,4 @@
 #define APIJUNGFRAU 0x190902
 #define APIEIGER 0x190902
 #define APIMYTHEN3 0x190903
-#define APIGOTTHARD2 0x190903
+#define APIGOTTHARD2 0x190926