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https://github.com/slsdetectorgroup/slsDetectorPackage.git
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68 lines
2.6 KiB
C
68 lines
2.6 KiB
C
// stuff from Carlos
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#pragma once
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/* Definitions for FPGA*/
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#define BASE_CONTROL (0x000)
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#define BASE_PATTERN_CONTROL (0x200)
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#define BASE_PATTERN_RAM (0x10000)
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/* FPGA Version register */
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#define FPGA_VERSION_REG (0x04 + BASE_CONTROL)
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#define FPGA_COMPILATION_DATE_OFST (0)
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#define FPGA_COMPILATION_DATE_MSK (0x00FFFFFF << FPGA_COMPILATION_DATE_OFST)
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#define DETECTOR_TYPE_OFST (24)
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#define DETECTOR_TYPE_MSK (0x000000FF << DETECTOR_TYPE_OFST)
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/* Module Control Board Serial Number register TODO: versionnumber and serial number? */
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#define MCB_SERIAL_NO_REG (0x00 + BASE_CONTROL)
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/* API Version register TODO: MSK and ofst? */
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#define API_VERSION_REG (0x08 + BASE_CONTROL)
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/* Fix pattern register */
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#define FIX_PATT_REG (0x0C + BASE_CONTROL)
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#define FIX_PATT_VAL (0xACDC2019)
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/* Status register */
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#define STATUS_REG (0x10 + BASE_CONTROL)
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// TODO: is this bit implemented (else make it ifdef virtual)
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#define RUN_BUSY_OFST (0)
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#define RUN_BUSY_MSK (0x00000001 << RUN_BUSY_OFST)
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/* Look at me register TODO: is this a RW register */
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#define LOOK_AT_ME_REG (0x14 + BASE_CONTROL) //Not used in firmware or software, good to play with
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/* Pattern Control FPGA registers --------------------------------------------------*/
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//TODO: do we really need the get delay and get period?
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/* Cycles left 64bit Register */
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#define GET_CYCLES_LSB_REG (0x10 + BASE_PATTERN_CONTROL)
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#define GET_CYCLES_MSB_REG (0x14 + BASE_PATTERN_CONTROL)
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/* Frames left 64bit Register */
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#define GET_FRAMES_LSB_REG (0x18 + BASE_PATTERN_CONTROL)
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#define GET_FRAMES_MSB_REG (0x1C + BASE_PATTERN_CONTROL)
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/* Delay 64bit Write-register */
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#define SET_DELAY_LSB_REG (0x88 + BASE_PATTERN_CONTROL)
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#define SET_DELAY_MSB_REG (0x8C + BASE_PATTERN_CONTROL)
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/* Cylces 64bit Write-register */
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#define SET_CYCLES_LSB_REG (0x90 + BASE_PATTERN_CONTROL)
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#define SET_CYCLES_MSB_REG (0x94 + BASE_PATTERN_CONTROL)
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/* Frames 64bit Write-register */
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#define SET_FRAMES_LSB_REG (0x98 + BASE_PATTERN_CONTROL)
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#define SET_FRAMES_MSB_REG (0x9C + BASE_PATTERN_CONTROL)
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/* Period 64bit Write-register */
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#define SET_PERIOD_LSB_REG (0xA0 + BASE_PATTERN_CONTROL)
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#define SET_PERIOD_MSB_REG (0xA4 + BASE_PATTERN_CONTROL)
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/* Exptime 64bit Write-register TODO: ?? */
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#define SET_EXPTIME_LSB_REG (0xA8 + BASE_PATTERN_CONTROL)
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#define SET_EXPTIME_MSB_REG (0xBC + BASE_PATTERN_CONTROL) |