jungfrau server: feature finish: switching between 2 interfaces

This commit is contained in:
maliakal_d 2019-05-17 19:19:03 +02:00
parent 1943e77b24
commit 1a1c6b9b42
15 changed files with 312 additions and 176 deletions

View File

@ -197,15 +197,16 @@
#define CONFIG_RDT_TMR_MSK (0x0000FFFF << CONFIG_RDT_TMR_OFST) #define CONFIG_RDT_TMR_MSK (0x0000FFFF << CONFIG_RDT_TMR_OFST)
#define CONFIG_OPRTN_MDE_2_X_10GbE_OFST (16) #define CONFIG_OPRTN_MDE_2_X_10GbE_OFST (16)
#define CONFIG_OPRTN_MDE_2_X_10GbE_MSK (0x00000001 << CONFIG_OPRTN_MDE_2_X_10GbE_OFST) #define CONFIG_OPRTN_MDE_2_X_10GbE_MSK (0x00000001 << CONFIG_OPRTN_MDE_2_X_10GbE_OFST)
#define CONFIG_OPRTN_MDE_1_X_10GBE_VAL ((0x0 << CONFIG_OPRTN_MDE_2_X_10GbE_OFST) & CONFIG_OPRTN_MDE_2_X_10GbE_MSK) // if 0, outer is the primary interface
#define CONFIG_INNR_PRIMRY_INTRFCE_OFST (17)
#define CONFIG_INNR_PRIMRY_INTRFCE_MSK (0x00000001 << CONFIG_INNR_PRIMRY_INTRFCE_OFST)
#define CONFIG_READOUT_SPEED_OFST (20) #define CONFIG_READOUT_SPEED_OFST (20)
#define CONFIG_READOUT_SPEED_MSK (0x00000003 << CONFIG_READOUT_SPEED_OFST) #define CONFIG_READOUT_SPEED_MSK (0x00000003 << CONFIG_READOUT_SPEED_OFST)
#define CONFIG_QUARTER_SPEED_10MHZ_VAL ((0x0 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK) #define CONFIG_QUARTER_SPEED_10MHZ_VAL ((0x0 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK)
#define CONFIG_HALF_SPEED_20MHZ_VAL ((0x1 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK) #define CONFIG_HALF_SPEED_20MHZ_VAL ((0x1 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK)
#define CONFIG_FULL_SPEED_40MHZ_VAL ((0x2 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK) #define CONFIG_FULL_SPEED_40MHZ_VAL ((0x2 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK)
#define CONFIG_TDMA_OFST (24) #define CONFIG_TDMA_ENABLE_OFST (24)
#define CONFIG_TDMA_MSK (0x00000001 << CONFIG_TDMA_OFST) #define CONFIG_TDMA_ENABLE_MSK (0x00000001 << CONFIG_TDMA_ENABLE_OFST)
#define CONFIG_TDMA_DISABLE_VAL ((0x0 << CONFIG_TDMA_OFST) & CONFIG_TDMA_MSK)
#define CONFIG_TDMA_TIMESLOT_OFST (25) // 1ms #define CONFIG_TDMA_TIMESLOT_OFST (25) // 1ms
#define CONFIG_TDMA_TIMESLOT_MSK (0x0000001F << CONFIG_TDMA_TIMESLOT_OFST) #define CONFIG_TDMA_TIMESLOT_MSK (0x0000001F << CONFIG_TDMA_TIMESLOT_OFST)
#define CONFIG_ETHRNT_FLW_CNTRL_OFST (31) #define CONFIG_ETHRNT_FLW_CNTRL_OFST (31)
@ -234,6 +235,12 @@
#define CONTROL_ACQ_FIFO_CLR_MSK (0x00000001 << CONTROL_ACQ_FIFO_CLR_OFST) #define CONTROL_ACQ_FIFO_CLR_MSK (0x00000001 << CONTROL_ACQ_FIFO_CLR_OFST)
#define CONTROL_STORAGE_CELL_NUM_OFST (16) #define CONTROL_STORAGE_CELL_NUM_OFST (16)
#define CONTROL_STORAGE_CELL_NUM_MSK (0x0000000F << CONTROL_STORAGE_CELL_NUM_OFST) #define CONTROL_STORAGE_CELL_NUM_MSK (0x0000000F << CONTROL_STORAGE_CELL_NUM_OFST)
#define CONTROL_RX_ADDTNL_ENDPTS_NUM_OFST (20)
#define CONTROL_RX_ADDTNL_ENDPTS_NUM_MSK (0x0000003F << CONTROL_RX_ADDTNL_ENDPTS_NUM_OFST)
#define CONTROL_RX_ENDPTS_START_OFST (26)
#define CONTROL_RX_ENDPTS_START_MSK (0x0000003F << CONTROL_RX_ENDPTS_START_OFST)
/* Reconfiguratble PLL Paramater Register */ /* Reconfiguratble PLL Paramater Register */
#define PLL_PARAM_REG (0x50 << MEM_MAP_SHIFT) #define PLL_PARAM_REG (0x50 << MEM_MAP_SHIFT)
@ -400,6 +407,32 @@
#define COORD_0_Z_OFST (0) #define COORD_0_Z_OFST (0)
#define COORD_0_Z_MSK (0x0000FFFF << COORD_0_Z_OFST) #define COORD_0_Z_MSK (0x0000FFFF << COORD_0_Z_OFST)
/** Module row coordinates */
/*#define COORD_ROW_REG (0x7C << MEM_MAP_SHIFT)
#define COORD_ROW_OUTER_OFST (0)
#define COORD_ROW_OUTER_MSK (0x0000FFFF << COORD_ROW_OUTER_OFST)
#define COORD_ROW_INNER_OFST (16)
#define COORD_ROW_INNER_MSK (0x0000FFFF << COORD_ROW_INNER_OFST)
*/
/** Module column coordinates */
/*#define COORD_COL_REG (0x7D << MEM_MAP_SHIFT)
#define COORD_COL_OUTER_OFST (0)
#define COORD_COL_OUTER_MSK (0x0000FFFF << COORD_COL_OUTER_OFST)
#define COORD_COL_INNER_OFST (16)
#define COORD_COL_INNER_MSK (0x0000FFFF << COORD_COL_INNER_OFST)
*/
/** Module column coordinates */
/*#define COORD_RESERVED_REG (0x7E << MEM_MAP_SHIFT)
#define COORD_RESERVED_OUTER_OFST (0)
#define COORD_RESERVED_OUTER_MSK (0x0000FFFF << COORD_RESERVED_OUTER_OFST)
#define COORD_RESERVED_INNER_OFST (16)
#define COORD_RESERVED_INNER_MSK (0x0000FFFF << COORD_RESERVED_INNER_OFST)
*/
/* ASIC Control Register */ /* ASIC Control Register */
#define ASIC_CTRL_REG (0x7F << MEM_MAP_SHIFT) #define ASIC_CTRL_REG (0x7F << MEM_MAP_SHIFT)
// tPC = (PCT + 1) * 25ns // tPC = (PCT + 1) * 25ns
@ -440,6 +473,13 @@
/* Round Robin */
#define RXR_ENDPOINTS_MAX (64)
#define RXR_ENDPOINT_OUTER_START_REG (0x1000 << MEM_MAP_SHIFT)
#define RXR_ENDPOINT_INNER_START_REG (0x2000 << MEM_MAP_SHIFT)
#define RXR_ENDPOINT_OFST (0x10 << MEM_MAP_SHIFT)

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@ -34,7 +34,6 @@ int highvoltage = 0;
int dacValues[NDAC] = {0}; int dacValues[NDAC] = {0};
int adcPhase = 0; int adcPhase = 0;
int isFirmwareCheckDone() { int isFirmwareCheckDone() {
return firmware_check_done; return firmware_check_done;
} }
@ -172,8 +171,8 @@ int checkType() {
return OK; return OK;
#endif #endif
volatile u_int32_t type = ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST); volatile u_int32_t type = ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST);
if (type != BOARD_JUNGFRAU_TYPE){ if (type != JUNGFRAU){
FILE_LOG(logERROR, ("This is not a Jungfrau Server (read %d, expected %d)\n", type, BOARD_JUNGFRAU_TYPE)); FILE_LOG(logERROR, ("This is not a Jungfrau Server (read %d, expected %d)\n", type, JUNGFRAU));
return FAIL; return FAIL;
} }
@ -423,11 +422,11 @@ void setupDetector() {
resetCore(); resetCore();
alignDeserializer(); alignDeserializer();
configureASICTimer(); configureASICTimer();
bus_w(ADC_PORT_INVERT_REG, ADC_PORT_INVERT_VAL); bus_w(ADC_PORT_INVERT_REG, ADC_PORT_INVERT_VAL);
initReadoutConfiguration();
//Initialization of acquistion parameters //Initialization of acquistion parameters
setSettings(DEFAULT_SETTINGS); setSettings(DEFAULT_SETTINGS);
@ -654,12 +653,12 @@ int64_t getTimeLeft(enum timerIndex ind){
retval = get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG) / (1E-3 * CLK_SYNC); retval = get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG) / (1E-3 * CLK_SYNC);
FILE_LOG(logINFO, ("Getting period left: %lldns\n", (long long int)retval)); FILE_LOG(logINFO, ("Getting period left: %lldns\n", (long long int)retval));
break; break;
/*
case DELAY_AFTER_TRIGGER: case DELAY_AFTER_TRIGGER:
retval = get64BitReg(xxx) / (1E-3 * CLK_SYNC); retval = get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG) / (1E-3 * CLK_SYNC);
FILE_LOG(logINFO, ("Getting delay left: %lldns\n", (long long int)retval)); FILE_LOG(logINFO, ("Getting delay left: %lldns\n", (long long int)retval));
break; break;
*/
case CYCLES_NUMBER: case CYCLES_NUMBER:
retval = get64BitReg(GET_CYCLES_LSB_REG, GET_CYCLES_MSB_REG); retval = get64BitReg(GET_CYCLES_LSB_REG, GET_CYCLES_MSB_REG);
FILE_LOG(logINFO, ("Getting number of cycles left: %lld\n", (long long int)retval)); FILE_LOG(logINFO, ("Getting number of cycles left: %lld\n", (long long int)retval));
@ -983,40 +982,106 @@ enum externalCommunicationMode getTiming() {
/* configure mac */ /* configure mac */
void setNumberofUDPInterfaces(int val) {
uint32_t addr = CONFIG_REG;
// enable 2 interfaces
if (val > 1) {
FILE_LOG(logINFOBLUE, ("Setting #Interfaces: 2\n"));
bus_w(addr, bus_r(addr) | CONFIG_OPRTN_MDE_2_X_10GbE_MSK);
}
// enable only 1 interface
else {
FILE_LOG(logINFOBLUE, ("Setting #Interfaces: 1\n"));
bus_w(addr, bus_r(addr) &~ CONFIG_OPRTN_MDE_2_X_10GbE_MSK);
}
}
long int calcChecksum(int sourceip, int destip) { void selectPrimaryInterface(int val) {
ip_header ip; uint32_t addr = CONFIG_REG;
ip.ip_ver = 0x4;
ip.ip_ihl = 0x5;
ip.ip_tos = 0x0;
ip.ip_len = IP_PACKETSIZE;
ip.ip_ident = 0x0000;
ip.ip_flag = 0x2; //not nibble aligned (flag& offset
ip.ip_offset = 0x000;
ip.ip_ttl = 0x40;
ip.ip_protocol = 0x11;
ip.ip_chksum = 0x0000 ; // pseudo
ip.ip_sourceip = sourceip;
ip.ip_destip = destip;
int count = sizeof(ip); // inner (user input: 1)
if (val == 1) {
FILE_LOG(logINFOBLUE, ("Setting Primary Interface: 1 (Inner)\n"));
bus_w(addr, bus_r(addr) | CONFIG_INNR_PRIMRY_INTRFCE_MSK);
}
// outer (user input: 2)
else {
FILE_LOG(logINFOBLUE, ("Setting Primary Interface: 2 (Outer)\n"));
bus_w(addr, bus_r(addr) &~ CONFIG_INNR_PRIMRY_INTRFCE_MSK);
}
}
unsigned short *addr; void setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip, uint64_t destmac, uint32_t destport, uint64_t sourcemac, uint32_t sourceip, uint32_t sourceport) {
addr = (unsigned short*) &(ip); /* warning: assignment from incompatible pointer type */
// start addr
uint32_t addr = (type == INNER ? RXR_ENDPOINT_INNER_START_REG : RXR_ENDPOINT_OUTER_START_REG);
// calculate rxr endpoint offset
addr += (iRxEntry * RXR_ENDPOINT_OFST);
// get struct memory
udp_header *udp = (udp_header*) (CSP0BASE + addr * 2);
memset(udp, 0, sizeof(udp_header));
// mac addresses
// msb (32) + lsb (16)
udp->udp_destmac_msb = ((destmac >> 16) & BIT32_MASK);
udp->udp_destmac_lsb = ((destmac >> 0) & BIT16_MASK);
// msb (16) + lsb (32)
udp->udp_srcmac_msb = ((sourcemac >> 32) & BIT16_MASK);
udp->udp_srcmac_lsb = ((sourcemac >> 0) & BIT32_MASK);
// ip addresses
udp->ip_srcip_msb = ((sourceip >> 16) & BIT16_MASK);
udp->ip_srcip_lsb = ((sourceip >> 0) & BIT16_MASK);
udp->ip_destip_msb = ((destip >> 16) & BIT16_MASK);
udp->ip_destip_lsb = ((destip >> 0) & BIT16_MASK);
// source port
udp->udp_srcport = sourceport;
udp->udp_destport = destport;
// other defines
udp->udp_ethertype = 0x800;
udp->ip_ver = 0x4;
udp->ip_ihl = 0x5;
udp->ip_flags = 0x2; //FIXME
udp->ip_ttl = 0x40;
udp->ip_protocol = 0x11;
// total length is redefined in firmware
calcChecksum(udp);
}
void calcChecksum(udp_header* udp) {
int count = IP_HEADER_SIZE;
long int sum = 0; long int sum = 0;
while( count > 1 ) {
// start at ip_tos as the memory is not continous for ip header
uint16_t *addr = (uint16_t*) (&(udp->ip_tos));
sum += *addr++;
count -= 2;
// ignore ethertype (from udp header)
addr++;
// from identification to srcip_lsb
while( count > 2 ) {
sum += *addr++; sum += *addr++;
count -= 2; count -= 2;
} }
// ignore src udp port (from udp header)
addr++;
if (count > 0) if (count > 0)
sum += *addr; // Add left-over byte, if any sum += *addr; // Add left-over byte, if any
while (sum>>16) while (sum >> 16)
sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits
long int checksum = (~sum) & 0xffff; long int checksum = sum & 0xffff;
FILE_LOG(logINFO, ("IP checksum is 0x%lx\n",checksum)); checksum += UDP_IP_HEADER_LENGTH_BYTES;
return checksum; FILE_LOG(logINFO, ("\tIP checksum is 0x%lx\n",checksum));
udp->ip_checksum = checksum;
} }
@ -1034,6 +1099,7 @@ int configureMAC(int numInterfaces, int selInterface,
FILE_LOG(logINFO, ("\t#Interfaces : %d\n", numInterfaces)); FILE_LOG(logINFO, ("\t#Interfaces : %d\n", numInterfaces));
FILE_LOG(logINFO, ("\tInterface : %d\n\n", selInterface)); FILE_LOG(logINFO, ("\tInterface : %d\n\n", selInterface));
FILE_LOG(logINFO, ("\tInner\n"));
FILE_LOG(logINFO, ("\tSource IP : %d.%d.%d.%d \t\t(0x%08x)\n", FILE_LOG(logINFO, ("\tSource IP : %d.%d.%d.%d \t\t(0x%08x)\n",
(sourceip>>24)&0xff,(sourceip>>16)&0xff,(sourceip>>8)&0xff,(sourceip)&0xff, sourceip)); (sourceip>>24)&0xff,(sourceip>>16)&0xff,(sourceip>>8)&0xff,(sourceip)&0xff, sourceip));
FILE_LOG(logINFO, ("\tSource MAC : %02x:%02x:%02x:%02x:%02x:%02x \t(0x%010llx)\n", FILE_LOG(logINFO, ("\tSource MAC : %02x:%02x:%02x:%02x:%02x:%02x \t(0x%010llx)\n",
@ -1059,6 +1125,7 @@ int configureMAC(int numInterfaces, int selInterface,
FILE_LOG(logINFO, ("\tDest. Port : %d \t\t\t(0x%08x)\n\n",udpport, udpport)); FILE_LOG(logINFO, ("\tDest. Port : %d \t\t\t(0x%08x)\n\n",udpport, udpport));
uint32_t sourceport2 = DEFAULT_TX_UDP_PORT + 1; uint32_t sourceport2 = DEFAULT_TX_UDP_PORT + 1;
FILE_LOG(logINFO, ("\tOuter\n"));
FILE_LOG(logINFO, ("\tSource IP2 : %d.%d.%d.%d \t\t(0x%08x)\n", FILE_LOG(logINFO, ("\tSource IP2 : %d.%d.%d.%d \t\t(0x%08x)\n",
(sourceip2>>24)&0xff,(sourceip2>>16)&0xff,(sourceip2>>8)&0xff,(sourceip2)&0xff, sourceip2)); (sourceip2>>24)&0xff,(sourceip2>>16)&0xff,(sourceip2>>8)&0xff,(sourceip2)&0xff, sourceip2));
FILE_LOG(logINFO, ("\tSource MAC2 : %02x:%02x:%02x:%02x:%02x:%02x \t(0x%010llx)\n", FILE_LOG(logINFO, ("\tSource MAC2 : %02x:%02x:%02x:%02x:%02x:%02x \t(0x%010llx)\n",
@ -1083,35 +1150,16 @@ int configureMAC(int numInterfaces, int selInterface,
(long long unsigned int)destmac2)); (long long unsigned int)destmac2));
FILE_LOG(logINFO, ("\tDest. Port2 : %d \t\t\t(0x%08x)\n",udpport2, udpport2)); FILE_LOG(logINFO, ("\tDest. Port2 : %d \t\t\t(0x%08x)\n",udpport2, udpport2));
long int checksum=calcChecksum(sourceip, destip); // default one rxr entry (others not yet implemented in client yet)
bus_w(TX_IP_REG, sourceip); int iRxEntry = 0;
bus_w(RX_IP_REG, destip); // top
setupHeader(iRxEntry, INNER, destip, destmac, udpport, sourcemac, sourceip, sourceport);
// bottom
setupHeader(iRxEntry, OUTER, destip2, destmac2, udpport2, sourcemac2, sourceip2, sourceport2);
uint32_t val = 0; setNumberofUDPInterfaces(numInterfaces);
selectPrimaryInterface(selInterface);
val = ((sourcemac >> LSB_OF_64_BIT_REG_OFST) & BIT_32_MSK);
bus_w(TX_MAC_LSB_REG, val);
FILE_LOG(logDEBUG1, ("Read from TX_MAC_LSB_REG: 0x%08x\n", bus_r(TX_MAC_LSB_REG)));
val = ((sourcemac >> MSB_OF_64_BIT_REG_OFST) & BIT_32_MSK);
bus_w(TX_MAC_MSB_REG,val);
FILE_LOG(logDEBUG1, ("Read from TX_MAC_MSB_REG: 0x%08x\n", bus_r(TX_MAC_MSB_REG)));
val = ((destmac >> LSB_OF_64_BIT_REG_OFST) & BIT_32_MSK);
bus_w(RX_MAC_LSB_REG, val);
FILE_LOG(logDEBUG1, ("Read from RX_MAC_LSB_REG: 0x%08x\n", bus_r(RX_MAC_LSB_REG)));
val = ((destmac >> MSB_OF_64_BIT_REG_OFST) & BIT_32_MSK);
bus_w(RX_MAC_MSB_REG, val);
FILE_LOG(logDEBUG1, ("Read from RX_MAC_MSB_REG: 0x%08x\n", bus_r(RX_MAC_MSB_REG)));
val = (((sourceport << UDP_PORT_TX_OFST) & UDP_PORT_TX_MSK) |
((udpport << UDP_PORT_RX_OFST) & UDP_PORT_RX_MSK));
bus_w(UDP_PORT_REG, val);
FILE_LOG(logDEBUG1, ("Read from UDP_PORT_REG: 0x%08x\n", bus_r(UDP_PORT_REG)));
bus_w(TX_IP_CHECKSUM_REG,(checksum << TX_IP_CHECKSUM_OFST) & TX_IP_CHECKSUM_MSK);
FILE_LOG(logDEBUG1, ("Read from TX_IP_CHECKSUM_REG: 0x%08x\n", bus_r(TX_IP_CHECKSUM_REG)));
cleanFifos(); cleanFifos();
resetCore(); resetCore();
alignDeserializer(); alignDeserializer();
@ -1121,20 +1169,20 @@ int configureMAC(int numInterfaces, int selInterface,
int setDetectorPosition(int pos[]) { int setDetectorPosition(int pos[]) {
int ret = OK; int ret = OK;
FILE_LOG(logDEBUG1, ("Setting detector position: (%d, %d)\n", pos[0], pos[1])); FILE_LOG(logDEBUG1, ("Setting detector position: (%d, %d)\n", pos[X], pos[Y]));
bus_w(COORD_0_REG, bus_r(COORD_0_REG) & (~(COORD_0_X_MSK))); bus_w(COORD_0_REG, bus_r(COORD_0_REG) & (~(COORD_0_X_MSK)));
bus_w(COORD_0_REG, bus_r(COORD_0_REG) | ((pos[0] << COORD_0_X_OFST) & COORD_0_X_MSK)); bus_w(COORD_0_REG, bus_r(COORD_0_REG) | ((pos[X] << COORD_0_X_OFST) & COORD_0_X_MSK));
if ((bus_r(COORD_0_REG) & COORD_0_X_MSK) != ((pos[0] << COORD_0_X_OFST) & COORD_0_X_MSK)) if ((bus_r(COORD_0_REG) & COORD_0_X_MSK) != ((pos[X] << COORD_0_X_OFST) & COORD_0_X_MSK))
ret = FAIL; ret = FAIL;
bus_w(COORD_0_REG, bus_r(COORD_0_REG) & (~(COORD_0_Y_MSK))); bus_w(COORD_0_REG, bus_r(COORD_0_REG) & (~(COORD_0_Y_MSK)));
bus_w(COORD_0_REG, bus_r(COORD_0_REG) | ((pos[1] << COORD_0_Y_OFST) & COORD_0_Y_MSK)); bus_w(COORD_0_REG, bus_r(COORD_0_REG) | ((pos[Y] << COORD_0_Y_OFST) & COORD_0_Y_MSK));
if ((bus_r(COORD_0_REG) & COORD_0_Y_MSK) != ((pos[1] << COORD_0_Y_OFST) & COORD_0_Y_MSK)) if ((bus_r(COORD_0_REG) & COORD_0_Y_MSK) != ((pos[Y] << COORD_0_Y_OFST) & COORD_0_Y_MSK))
ret = FAIL; ret = FAIL;
if (ret == OK) { if (ret == OK) {
FILE_LOG(logINFO, ("Position set to [%d, %d]\n", pos[0], pos[1])); FILE_LOG(logINFO, ("Position set to [%d, %d]\n", pos[X], pos[Y]));
} }
return ret; return ret;
} }
@ -1143,6 +1191,42 @@ int setDetectorPosition(int pos[]) {
/* jungfrau specific - powerchip, autocompdisable, asictimer, clockdiv, pll, flashing fpga */ /* jungfrau specific - powerchip, autocompdisable, asictimer, clockdiv, pll, flashing fpga */
void initReadoutConfiguration() {
FILE_LOG(logINFO, ("Initializing Readout Configuration:\n"
"\t Reset readout Timer\n"
"\t 1 x 10G mode\n"
"\t outer interface is primary\n"
"\t half speed\n"
"\t TDMA disabled, 0 as TDMA slot\n"
"\t Ethernet overflow disabled\n"
"\t Reset Round robin entries\n"));
uint32_t val = 0;
// reset readouttimer
val &= ~CONFIG_RDT_TMR_MSK;
// 1 x 10G mode
val &= ~CONFIG_OPRTN_MDE_2_X_10GbE_MSK;
// outer interface
val &= ~CONFIG_INNR_PRIMRY_INTRFCE_MSK;
// half speed
val &= ~CONFIG_READOUT_SPEED_MSK;
val |= CONFIG_HALF_SPEED_20MHZ_VAL;
// tdma disable
val &= ~CONFIG_TDMA_ENABLE_MSK;
// tdma slot 0
val &= ~CONFIG_TDMA_TIMESLOT_MSK;
// no ethernet overflow
val &= ~CONFIG_ETHRNT_FLW_CNTRL_MSK;
bus_w(CONFIG_REG, val);
val = bus_r(CONTROL_REG);
// reset (addtional round robin entry) rx endpoints num
val &= CONTROL_RX_ADDTNL_ENDPTS_NUM_MSK;
// reset start of round robin entry to 0
val &= CONTROL_RX_ENDPTS_START_MSK;
bus_w(CONTROL_REG, val);
}
int powerChip (int on){ int powerChip (int on){
@ -1191,62 +1275,56 @@ void setClockDivider(int val) {
if(runBusy()) if(runBusy())
stopStateMachine(); stopStateMachine();
uint32_t txndelay_msk = 0; switch(val) {
switch(val){ case FULL_SPEED:
FILE_LOG(logINFO, ("Setting Full Speed (40 MHz):\n"));
// todo in firmware, for now setting half speed bus_w(SAMPLE_REG, SAMPLE_ADC_FULL_SPEED);
case FULL_SPEED://40 FILE_LOG(logINFO, ("\tSet Sample Reg to 0x%x\n", bus_r(SAMPLE_REG)));
FILE_LOG(logINFO, ("Setting Half Speed (20 MHz):\n"));
FILE_LOG(logINFO, ("\tSetting Sample Reg to 0x%x\n", SAMPLE_ADC_HALF_SPEED)); bus_w(CONFIG_REG, (bus_r(CONFIG_REG) & ~CONFIG_READOUT_SPEED_MSK) | CONFIG_FULL_SPEED_40MHZ_VAL);
bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED); FILE_LOG(logINFO, ("\tSet Config Reg to 0x%x\n", bus_r(CONFIG_REG)));
txndelay_msk = (bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK); // read config tdma timeslot value bus_w(ADC_OFST_REG, ADC_OFST_FULL_SPEED_VAL);
FILE_LOG(logINFO, ("\tSetting Config Reg to 0x%x\n", CONFIG_HALF_SPEED | txndelay_msk)); FILE_LOG(logINFO, ("\tSet ADC Ofst Reg to 0x%x\n", bus_r(ADC_OFST_REG)));
bus_w(CONFIG_REG, CONFIG_HALF_SPEED | txndelay_msk);
FILE_LOG(logINFO, ("\tSetting ADC Ofst Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL));
bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL);
FILE_LOG(logINFO, ("\tSetting ADC Phase Reg to 0x%x\n", ADC_PHASE_HALF_SPEED));
setAdcPhase(ADC_PHASE_HALF_SPEED, 0);
setAdcPhase(ADC_PHASE_FULL_SPEED, 0);
FILE_LOG(logINFO, ("\tSet ADC Phase Reg to 0x%x\n", ADC_PHASE_FULL_SPEED));
break; break;
case HALF_SPEED: case HALF_SPEED:
FILE_LOG(logINFO, ("Setting Half Speed (20 MHz):\n")); FILE_LOG(logINFO, ("Setting Half Speed (20 MHz):\n"));
FILE_LOG(logINFO, ("\tSetting Sample Reg to 0x%x\n", SAMPLE_ADC_HALF_SPEED));
bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED); bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED);
FILE_LOG(logINFO, ("\tSet Sample Reg to 0x%x\n", bus_r(SAMPLE_REG)));
txndelay_msk = (bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK); // read config tdma timeslot value bus_w(CONFIG_REG, (bus_r(CONFIG_REG) & ~CONFIG_READOUT_SPEED_MSK) | CONFIG_HALF_SPEED_20MHZ_VAL);
FILE_LOG(logINFO, ("\tSetting Config Reg to 0x%x\n", CONFIG_HALF_SPEED | txndelay_msk)); FILE_LOG(logINFO, ("\tSet Config Reg to 0x%x\n", bus_r(CONFIG_REG)));
bus_w(CONFIG_REG, CONFIG_HALF_SPEED | txndelay_msk);
FILE_LOG(logINFO, ("\tSetting ADC Ofst Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL));
bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL); bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL);
FILE_LOG(logINFO, ("\tSet ADC Ofst Reg to 0x%x\n", bus_r(ADC_OFST_REG)));
FILE_LOG(logINFO, ("\tSetting ADC Phase Reg to 0x%x\n", ADC_PHASE_HALF_SPEED));
setAdcPhase(ADC_PHASE_HALF_SPEED, 0); setAdcPhase(ADC_PHASE_HALF_SPEED, 0);
FILE_LOG(logINFO, ("\tSet ADC Phase Reg to 0x%x\n", ADC_PHASE_HALF_SPEED));
break; break;
case QUARTER_SPEED: case QUARTER_SPEED:
FILE_LOG(logINFO, ("Setting Half Speed (10 MHz):\n")); FILE_LOG(logINFO, ("Setting Half Speed (10 MHz):\n"));
FILE_LOG(logINFO, ("\tSetting Sample Reg to 0x%x\n", SAMPLE_ADC_QUARTER_SPEED));
bus_w(SAMPLE_REG, SAMPLE_ADC_QUARTER_SPEED); bus_w(SAMPLE_REG, SAMPLE_ADC_QUARTER_SPEED);
FILE_LOG(logINFO, ("\tSet Sample Reg to 0x%x\n", bus_r(SAMPLE_REG)));
txndelay_msk = (bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK); // read config tdma timeslot value bus_w(CONFIG_REG, (bus_r(CONFIG_REG) & ~CONFIG_READOUT_SPEED_MSK) | CONFIG_QUARTER_SPEED_10MHZ_VAL);
FILE_LOG(logINFO, ("\tSetting Config Reg to 0x%x\n", CONFIG_QUARTER_SPEED | txndelay_msk)); FILE_LOG(logINFO, ("\tSet Config Reg to 0x%x\n", bus_r(CONFIG_REG)));
bus_w(CONFIG_REG, CONFIG_QUARTER_SPEED | txndelay_msk);
FILE_LOG(logINFO, ("\tSetting ADC Ofst Reg to 0x%x\n", ADC_OFST_QUARTER_SPEED_VAL));
bus_w(ADC_OFST_REG, ADC_OFST_QUARTER_SPEED_VAL); bus_w(ADC_OFST_REG, ADC_OFST_QUARTER_SPEED_VAL);
FILE_LOG(logINFO, ("\tSet ADC Ofst Reg to 0x%x\n", bus_r(ADC_OFST_REG)));
FILE_LOG(logINFO, ("\tSetting ADC Phase Reg to 0x%x\n", ADC_PHASE_QUARTER_SPEED));
setAdcPhase(ADC_PHASE_QUARTER_SPEED, 0); setAdcPhase(ADC_PHASE_QUARTER_SPEED, 0);
FILE_LOG(logINFO, ("\tSet ADC Phase Reg to 0x%x\n", ADC_PHASE_QUARTER_SPEED));
break; break;
} }
} }
} }
@ -1410,22 +1488,38 @@ void alignDeserializer() {
int setNetworkParameter(enum NETWORKINDEX mode, int value) { int setNetworkParameter(enum NETWORKINDEX mode, int value) {
if (mode != TXN_FRAME) switch(mode) {
return -1;
if (value >= 0) { case TXN_FRAME:
FILE_LOG(logINFO, ("Setting transmission delay: %d\n", value)); if (value >= 0) {
bus_w(CONFIG_REG, (bus_r(CONFIG_REG) &~CONFIG_TDMA_TIMESLOT_MSK) FILE_LOG(logINFO, ("Setting transmission delay: %d\n", value));
| (((value << CONFIG_TDMA_TIMESLOT_OFST) & CONFIG_TDMA_TIMESLOT_MSK))); bus_w(CONFIG_REG, (bus_r(CONFIG_REG) &~CONFIG_TDMA_TIMESLOT_MSK)
if (value == 0) | (((value << CONFIG_TDMA_TIMESLOT_OFST) & CONFIG_TDMA_TIMESLOT_MSK)));
bus_w(CONFIG_REG, bus_r(CONFIG_REG) &~ CONFIG_TDMA_MSK); if (value == 0) {
else FILE_LOG(logINFO, ("Switching off transmission delay\n"));
bus_w(CONFIG_REG, bus_r(CONFIG_REG) | CONFIG_TDMA_MSK); bus_w(CONFIG_REG, bus_r(CONFIG_REG) &~ CONFIG_TDMA_ENABLE_MSK);
FILE_LOG(logDEBUG1, ("Transmission delay read %d\n", } else {
((bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK) >> CONFIG_TDMA_TIMESLOT_OFST))); FILE_LOG(logINFO, ("Switching on transmission delay\n"));
} bus_w(CONFIG_REG, bus_r(CONFIG_REG) | CONFIG_TDMA_ENABLE_MSK);
}
FILE_LOG(logDEBUG1, ("Transmission delay read %d\n",
((bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK) >> CONFIG_TDMA_TIMESLOT_OFST)));
}
return ((bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK) >> CONFIG_TDMA_TIMESLOT_OFST);
case FLOW_CONTROL_10G:
if (value == 0) {
FILE_LOG(logINFO, ("Switching off 10G flow control\n"));
bus_w(CONFIG_REG, bus_r(CONFIG_REG) &~ CONFIG_ETHRNT_FLW_CNTRL_MSK);
} else {
FILE_LOG(logINFO, ("Switching on 10G flow control\n"));
bus_w(CONFIG_REG, bus_r(CONFIG_REG) | CONFIG_ETHRNT_FLW_CNTRL_MSK);
}
return ((bus_r(CONFIG_REG) & CONFIG_ETHRNT_FLW_CNTRL_MSK) >> CONFIG_ETHRNT_FLW_CNTRL_OFST);
return ((bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK) >> CONFIG_TDMA_TIMESLOT_OFST); default:
return -1;
}
} }

View File

@ -4,24 +4,36 @@
#define MIN_REQRD_VRSN_T_RD_API 0x171220 #define MIN_REQRD_VRSN_T_RD_API 0x171220
#define REQRD_FRMWR_VRSN 0x181206 // temp bug fix from last version, timing mode is backwards compatible #define REQRD_FRMWR_VRSN 0x190509
#define BOARD_JUNGFRAU_TYPE (8)
#define CTRL_SRVR_INIT_TIME_US (300 * 1000) #define CTRL_SRVR_INIT_TIME_US (300 * 1000)
/* Struct Definitions */ /* Struct Definitions */
typedef struct ip_header_struct { typedef struct udp_header_struct {
uint16_t ip_len; uint32_t udp_destmac_msb;
uint8_t ip_tos; uint16_t udp_srcmac_msb;
uint8_t ip_ihl:4 ,ip_ver:4; uint16_t udp_destmac_lsb;
uint16_t ip_offset:13,ip_flag:3; uint32_t udp_srcmac_lsb;
uint16_t ip_ident; uint8_t ip_tos;
uint16_t ip_chksum; uint8_t ip_ihl: 4, ip_ver: 4;
uint8_t ip_protocol; uint16_t udp_ethertype;
uint8_t ip_ttl; uint16_t ip_identification;
uint32_t ip_sourceip; uint16_t ip_totallength;
uint32_t ip_destip; uint8_t ip_protocol;
} ip_header; uint8_t ip_ttl;
uint16_t ip_fragmentoffset: 13, ip_flags: 3;
uint16_t ip_srcip_msb;
uint16_t ip_checksum;
uint16_t ip_destip_msb;
uint16_t ip_srcip_lsb;
uint16_t udp_srcport;
uint16_t ip_destip_lsb;
uint16_t udp_checksum;
uint16_t udp_destport;
} udp_header;
#define IP_HEADER_SIZE 20
/* Enums */ /* Enums */
enum CLK_SPEED_INDEX {FULL_SPEED, HALF_SPEED, QUARTER_SPEED}; enum CLK_SPEED_INDEX {FULL_SPEED, HALF_SPEED, QUARTER_SPEED};
@ -36,7 +48,7 @@ enum DACINDEX {VB_COMP, VDD_PROT, VIN_COM, VREF_PRECH, VB_PIXBUF, VB_DS, VREF
480, /* VREF_DS */ \ 480, /* VREF_DS */ \
420 /* VREF_COMP */ \ 420 /* VREF_COMP */ \
}; };
enum NETWORKINDEX { TXN_FRAME }; enum NETWORKINDEX { TXN_FRAME, FLOWCTRL_10G };
/* Hardware Definitions */ /* Hardware Definitions */
#define NCHAN (256 * 256) #define NCHAN (256 * 256)
@ -46,7 +58,6 @@ enum NETWORKINDEX { TXN_FRAME };
#define DYNAMIC_RANGE (16) #define DYNAMIC_RANGE (16)
#define NUM_BYTES_PER_PIXEL (DYNAMIC_RANGE / 8) #define NUM_BYTES_PER_PIXEL (DYNAMIC_RANGE / 8)
#define DATA_BYTES (NCHIP * NCHAN * NUM_BYTES_PER_PIXEL) #define DATA_BYTES (NCHIP * NCHAN * NUM_BYTES_PER_PIXEL)
#define IP_PACKETSIZE (0x2052)
#define CLK_RUN (40) /* MHz */ #define CLK_RUN (40) /* MHz */
#define CLK_SYNC (20) /* MHz */ #define CLK_SYNC (20) /* MHz */
@ -77,19 +88,21 @@ enum NETWORKINDEX { TXN_FRAME };
#define MAX_STORAGE_CELL_DLY_NS_VAL ((ASIC_CTRL_EXPSRE_TMR_MSK >> ASIC_CTRL_EXPSRE_TMR_OFST) * ASIC_CTRL_EXPSRE_TMR_STEPS) #define MAX_STORAGE_CELL_DLY_NS_VAL ((ASIC_CTRL_EXPSRE_TMR_MSK >> ASIC_CTRL_EXPSRE_TMR_OFST) * ASIC_CTRL_EXPSRE_TMR_STEPS)
#define ACQ_TIME_MIN_CLOCK (2) #define ACQ_TIME_MIN_CLOCK (2)
#define SAMPLE_ADC_FULL_SPEED (SAMPLE_ADC_HALF_SPEED)
#define SAMPLE_ADC_HALF_SPEED (SAMPLE_DECMT_FACTOR_2_VAL + SAMPLE_DGTL_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_ADC_SAMPLE_0_VAL) /* 0x1000 */ #define SAMPLE_ADC_HALF_SPEED (SAMPLE_DECMT_FACTOR_2_VAL + SAMPLE_DGTL_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_ADC_SAMPLE_0_VAL) /* 0x1000 */
#define SAMPLE_ADC_QUARTER_SPEED (SAMPLE_DECMT_FACTOR_4_VAL + SAMPLE_DGTL_SAMPLE_8_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_ADC_SAMPLE_0_VAL) /* 0x2810 */ #define SAMPLE_ADC_QUARTER_SPEED (SAMPLE_DECMT_FACTOR_4_VAL + SAMPLE_DGTL_SAMPLE_8_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_ADC_SAMPLE_0_VAL) /* 0x2810 */
#define CONFIG_HALF_SPEED (CONFIG_TDMA_DISABLE_VAL + CONFIG_HALF_SPEED_20MHZ_VAL + CONFIG_OPRTN_MDE_1_X_10GBE_VAL) /**0x100000 */
#define CONFIG_QUARTER_SPEED (CONFIG_TDMA_DISABLE_VAL + CONFIG_QUARTER_SPEED_10MHZ_VAL + CONFIG_OPRTN_MDE_1_X_10GBE_VAL) #define ADC_OFST_FULL_SPEED_VAL (0x20)//(0x1f) //(0x20)
#define ADC_OFST_HALF_SPEED_VAL (0x20)//(0x1f) //(0x20) #define ADC_OFST_HALF_SPEED_VAL (0x20)//(0x1f) //(0x20)
#define ADC_OFST_QUARTER_SPEED_VAL (0x0f) //(0x0f) #define ADC_OFST_QUARTER_SPEED_VAL (0x0f) //(0x0f)
#define ADC_PHASE_FULL_SPEED (0x2D) //45
#define ADC_PHASE_HALF_SPEED (0x2D) //45 #define ADC_PHASE_HALF_SPEED (0x2D) //45
#define ADC_PHASE_QUARTER_SPEED (0x2D) //45 #define ADC_PHASE_QUARTER_SPEED (0x2D) //45
#define ADC_PORT_INVERT_VAL (0x5A5A5A5A)//(0x453b2a9c) #define ADC_PORT_INVERT_VAL (0x5A5A5A5A)//(0x453b2a9c)
#define MAX_PHASE_SHIFTS (160) #define MAX_PHASE_SHIFTS (160)
/* MSB & LSB DEFINES */
#define MSB_OF_64_BIT_REG_OFST (32)
#define LSB_OF_64_BIT_REG_OFST (0)
#define BIT_32_MSK (0xFFFFFFFF)
#define BIT16_MASK (0xFFFF)
#define UDP_IP_HEADER_LENGTH_BYTES (28)

View File

@ -524,7 +524,8 @@ int Server_SendResult(int fileDes, intType itype, int update, void* retval, int
void getMacAddressinString(char* cmac, int size, uint64_t mac) { void getMacAddressinString(char* cmac, int size, uint64_t mac) {
memset(cmac, 0, size); memset(cmac, 0, size);
sprintf(cmac,"%02x:%02x:%02x:%02x:%02x:%02x",(unsigned int)((mac>>40)&0xFF), sprintf(cmac,"%02x:%02x:%02x:%02x:%02x:%02x",
(unsigned int)((mac>>40)&0xFF),
(unsigned int)((mac>>32)&0xFF), (unsigned int)((mac>>32)&0xFF),
(unsigned int)((mac>>24)&0xFF), (unsigned int)((mac>>24)&0xFF),
(unsigned int)((mac>>16)&0xFF), (unsigned int)((mac>>16)&0xFF),
@ -535,4 +536,4 @@ void getMacAddressinString(char* cmac, int size, uint64_t mac) {
void getIpAddressinString(char* cip, uint32_t ip) { void getIpAddressinString(char* cip, uint32_t ip) {
memset(cip, 0, INET_ADDRSTRLEN); memset(cip, 0, INET_ADDRSTRLEN);
inet_ntop(AF_INET, &ip, cip, INET_ADDRSTRLEN); inet_ntop(AF_INET, &ip, cip, INET_ADDRSTRLEN);
} }

View File

@ -67,4 +67,5 @@ void getMacAddressinString(char* cmac, int size, uint64_t mac);
*/ */
void getIpAddressinString(char* cip, uint32_t ip); void getIpAddressinString(char* cip, uint32_t ip);
#endif #endif

View File

@ -13,6 +13,7 @@ Here are the definitions, but the actual implementation should be done for each
****************************************************/ ****************************************************/
enum interfaceType {OUTER, INNER};
// basic tests // basic tests
int isFirmwareCheckDone(); int isFirmwareCheckDone();
@ -213,6 +214,11 @@ int getExtSignal();
// configure mac // configure mac
#ifdef GOTTHARDD #ifdef GOTTHARDD
void calcChecksum(mac_conf* mac, int sourceip, int destip); void calcChecksum(mac_conf* mac, int sourceip, int destip);
#elif JUNGFRAUD
void setNumberofUDPInterfaces(int val);
void selectPrimaryInterface(int val);
void setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip, uint64_t destmac, uint32_t destport, uint64_t sourcemac, uint32_t sourceip, uint32_t sourceport);
void calcChecksum(udp_header* udp);
#endif #endif
#if defined(CHIPTESTBOARDD) || defined(MOENCHD) #if defined(CHIPTESTBOARDD) || defined(MOENCHD)
long int calcChecksum(int sourceip, int destip); long int calcChecksum(int sourceip, int destip);
@ -285,6 +291,7 @@ int resetCounterBlock(int startACQ);
// jungfrau specific - powerchip, autocompdisable, clockdiv, asictimer, clock, pll, flashing firmware // jungfrau specific - powerchip, autocompdisable, clockdiv, asictimer, clock, pll, flashing firmware
#elif JUNGFRAUD #elif JUNGFRAUD
void initReadoutConfiguration();
int powerChip (int on); int powerChip (int on);
int autoCompDisable(int on); int autoCompDisable(int on);
void configureASICTimer(); void configureASICTimer();

View File

@ -1719,13 +1719,6 @@ int get_time_left(int file_des) {
// only get // only get
// check index // check index
#ifdef JUNGFRAUD
if (ind == DELAY_AFTER_TRIGGER) {
ret = FAIL;
sprintf(mess,"Timer Left Index (%d) is not implemented for this release.\n", (int)ind);
FILE_LOG(logERROR,(mess));
}
#endif
if (ret == OK) { if (ret == OK) {
switch(ind) { switch(ind) {
#ifdef EIGERD #ifdef EIGERD
@ -2417,9 +2410,9 @@ int configure_mac(int file_des) {
#endif #endif
#if defined(JUNGFRAUD) || defined(EIGERD) #if defined(JUNGFRAUD) || defined(EIGERD)
int pos[2] = {0, 0}; int pos[2] = {0, 0};
sscanf(args[12], "%x", &pos[0]); sscanf(args[12], "%x", &pos[X]);
sscanf(args[13], "%x", &pos[1]); sscanf(args[13], "%x", &pos[Y]);
FILE_LOG(logDEBUG1, ("Position: [%d, %d]\n", pos[0], pos[1])); FILE_LOG(logDEBUG1, ("Position: [%d, %d]\n", pos[X], pos[Y]));
#endif #endif
@ -3227,10 +3220,12 @@ int set_network_parameter(int file_des) {
if ((value == -1) || (Server_VerifyLock() == OK)) { if ((value == -1) || (Server_VerifyLock() == OK)) {
// check index // check index
switch (mode) { switch (mode) {
#ifdef EIGERD
case FLOW_CONTROL_10G: case FLOW_CONTROL_10G:
serverIndex = FLOWCTRL_10G; serverIndex = FLOWCTRL_10G;
break; break;
#ifdef EIGERD
case DETECTOR_TXN_DELAY_LEFT: case DETECTOR_TXN_DELAY_LEFT:
serverIndex = TXN_LEFT; serverIndex = TXN_LEFT;
break; break;

View File

@ -521,7 +521,7 @@ public:
int setHighVoltage(int i = -1, int detPos = -1); int setHighVoltage(int i = -1, int detPos = -1);
/** /**
* Set 10GbE Flow Control (Eiger) * Set 10GbE Flow Control (Eiger and Jungfrau)
* @param enable 1 to set, 0 to unset, -1 gets * @param enable 1 to set, 0 to unset, -1 gets
* @param detPos -1 for all detectors in list or specific detector position * @param detPos -1 for all detectors in list or specific detector position
* @returns 10GbE flow Control * @returns 10GbE flow Control

View File

@ -1438,7 +1438,7 @@ int slsDetector::configureMAC() {
// 2d positions to detector to put into udp header // 2d positions to detector to put into udp header
{ {
int pos[2] = {0, 0}; int pos[2] = {0, 0};
int max = shm()->multiSize[1] * (shm()->numUDPInterfaces); int max = shm()->multiSize[Y] * (shm()->numUDPInterfaces);
// row // row
pos[0] = (detId % max); pos[0] = (detId % max);
// col for horiz. udp ports // col for horiz. udp ports

View File

@ -676,19 +676,12 @@ slsDetectorCommand::slsDetectorCommand(multiSlsDetector *det) {
++i; ++i;
/*! \page timing /*! \page timing
- <b>delayl</b> gets delay left. Used in GOTTHARD only. Only get! \c Returns \c (double with 9 decimal digits) - <b>delayl</b> gets delay left. Used in GOTTHARD, JUNGFRAU, MOENCH and CTB only. Only get! \c Returns \c (double with 9 decimal digits)
*/ */
descrToFuncMap[i].m_pFuncName = "delayl"; descrToFuncMap[i].m_pFuncName = "delayl";
descrToFuncMap[i].m_pFuncPtr = &slsDetectorCommand::cmdTimeLeft; descrToFuncMap[i].m_pFuncPtr = &slsDetectorCommand::cmdTimeLeft;
++i; ++i;
/*! \page timing
- <b>gatesl</b> gets number of gates left. Used in GOTTHARD only. Only get! \c Returns \c (double with 9 decimal digits)
*/
descrToFuncMap[i].m_pFuncName = "gatesl";
descrToFuncMap[i].m_pFuncPtr = &slsDetectorCommand::cmdTimeLeft;
++i;
/*! \page config /*! \page config
- <b>framesl</b> gets number of frames left. Used in GOTTHARD and Jungfrau only. Only get! \c Returns \c (double with 9 decimal digits) - <b>framesl</b> gets number of frames left. Used in GOTTHARD and Jungfrau only. Only get! \c Returns \c (double with 9 decimal digits)
*/ */
@ -1700,7 +1693,7 @@ slsDetectorCommand::slsDetectorCommand(multiSlsDetector *det) {
++i; ++i;
/*! \page network /*! \page network
- <b>flowcontrol_10g [delay]</b> Enables/disables 10 GbE flow control. 1 enables, 0 disables. Used for EIGER only. \c Returns \c (int) - <b>flowcontrol_10g [delay]</b> Enables/disables 10 GbE flow control. 1 enables, 0 disables. Used for EIGER and JUNGFRAU only. \c Returns \c (int)
*/ */
descrToFuncMap[i].m_pFuncName = "flowcontrol_10g"; descrToFuncMap[i].m_pFuncName = "flowcontrol_10g";
descrToFuncMap[i].m_pFuncPtr = &slsDetectorCommand::cmdNetworkParameter; descrToFuncMap[i].m_pFuncPtr = &slsDetectorCommand::cmdNetworkParameter;
@ -3076,7 +3069,7 @@ std::string slsDetectorCommand::helpNetworkParameter(int action) {
os << "txndelay_left port \n sets detector transmission delay of the left port" << std::endl; os << "txndelay_left port \n sets detector transmission delay of the left port" << std::endl;
os << "txndelay_right port \n sets detector transmission delay of the right port" << std::endl; os << "txndelay_right port \n sets detector transmission delay of the right port" << std::endl;
os << "txndelay_frame port \n sets detector transmission delay of the entire frame" << std::endl; os << "txndelay_frame port \n sets detector transmission delay of the entire frame" << std::endl;
os << "flowcontrol_10g port \n sets flow control for 10g for eiger" << std::endl; os << "flowcontrol_10g port \n sets flow control for 10g for eiger and jungfrau" << std::endl;
os << "zmqport port \n sets the 0MQ (TCP) port of the client to where final data is streamed to (eg. for GUI). The default already connects with rx_zmqport for the GUI. " os << "zmqport port \n sets the 0MQ (TCP) port of the client to where final data is streamed to (eg. for GUI). The default already connects with rx_zmqport for the GUI. "
"Use single-detector command to set individually or multi-detector command to calculate based on port for the rest." "Use single-detector command to set individually or multi-detector command to calculate based on port for the rest."
"Must restart streaming in client with new port from gui/external gui" "Must restart streaming in client with new port from gui/external gui"
@ -3116,7 +3109,7 @@ std::string slsDetectorCommand::helpNetworkParameter(int action) {
os << "txndelay_left \n gets detector transmission delay of the left port" << std::endl; os << "txndelay_left \n gets detector transmission delay of the left port" << std::endl;
os << "txndelay_right \n gets detector transmission delay of the right port" << std::endl; os << "txndelay_right \n gets detector transmission delay of the right port" << std::endl;
os << "txndelay_frame \n gets detector transmission delay of the entire frame" << std::endl; os << "txndelay_frame \n gets detector transmission delay of the entire frame" << std::endl;
os << "flowcontrol_10g \n gets flow control for 10g for eiger" << std::endl; os << "flowcontrol_10g \n gets flow control for 10g for eiger and jungfrau" << std::endl;
os << "zmqport \n gets the 0MQ (TCP) port of the client to where final data is streamed to" << std::endl; os << "zmqport \n gets the 0MQ (TCP) port of the client to where final data is streamed to" << std::endl;
os << "rx_zmqport \n gets the 0MQ (TCP) port of the receiver from where data is streamed from" << std::endl; os << "rx_zmqport \n gets the 0MQ (TCP) port of the receiver from where data is streamed from" << std::endl;
os << "zmqip \n gets the 0MQ (TCP) ip of the client to where final data is streamed to.If no custom ip, empty until first time connect to receiver" << std::endl; os << "zmqip \n gets the 0MQ (TCP) ip of the client to where final data is streamed to.If no custom ip, empty until first time connect to receiver" << std::endl;
@ -4581,8 +4574,6 @@ std::string slsDetectorCommand::cmdTimeLeft(int narg, char *args[], int action,
index = FRAME_PERIOD; index = FRAME_PERIOD;
else if (cmd == "delayl") else if (cmd == "delayl")
index = DELAY_AFTER_TRIGGER; index = DELAY_AFTER_TRIGGER;
else if (cmd == "gatesl")
index = GATES_NUMBER;
else if (cmd == "framesl") else if (cmd == "framesl")
index = FRAME_NUMBER; index = FRAME_NUMBER;
else if (cmd == "cyclesl") else if (cmd == "cyclesl")

View File

@ -27,9 +27,6 @@ public:
/** Number of Pixels in y axis */ /** Number of Pixels in y axis */
uint32_t nPixelsY; uint32_t nPixelsY;
/** emptybuffer (mainly for jungfrau) */
uint32_t emptyHeader;
/** Size of header in Packet */ /** Size of header in Packet */
uint32_t headerSizeinPacket; uint32_t headerSizeinPacket;
@ -95,7 +92,6 @@ public:
myDetectorType(slsDetectorDefs::GENERIC), myDetectorType(slsDetectorDefs::GENERIC),
nPixelsX(0), nPixelsX(0),
nPixelsY(0), nPixelsY(0),
emptyHeader(0),
headerSizeinPacket(0), headerSizeinPacket(0),
dataSize(0), dataSize(0),
packetSize(0), packetSize(0),
@ -228,7 +224,6 @@ public:
FILE_LOG(level) << "myDetectorType: " << slsDetectorDefs::detectorTypeToString(myDetectorType); FILE_LOG(level) << "myDetectorType: " << slsDetectorDefs::detectorTypeToString(myDetectorType);
FILE_LOG(level) << "Pixels X: " << nPixelsX; FILE_LOG(level) << "Pixels X: " << nPixelsX;
FILE_LOG(level) << "Pixels Y: " << nPixelsY; FILE_LOG(level) << "Pixels Y: " << nPixelsY;
FILE_LOG(level) << "Empty Header: " << emptyHeader;
FILE_LOG(level) << "Header Size in Packet: " << headerSizeinPacket; FILE_LOG(level) << "Header Size in Packet: " << headerSizeinPacket;
FILE_LOG(level) << "Data Size: " << dataSize; FILE_LOG(level) << "Data Size: " << dataSize;
FILE_LOG(level) << "Packet Size: " << packetSize; FILE_LOG(level) << "Packet Size: " << packetSize;
@ -506,8 +501,7 @@ class JungfrauData : public GeneralData {
myDetectorType = slsDetectorDefs::JUNGFRAU; myDetectorType = slsDetectorDefs::JUNGFRAU;
nPixelsX = (256*4); nPixelsX = (256*4);
nPixelsY = 512; nPixelsY = 512;
emptyHeader = 6; headerSizeinPacket = sizeof(slsDetectorDefs::sls_detector_header);
headerSizeinPacket = emptyHeader + sizeof(slsDetectorDefs::sls_detector_header);
dataSize = 8192; dataSize = 8192;
packetSize = headerSizeinPacket + dataSize; packetSize = headerSizeinPacket + dataSize;
packetsPerFrame = 128; packetsPerFrame = 128;

View File

@ -353,7 +353,6 @@ uint32_t Listener::ListenToAnImage(char* buf) {
uint32_t numpackets = 0; uint32_t numpackets = 0;
uint32_t dsize = generalData->dataSize; uint32_t dsize = generalData->dataSize;
uint32_t hsize = generalData->headerSizeinPacket; //(includes empty header) uint32_t hsize = generalData->headerSizeinPacket; //(includes empty header)
uint32_t esize = generalData->emptyHeader;
uint32_t fifohsize = generalData->fifoBufferHeaderSize; uint32_t fifohsize = generalData->fifoBufferHeaderSize;
uint32_t pperFrame = generalData->packetsPerFrame; uint32_t pperFrame = generalData->packetsPerFrame;
bool isHeaderEmpty = true; bool isHeaderEmpty = true;
@ -397,13 +396,13 @@ uint32_t Listener::ListenToAnImage(char* buf) {
//check if its the current image packet //check if its the current image packet
// -------------------------- new header ---------------------------------------------------------------------- // -------------------------- new header ----------------------------------------------------------------------
if (standardheader) { if (standardheader) {
old_header = (sls_detector_header*) (&carryOverPacket[esize]); old_header = (sls_detector_header*) (&carryOverPacket[0]);
fnum = old_header->frameNumber; fnum = old_header->frameNumber;
pnum = old_header->packetNumber; pnum = old_header->packetNumber;
} }
// -------------------old header ----------------------------------------------------------------------------- // -------------------old header -----------------------------------------------------------------------------
else { else {
generalData->GetHeaderInfo(index, &carryOverPacket[esize], generalData->GetHeaderInfo(index, &carryOverPacket[0],
*dynamicRange, oddStartingPacket, fnum, pnum, snum, bid); *dynamicRange, oddStartingPacket, fnum, pnum, snum, bid);
} }
//------------------------------------------------------------------------------------------------------------ //------------------------------------------------------------------------------------------------------------
@ -515,7 +514,7 @@ uint32_t Listener::ListenToAnImage(char* buf) {
// -------------------------- new header ---------------------------------------------------------------------- // -------------------------- new header ----------------------------------------------------------------------
if (standardheader) { if (standardheader) {
old_header = (sls_detector_header*) (&listeningPacket[esize]); old_header = (sls_detector_header*) (&listeningPacket[0]);
fnum = old_header->frameNumber; fnum = old_header->frameNumber;
pnum = old_header->packetNumber; pnum = old_header->packetNumber;
} }
@ -523,10 +522,10 @@ uint32_t Listener::ListenToAnImage(char* buf) {
else { else {
// set first packet to be odd or even (check required when switching from roi to no roi) // set first packet to be odd or even (check required when switching from roi to no roi)
if (myDetectorType == GOTTHARD && !measurementStartedFlag) { if (myDetectorType == GOTTHARD && !measurementStartedFlag) {
oddStartingPacket = generalData->SetOddStartingPacket(index, &listeningPacket[esize]); oddStartingPacket = generalData->SetOddStartingPacket(index, &listeningPacket[0]);
} }
generalData->GetHeaderInfo(index, &listeningPacket[esize], generalData->GetHeaderInfo(index, &listeningPacket[0],
*dynamicRange, oddStartingPacket, fnum, pnum, snum, bid); *dynamicRange, oddStartingPacket, fnum, pnum, snum, bid);
} }
//------------------------------------------------------------------------------------------------------------ //------------------------------------------------------------------------------------------------------------

View File

@ -2,9 +2,10 @@
#define GITBRANCH "refgui" #define GITBRANCH "refgui"
#define APIGOTTHARD 0x190108 #define APIGOTTHARD 0x190108
#define APIMOENCH 0x181108 #define APIMOENCH 0x181108
#define APIJUNGFRAU 0x190405
#define APILIB 0x190405 #define APILIB 0x190405
#define APIRECEIVER 0x190405 #define APIRECEIVER 0x190405
#define APIGUI 0x190405 #define APIGUI 0x190405
#define APICTB 0x190514
#define APIEIGER 0x190516 #define APIEIGER 0x190516
#define APICTB 0x190516
#define APIJUNGFRAU 0x190517