mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-04-19 18:40:01 +02:00
jungfrau server: feature finish: switching between 2 interfaces
This commit is contained in:
parent
1943e77b24
commit
1a1c6b9b42
@ -197,15 +197,16 @@
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#define CONFIG_RDT_TMR_MSK (0x0000FFFF << CONFIG_RDT_TMR_OFST)
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#define CONFIG_OPRTN_MDE_2_X_10GbE_OFST (16)
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#define CONFIG_OPRTN_MDE_2_X_10GbE_MSK (0x00000001 << CONFIG_OPRTN_MDE_2_X_10GbE_OFST)
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#define CONFIG_OPRTN_MDE_1_X_10GBE_VAL ((0x0 << CONFIG_OPRTN_MDE_2_X_10GbE_OFST) & CONFIG_OPRTN_MDE_2_X_10GbE_MSK)
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// if 0, outer is the primary interface
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#define CONFIG_INNR_PRIMRY_INTRFCE_OFST (17)
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#define CONFIG_INNR_PRIMRY_INTRFCE_MSK (0x00000001 << CONFIG_INNR_PRIMRY_INTRFCE_OFST)
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#define CONFIG_READOUT_SPEED_OFST (20)
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#define CONFIG_READOUT_SPEED_MSK (0x00000003 << CONFIG_READOUT_SPEED_OFST)
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#define CONFIG_QUARTER_SPEED_10MHZ_VAL ((0x0 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK)
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#define CONFIG_HALF_SPEED_20MHZ_VAL ((0x1 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK)
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#define CONFIG_FULL_SPEED_40MHZ_VAL ((0x2 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK)
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#define CONFIG_TDMA_OFST (24)
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#define CONFIG_TDMA_MSK (0x00000001 << CONFIG_TDMA_OFST)
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#define CONFIG_TDMA_DISABLE_VAL ((0x0 << CONFIG_TDMA_OFST) & CONFIG_TDMA_MSK)
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#define CONFIG_TDMA_ENABLE_OFST (24)
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#define CONFIG_TDMA_ENABLE_MSK (0x00000001 << CONFIG_TDMA_ENABLE_OFST)
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#define CONFIG_TDMA_TIMESLOT_OFST (25) // 1ms
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#define CONFIG_TDMA_TIMESLOT_MSK (0x0000001F << CONFIG_TDMA_TIMESLOT_OFST)
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#define CONFIG_ETHRNT_FLW_CNTRL_OFST (31)
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@ -234,6 +235,12 @@
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#define CONTROL_ACQ_FIFO_CLR_MSK (0x00000001 << CONTROL_ACQ_FIFO_CLR_OFST)
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#define CONTROL_STORAGE_CELL_NUM_OFST (16)
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#define CONTROL_STORAGE_CELL_NUM_MSK (0x0000000F << CONTROL_STORAGE_CELL_NUM_OFST)
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#define CONTROL_RX_ADDTNL_ENDPTS_NUM_OFST (20)
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#define CONTROL_RX_ADDTNL_ENDPTS_NUM_MSK (0x0000003F << CONTROL_RX_ADDTNL_ENDPTS_NUM_OFST)
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#define CONTROL_RX_ENDPTS_START_OFST (26)
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#define CONTROL_RX_ENDPTS_START_MSK (0x0000003F << CONTROL_RX_ENDPTS_START_OFST)
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/* Reconfiguratble PLL Paramater Register */
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#define PLL_PARAM_REG (0x50 << MEM_MAP_SHIFT)
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@ -400,6 +407,32 @@
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#define COORD_0_Z_OFST (0)
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#define COORD_0_Z_MSK (0x0000FFFF << COORD_0_Z_OFST)
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/** Module row coordinates */
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/*#define COORD_ROW_REG (0x7C << MEM_MAP_SHIFT)
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#define COORD_ROW_OUTER_OFST (0)
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#define COORD_ROW_OUTER_MSK (0x0000FFFF << COORD_ROW_OUTER_OFST)
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#define COORD_ROW_INNER_OFST (16)
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#define COORD_ROW_INNER_MSK (0x0000FFFF << COORD_ROW_INNER_OFST)
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*/
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/** Module column coordinates */
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/*#define COORD_COL_REG (0x7D << MEM_MAP_SHIFT)
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#define COORD_COL_OUTER_OFST (0)
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#define COORD_COL_OUTER_MSK (0x0000FFFF << COORD_COL_OUTER_OFST)
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#define COORD_COL_INNER_OFST (16)
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#define COORD_COL_INNER_MSK (0x0000FFFF << COORD_COL_INNER_OFST)
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*/
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/** Module column coordinates */
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/*#define COORD_RESERVED_REG (0x7E << MEM_MAP_SHIFT)
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#define COORD_RESERVED_OUTER_OFST (0)
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#define COORD_RESERVED_OUTER_MSK (0x0000FFFF << COORD_RESERVED_OUTER_OFST)
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#define COORD_RESERVED_INNER_OFST (16)
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#define COORD_RESERVED_INNER_MSK (0x0000FFFF << COORD_RESERVED_INNER_OFST)
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*/
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/* ASIC Control Register */
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#define ASIC_CTRL_REG (0x7F << MEM_MAP_SHIFT)
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// tPC = (PCT + 1) * 25ns
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@ -440,6 +473,13 @@
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/* Round Robin */
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#define RXR_ENDPOINTS_MAX (64)
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#define RXR_ENDPOINT_OUTER_START_REG (0x1000 << MEM_MAP_SHIFT)
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#define RXR_ENDPOINT_INNER_START_REG (0x2000 << MEM_MAP_SHIFT)
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#define RXR_ENDPOINT_OFST (0x10 << MEM_MAP_SHIFT)
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BIN
slsDetectorServers/jungfrauDetectorServer/bin/jungfrauDetectorServer_developer
Executable file
BIN
slsDetectorServers/jungfrauDetectorServer/bin/jungfrauDetectorServer_developer
Executable file
Binary file not shown.
Binary file not shown.
@ -34,7 +34,6 @@ int highvoltage = 0;
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int dacValues[NDAC] = {0};
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int adcPhase = 0;
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int isFirmwareCheckDone() {
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return firmware_check_done;
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}
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@ -172,8 +171,8 @@ int checkType() {
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return OK;
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#endif
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volatile u_int32_t type = ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST);
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if (type != BOARD_JUNGFRAU_TYPE){
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FILE_LOG(logERROR, ("This is not a Jungfrau Server (read %d, expected %d)\n", type, BOARD_JUNGFRAU_TYPE));
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if (type != JUNGFRAU){
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FILE_LOG(logERROR, ("This is not a Jungfrau Server (read %d, expected %d)\n", type, JUNGFRAU));
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return FAIL;
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}
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@ -423,11 +422,11 @@ void setupDetector() {
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resetCore();
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alignDeserializer();
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configureASICTimer();
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bus_w(ADC_PORT_INVERT_REG, ADC_PORT_INVERT_VAL);
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initReadoutConfiguration();
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//Initialization of acquistion parameters
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setSettings(DEFAULT_SETTINGS);
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@ -654,12 +653,12 @@ int64_t getTimeLeft(enum timerIndex ind){
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retval = get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG) / (1E-3 * CLK_SYNC);
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FILE_LOG(logINFO, ("Getting period left: %lldns\n", (long long int)retval));
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break;
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/*
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case DELAY_AFTER_TRIGGER:
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retval = get64BitReg(xxx) / (1E-3 * CLK_SYNC);
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retval = get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG) / (1E-3 * CLK_SYNC);
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FILE_LOG(logINFO, ("Getting delay left: %lldns\n", (long long int)retval));
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break;
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*/
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case CYCLES_NUMBER:
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retval = get64BitReg(GET_CYCLES_LSB_REG, GET_CYCLES_MSB_REG);
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FILE_LOG(logINFO, ("Getting number of cycles left: %lld\n", (long long int)retval));
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@ -983,40 +982,106 @@ enum externalCommunicationMode getTiming() {
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/* configure mac */
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void setNumberofUDPInterfaces(int val) {
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uint32_t addr = CONFIG_REG;
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// enable 2 interfaces
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if (val > 1) {
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FILE_LOG(logINFOBLUE, ("Setting #Interfaces: 2\n"));
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bus_w(addr, bus_r(addr) | CONFIG_OPRTN_MDE_2_X_10GbE_MSK);
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}
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// enable only 1 interface
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else {
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FILE_LOG(logINFOBLUE, ("Setting #Interfaces: 1\n"));
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bus_w(addr, bus_r(addr) &~ CONFIG_OPRTN_MDE_2_X_10GbE_MSK);
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}
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}
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long int calcChecksum(int sourceip, int destip) {
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ip_header ip;
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ip.ip_ver = 0x4;
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ip.ip_ihl = 0x5;
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ip.ip_tos = 0x0;
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ip.ip_len = IP_PACKETSIZE;
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ip.ip_ident = 0x0000;
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ip.ip_flag = 0x2; //not nibble aligned (flag& offset
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ip.ip_offset = 0x000;
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ip.ip_ttl = 0x40;
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ip.ip_protocol = 0x11;
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ip.ip_chksum = 0x0000 ; // pseudo
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ip.ip_sourceip = sourceip;
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ip.ip_destip = destip;
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void selectPrimaryInterface(int val) {
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uint32_t addr = CONFIG_REG;
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int count = sizeof(ip);
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// inner (user input: 1)
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if (val == 1) {
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FILE_LOG(logINFOBLUE, ("Setting Primary Interface: 1 (Inner)\n"));
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bus_w(addr, bus_r(addr) | CONFIG_INNR_PRIMRY_INTRFCE_MSK);
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}
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// outer (user input: 2)
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else {
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FILE_LOG(logINFOBLUE, ("Setting Primary Interface: 2 (Outer)\n"));
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bus_w(addr, bus_r(addr) &~ CONFIG_INNR_PRIMRY_INTRFCE_MSK);
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}
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}
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unsigned short *addr;
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addr = (unsigned short*) &(ip); /* warning: assignment from incompatible pointer type */
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void setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip, uint64_t destmac, uint32_t destport, uint64_t sourcemac, uint32_t sourceip, uint32_t sourceport) {
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// start addr
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uint32_t addr = (type == INNER ? RXR_ENDPOINT_INNER_START_REG : RXR_ENDPOINT_OUTER_START_REG);
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// calculate rxr endpoint offset
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addr += (iRxEntry * RXR_ENDPOINT_OFST);
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// get struct memory
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udp_header *udp = (udp_header*) (CSP0BASE + addr * 2);
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memset(udp, 0, sizeof(udp_header));
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// mac addresses
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// msb (32) + lsb (16)
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udp->udp_destmac_msb = ((destmac >> 16) & BIT32_MASK);
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udp->udp_destmac_lsb = ((destmac >> 0) & BIT16_MASK);
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// msb (16) + lsb (32)
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udp->udp_srcmac_msb = ((sourcemac >> 32) & BIT16_MASK);
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udp->udp_srcmac_lsb = ((sourcemac >> 0) & BIT32_MASK);
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// ip addresses
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udp->ip_srcip_msb = ((sourceip >> 16) & BIT16_MASK);
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udp->ip_srcip_lsb = ((sourceip >> 0) & BIT16_MASK);
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udp->ip_destip_msb = ((destip >> 16) & BIT16_MASK);
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udp->ip_destip_lsb = ((destip >> 0) & BIT16_MASK);
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// source port
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udp->udp_srcport = sourceport;
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udp->udp_destport = destport;
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// other defines
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udp->udp_ethertype = 0x800;
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udp->ip_ver = 0x4;
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udp->ip_ihl = 0x5;
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udp->ip_flags = 0x2; //FIXME
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udp->ip_ttl = 0x40;
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udp->ip_protocol = 0x11;
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// total length is redefined in firmware
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calcChecksum(udp);
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}
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void calcChecksum(udp_header* udp) {
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int count = IP_HEADER_SIZE;
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long int sum = 0;
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while( count > 1 ) {
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// start at ip_tos as the memory is not continous for ip header
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uint16_t *addr = (uint16_t*) (&(udp->ip_tos));
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sum += *addr++;
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count -= 2;
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// ignore ethertype (from udp header)
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addr++;
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// from identification to srcip_lsb
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while( count > 2 ) {
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sum += *addr++;
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count -= 2;
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}
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// ignore src udp port (from udp header)
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addr++;
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if (count > 0)
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sum += *addr; // Add left-over byte, if any
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while (sum>>16)
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while (sum >> 16)
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sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits
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long int checksum = (~sum) & 0xffff;
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FILE_LOG(logINFO, ("IP checksum is 0x%lx\n",checksum));
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return checksum;
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long int checksum = sum & 0xffff;
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checksum += UDP_IP_HEADER_LENGTH_BYTES;
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FILE_LOG(logINFO, ("\tIP checksum is 0x%lx\n",checksum));
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udp->ip_checksum = checksum;
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}
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@ -1034,6 +1099,7 @@ int configureMAC(int numInterfaces, int selInterface,
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FILE_LOG(logINFO, ("\t#Interfaces : %d\n", numInterfaces));
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FILE_LOG(logINFO, ("\tInterface : %d\n\n", selInterface));
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FILE_LOG(logINFO, ("\tInner\n"));
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FILE_LOG(logINFO, ("\tSource IP : %d.%d.%d.%d \t\t(0x%08x)\n",
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(sourceip>>24)&0xff,(sourceip>>16)&0xff,(sourceip>>8)&0xff,(sourceip)&0xff, sourceip));
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FILE_LOG(logINFO, ("\tSource MAC : %02x:%02x:%02x:%02x:%02x:%02x \t(0x%010llx)\n",
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@ -1059,6 +1125,7 @@ int configureMAC(int numInterfaces, int selInterface,
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FILE_LOG(logINFO, ("\tDest. Port : %d \t\t\t(0x%08x)\n\n",udpport, udpport));
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uint32_t sourceport2 = DEFAULT_TX_UDP_PORT + 1;
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FILE_LOG(logINFO, ("\tOuter\n"));
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FILE_LOG(logINFO, ("\tSource IP2 : %d.%d.%d.%d \t\t(0x%08x)\n",
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(sourceip2>>24)&0xff,(sourceip2>>16)&0xff,(sourceip2>>8)&0xff,(sourceip2)&0xff, sourceip2));
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FILE_LOG(logINFO, ("\tSource MAC2 : %02x:%02x:%02x:%02x:%02x:%02x \t(0x%010llx)\n",
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@ -1083,35 +1150,16 @@ int configureMAC(int numInterfaces, int selInterface,
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(long long unsigned int)destmac2));
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FILE_LOG(logINFO, ("\tDest. Port2 : %d \t\t\t(0x%08x)\n",udpport2, udpport2));
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long int checksum=calcChecksum(sourceip, destip);
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bus_w(TX_IP_REG, sourceip);
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bus_w(RX_IP_REG, destip);
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// default one rxr entry (others not yet implemented in client yet)
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int iRxEntry = 0;
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// top
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setupHeader(iRxEntry, INNER, destip, destmac, udpport, sourcemac, sourceip, sourceport);
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// bottom
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setupHeader(iRxEntry, OUTER, destip2, destmac2, udpport2, sourcemac2, sourceip2, sourceport2);
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uint32_t val = 0;
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setNumberofUDPInterfaces(numInterfaces);
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selectPrimaryInterface(selInterface);
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val = ((sourcemac >> LSB_OF_64_BIT_REG_OFST) & BIT_32_MSK);
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bus_w(TX_MAC_LSB_REG, val);
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FILE_LOG(logDEBUG1, ("Read from TX_MAC_LSB_REG: 0x%08x\n", bus_r(TX_MAC_LSB_REG)));
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val = ((sourcemac >> MSB_OF_64_BIT_REG_OFST) & BIT_32_MSK);
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bus_w(TX_MAC_MSB_REG,val);
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FILE_LOG(logDEBUG1, ("Read from TX_MAC_MSB_REG: 0x%08x\n", bus_r(TX_MAC_MSB_REG)));
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val = ((destmac >> LSB_OF_64_BIT_REG_OFST) & BIT_32_MSK);
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bus_w(RX_MAC_LSB_REG, val);
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FILE_LOG(logDEBUG1, ("Read from RX_MAC_LSB_REG: 0x%08x\n", bus_r(RX_MAC_LSB_REG)));
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val = ((destmac >> MSB_OF_64_BIT_REG_OFST) & BIT_32_MSK);
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bus_w(RX_MAC_MSB_REG, val);
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FILE_LOG(logDEBUG1, ("Read from RX_MAC_MSB_REG: 0x%08x\n", bus_r(RX_MAC_MSB_REG)));
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val = (((sourceport << UDP_PORT_TX_OFST) & UDP_PORT_TX_MSK) |
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((udpport << UDP_PORT_RX_OFST) & UDP_PORT_RX_MSK));
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bus_w(UDP_PORT_REG, val);
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FILE_LOG(logDEBUG1, ("Read from UDP_PORT_REG: 0x%08x\n", bus_r(UDP_PORT_REG)));
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bus_w(TX_IP_CHECKSUM_REG,(checksum << TX_IP_CHECKSUM_OFST) & TX_IP_CHECKSUM_MSK);
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FILE_LOG(logDEBUG1, ("Read from TX_IP_CHECKSUM_REG: 0x%08x\n", bus_r(TX_IP_CHECKSUM_REG)));
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cleanFifos();
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resetCore();
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alignDeserializer();
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@ -1121,20 +1169,20 @@ int configureMAC(int numInterfaces, int selInterface,
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int setDetectorPosition(int pos[]) {
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int ret = OK;
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FILE_LOG(logDEBUG1, ("Setting detector position: (%d, %d)\n", pos[0], pos[1]));
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FILE_LOG(logDEBUG1, ("Setting detector position: (%d, %d)\n", pos[X], pos[Y]));
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bus_w(COORD_0_REG, bus_r(COORD_0_REG) & (~(COORD_0_X_MSK)));
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bus_w(COORD_0_REG, bus_r(COORD_0_REG) | ((pos[0] << COORD_0_X_OFST) & COORD_0_X_MSK));
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if ((bus_r(COORD_0_REG) & COORD_0_X_MSK) != ((pos[0] << COORD_0_X_OFST) & COORD_0_X_MSK))
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bus_w(COORD_0_REG, bus_r(COORD_0_REG) | ((pos[X] << COORD_0_X_OFST) & COORD_0_X_MSK));
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if ((bus_r(COORD_0_REG) & COORD_0_X_MSK) != ((pos[X] << COORD_0_X_OFST) & COORD_0_X_MSK))
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ret = FAIL;
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bus_w(COORD_0_REG, bus_r(COORD_0_REG) & (~(COORD_0_Y_MSK)));
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bus_w(COORD_0_REG, bus_r(COORD_0_REG) | ((pos[1] << COORD_0_Y_OFST) & COORD_0_Y_MSK));
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if ((bus_r(COORD_0_REG) & COORD_0_Y_MSK) != ((pos[1] << COORD_0_Y_OFST) & COORD_0_Y_MSK))
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bus_w(COORD_0_REG, bus_r(COORD_0_REG) | ((pos[Y] << COORD_0_Y_OFST) & COORD_0_Y_MSK));
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if ((bus_r(COORD_0_REG) & COORD_0_Y_MSK) != ((pos[Y] << COORD_0_Y_OFST) & COORD_0_Y_MSK))
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ret = FAIL;
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if (ret == OK) {
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FILE_LOG(logINFO, ("Position set to [%d, %d]\n", pos[0], pos[1]));
|
||||
FILE_LOG(logINFO, ("Position set to [%d, %d]\n", pos[X], pos[Y]));
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
@ -1143,6 +1191,42 @@ int setDetectorPosition(int pos[]) {
|
||||
|
||||
/* jungfrau specific - powerchip, autocompdisable, asictimer, clockdiv, pll, flashing fpga */
|
||||
|
||||
void initReadoutConfiguration() {
|
||||
|
||||
FILE_LOG(logINFO, ("Initializing Readout Configuration:\n"
|
||||
"\t Reset readout Timer\n"
|
||||
"\t 1 x 10G mode\n"
|
||||
"\t outer interface is primary\n"
|
||||
"\t half speed\n"
|
||||
"\t TDMA disabled, 0 as TDMA slot\n"
|
||||
"\t Ethernet overflow disabled\n"
|
||||
"\t Reset Round robin entries\n"));
|
||||
|
||||
uint32_t val = 0;
|
||||
// reset readouttimer
|
||||
val &= ~CONFIG_RDT_TMR_MSK;
|
||||
// 1 x 10G mode
|
||||
val &= ~CONFIG_OPRTN_MDE_2_X_10GbE_MSK;
|
||||
// outer interface
|
||||
val &= ~CONFIG_INNR_PRIMRY_INTRFCE_MSK;
|
||||
// half speed
|
||||
val &= ~CONFIG_READOUT_SPEED_MSK;
|
||||
val |= CONFIG_HALF_SPEED_20MHZ_VAL;
|
||||
// tdma disable
|
||||
val &= ~CONFIG_TDMA_ENABLE_MSK;
|
||||
// tdma slot 0
|
||||
val &= ~CONFIG_TDMA_TIMESLOT_MSK;
|
||||
// no ethernet overflow
|
||||
val &= ~CONFIG_ETHRNT_FLW_CNTRL_MSK;
|
||||
bus_w(CONFIG_REG, val);
|
||||
|
||||
val = bus_r(CONTROL_REG);
|
||||
// reset (addtional round robin entry) rx endpoints num
|
||||
val &= CONTROL_RX_ADDTNL_ENDPTS_NUM_MSK;
|
||||
// reset start of round robin entry to 0
|
||||
val &= CONTROL_RX_ENDPTS_START_MSK;
|
||||
bus_w(CONTROL_REG, val);
|
||||
}
|
||||
|
||||
|
||||
int powerChip (int on){
|
||||
@ -1191,62 +1275,56 @@ void setClockDivider(int val) {
|
||||
if(runBusy())
|
||||
stopStateMachine();
|
||||
|
||||
uint32_t txndelay_msk = 0;
|
||||
switch(val) {
|
||||
|
||||
switch(val){
|
||||
case FULL_SPEED:
|
||||
FILE_LOG(logINFO, ("Setting Full Speed (40 MHz):\n"));
|
||||
|
||||
// todo in firmware, for now setting half speed
|
||||
case FULL_SPEED://40
|
||||
FILE_LOG(logINFO, ("Setting Half Speed (20 MHz):\n"));
|
||||
bus_w(SAMPLE_REG, SAMPLE_ADC_FULL_SPEED);
|
||||
FILE_LOG(logINFO, ("\tSet Sample Reg to 0x%x\n", bus_r(SAMPLE_REG)));
|
||||
|
||||
FILE_LOG(logINFO, ("\tSetting Sample Reg to 0x%x\n", SAMPLE_ADC_HALF_SPEED));
|
||||
bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED);
|
||||
bus_w(CONFIG_REG, (bus_r(CONFIG_REG) & ~CONFIG_READOUT_SPEED_MSK) | CONFIG_FULL_SPEED_40MHZ_VAL);
|
||||
FILE_LOG(logINFO, ("\tSet Config Reg to 0x%x\n", bus_r(CONFIG_REG)));
|
||||
|
||||
txndelay_msk = (bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK); // read config tdma timeslot value
|
||||
FILE_LOG(logINFO, ("\tSetting Config Reg to 0x%x\n", CONFIG_HALF_SPEED | txndelay_msk));
|
||||
bus_w(CONFIG_REG, CONFIG_HALF_SPEED | txndelay_msk);
|
||||
|
||||
FILE_LOG(logINFO, ("\tSetting ADC Ofst Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL));
|
||||
bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL);
|
||||
|
||||
FILE_LOG(logINFO, ("\tSetting ADC Phase Reg to 0x%x\n", ADC_PHASE_HALF_SPEED));
|
||||
setAdcPhase(ADC_PHASE_HALF_SPEED, 0);
|
||||
bus_w(ADC_OFST_REG, ADC_OFST_FULL_SPEED_VAL);
|
||||
FILE_LOG(logINFO, ("\tSet ADC Ofst Reg to 0x%x\n", bus_r(ADC_OFST_REG)));
|
||||
|
||||
setAdcPhase(ADC_PHASE_FULL_SPEED, 0);
|
||||
FILE_LOG(logINFO, ("\tSet ADC Phase Reg to 0x%x\n", ADC_PHASE_FULL_SPEED));
|
||||
break;
|
||||
|
||||
case HALF_SPEED:
|
||||
FILE_LOG(logINFO, ("Setting Half Speed (20 MHz):\n"));
|
||||
|
||||
FILE_LOG(logINFO, ("\tSetting Sample Reg to 0x%x\n", SAMPLE_ADC_HALF_SPEED));
|
||||
bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED);
|
||||
FILE_LOG(logINFO, ("\tSet Sample Reg to 0x%x\n", bus_r(SAMPLE_REG)));
|
||||
|
||||
txndelay_msk = (bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK); // read config tdma timeslot value
|
||||
FILE_LOG(logINFO, ("\tSetting Config Reg to 0x%x\n", CONFIG_HALF_SPEED | txndelay_msk));
|
||||
bus_w(CONFIG_REG, CONFIG_HALF_SPEED | txndelay_msk);
|
||||
bus_w(CONFIG_REG, (bus_r(CONFIG_REG) & ~CONFIG_READOUT_SPEED_MSK) | CONFIG_HALF_SPEED_20MHZ_VAL);
|
||||
FILE_LOG(logINFO, ("\tSet Config Reg to 0x%x\n", bus_r(CONFIG_REG)));
|
||||
|
||||
FILE_LOG(logINFO, ("\tSetting ADC Ofst Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL));
|
||||
bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL);
|
||||
FILE_LOG(logINFO, ("\tSet ADC Ofst Reg to 0x%x\n", bus_r(ADC_OFST_REG)));
|
||||
|
||||
FILE_LOG(logINFO, ("\tSetting ADC Phase Reg to 0x%x\n", ADC_PHASE_HALF_SPEED));
|
||||
setAdcPhase(ADC_PHASE_HALF_SPEED, 0);
|
||||
|
||||
FILE_LOG(logINFO, ("\tSet ADC Phase Reg to 0x%x\n", ADC_PHASE_HALF_SPEED));
|
||||
break;
|
||||
|
||||
case QUARTER_SPEED:
|
||||
FILE_LOG(logINFO, ("Setting Half Speed (10 MHz):\n"));
|
||||
|
||||
FILE_LOG(logINFO, ("\tSetting Sample Reg to 0x%x\n", SAMPLE_ADC_QUARTER_SPEED));
|
||||
bus_w(SAMPLE_REG, SAMPLE_ADC_QUARTER_SPEED);
|
||||
FILE_LOG(logINFO, ("\tSet Sample Reg to 0x%x\n", bus_r(SAMPLE_REG)));
|
||||
|
||||
txndelay_msk = (bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK); // read config tdma timeslot value
|
||||
FILE_LOG(logINFO, ("\tSetting Config Reg to 0x%x\n", CONFIG_QUARTER_SPEED | txndelay_msk));
|
||||
bus_w(CONFIG_REG, CONFIG_QUARTER_SPEED | txndelay_msk);
|
||||
bus_w(CONFIG_REG, (bus_r(CONFIG_REG) & ~CONFIG_READOUT_SPEED_MSK) | CONFIG_QUARTER_SPEED_10MHZ_VAL);
|
||||
FILE_LOG(logINFO, ("\tSet Config Reg to 0x%x\n", bus_r(CONFIG_REG)));
|
||||
|
||||
FILE_LOG(logINFO, ("\tSetting ADC Ofst Reg to 0x%x\n", ADC_OFST_QUARTER_SPEED_VAL));
|
||||
bus_w(ADC_OFST_REG, ADC_OFST_QUARTER_SPEED_VAL);
|
||||
FILE_LOG(logINFO, ("\tSet ADC Ofst Reg to 0x%x\n", bus_r(ADC_OFST_REG)));
|
||||
|
||||
FILE_LOG(logINFO, ("\tSetting ADC Phase Reg to 0x%x\n", ADC_PHASE_QUARTER_SPEED));
|
||||
setAdcPhase(ADC_PHASE_QUARTER_SPEED, 0);
|
||||
|
||||
FILE_LOG(logINFO, ("\tSet ADC Phase Reg to 0x%x\n", ADC_PHASE_QUARTER_SPEED));
|
||||
break;
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -1410,22 +1488,38 @@ void alignDeserializer() {
|
||||
|
||||
|
||||
int setNetworkParameter(enum NETWORKINDEX mode, int value) {
|
||||
if (mode != TXN_FRAME)
|
||||
return -1;
|
||||
switch(mode) {
|
||||
|
||||
if (value >= 0) {
|
||||
FILE_LOG(logINFO, ("Setting transmission delay: %d\n", value));
|
||||
bus_w(CONFIG_REG, (bus_r(CONFIG_REG) &~CONFIG_TDMA_TIMESLOT_MSK)
|
||||
| (((value << CONFIG_TDMA_TIMESLOT_OFST) & CONFIG_TDMA_TIMESLOT_MSK)));
|
||||
if (value == 0)
|
||||
bus_w(CONFIG_REG, bus_r(CONFIG_REG) &~ CONFIG_TDMA_MSK);
|
||||
else
|
||||
bus_w(CONFIG_REG, bus_r(CONFIG_REG) | CONFIG_TDMA_MSK);
|
||||
FILE_LOG(logDEBUG1, ("Transmission delay read %d\n",
|
||||
((bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK) >> CONFIG_TDMA_TIMESLOT_OFST)));
|
||||
}
|
||||
case TXN_FRAME:
|
||||
if (value >= 0) {
|
||||
FILE_LOG(logINFO, ("Setting transmission delay: %d\n", value));
|
||||
bus_w(CONFIG_REG, (bus_r(CONFIG_REG) &~CONFIG_TDMA_TIMESLOT_MSK)
|
||||
| (((value << CONFIG_TDMA_TIMESLOT_OFST) & CONFIG_TDMA_TIMESLOT_MSK)));
|
||||
if (value == 0) {
|
||||
FILE_LOG(logINFO, ("Switching off transmission delay\n"));
|
||||
bus_w(CONFIG_REG, bus_r(CONFIG_REG) &~ CONFIG_TDMA_ENABLE_MSK);
|
||||
} else {
|
||||
FILE_LOG(logINFO, ("Switching on transmission delay\n"));
|
||||
bus_w(CONFIG_REG, bus_r(CONFIG_REG) | CONFIG_TDMA_ENABLE_MSK);
|
||||
}
|
||||
FILE_LOG(logDEBUG1, ("Transmission delay read %d\n",
|
||||
((bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK) >> CONFIG_TDMA_TIMESLOT_OFST)));
|
||||
}
|
||||
return ((bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK) >> CONFIG_TDMA_TIMESLOT_OFST);
|
||||
|
||||
case FLOW_CONTROL_10G:
|
||||
if (value == 0) {
|
||||
FILE_LOG(logINFO, ("Switching off 10G flow control\n"));
|
||||
bus_w(CONFIG_REG, bus_r(CONFIG_REG) &~ CONFIG_ETHRNT_FLW_CNTRL_MSK);
|
||||
} else {
|
||||
FILE_LOG(logINFO, ("Switching on 10G flow control\n"));
|
||||
bus_w(CONFIG_REG, bus_r(CONFIG_REG) | CONFIG_ETHRNT_FLW_CNTRL_MSK);
|
||||
}
|
||||
return ((bus_r(CONFIG_REG) & CONFIG_ETHRNT_FLW_CNTRL_MSK) >> CONFIG_ETHRNT_FLW_CNTRL_OFST);
|
||||
|
||||
return ((bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK) >> CONFIG_TDMA_TIMESLOT_OFST);
|
||||
default:
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -4,24 +4,36 @@
|
||||
|
||||
|
||||
#define MIN_REQRD_VRSN_T_RD_API 0x171220
|
||||
#define REQRD_FRMWR_VRSN 0x181206 // temp bug fix from last version, timing mode is backwards compatible
|
||||
#define REQRD_FRMWR_VRSN 0x190509
|
||||
|
||||
#define BOARD_JUNGFRAU_TYPE (8)
|
||||
#define CTRL_SRVR_INIT_TIME_US (300 * 1000)
|
||||
|
||||
/* Struct Definitions */
|
||||
typedef struct ip_header_struct {
|
||||
uint16_t ip_len;
|
||||
uint8_t ip_tos;
|
||||
uint8_t ip_ihl:4 ,ip_ver:4;
|
||||
uint16_t ip_offset:13,ip_flag:3;
|
||||
uint16_t ip_ident;
|
||||
uint16_t ip_chksum;
|
||||
uint8_t ip_protocol;
|
||||
uint8_t ip_ttl;
|
||||
uint32_t ip_sourceip;
|
||||
uint32_t ip_destip;
|
||||
} ip_header;
|
||||
typedef struct udp_header_struct {
|
||||
uint32_t udp_destmac_msb;
|
||||
uint16_t udp_srcmac_msb;
|
||||
uint16_t udp_destmac_lsb;
|
||||
uint32_t udp_srcmac_lsb;
|
||||
uint8_t ip_tos;
|
||||
uint8_t ip_ihl: 4, ip_ver: 4;
|
||||
uint16_t udp_ethertype;
|
||||
uint16_t ip_identification;
|
||||
uint16_t ip_totallength;
|
||||
uint8_t ip_protocol;
|
||||
uint8_t ip_ttl;
|
||||
uint16_t ip_fragmentoffset: 13, ip_flags: 3;
|
||||
uint16_t ip_srcip_msb;
|
||||
uint16_t ip_checksum;
|
||||
uint16_t ip_destip_msb;
|
||||
uint16_t ip_srcip_lsb;
|
||||
uint16_t udp_srcport;
|
||||
uint16_t ip_destip_lsb;
|
||||
uint16_t udp_checksum;
|
||||
uint16_t udp_destport;
|
||||
} udp_header;
|
||||
|
||||
#define IP_HEADER_SIZE 20
|
||||
|
||||
|
||||
/* Enums */
|
||||
enum CLK_SPEED_INDEX {FULL_SPEED, HALF_SPEED, QUARTER_SPEED};
|
||||
@ -36,7 +48,7 @@ enum DACINDEX {VB_COMP, VDD_PROT, VIN_COM, VREF_PRECH, VB_PIXBUF, VB_DS, VREF
|
||||
480, /* VREF_DS */ \
|
||||
420 /* VREF_COMP */ \
|
||||
};
|
||||
enum NETWORKINDEX { TXN_FRAME };
|
||||
enum NETWORKINDEX { TXN_FRAME, FLOWCTRL_10G };
|
||||
|
||||
/* Hardware Definitions */
|
||||
#define NCHAN (256 * 256)
|
||||
@ -46,7 +58,6 @@ enum NETWORKINDEX { TXN_FRAME };
|
||||
#define DYNAMIC_RANGE (16)
|
||||
#define NUM_BYTES_PER_PIXEL (DYNAMIC_RANGE / 8)
|
||||
#define DATA_BYTES (NCHIP * NCHAN * NUM_BYTES_PER_PIXEL)
|
||||
#define IP_PACKETSIZE (0x2052)
|
||||
#define CLK_RUN (40) /* MHz */
|
||||
#define CLK_SYNC (20) /* MHz */
|
||||
|
||||
@ -77,19 +88,21 @@ enum NETWORKINDEX { TXN_FRAME };
|
||||
#define MAX_STORAGE_CELL_DLY_NS_VAL ((ASIC_CTRL_EXPSRE_TMR_MSK >> ASIC_CTRL_EXPSRE_TMR_OFST) * ASIC_CTRL_EXPSRE_TMR_STEPS)
|
||||
#define ACQ_TIME_MIN_CLOCK (2)
|
||||
|
||||
#define SAMPLE_ADC_FULL_SPEED (SAMPLE_ADC_HALF_SPEED)
|
||||
#define SAMPLE_ADC_HALF_SPEED (SAMPLE_DECMT_FACTOR_2_VAL + SAMPLE_DGTL_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_ADC_SAMPLE_0_VAL) /* 0x1000 */
|
||||
#define SAMPLE_ADC_QUARTER_SPEED (SAMPLE_DECMT_FACTOR_4_VAL + SAMPLE_DGTL_SAMPLE_8_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_ADC_SAMPLE_0_VAL) /* 0x2810 */
|
||||
#define CONFIG_HALF_SPEED (CONFIG_TDMA_DISABLE_VAL + CONFIG_HALF_SPEED_20MHZ_VAL + CONFIG_OPRTN_MDE_1_X_10GBE_VAL) /**0x100000 */
|
||||
#define CONFIG_QUARTER_SPEED (CONFIG_TDMA_DISABLE_VAL + CONFIG_QUARTER_SPEED_10MHZ_VAL + CONFIG_OPRTN_MDE_1_X_10GBE_VAL)
|
||||
|
||||
#define ADC_OFST_FULL_SPEED_VAL (0x20)//(0x1f) //(0x20)
|
||||
#define ADC_OFST_HALF_SPEED_VAL (0x20)//(0x1f) //(0x20)
|
||||
#define ADC_OFST_QUARTER_SPEED_VAL (0x0f) //(0x0f)
|
||||
|
||||
#define ADC_PHASE_FULL_SPEED (0x2D) //45
|
||||
#define ADC_PHASE_HALF_SPEED (0x2D) //45
|
||||
#define ADC_PHASE_QUARTER_SPEED (0x2D) //45
|
||||
|
||||
#define ADC_PORT_INVERT_VAL (0x5A5A5A5A)//(0x453b2a9c)
|
||||
#define MAX_PHASE_SHIFTS (160)
|
||||
|
||||
/* MSB & LSB DEFINES */
|
||||
#define MSB_OF_64_BIT_REG_OFST (32)
|
||||
#define LSB_OF_64_BIT_REG_OFST (0)
|
||||
#define BIT_32_MSK (0xFFFFFFFF)
|
||||
|
||||
#define BIT16_MASK (0xFFFF)
|
||||
#define UDP_IP_HEADER_LENGTH_BYTES (28)
|
||||
@ -524,7 +524,8 @@ int Server_SendResult(int fileDes, intType itype, int update, void* retval, int
|
||||
|
||||
void getMacAddressinString(char* cmac, int size, uint64_t mac) {
|
||||
memset(cmac, 0, size);
|
||||
sprintf(cmac,"%02x:%02x:%02x:%02x:%02x:%02x",(unsigned int)((mac>>40)&0xFF),
|
||||
sprintf(cmac,"%02x:%02x:%02x:%02x:%02x:%02x",
|
||||
(unsigned int)((mac>>40)&0xFF),
|
||||
(unsigned int)((mac>>32)&0xFF),
|
||||
(unsigned int)((mac>>24)&0xFF),
|
||||
(unsigned int)((mac>>16)&0xFF),
|
||||
@ -535,4 +536,4 @@ void getMacAddressinString(char* cmac, int size, uint64_t mac) {
|
||||
void getIpAddressinString(char* cip, uint32_t ip) {
|
||||
memset(cip, 0, INET_ADDRSTRLEN);
|
||||
inet_ntop(AF_INET, &ip, cip, INET_ADDRSTRLEN);
|
||||
}
|
||||
}
|
||||
|
||||
@ -67,4 +67,5 @@ void getMacAddressinString(char* cmac, int size, uint64_t mac);
|
||||
*/
|
||||
void getIpAddressinString(char* cip, uint32_t ip);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
@ -13,6 +13,7 @@ Here are the definitions, but the actual implementation should be done for each
|
||||
|
||||
****************************************************/
|
||||
|
||||
enum interfaceType {OUTER, INNER};
|
||||
|
||||
// basic tests
|
||||
int isFirmwareCheckDone();
|
||||
@ -213,6 +214,11 @@ int getExtSignal();
|
||||
// configure mac
|
||||
#ifdef GOTTHARDD
|
||||
void calcChecksum(mac_conf* mac, int sourceip, int destip);
|
||||
#elif JUNGFRAUD
|
||||
void setNumberofUDPInterfaces(int val);
|
||||
void selectPrimaryInterface(int val);
|
||||
void setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip, uint64_t destmac, uint32_t destport, uint64_t sourcemac, uint32_t sourceip, uint32_t sourceport);
|
||||
void calcChecksum(udp_header* udp);
|
||||
#endif
|
||||
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
|
||||
long int calcChecksum(int sourceip, int destip);
|
||||
@ -285,6 +291,7 @@ int resetCounterBlock(int startACQ);
|
||||
|
||||
// jungfrau specific - powerchip, autocompdisable, clockdiv, asictimer, clock, pll, flashing firmware
|
||||
#elif JUNGFRAUD
|
||||
void initReadoutConfiguration();
|
||||
int powerChip (int on);
|
||||
int autoCompDisable(int on);
|
||||
void configureASICTimer();
|
||||
|
||||
@ -1719,13 +1719,6 @@ int get_time_left(int file_des) {
|
||||
|
||||
// only get
|
||||
// check index
|
||||
#ifdef JUNGFRAUD
|
||||
if (ind == DELAY_AFTER_TRIGGER) {
|
||||
ret = FAIL;
|
||||
sprintf(mess,"Timer Left Index (%d) is not implemented for this release.\n", (int)ind);
|
||||
FILE_LOG(logERROR,(mess));
|
||||
}
|
||||
#endif
|
||||
if (ret == OK) {
|
||||
switch(ind) {
|
||||
#ifdef EIGERD
|
||||
@ -2417,9 +2410,9 @@ int configure_mac(int file_des) {
|
||||
#endif
|
||||
#if defined(JUNGFRAUD) || defined(EIGERD)
|
||||
int pos[2] = {0, 0};
|
||||
sscanf(args[12], "%x", &pos[0]);
|
||||
sscanf(args[13], "%x", &pos[1]);
|
||||
FILE_LOG(logDEBUG1, ("Position: [%d, %d]\n", pos[0], pos[1]));
|
||||
sscanf(args[12], "%x", &pos[X]);
|
||||
sscanf(args[13], "%x", &pos[Y]);
|
||||
FILE_LOG(logDEBUG1, ("Position: [%d, %d]\n", pos[X], pos[Y]));
|
||||
#endif
|
||||
|
||||
|
||||
@ -3227,10 +3220,12 @@ int set_network_parameter(int file_des) {
|
||||
if ((value == -1) || (Server_VerifyLock() == OK)) {
|
||||
// check index
|
||||
switch (mode) {
|
||||
#ifdef EIGERD
|
||||
|
||||
case FLOW_CONTROL_10G:
|
||||
serverIndex = FLOWCTRL_10G;
|
||||
break;
|
||||
|
||||
#ifdef EIGERD
|
||||
case DETECTOR_TXN_DELAY_LEFT:
|
||||
serverIndex = TXN_LEFT;
|
||||
break;
|
||||
|
||||
@ -521,7 +521,7 @@ public:
|
||||
int setHighVoltage(int i = -1, int detPos = -1);
|
||||
|
||||
/**
|
||||
* Set 10GbE Flow Control (Eiger)
|
||||
* Set 10GbE Flow Control (Eiger and Jungfrau)
|
||||
* @param enable 1 to set, 0 to unset, -1 gets
|
||||
* @param detPos -1 for all detectors in list or specific detector position
|
||||
* @returns 10GbE flow Control
|
||||
|
||||
@ -1438,7 +1438,7 @@ int slsDetector::configureMAC() {
|
||||
// 2d positions to detector to put into udp header
|
||||
{
|
||||
int pos[2] = {0, 0};
|
||||
int max = shm()->multiSize[1] * (shm()->numUDPInterfaces);
|
||||
int max = shm()->multiSize[Y] * (shm()->numUDPInterfaces);
|
||||
// row
|
||||
pos[0] = (detId % max);
|
||||
// col for horiz. udp ports
|
||||
|
||||
@ -676,19 +676,12 @@ slsDetectorCommand::slsDetectorCommand(multiSlsDetector *det) {
|
||||
++i;
|
||||
|
||||
/*! \page timing
|
||||
- <b>delayl</b> gets delay left. Used in GOTTHARD only. Only get! \c Returns \c (double with 9 decimal digits)
|
||||
- <b>delayl</b> gets delay left. Used in GOTTHARD, JUNGFRAU, MOENCH and CTB only. Only get! \c Returns \c (double with 9 decimal digits)
|
||||
*/
|
||||
descrToFuncMap[i].m_pFuncName = "delayl";
|
||||
descrToFuncMap[i].m_pFuncPtr = &slsDetectorCommand::cmdTimeLeft;
|
||||
++i;
|
||||
|
||||
/*! \page timing
|
||||
- <b>gatesl</b> gets number of gates left. Used in GOTTHARD only. Only get! \c Returns \c (double with 9 decimal digits)
|
||||
*/
|
||||
descrToFuncMap[i].m_pFuncName = "gatesl";
|
||||
descrToFuncMap[i].m_pFuncPtr = &slsDetectorCommand::cmdTimeLeft;
|
||||
++i;
|
||||
|
||||
/*! \page config
|
||||
- <b>framesl</b> gets number of frames left. Used in GOTTHARD and Jungfrau only. Only get! \c Returns \c (double with 9 decimal digits)
|
||||
*/
|
||||
@ -1700,7 +1693,7 @@ slsDetectorCommand::slsDetectorCommand(multiSlsDetector *det) {
|
||||
++i;
|
||||
|
||||
/*! \page network
|
||||
- <b>flowcontrol_10g [delay]</b> Enables/disables 10 GbE flow control. 1 enables, 0 disables. Used for EIGER only. \c Returns \c (int)
|
||||
- <b>flowcontrol_10g [delay]</b> Enables/disables 10 GbE flow control. 1 enables, 0 disables. Used for EIGER and JUNGFRAU only. \c Returns \c (int)
|
||||
*/
|
||||
descrToFuncMap[i].m_pFuncName = "flowcontrol_10g";
|
||||
descrToFuncMap[i].m_pFuncPtr = &slsDetectorCommand::cmdNetworkParameter;
|
||||
@ -3076,7 +3069,7 @@ std::string slsDetectorCommand::helpNetworkParameter(int action) {
|
||||
os << "txndelay_left port \n sets detector transmission delay of the left port" << std::endl;
|
||||
os << "txndelay_right port \n sets detector transmission delay of the right port" << std::endl;
|
||||
os << "txndelay_frame port \n sets detector transmission delay of the entire frame" << std::endl;
|
||||
os << "flowcontrol_10g port \n sets flow control for 10g for eiger" << std::endl;
|
||||
os << "flowcontrol_10g port \n sets flow control for 10g for eiger and jungfrau" << std::endl;
|
||||
os << "zmqport port \n sets the 0MQ (TCP) port of the client to where final data is streamed to (eg. for GUI). The default already connects with rx_zmqport for the GUI. "
|
||||
"Use single-detector command to set individually or multi-detector command to calculate based on port for the rest."
|
||||
"Must restart streaming in client with new port from gui/external gui"
|
||||
@ -3116,7 +3109,7 @@ std::string slsDetectorCommand::helpNetworkParameter(int action) {
|
||||
os << "txndelay_left \n gets detector transmission delay of the left port" << std::endl;
|
||||
os << "txndelay_right \n gets detector transmission delay of the right port" << std::endl;
|
||||
os << "txndelay_frame \n gets detector transmission delay of the entire frame" << std::endl;
|
||||
os << "flowcontrol_10g \n gets flow control for 10g for eiger" << std::endl;
|
||||
os << "flowcontrol_10g \n gets flow control for 10g for eiger and jungfrau" << std::endl;
|
||||
os << "zmqport \n gets the 0MQ (TCP) port of the client to where final data is streamed to" << std::endl;
|
||||
os << "rx_zmqport \n gets the 0MQ (TCP) port of the receiver from where data is streamed from" << std::endl;
|
||||
os << "zmqip \n gets the 0MQ (TCP) ip of the client to where final data is streamed to.If no custom ip, empty until first time connect to receiver" << std::endl;
|
||||
@ -4581,8 +4574,6 @@ std::string slsDetectorCommand::cmdTimeLeft(int narg, char *args[], int action,
|
||||
index = FRAME_PERIOD;
|
||||
else if (cmd == "delayl")
|
||||
index = DELAY_AFTER_TRIGGER;
|
||||
else if (cmd == "gatesl")
|
||||
index = GATES_NUMBER;
|
||||
else if (cmd == "framesl")
|
||||
index = FRAME_NUMBER;
|
||||
else if (cmd == "cyclesl")
|
||||
|
||||
@ -27,9 +27,6 @@ public:
|
||||
/** Number of Pixels in y axis */
|
||||
uint32_t nPixelsY;
|
||||
|
||||
/** emptybuffer (mainly for jungfrau) */
|
||||
uint32_t emptyHeader;
|
||||
|
||||
/** Size of header in Packet */
|
||||
uint32_t headerSizeinPacket;
|
||||
|
||||
@ -95,7 +92,6 @@ public:
|
||||
myDetectorType(slsDetectorDefs::GENERIC),
|
||||
nPixelsX(0),
|
||||
nPixelsY(0),
|
||||
emptyHeader(0),
|
||||
headerSizeinPacket(0),
|
||||
dataSize(0),
|
||||
packetSize(0),
|
||||
@ -228,7 +224,6 @@ public:
|
||||
FILE_LOG(level) << "myDetectorType: " << slsDetectorDefs::detectorTypeToString(myDetectorType);
|
||||
FILE_LOG(level) << "Pixels X: " << nPixelsX;
|
||||
FILE_LOG(level) << "Pixels Y: " << nPixelsY;
|
||||
FILE_LOG(level) << "Empty Header: " << emptyHeader;
|
||||
FILE_LOG(level) << "Header Size in Packet: " << headerSizeinPacket;
|
||||
FILE_LOG(level) << "Data Size: " << dataSize;
|
||||
FILE_LOG(level) << "Packet Size: " << packetSize;
|
||||
@ -506,8 +501,7 @@ class JungfrauData : public GeneralData {
|
||||
myDetectorType = slsDetectorDefs::JUNGFRAU;
|
||||
nPixelsX = (256*4);
|
||||
nPixelsY = 512;
|
||||
emptyHeader = 6;
|
||||
headerSizeinPacket = emptyHeader + sizeof(slsDetectorDefs::sls_detector_header);
|
||||
headerSizeinPacket = sizeof(slsDetectorDefs::sls_detector_header);
|
||||
dataSize = 8192;
|
||||
packetSize = headerSizeinPacket + dataSize;
|
||||
packetsPerFrame = 128;
|
||||
|
||||
@ -353,7 +353,6 @@ uint32_t Listener::ListenToAnImage(char* buf) {
|
||||
uint32_t numpackets = 0;
|
||||
uint32_t dsize = generalData->dataSize;
|
||||
uint32_t hsize = generalData->headerSizeinPacket; //(includes empty header)
|
||||
uint32_t esize = generalData->emptyHeader;
|
||||
uint32_t fifohsize = generalData->fifoBufferHeaderSize;
|
||||
uint32_t pperFrame = generalData->packetsPerFrame;
|
||||
bool isHeaderEmpty = true;
|
||||
@ -397,13 +396,13 @@ uint32_t Listener::ListenToAnImage(char* buf) {
|
||||
//check if its the current image packet
|
||||
// -------------------------- new header ----------------------------------------------------------------------
|
||||
if (standardheader) {
|
||||
old_header = (sls_detector_header*) (&carryOverPacket[esize]);
|
||||
old_header = (sls_detector_header*) (&carryOverPacket[0]);
|
||||
fnum = old_header->frameNumber;
|
||||
pnum = old_header->packetNumber;
|
||||
}
|
||||
// -------------------old header -----------------------------------------------------------------------------
|
||||
else {
|
||||
generalData->GetHeaderInfo(index, &carryOverPacket[esize],
|
||||
generalData->GetHeaderInfo(index, &carryOverPacket[0],
|
||||
*dynamicRange, oddStartingPacket, fnum, pnum, snum, bid);
|
||||
}
|
||||
//------------------------------------------------------------------------------------------------------------
|
||||
@ -515,7 +514,7 @@ uint32_t Listener::ListenToAnImage(char* buf) {
|
||||
|
||||
// -------------------------- new header ----------------------------------------------------------------------
|
||||
if (standardheader) {
|
||||
old_header = (sls_detector_header*) (&listeningPacket[esize]);
|
||||
old_header = (sls_detector_header*) (&listeningPacket[0]);
|
||||
fnum = old_header->frameNumber;
|
||||
pnum = old_header->packetNumber;
|
||||
}
|
||||
@ -523,10 +522,10 @@ uint32_t Listener::ListenToAnImage(char* buf) {
|
||||
else {
|
||||
// set first packet to be odd or even (check required when switching from roi to no roi)
|
||||
if (myDetectorType == GOTTHARD && !measurementStartedFlag) {
|
||||
oddStartingPacket = generalData->SetOddStartingPacket(index, &listeningPacket[esize]);
|
||||
oddStartingPacket = generalData->SetOddStartingPacket(index, &listeningPacket[0]);
|
||||
}
|
||||
|
||||
generalData->GetHeaderInfo(index, &listeningPacket[esize],
|
||||
generalData->GetHeaderInfo(index, &listeningPacket[0],
|
||||
*dynamicRange, oddStartingPacket, fnum, pnum, snum, bid);
|
||||
}
|
||||
//------------------------------------------------------------------------------------------------------------
|
||||
|
||||
@ -2,9 +2,10 @@
|
||||
#define GITBRANCH "refgui"
|
||||
#define APIGOTTHARD 0x190108
|
||||
#define APIMOENCH 0x181108
|
||||
#define APIJUNGFRAU 0x190405
|
||||
#define APILIB 0x190405
|
||||
#define APIRECEIVER 0x190405
|
||||
#define APIGUI 0x190405
|
||||
#define APICTB 0x190514
|
||||
#define APIEIGER 0x190516
|
||||
#define APICTB 0x190516
|
||||
|
||||
#define APIJUNGFRAU 0x190517
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user