updated mythen3 to configure phase, freq, delay left, period left, actual time, measurement time, framesfrom start and othe register mappings

This commit is contained in:
2019-11-06 18:58:22 +01:00
parent 0f9fd5cd73
commit 1797d39216
16 changed files with 493 additions and 147 deletions

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@ -10,7 +10,7 @@
/* global variables */
u_int32_t* csp0base = 0;
#define CSP0 0x18060000
#define MEM_SIZE 0x100000
#define MEM_SIZE 0x100000 //TODO (1804 0000 - 1804 07FF = 800 * 4 = 2000), (1806 0000 = 10000* 4 = 40000)
u_int32_t* csp1base = 0;
#define CSP1 0x18040000