mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-23 10:07:59 +02:00
updated mythen3 to configure phase, freq, delay left, period left, actual time, measurement time, framesfrom start and othe register mappings
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@ -10,7 +10,6 @@
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#define NCHIP (10)
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#define NDAC (16)
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#define DYNAMIC_RANGE (16)
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#define HV_SOFT_MAX_VOLTAGE (200)
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#define HV_HARD_MAX_VOLTAGE (530)
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#define HV_DRIVER_FILE_NAME ("/etc/devlinks/hvdac")
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@ -29,7 +28,6 @@
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#define DEFAULT_SYSTEM_C1 (72222224) // chip_clk, 72 MHz
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#define DEFAULT_SYSTEM_C2 (18055556) // sync_clk, 18 MHz
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#define DEFAULT_SYSTEM_C3 (144444448) // str_clk, 144 MHz
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#define DEFAULT_TX_UDP_PORT (0x7e9a)
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/* Firmware Definitions */
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#define IP_HEADER_SIZE (20)
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@ -78,6 +76,7 @@ enum DACINDEX {G2_VREF_H_ADC, /* 0 */ \
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};
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enum CLKINDEX {READOUT_C0, READOUT_C1, SYSTEM_C0, SYSTEM_C1, SYSTEM_C2, SYSTEM_C3, NUM_CLOCKS};
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#define CLK_NAMES "READOUT_C0", "READOUT_C1", "SYSTEM_C0", "SYSTEM_C1", "SYSTEM_C2", "SYSTEM_C3"
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enum PLLINDEX {READOUT_PLL, SYSTEM_PLL};
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/* Struct Definitions */
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typedef struct udp_header_struct {
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