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updated registers and had it formatted

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This commit is contained in:
maliakal_d
2025-02-03 09:37:00 +01:00
parent 73059736bc
commit 1641b705b0
1 changed files with 45 additions and 14 deletions
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59
slsDetectorServers/xilinx_ctbDetectorServer/RegisterDefs.h
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@ -31,7 +31,7 @@
#define FPGADETTYPE_OFST (24) #define FPGADETTYPE_OFST (24)
#define FPGADETTYPE_MSK (0x000000ff << FPGADETTYPE_OFST) #define FPGADETTYPE_MSK (0x000000ff << FPGADETTYPE_OFST)
#define EMPTY14REG (0x14) #define FPGA_GIT_HEAD (0x14)
#define FIXEDPATTERNREG (0x18) #define FIXEDPATTERNREG (0x18)
#define FIXEDPATTERNVAL (0xACDC2016) #define FIXEDPATTERNVAL (0xACDC2016)
@ -889,7 +889,10 @@
#define GTTPOWERGOOD_OFST (26) #define GTTPOWERGOOD_OFST (26)
#define GTTPOWERGOOD_MSK (0x0000000f << GTTPOWERGOOD_OFST) #define GTTPOWERGOOD_MSK (0x0000000f << GTTPOWERGOOD_OFST)
#define EMPTY654REG (0x654) #define TRANSCEIVERSTATUS2 (0x654)
#define RXLOCKED_OFST (0)
#define RXLOCKED_MSK (0x0000000f << RXLOCKED_OFST)
#define TRANSCEIVERCONTROL (0x658) #define TRANSCEIVERCONTROL (0x658)
@ -905,30 +908,58 @@
#define RESETRXDATAPATHIN_MSK (0x00000001 << RESETRXDATAPATHIN_OFST) #define RESETRXDATAPATHIN_MSK (0x00000001 << RESETRXDATAPATHIN_OFST)
#define RXPOLARITY_OFST (5) #define RXPOLARITY_OFST (5)
#define RXPOLARITY_MSK (0x0000000f << RXPOLARITY_OFST) #define RXPOLARITY_MSK (0x0000000f << RXPOLARITY_OFST)
#define RXERRORCNTRESET_OFST (9)
#define RXERRORCNTRESET_MSK (0x0000000f << RXERRORCNTRESET_OFST)
#define RXMSBLSBINVERT_OFST (13)
#define RXMSBLSBINVERT_MSK (0x0000000f << RXMSBLSBINVERT_OFST)
#define EMPTY65CREG (0x65C) #define TRANSCEIVERERRCNT_REG0 (0x65C)
#define EMPTY660REG (0x660) #define TRANSCEIVERERRCNT_REG1 (0x660)
#define EMPTY664REG (0x664) #define TRANSCEIVERERRCNT_REG2 (0x664)
#define EMPTY668REG (0x668) #define TRANSCEIVERERRCNT_REG3 (0x668)
#define EMPTY66CREG (0x66C) #define TRANSCEIVERALIGNCNT_REG0 (0x66C)
#define EMPTY670REG (0x670) #define RXALIGNCNTCH0_OFST (0)
#define RXALIGNCNTCH0_MSK (0x0000ffff << RXALIGNCNTCH0_OFST)
#define EMPTY674REG (0x674) #define TRANSCEIVERALIGNCNT_REG1 (0x670)
#define EMPTY678REG (0x678) #define RXALIGNCNTCH1_OFST (0)
#define RXALIGNCNTCH1_MSK (0x0000ffff << RXALIGNCNTCH1_OFST)
#define EMPTY67CREG (0x67C) #define TRANSCEIVERALIGNCNT_REG2 (0x674)
#define EMPTY680REG (0x680) #define RXALIGNCNTCH2_OFST (0)
#define RXALIGNCNTCH2_MSK (0x0000ffff << RXALIGNCNTCH2_OFST)
#define EMPTY684REG (0x684) #define TRANSCEIVERALIGNCNT_REG3 (0x678)
#define EMPTY688REG (0x688) #define RXALIGNCNTCH3_OFST (0)
#define RXALIGNCNTCH3_MSK (0x0000ffff << RXALIGNCNTCH3_OFST)
#define TRANSCEIVERLASTWORD_REG0 (0x67C)
#define RXDATACH0_OFST (0)
#define RXDATACH0_MSK (0x0000ffff << RXDATACH0_OFST)
#define TRANSCEIVERLASTWORD_REG1 (0x680)
#define RXDATACH1_OFST (0)
#define RXDATACH1_MSK (0x0000ffff << RXDATACH1_OFST)
#define TRANSCEIVERLASTWORD_REG2 (0x684)
#define RXDATACH2_OFST (0)
#define RXDATACH2_MSK (0x0000ffff << RXDATACH2_OFST)
#define TRANSCEIVERLASTWORD_REG3 (0x688)
#define RXDATACH3_OFST (0)
#define RXDATACH3_MSK (0x0000ffff << RXDATACH3_OFST)
#define EMPTY68CREG (0x68C) #define EMPTY68CREG (0x68C)