mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2026-08-06 05:02:28 +02:00
chipversion changed to chipversioninfpga, chipindex, vals and type introduced with string for 3 different types for chip v1.2 and 1.3.
This commit is contained in:
@@ -366,8 +366,8 @@
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#define DAQ_FIX_GAIN_STG_2_VAL ((0x3 << DAQ_FIX_GAIN_OFST) & DAQ_FIX_GAIN_MSK)
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#define DAQ_CMP_RST_OFST (4)
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#define DAQ_CMP_RST_MSK (0x00000001 << DAQ_CMP_RST_OFST)
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#define DAQ_CHIP11_VRSN_OFST (7)
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#define DAQ_CHIP11_VRSN_MSK (0x00000001 << DAQ_CHIP11_VRSN_OFST)
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#define DAQ_CHIP_VRSN_OFST (5)
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#define DAQ_CHIP_VRSN_MSK (0x00000007 << DAQ_CHIP_VRSN_OFST)
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#define DAQ_STRG_CELL_SLCT_OFST (8)
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#define DAQ_STRG_CELL_SLCT_MSK (0x0000000F << DAQ_STRG_CELL_SLCT_OFST)
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#define DAQ_FRCE_SWTCH_GAIN_OFST (12)
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@@ -1,4 +1,11 @@
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#chip version version (multiplied by 10)
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chipversion 11
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#chip version version
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#10 -> v1.0
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#11 -> v1.1
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#120 -> v1.2 Normal
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#121 -> v1.2 Low Noise
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#121 ->v1.2 HDR
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#130 ->v1.3 Burst Mode
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chipversion 120
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@@ -46,6 +46,8 @@ int virtual_moduleid = 0;
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#endif
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enum detectorSettings thisSettings = UNINITIALIZED;
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static enum CHIPINDEX chipIndex = v1_0;
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static char chipType[SHORT_STR_LENGTH] = {0};
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int highvoltage = 0;
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int dacValues[NDAC] = {};
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int defaultDacValues[] = DEFAULT_DAC_VALS;
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@@ -319,23 +321,56 @@ int isHardwareVersion_1_0() {
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return ((getHardwareVersionNumber() == hwNumberList[0]) ? 1 : 0);
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}
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int getChipVersion() {
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// chip v1.1
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if (bus_r(DAQ_REG) & DAQ_CHIP11_VRSN_MSK) {
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return 11;
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int getChipVersionInFPGA() {
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const int vals[] = CHIP_VALS;
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int val = ((bus_r(DAQ_REG) & DAQ_CHIP_VRSN_MSK) >> DAQ_CHIP_VRSN_OFST);
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switch (val) {
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case 0:
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return vals[(int)v1_0];
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case 1:
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return vals[(int)v1_1];
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case 2:
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return vals[(int)v1_2_NORMAL];
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default:
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LOG(logERROR, ("Read undefined value as chip version from FPGA: %d\n", val));
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return -1;
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}
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// chip v1.0
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return 10;
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}
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void setChipVersion(int version) {
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LOG(logINFO,
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("Setting chip version to %0.1f in FPGA\n", (double)version / 10.0));
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if (version == 11) {
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bus_w(DAQ_REG, bus_r(DAQ_REG) | DAQ_CHIP11_VRSN_MSK);
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} else {
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bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_CHIP11_VRSN_MSK);
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void setChipIndex(enum CHIPINDEX ind) {
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chipIndex = ind;
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char* chip_names[] = {CHIP_NAMES};
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memset(chipType, 0, sizeof(chipType));
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strncpy(chipType, chip_names[(int)ind], sizeof(chipType) - 1);
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setChipVersionInFPGA();
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}
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void setChipVersionInFPGA() {
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int val = 0;
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switch (chipIndex) {
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case v1_0:
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LOG(logINFO, ("Setting Chip Version 1.0 in FPGA\n"));
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val = 0;
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break;
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case v1_1:
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LOG(logINFO, ("Setting Chip Version 1.1 in FPGA\n"));
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val = 1;
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break;
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case v1_2_NORMAL:
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case v1_2_LOW_NOISE:
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case v1_2_HDR:
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LOG(logINFO, ("Setting Chip Version 1.1 in FPGA\n"));
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val = 2;
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break;
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default:
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LOG(logERROR, ("Unknown chip version %d\n", (int)chipIndex));
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break;
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}
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bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_CHIP_VRSN_MSK);
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bus_w(DAQ_REG, bus_r(DAQ_REG) | ((val << DAQ_CHIP_VRSN_OFST) & DAQ_CHIP_VRSN_MSK));
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}
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u_int32_t getDetectorNumber() {
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@@ -549,13 +584,19 @@ void setupDetector() {
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setExpTime(DEFAULT_EXPTIME);
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setPeriod(DEFAULT_PERIOD);
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setDelayAfterTrigger(DEFAULT_DELAY);
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if (getChipVersion() == 11) {
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selectStoragecellStart(DEFAULT_STRG_CLL_STRT_CHIP11);
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} else {
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setNumAdditionalStorageCells(DEFAULT_NUM_STRG_CLLS);
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selectStoragecellStart(DEFAULT_STRG_CLL_STRT);
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// not applicable for chipv1.1
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setStorageCellDelay(DEFAULT_STRG_CLL_DLY);
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switch (chipIndex) {
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case v1_0:
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setNumAdditionalStorageCells(DEFAULT_NUM_STRG_CLLS);
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selectStoragecellStart(DEFAULT_STRG_CLL_STRT);
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// not applicable for chipv1.1
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setStorageCellDelay(DEFAULT_STRG_CLL_DLY);
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break;
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case v1_1:
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selectStoragecellStart(DEFAULT_STRG_CLL_STRT_CHIP11);
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break;
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default:
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// TODO
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break;
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}
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setTiming(DEFAULT_TIMING_MODE);
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setNextFrameNumber(DEFAULT_STARTING_FRAME_NUMBER);
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@@ -564,7 +605,7 @@ void setupDetector() {
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setTemperatureControl(DEFAULT_TMP_CNTRL);
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setThresholdTemperature(DEFAULT_TMP_THRSHLD);
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setTemperatureEvent(0);
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if (getChipVersion() == 11) {
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if (chipIndex == v1_1) {
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setFilterResistor(DEFAULT_FILTER_RESISTOR);
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setNumberOfFilterCells(DEFAULT_FILTER_CELL);
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}
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@@ -793,10 +834,10 @@ int readConfigFile() {
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// chipversion command
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if (!strncmp(line, "chipversion", strlen("chipversion"))) {
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int version = 0;
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int val = 0;
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// cannot scan values
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if (sscanf(line, "%s %d", command, &version) != 2) {
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if (sscanf(line, "%s %d", command, &val) != 2) {
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sprintf(
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initErrorMessage,
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"Could not scan chipversion commands from on-board server "
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@@ -805,23 +846,33 @@ int readConfigFile() {
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break;
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}
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// validations
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if (version != 10 && version != 11) {
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const int vals[] = CHIP_VALS;
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enum CHIPINDEX ichip = v1_0;
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while (ichip != NUM_CHIP_INDICES) {
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if (val == vals[(int)ichip]) {
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break;
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}
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++ichip;
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}
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if (ichip == NUM_CHIP_INDICES) {
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sprintf(initErrorMessage,
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"Could not set chip version from on-board server "
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"config file. Invalid chip version %d. Line:[%s].\n",
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version, line);
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break;
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}
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// chipversion 1.1 and HW 1.0 is incompatible
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if (version == 11 && isHardwareVersion_1_0()) {
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strcpy(initErrorMessage,
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"Chip version 1.1 (from on-board config file) is "
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"incompatible with hardware version v1.0. Please update "
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"board or correct on-board config file.\n");
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"config file. Invalid chip version %d. Options: %s. Line:[%s].\n",
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val, CHIP_VALS_HELP, line);
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break;
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}
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setChipVersion(version);
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// chipversion > 1.0 and HW 1.0 is incompatible
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if (ichip > v1_0 && isHardwareVersion_1_0()) {
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char* chip_names[] = {CHIP_NAMES};
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sprintf(initErrorMessage,
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"Chip version %s (from on-board config file) is "
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"incompatible with hardware version v1.0. Please update "
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"board or correct on-board config file.\n", chip_names[(int)ichip]);
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break;
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}
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setChipIndex(ichip);
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}
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// other commands
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@@ -915,7 +966,7 @@ int selectStoragecellStart(int pos) {
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uint32_t addr = DAQ_REG;
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uint32_t mask = DAQ_STRG_CELL_SLCT_MSK;
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int offset = DAQ_STRG_CELL_SLCT_OFST;
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if (getChipVersion() == 11) {
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if (chipIndex== v1_1) {
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// set the bit
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value = 1 << pos;
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addr = CONFIG_V11_REG;
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@@ -928,7 +979,7 @@ int selectStoragecellStart(int pos) {
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bus_w(addr, bus_r(addr) | ((value << offset) & mask));
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// should not do a get to verify (status register does not update
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// immediately during acquisition)
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if (getChipVersion() == 11) {
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if (chipIndex == v1_1) {
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return pos;
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}
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}
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@@ -936,7 +987,7 @@ int selectStoragecellStart(int pos) {
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// read value back
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// chipv1.1, writing and reading registers are different
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#ifndef VIRTUAL
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if (getChipVersion() == 11) {
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if (chipIndex == v1_1) {
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addr = CONFIG_V11_STATUS_REG;
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mask = CONFIG_V11_STATUS_STRG_CLL_MSK;
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offset = CONFIG_V11_STATUS_STRG_CLL_OFST;
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@@ -945,12 +996,12 @@ int selectStoragecellStart(int pos) {
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uint32_t regval = bus_r(addr);
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#ifndef VIRTUAL
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// flip all contents of register //TODO FIRMWARE FIX
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if (getChipVersion() == 11) {
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if (chipIndex == v1_1) {
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regval ^= BIT32_MASK;
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}
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#endif
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uint32_t retval = ((regval & mask) >> offset);
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if (getChipVersion() == 11) {
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if (chipIndex == v1_1) {
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// get which bit
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int max = getMaxStoragecellStart();
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for (int i = 0; i != max + 1; ++i) {
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@@ -964,7 +1015,7 @@ int selectStoragecellStart(int pos) {
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}
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int getMaxStoragecellStart() {
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if (getChipVersion() == 11) {
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if (chipIndex == v1_1) {
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return MAX_STORAGE_CELL_CHIP11_VAL;
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} else {
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return MAX_STORAGE_CELL_VAL;
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@@ -2007,7 +2058,7 @@ int isChipConfigured() { return chipConfigured; }
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void configureChip() {
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// only for chipv1.1 and chip is powered on
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if (getChipVersion() == 11 && powerChip(-1)) {
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if (chipIndex == v1_1 && powerChip(-1)) {
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LOG(logINFOBLUE, ("\tConfiguring chip\n"));
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// waiting 500 ms before configuring selection
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@@ -2075,7 +2126,7 @@ void configureASICTimer() {
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ASIC_CTRL_PRCHRG_TMR_VAL);
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uint32_t val = ASIC_CTRL_DS_TMR_VAL;
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if (getChipVersion() == 11) {
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if (chipIndex == v1_1) {
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val = ASIC_CTRL_DS_TMR_CHIP1_1_VAL;
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}
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bus_w(ASIC_CTRL_REG, (bus_r(ASIC_CTRL_REG) & ~ASIC_CTRL_DS_TMR_MSK) | val);
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@@ -2102,7 +2153,7 @@ int setReadoutSpeed(int val) {
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return FAIL;
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}
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LOG(logINFO, ("Setting Full Speed (40 MHz):\n"));
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if (getChipVersion() == 10) {
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if (chipIndex == v1_0) {
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sampleAdcSpeed = SAMPLE_ADC_FULL_SPEED_CHIP10;
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adcPhase = ADC_PHASE_FULL_SPEED_CHIP10;
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dbitPhase = DBIT_PHASE_FULL_SPEED_CHIP10;
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@@ -2123,7 +2174,7 @@ int setReadoutSpeed(int val) {
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sampleAdcSpeed = SAMPLE_ADC_HALF_SPEED_BOARD2;
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adcPhase = ADC_PHASE_HALF_SPEED_BOARD2;
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dbitPhase = DBIT_PHASE_HALF_SPEED_BOARD2;
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} else if (getChipVersion() == 10) {
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} else if (chipIndex == v1_0) {
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adcOfst = ADC_OFST_HALF_SPEED_VAL_CHIP10;
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sampleAdcSpeed = SAMPLE_ADC_HALF_SPEED_CHIP10;
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adcPhase = ADC_PHASE_HALF_SPEED_CHIP10;
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@@ -2144,7 +2195,7 @@ int setReadoutSpeed(int val) {
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sampleAdcSpeed = SAMPLE_ADC_QUARTER_SPEED_BOARD2;
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adcPhase = ADC_PHASE_QUARTER_SPEED_BOARD2;
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dbitPhase = DBIT_PHASE_QUARTER_SPEED_BOARD2;
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} else if (getChipVersion() == 10) {
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} else if (chipIndex == v1_0) {
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adcOfst = ADC_OFST_QUARTER_SPEED_VAL_CHIP10;
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sampleAdcSpeed = SAMPLE_ADC_QUARTER_SPEED_CHIP10;
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adcPhase = ADC_PHASE_QUARTER_SPEED_CHIP10;
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@@ -2490,7 +2541,7 @@ void disableCurrentSource() {
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LOG(logINFO, ("Disabling Current Source\n"));
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// set default values for current source first
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if (getChipVersion() == 11) {
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if (chipIndex == v1_1) {
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LOG(logINFO, ("\tSetting default values for selection\n"))
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bus_w(CRRNT_SRC_COL_LSB_REG, BIT32_MASK);
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bus_w(CRRNT_SRC_COL_MSB_REG, BIT32_MASK);
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@@ -2505,7 +2556,7 @@ void disableCurrentSource() {
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void enableCurrentSource(int fix, uint64_t select, int normal) {
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disableCurrentSource();
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if (getChipVersion() == 11) {
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if (chipIndex == v1_1) {
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LOG(logINFO, ("Enabling current source [fix:%d, select:0x%lx]\n", fix,
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(long unsigned int)select));
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} else {
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@@ -2521,7 +2572,7 @@ void enableCurrentSource(int fix, uint64_t select, int normal) {
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LOG(logINFO, ("\tDisabling fix\n"));
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bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_CRRNT_SRC_CLMN_FIX_MSK);
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}
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if (getChipVersion() == 10) {
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if (chipIndex == v1_0) {
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// select
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LOG(logINFO, ("\tSetting selection to %ld\n", (long int)select));
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bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_CRRNT_SRC_CLMN_SLCT_MSK);
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@@ -2582,7 +2633,7 @@ int getFixCurrentSource() {
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}
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int getNormalCurrentSource() {
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if (getChipVersion() == 11) {
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if (chipIndex == v1_1) {
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int low = ((bus_r(CONFIG_V11_STATUS_REG) &
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CONFIG_V11_STATUS_CRRNT_SRC_LOW_MSK) >>
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CONFIG_V11_STATUS_CRRNT_SRC_LOW_OFST);
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@@ -2592,7 +2643,7 @@ int getNormalCurrentSource() {
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}
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uint64_t getSelectCurrentSource() {
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if (getChipVersion() == 10) {
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if (chipIndex == v1_0) {
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return ((bus_r(DAQ_REG) & DAQ_CRRNT_SRC_CLMN_SLCT_MSK) >>
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DAQ_CRRNT_SRC_CLMN_SLCT_OFST);
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} else {
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@@ -57,8 +57,9 @@ void getHardwareVersion(char *version);
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u_int16_t getHardwareVersionNumber();
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u_int16_t getHardwareSerialNumber();
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int isHardwareVersion_1_0();
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int getChipVersion();
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void setChipVersion(int version);
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int getChipVersionInFPGA();
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void setChipIndex(enum CHIPINDEX ind);
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void setChipVersionInFPGA();
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u_int32_t getDetectorNumber();
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int getModuleId(int *ret, char *mess);
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int updateModuleId();
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@@ -211,6 +211,12 @@ enum DACINDEX {
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420 /* J_VREF_COMP */ \
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};
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enum CHIPINDEX {v1_0, v1_1, v1_2_NORMAL, v1_2_LOW_NOISE, v1_2_HDR, v1_3_BURST_MODE, NUM_CHIP_INDICES};
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#define CHIP_VALS { 10, 11, 120, 121, 122, 13};
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#define CHIP_VALS_HELP "10, 11, 120, 121, 122, 13"
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#define CHIP_NAMES "v1.0", "v1.1", "v1.2 Normal", "v1.2 Low Noise", "v1.2 HDR", "v1.3 Burst Mode"
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enum MASTERINDEX { MASTER_HARDWARE, OW_MASTER, OW_SLAVE };
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#define MASTER_NAMES "hardware", "master", "slave"
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@@ -1852,7 +1852,7 @@ int acquire(int blocking, int file_des) {
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#endif
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#if defined(JUNGFRAUD)
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// chipv1.1 has to be configured before acquisition
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if (getChipVersion() == 11 && !isChipConfigured()) {
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if (getChipVersionInFPGA() == 11 && !isChipConfigured()) {
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ret = FAIL;
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strcpy(mess,
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"Could not start acquisition. Chip is not configured. "
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@@ -2274,7 +2274,7 @@ int set_num_additional_storage_cells(int file_des) {
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#else
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// only set
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if (Server_VerifyLock() == OK) {
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if (getChipVersion() == 11) {
|
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if (getChipVersionInFPGA() == 11) {
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ret = FAIL;
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sprintf(mess,
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"Cannot set addl. number of storage cells for chip v1.1\n");
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@@ -2742,7 +2742,7 @@ int get_storage_cell_delay(int file_des) {
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functionNotImplemented();
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#else
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// get only
|
||||
if (getChipVersion() == 11) {
|
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if (getChipVersionInFPGA() == 11) {
|
||||
ret = FAIL;
|
||||
strcpy(mess, "Storage cell delay is not applicable for chipv 1.1\n");
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LOG(logERROR, (mess));
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@@ -2770,7 +2770,7 @@ int set_storage_cell_delay(int file_des) {
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#else
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// only set
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||||
if (Server_VerifyLock() == OK) {
|
||||
if (getChipVersion() == 11) {
|
||||
if (getChipVersionInFPGA() == 11) {
|
||||
ret = FAIL;
|
||||
strcpy(mess,
|
||||
"Storage cell delay is not applicable for chipv 1.1\n");
|
||||
@@ -6746,7 +6746,7 @@ int set_current_source(int file_des) {
|
||||
LOG(logERROR, (mess));
|
||||
}
|
||||
#else
|
||||
int chipVersion = getChipVersion();
|
||||
int chipVersion = getChipVersionInFPGA();
|
||||
if (ret == OK) {
|
||||
if (chipVersion == 11) {
|
||||
// require both
|
||||
@@ -7915,7 +7915,7 @@ int get_filter_resistor(int file_des) {
|
||||
#else
|
||||
// get only
|
||||
#if defined(JUNGFRAUD)
|
||||
if (getChipVersion() == 10) {
|
||||
if (getChipVersionInFPGA() == 10) {
|
||||
ret = FAIL;
|
||||
strcpy(mess, "Could not get filter cell. Not available for this chip "
|
||||
"version 1.0.\n");
|
||||
@@ -7954,7 +7954,7 @@ int set_filter_resistor(int file_des) {
|
||||
LOG(logERROR, (mess));
|
||||
}
|
||||
#if defined(JUNGFRAUD)
|
||||
else if (getChipVersion() == 10) {
|
||||
else if (getChipVersionInFPGA() == 10) {
|
||||
ret = FAIL;
|
||||
strcpy(mess, "Could not set filter cell. Not available for this "
|
||||
"chip version 1.0.\n");
|
||||
@@ -8693,7 +8693,7 @@ int get_chip_version(int file_des) {
|
||||
#if !defined(JUNGFRAUD)
|
||||
functionNotImplemented();
|
||||
#else
|
||||
retval = getChipVersion();
|
||||
retval = getChipVersionInFPGA();
|
||||
#endif
|
||||
LOG(logDEBUG1, ("chip version retval: %d\n", retval));
|
||||
return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
|
||||
@@ -8974,7 +8974,7 @@ int get_num_filter_cells(int file_des) {
|
||||
#else
|
||||
// get only
|
||||
// only for chipv1.1
|
||||
if (getChipVersion() == 10) {
|
||||
if (getChipVersionInFPGA() == 10) {
|
||||
ret = FAIL;
|
||||
strcpy(mess, "Could not get number of filter cells. Only available for "
|
||||
"chip version 1.1\n");
|
||||
@@ -9012,7 +9012,7 @@ int set_num_filter_cells(int file_des) {
|
||||
LOG(logERROR, (mess));
|
||||
}
|
||||
// only for chipv1.1
|
||||
else if (getChipVersion() == 10) {
|
||||
else if (getChipVersionInFPGA() == 10) {
|
||||
ret = FAIL;
|
||||
strcpy(mess,
|
||||
"Could not set number of filter cells. Only available for "
|
||||
|
||||
@@ -1969,7 +1969,7 @@ rx_threads:
|
||||
|
||||
chipversion:
|
||||
inherit_actions: GET_COMMAND
|
||||
help: "\n\t[Jungfrau] Returns chip version. Can be 1.0 or 1.1"
|
||||
help: "\n\t[Jungfrau] Returns chip version. Can be 1.0, 1.1 or 1.2"
|
||||
actions:
|
||||
GET:
|
||||
function: getChipVersion
|
||||
|
||||
Reference in New Issue
Block a user