mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-11 12:27:14 +02:00
changed dac values, fixed settings bug of not looking at nchan,nchips, , fixed clock divider, changed usleep in configuremac
This commit is contained in:
@ -90,7 +90,7 @@ u_int32_t progressMask=0;
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int phase_shift=0;//DEFAULT_PHASE_SHIFT;
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int ipPacketSize=DEFAULT_IP_PACKETSIZE;
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int udpPacketSize=DEFAULT_UDP_PACKETSIZE;
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int clockdivider;
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int clockdivider = 20;
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/*
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#ifndef NEW_PLL_RECONFIG
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u_int32_t clkDivider[2]={32,16};
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@ -539,7 +539,6 @@ u_int32_t adcPipeline(int d) {
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if (d>=0){
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printf("Setting ADC Pipeline to 0x%x\n",d);
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bus_w(ADC_PIPELINE_REG, d);
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clockdivider = d;
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}
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return bus_r(ADC_PIPELINE_REG);
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@ -1504,12 +1503,12 @@ int configureInterface(uint32_t destip,uint64_t destmac,uint64_t sourcemac,int
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#endif
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bus_w(CONTROL_REG,GB10_RESET_BIT);
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sleep(1);
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usleep(500 * 1000);
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bus_w(CONTROL_REG,0);
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usleep(10000);
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usleep(10* 1000);
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bus_w(CONFIG_REG,conf | GB10_NOT_CPU_BIT);
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printf("System status register is %08x\n",bus_r(SYSTEM_STATUS_REG));
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usleep(500 * 1000);
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return 0; //any value doesnt matter - dhanya
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}
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@ -1550,7 +1549,7 @@ int configureMAC(uint32_t destip,uint64_t destmac,uint64_t sourcemac,int source
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bus_w(CONTROL_REG,GB10_RESET_BIT);
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bus_w(CONTROL_REG,0);
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usleep(10000);
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usleep(10 * 1000);
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bus_w(CONFIG_REG,conf | GB10_NOT_CPU_BIT);
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printf("System status register is %08x\n",bus_r(SYSTEM_STATUS_REG));
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return OK;
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@ -133,6 +133,8 @@ int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod) {
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/* #endif */
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destMod->serialnumber=srcMod->serialnumber;
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}
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/*
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if ((srcMod->nchip)>(destMod->nchip)) {
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printf("Number of chip of source is larger than number of chips of destination\n");
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return FAIL;
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@ -141,6 +143,8 @@ int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod) {
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printf("Number of channels of source is larger than number of channels of destination\n");
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return FAIL;
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}
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*/
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if ((srcMod->ndac)>(destMod->ndac)) {
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printf("Number of dacs of source is larger than number of dacs of destination\n");
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return FAIL;
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@ -153,8 +157,8 @@ int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod) {
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#ifdef VERBOSE
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printf("DACs: src %d, dest %d\n",srcMod->ndac,destMod->ndac);
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printf("ADCs: src %d, dest %d\n",srcMod->nadc,destMod->nadc);
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printf("Chips: src %d, dest %d\n",srcMod->nchip,destMod->nchip);
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printf("Chans: src %d, dest %d\n",srcMod->nchan,destMod->nchan);
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//printf("Chips: src %d, dest %d\n",srcMod->nchip,destMod->nchip);
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//printf("Chans: src %d, dest %d\n",srcMod->nchan,destMod->nchan);
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#endif
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@ -162,8 +166,8 @@ int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod) {
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destMod->ndac=srcMod->ndac;
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destMod->nadc=srcMod->nadc;
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destMod->nchip=srcMod->nchip;
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destMod->nchan=srcMod->nchan;
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// destMod->nchip=srcMod->nchip;
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//destMod->nchan=srcMod->nchan;
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if (srcMod->reg>=0)
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destMod->reg=srcMod->reg;
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#ifdef VERBOSE
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@ -1081,7 +1085,7 @@ int initMCBregisters(int cm, int imod){
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}
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int initModulebyNumber(sls_detector_module myMod) {
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printf("\nInitializing Module\n");
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int nchip,nchan;//int ichip, nchip, ichan, nchan;
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int im, modmi,modma;
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// int ft, cae, ae, coe, ocoe, counts, chanreg;
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@ -1110,6 +1114,7 @@ int initModulebyNumber(sls_detector_module myMod) {
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}
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//printf("ndac:%d\n",NDAC);
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for (idac=0; idac<NDAC; idac++){
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retval = setDac(idac,(myMod.dacs)[idac]);
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if(retval ==(myMod.dacs)[idac])
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@ -1128,6 +1133,8 @@ int initModulebyNumber(sls_detector_module myMod) {
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}
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//setting the conf gain and the settings register
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setSettings(myMod.reg,imod);
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printf("Done Initializing Module\n");
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return thisSettings;
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}
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@ -124,15 +124,15 @@ int init_detector(int b) {
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printf("Setting Default Dac values\n");
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enum dacNames{VB_COMP,VDD_PROT,VIN_COM,VREF_PRECH,VB_PIXBUF,VB_DS,VREF_DS,VREF_COMP};
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int retval = -1;
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int dacvalues[14][2]={
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{VB_DS, 1000},
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int dacvalues[8][2]={
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{VB_COMP, 1220},
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{VB_PIXBUF, 750},
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{VREF_DS, 480},
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{VREF_COMP, 400},
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{VREF_PRECH,1550},
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{VIN_COM, 1053},
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{VDD_PROT, 3000},
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{VIN_COM, 1053},
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{VREF_PRECH,1450},
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{VB_PIXBUF, 750},
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{VB_DS, 1000},
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{VREF_DS, 480},
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{VREF_COMP, 420},
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};
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for(i=0;i<8;++i){
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retval=setDac(dacvalues[i][0], dacvalues[i][1]);
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@ -144,6 +144,9 @@ int init_detector(int b) {
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printf("\nPowering on the chip\n");
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bus_w(POWER_ON_REG,0x1);
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/* Only once */
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bus_w(CONFGAIN_REG,0x0);
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printf("Resetting ADC\n");
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writeADC(ADCREG1,0x3); writeADC(ADCREG1,0x0);
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writeADC(ADCREG2,0x40);
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@ -1456,9 +1459,9 @@ int set_module(int file_des) {
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myModule.nchan=NCHAN*NCHIP;
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myModule.nadc=NADC;
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#ifdef VERBOSE
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//#ifdef VERBOSE
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printf("Setting module\n");
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#endif
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//#endif
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ret=receiveModuleGeneral(file_des, &myModule, 0); //0 is to receive partially (without trimbits etc.)
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@ -1468,9 +1471,9 @@ int set_module(int file_des) {
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ret=FAIL;
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#ifdef VERBOSE
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//#ifdef VERBOSE
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printf("module number is %d,register is %d, nchan %d, nchip %d, ndac %d, nadc %d, gain %f, offset %f\n",myModule.module, myModule.reg, myModule.nchan, myModule.nchip, myModule.ndac, myModule.nadc, myModule.gain,myModule.offset);
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#endif
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//#endif
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if (ret==OK) {
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if (myModule.module>=getNModBoard()) {
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@ -2467,7 +2470,6 @@ int send_update(int file_des) {
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retval=setExposureTime(tns);
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n = sendDataOnly(file_des,&retval,sizeof(int64_t));
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retval=setPeriod(tns);
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cprintf(RED,"updated frame period from %lld tns:%d\n", (long long int)retval, tns);
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n = sendDataOnly(file_des,&retval,sizeof(int64_t));
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retval=setDelay(tns);
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n = sendDataOnly(file_des,&retval,sizeof(int64_t));
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