took out also the ADC and serialspi

This commit is contained in:
Dhanya Maliakal 2017-06-14 11:28:16 +02:00
parent a95dbd2215
commit 00e742e0e0
9 changed files with 265 additions and 214 deletions

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@ -0,0 +1 @@
../slsDetectorServer/AD9257.h

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@ -0,0 +1 @@
../slsDetectorServer/commonServerFunctions.h

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@ -3,16 +3,14 @@
#include "slsDetectorFunctionList.h" #include "slsDetectorFunctionList.h"
#include "gitInfoJungfrau.h" #include "gitInfoJungfrau.h"
#include "slsDetectorServer_defs.h" // also include RegisterDefs.h
#include "blackfin.h"
#include "AD9257.h" // include "commonServerFunctions.h", which in turn includes "blackfin.h"
#include "programfpga.h" #include "programfpga.h"
/* global variables */ /* global variables */
//jungfrau doesnt require chips and chans (save memory)
sls_detector_module *detectorModules=NULL; sls_detector_module *detectorModules=NULL;
int *detectorChips=NULL;
int *detectorChans=NULL;
dacs_t *detectorDacs=NULL; dacs_t *detectorDacs=NULL;
dacs_t *detectorAdcs=NULL; dacs_t *detectorAdcs=NULL;
@ -284,26 +282,18 @@ void allocateDetectorStructureMemory(){
//Allocation of memory //Allocation of memory
if (detectorModules!=NULL) free(detectorModules); if (detectorModules!=NULL) free(detectorModules);
if (detectorChips!=NULL) free(detectorChips);
if (detectorChans!=NULL) free(detectorChans);
if (detectorDacs!=NULL) free(detectorDacs); if (detectorDacs!=NULL) free(detectorDacs);
if (detectorAdcs!=NULL) free(detectorAdcs); if (detectorAdcs!=NULL) free(detectorAdcs);
detectorModules=malloc(sizeof(sls_detector_module)); detectorModules=malloc(sizeof(sls_detector_module));
detectorChips=malloc(NCHIP*sizeof(int));
detectorChans=malloc(NCHIP*NCHAN*sizeof(int));
detectorDacs=malloc(NDAC*sizeof(dacs_t)); detectorDacs=malloc(NDAC*sizeof(dacs_t));
detectorAdcs=malloc(NADC*sizeof(dacs_t)); detectorAdcs=malloc(NADC*sizeof(dacs_t));
#ifdef VERBOSE #ifdef VERBOSE
printf("modules from 0x%x to 0x%x\n",detectorModules, detectorModules+n); printf("modules from 0x%x to 0x%x\n",detectorModules, detectorModules+n);
printf("chips from 0x%x to 0x%x\n",detectorChips, detectorChips+n*NCHIP);
printf("chans from 0x%x to 0x%x\n",detectorChans, detectorChans+n*NCHIP*NCHAN);
printf("dacs from 0x%x to 0x%x\n",detectorDacs, detectorDacs+n*NDAC); printf("dacs from 0x%x to 0x%x\n",detectorDacs, detectorDacs+n*NDAC);
printf("adcs from 0x%x to 0x%x\n",detectorAdcs, detectorAdcs+n*NADC); printf("adcs from 0x%x to 0x%x\n",detectorAdcs, detectorAdcs+n*NADC);
#endif #endif
(detectorModules)->dacs=detectorDacs; (detectorModules)->dacs=detectorDacs;
(detectorModules)->adcs=detectorAdcs; (detectorModules)->adcs=detectorAdcs;
(detectorModules)->chipregs=detectorChips;
(detectorModules)->chanregs=detectorChans;
(detectorModules)->ndac=NDAC; (detectorModules)->ndac=NDAC;
(detectorModules)->nadc=NADC; (detectorModules)->nadc=NADC;
(detectorModules)->nchip=NCHIP; (detectorModules)->nchip=NCHIP;
@ -747,55 +737,7 @@ enum detectorSettings getSettings(){
/* parameters - dac, adc, hv */ /* parameters - dac, adc, hv */
void serializeToSPI(u_int32_t addr, u_int32_t val, u_int16_t csmask, int numbitstosend, u_int16_t clkmask, u_int16_t digoutmask, int digofset) {
#ifdef VERBOSE
if (numbitstosend == 16)
printf("Writing to ADC SPI Register: 0x%04x\n",val);
else
printf("Writing to SPI Register: 0x%08x\n", val);
#endif
u_int16_t valw;
// start point
valw = 0xffff; /**todo testwith old board 0xff for adc_spi */ // old board compatibility (not using specific bits)
bus_w16 (addr, valw);
// chip sel bar down
valw &= ~csmask; /* todo with test: done a bit different, not with previous value */
bus_w16 (addr, valw);
{
int i = 0;
for (i = 0; i < numbitstosend; ++i) {
// clk down
valw &= ~clkmask;
bus_w16 (addr, valw);
// write data (i)
valw = ((valw & ~digoutmask) + // unset bit
(((val >> (numbitstosend - 1 - i)) & 0x1) << digofset)); // each bit from val starting from msb
bus_w16 (addr, valw);
// clk up
valw |= clkmask ;
bus_w16 (addr, valw);
}
}
// chip sel bar up
valw |= csmask; /* todo with test: not done for spi */
bus_w16 (addr, valw);
//clk down
valw &= ~clkmask;
bus_w16 (addr, valw);
// stop point = start point of course
valw = 0xffff; /**todo testwith old board 0xff for adc_spi */ // old board compatibility (not using specific bits)
bus_w16 (addr, valw);
}
@ -821,68 +763,10 @@ void initDac(int dacnum) {
void prepareADC(){
printf("\n\nPreparing ADC ... \n");
//power mode reset
printf("power mode reset:\n");
setAdc(AD9257_POWER_MODE_REG,
(AD9257_INT_RESET_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK);
//power mode chip run
printf("power mode chip run:\n");
setAdc(AD9257_POWER_MODE_REG,
(AD9257_INT_CHIP_RUN_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK);
//output clock phase
printf("output clock phase:\n");
setAdc(AD9257_OUT_PHASE_REG,
(AD9257_OUT_CLK_60_VAL << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK);
// lvds-iee reduced , binary offset
printf("lvds-iee reduced, binary offset:\n");
setAdc(AD9257_OUT_MODE_REG,
(AD9257_OUT_LVDS_IEEE_VAL << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK);
// all devices on chip to receive next command
printf("all devices on chip to receive next command:\n");
setAdc(AD9257_DEV_IND_2_REG,
AD9257_CHAN_H_MSK | AD9257_CHAN_G_MSK | AD9257_CHAN_F_MSK | AD9257_CHAN_E_MSK);
setAdc(AD9257_DEV_IND_1_REG,
AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK | AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK |
AD9257_CLK_CH_DCO_MSK | AD9257_CLK_CH_IFCO_MSK);
// vref 1.33
printf("vref 1.33:\n");
setAdc(AD9257_VREF_REG,
(AD9257_VREF_1_33_VAL << AD9257_VREF_OFST) & AD9257_VREF_MSK);
// no test mode
printf("no test mode:\n");
setAdc(AD9257_TEST_MODE_REG,
(AD9257_NONE_VAL << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK);
#ifdef TESTADC
printf("***************************************** *******\n");
printf("******* PUTTING ADC IN TEST MODE!!!!!!!!! *******\n");
printf("***************************************** *******\n");
// mixed bit frequency test mode
printf("mixed bit frequency test mode:\n");
setAdc(AD9257_TEST_MODE_REG,
(AD9257_MIXED_BIT_FREQ_VAL << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK);
#endif
}
void setAdc(int addr, int val) {
u_int32_t codata;
codata = val + (addr << 8);
printf(" Setting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr);
serializeToSPI(ADC_SPI_REG, codata, ADC_SERIAL_CS_OUT_MSK, AD9257_ADC_NUMBITS,
ADC_SERIAL_CLK_OUT_MSK, ADC_SERIAL_DATA_OUT_MSK, ADC_SERIAL_DATA_OUT_OFST);
}
int voltageToDac(int value){ int voltageToDac(int value){
@ -1345,10 +1229,10 @@ u_int32_t runBusy(void) {
/* common */ /* common */
//jungfrau doesnt require chips and chans (save memory)
int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod){ int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod){
int ichip, idac, ichan, iadc; int idac, iadc;
int ret=OK; int ret=OK;
#ifdef VERBOSE #ifdef VERBOSE
@ -1403,14 +1287,6 @@ int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod){
if (srcMod->offset>=0) if (srcMod->offset>=0)
destMod->offset=srcMod->offset; destMod->offset=srcMod->offset;
for (ichip=0; ichip<(srcMod->nchip); ichip++) {
if (*((srcMod->chipregs)+ichip)>=0)
*((destMod->chipregs)+ichip)=*((srcMod->chipregs)+ichip);
}
for (ichan=0; ichan<(srcMod->nchan); ichan++) {
if (*((srcMod->chanregs)+ichan)>=0)
*((destMod->chanregs)+ichan)=*((srcMod->chanregs)+ichan);
}
for (idac=0; idac<(srcMod->ndac); idac++) { for (idac=0; idac<(srcMod->ndac); idac++) {
if (*((srcMod->dacs)+idac)>=0) if (*((srcMod->dacs)+idac)>=0)
*((destMod->dacs)+idac)=*((srcMod->dacs)+idac); *((destMod->dacs)+idac)=*((srcMod->dacs)+idac);

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@ -132,75 +132,7 @@ enum DACINDEX {VB_COMP, VDD_PROT, VIN_COM, VREF_PRECH, VB_PIXBUF, VB_DS, VREF
#define MAX1932_HV_DATA_OFST (0) #define MAX1932_HV_DATA_OFST (0)
#define MAX1932_HV_DATA_MSK (0x000000FF << MAX1932_HV_DATA_OFST) #define MAX1932_HV_DATA_MSK (0x000000FF << MAX1932_HV_DATA_OFST)
/* AD9257 ADC DEFINES */
#define AD9257_ADC_NUMBITS (24)
#define AD9257_DEV_IND_2_REG (0x04)
#define AD9257_CHAN_H_OFST (0)
#define AD9257_CHAN_H_MSK (0x00000001 << AD9257_CHAN_H_OFST)
#define AD9257_CHAN_G_OFST (1)
#define AD9257_CHAN_G_MSK (0x00000001 << AD9257_CHAN_G_OFST)
#define AD9257_CHAN_F_OFST (2)
#define AD9257_CHAN_F_MSK (0x00000001 << AD9257_CHAN_F_OFST)
#define AD9257_CHAN_E_OFST (3)
#define AD9257_CHAN_E_MSK (0x00000001 << AD9257_CHAN_E_OFST)
#define AD9257_DEV_IND_1_REG (0x05)
#define AD9257_CHAN_D_OFST (0)
#define AD9257_CHAN_D_MSK (0x00000001 << AD9257_CHAN_D_OFST)
#define AD9257_CHAN_C_OFST (1)
#define AD9257_CHAN_C_MSK (0x00000001 << AD9257_CHAN_C_OFST)
#define AD9257_CHAN_B_OFST (2)
#define AD9257_CHAN_B_MSK (0x00000001 << AD9257_CHAN_B_OFST)
#define AD9257_CHAN_A_OFST (3)
#define AD9257_CHAN_A_MSK (0x00000001 << AD9257_CHAN_A_OFST)
#define AD9257_CLK_CH_DCO_OFST (4)
#define AD9257_CLK_CH_DCO_MSK (0x00000001 << AD9257_CLK_CH_DCO_OFST)
#define AD9257_CLK_CH_IFCO_OFST (5)
#define AD9257_CLK_CH_IFCO_MSK (0x00000001 << AD9257_CLK_CH_IFCO_OFST)
#define AD9257_POWER_MODE_REG (0x08)
#define AD9257_POWER_INTERNAL_OFST (0)
#define AD9257_POWER_INTERNAL_MSK (0x00000003 << AD9257_POWER_INTERNAL_OFST)
#define AD9257_INT_RESET_VAL (0x3)
#define AD9257_INT_CHIP_RUN_VAL (0x0)
#define AD9257_POWER_EXTERNAL_OFST (5)
#define AD9257_POWER_EXTERNAL_MSK (0x00000001 << AD9257_POWER_EXTERNAL_OFST)
#define AD9257_EXT_FULL_POWER_VAL (0x0)
#define AD9257_EXT_STANDBY_VAL (0x1)
#define AD9257_OUT_MODE_REG (0x14)
#define AD9257_OUT_FORMAT_OFST (0)
#define AD9257_OUT_FORMAT_MSK (0x00000001 << AD9257_OUT_FORMAT_OFST)
#define AD9257_OUT_BINARY_OFST_VAL (0)
#define AD9257_OUT_TWOS_COMPL_VAL (1)
#define AD9257_OUT_LVDS_OPT_OFST (6)
#define AD9257_OUT_LVDS_OPT_MSK (0x00000001 << AD9257_OUT_LVDS_OPT_OFST)
#define AD9257_OUT_LVDS_ANSI_VAL (0)
#define AD9257_OUT_LVDS_IEEE_VAL (1)
#define AD9257_OUT_PHASE_REG (0x16)
#define AD9257_OUT_CLK_OFST (0)
#define AD9257_OUT_CLK_MSK (0x0000000F << AD9257_OUT_CLK_OFST)
#define AD9257_OUT_CLK_60_VAL (0x1)
#define AD9257_IN_CLK_OFST (4)
#define AD9257_IN_CLK_MSK (0x00000007 << AD9257_IN_CLK_OFST)
#define AD9257_IN_CLK_0_VAL (0x0)
#define AD9257_VREF_REG (0x18)
#define AD9257_VREF_OFST (0)
#define AD9257_VREF_MSK (0x00000003 << AD9257_VREF_OFST)
#define AD9257_VREF_1_33_VAL (0x2)
#define AD9257_TEST_MODE_REG (0x0D)
#define AD9257_OUT_TEST_OFST (0)
#define AD9257_OUT_TEST_MSK (0x0000000F << AD9257_OUT_TEST_OFST)
#define AD9257_NONE_VAL (0x0)
#define AD9257_MIXED_BIT_FREQ_VAL (0xC)
#define AD9257_TEST_RESET_SHORT_GEN (4)
#define AD9257_TEST_RESET_LONG_GEN (5)
#define AD9257_USER_IN_MODE_OFST (6)
#define AD9257_USER_IN_MODE_MSK (0x00000003 << AD9257_USER_IN_MODE_OFST)
/** PLL Reconfiguration Registers */ /** PLL Reconfiguration Registers */
//https://www.altera.com/documentation/mcn1424769382940.html //https://www.altera.com/documentation/mcn1424769382940.html

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@ -0,0 +1,141 @@
#ifndef AD9257_H
#define AD9257_H
#include "ansi.h"
#include "commonServerFunctions.h"
#include <stdio.h>
/* AD9257 ADC DEFINES */
#define AD9257_ADC_NUMBITS (24)
#define AD9257_DEV_IND_2_REG (0x04)
#define AD9257_CHAN_H_OFST (0)
#define AD9257_CHAN_H_MSK (0x00000001 << AD9257_CHAN_H_OFST)
#define AD9257_CHAN_G_OFST (1)
#define AD9257_CHAN_G_MSK (0x00000001 << AD9257_CHAN_G_OFST)
#define AD9257_CHAN_F_OFST (2)
#define AD9257_CHAN_F_MSK (0x00000001 << AD9257_CHAN_F_OFST)
#define AD9257_CHAN_E_OFST (3)
#define AD9257_CHAN_E_MSK (0x00000001 << AD9257_CHAN_E_OFST)
#define AD9257_DEV_IND_1_REG (0x05)
#define AD9257_CHAN_D_OFST (0)
#define AD9257_CHAN_D_MSK (0x00000001 << AD9257_CHAN_D_OFST)
#define AD9257_CHAN_C_OFST (1)
#define AD9257_CHAN_C_MSK (0x00000001 << AD9257_CHAN_C_OFST)
#define AD9257_CHAN_B_OFST (2)
#define AD9257_CHAN_B_MSK (0x00000001 << AD9257_CHAN_B_OFST)
#define AD9257_CHAN_A_OFST (3)
#define AD9257_CHAN_A_MSK (0x00000001 << AD9257_CHAN_A_OFST)
#define AD9257_CLK_CH_DCO_OFST (4)
#define AD9257_CLK_CH_DCO_MSK (0x00000001 << AD9257_CLK_CH_DCO_OFST)
#define AD9257_CLK_CH_IFCO_OFST (5)
#define AD9257_CLK_CH_IFCO_MSK (0x00000001 << AD9257_CLK_CH_IFCO_OFST)
#define AD9257_POWER_MODE_REG (0x08)
#define AD9257_POWER_INTERNAL_OFST (0)
#define AD9257_POWER_INTERNAL_MSK (0x00000003 << AD9257_POWER_INTERNAL_OFST)
#define AD9257_INT_RESET_VAL (0x3)
#define AD9257_INT_CHIP_RUN_VAL (0x0)
#define AD9257_POWER_EXTERNAL_OFST (5)
#define AD9257_POWER_EXTERNAL_MSK (0x00000001 << AD9257_POWER_EXTERNAL_OFST)
#define AD9257_EXT_FULL_POWER_VAL (0x0)
#define AD9257_EXT_STANDBY_VAL (0x1)
#define AD9257_OUT_MODE_REG (0x14)
#define AD9257_OUT_FORMAT_OFST (0)
#define AD9257_OUT_FORMAT_MSK (0x00000001 << AD9257_OUT_FORMAT_OFST)
#define AD9257_OUT_BINARY_OFST_VAL (0)
#define AD9257_OUT_TWOS_COMPL_VAL (1)
#define AD9257_OUT_LVDS_OPT_OFST (6)
#define AD9257_OUT_LVDS_OPT_MSK (0x00000001 << AD9257_OUT_LVDS_OPT_OFST)
#define AD9257_OUT_LVDS_ANSI_VAL (0)
#define AD9257_OUT_LVDS_IEEE_VAL (1)
#define AD9257_OUT_PHASE_REG (0x16)
#define AD9257_OUT_CLK_OFST (0)
#define AD9257_OUT_CLK_MSK (0x0000000F << AD9257_OUT_CLK_OFST)
#define AD9257_OUT_CLK_60_VAL (0x1)
#define AD9257_IN_CLK_OFST (4)
#define AD9257_IN_CLK_MSK (0x00000007 << AD9257_IN_CLK_OFST)
#define AD9257_IN_CLK_0_VAL (0x0)
#define AD9257_VREF_REG (0x18)
#define AD9257_VREF_OFST (0)
#define AD9257_VREF_MSK (0x00000003 << AD9257_VREF_OFST)
#define AD9257_VREF_1_33_VAL (0x2)
#define AD9257_TEST_MODE_REG (0x0D)
#define AD9257_OUT_TEST_OFST (0)
#define AD9257_OUT_TEST_MSK (0x0000000F << AD9257_OUT_TEST_OFST)
#define AD9257_NONE_VAL (0x0)
#define AD9257_MIXED_BIT_FREQ_VAL (0xC)
#define AD9257_TEST_RESET_SHORT_GEN (4)
#define AD9257_TEST_RESET_LONG_GEN (5)
#define AD9257_USER_IN_MODE_OFST (6)
#define AD9257_USER_IN_MODE_MSK (0x00000003 << AD9257_USER_IN_MODE_OFST)
void setAdc(int addr, int val) {
u_int32_t codata;
codata = val + (addr << 8);
printf(" Setting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr);
serializeToSPI(ADC_SPI_REG, codata, ADC_SERIAL_CS_OUT_MSK, AD9257_ADC_NUMBITS,
ADC_SERIAL_CLK_OUT_MSK, ADC_SERIAL_DATA_OUT_MSK, ADC_SERIAL_DATA_OUT_OFST);
}
void prepareADC(){
printf("\n\nPreparing ADC ... \n");
//power mode reset
printf("power mode reset:\n");
setAdc(AD9257_POWER_MODE_REG,
(AD9257_INT_RESET_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK);
//power mode chip run
printf("power mode chip run:\n");
setAdc(AD9257_POWER_MODE_REG,
(AD9257_INT_CHIP_RUN_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK);
//output clock phase
printf("output clock phase:\n");
setAdc(AD9257_OUT_PHASE_REG,
(AD9257_OUT_CLK_60_VAL << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK);
// lvds-iee reduced , binary offset
printf("lvds-iee reduced, binary offset:\n");
setAdc(AD9257_OUT_MODE_REG,
(AD9257_OUT_LVDS_IEEE_VAL << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK);
// all devices on chip to receive next command
printf("all devices on chip to receive next command:\n");
setAdc(AD9257_DEV_IND_2_REG,
AD9257_CHAN_H_MSK | AD9257_CHAN_G_MSK | AD9257_CHAN_F_MSK | AD9257_CHAN_E_MSK);
setAdc(AD9257_DEV_IND_1_REG,
AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK | AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK |
AD9257_CLK_CH_DCO_MSK | AD9257_CLK_CH_IFCO_MSK);
// vref 1.33
printf("vref 1.33:\n");
setAdc(AD9257_VREF_REG,
(AD9257_VREF_1_33_VAL << AD9257_VREF_OFST) & AD9257_VREF_MSK);
// no test mode
printf("no test mode:\n");
setAdc(AD9257_TEST_MODE_REG,
(AD9257_NONE_VAL << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK);
#ifdef TESTADC
printf("***************************************** *******\n");
printf("******* PUTTING ADC IN TEST MODE!!!!!!!!! *******\n");
printf("***************************************** *******\n");
// mixed bit frequency test mode
printf("mixed bit frequency test mode:\n");
setAdc(AD9257_TEST_MODE_REG,
(AD9257_MIXED_BIT_FREQ_VAL << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK);
#endif
}
#endif //AD9257_H

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@ -1,6 +1,8 @@
#ifndef BLACKFIN_H #ifndef BLACKFIN_H
#define BLACKFIN_H #define BLACKFIN_H
#include "ansi.h"
#include <stdio.h> #include <stdio.h>
#include <fcntl.h> // open #include <fcntl.h> // open
#include <sys/mman.h> // mmap #include <sys/mman.h> // mmap
@ -13,31 +15,56 @@ u_int32_t CSP0BASE = 0;
/**
* Write into a 16 bit register
* @param offset address offset
* @param data 16 bit data
*/
void bus_w16(u_int32_t offset, u_int16_t data) { void bus_w16(u_int32_t offset, u_int16_t data) {
volatile u_int16_t *ptr1; volatile u_int16_t *ptr1;
ptr1=(u_int16_t*)(CSP0BASE+offset*2); ptr1=(u_int16_t*)(CSP0BASE+offset*2);
*ptr1=data; *ptr1=data;
} }
/**
* Read from a 16 bit register
* @param offset address offset
* @retuns 16 bit data read
*/
u_int16_t bus_r16(u_int32_t offset){ u_int16_t bus_r16(u_int32_t offset){
volatile u_int16_t *ptr1; volatile u_int16_t *ptr1;
ptr1=(u_int16_t*)(CSP0BASE+offset*2); ptr1=(u_int16_t*)(CSP0BASE+offset*2);
return *ptr1; return *ptr1;
} }
/**
* Write into a 32 bit register
* @param offset address offset
* @param data 32 bit data
*/
void bus_w(u_int32_t offset, u_int32_t data) { void bus_w(u_int32_t offset, u_int32_t data) {
volatile u_int32_t *ptr1; volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(CSP0BASE+offset*2); ptr1=(u_int32_t*)(CSP0BASE+offset*2);
*ptr1=data; *ptr1=data;
} }
/**
* Read from a 32 bit register
* @param offset address offset
* @retuns 32 bit data read
*/
u_int32_t bus_r(u_int32_t offset) { u_int32_t bus_r(u_int32_t offset) {
volatile u_int32_t *ptr1; volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(CSP0BASE+offset*2); ptr1=(u_int32_t*)(CSP0BASE+offset*2);
return *ptr1; return *ptr1;
} }
/**
* Read from a 64 bit register
* @param aLSB LSB offset address
* @param aMSB MSB offset address
* @returns 64 bit data read
*/
int64_t get64BitReg(int aLSB, int aMSB){ int64_t get64BitReg(int aLSB, int aMSB){
int64_t v64; int64_t v64;
u_int32_t vLSB,vMSB; u_int32_t vLSB,vMSB;
@ -49,6 +76,13 @@ int64_t get64BitReg(int aLSB, int aMSB){
return v64; return v64;
} }
/**
* Write into a 64 bit register
* @param value 64 bit data
* @param aLSB LSB offset address
* @param aMSB MSB offset address
* @returns 64 bit data read
*/
int64_t set64BitReg(int64_t value, int aLSB, int aMSB){ int64_t set64BitReg(int64_t value, int aLSB, int aMSB){
int64_t v64; int64_t v64;
u_int32_t vLSB,vMSB; u_int32_t vLSB,vMSB;
@ -63,17 +97,29 @@ int64_t set64BitReg(int64_t value, int aLSB, int aMSB){
} }
/**
* Read from a 32 bit register (literal register value provided by client)
* @param offset address offset
* @retuns 32 bit data read
*/
u_int32_t readRegister(u_int32_t offset) { u_int32_t readRegister(u_int32_t offset) {
return bus_r(offset << 11); return bus_r(offset << 11);
} }
/**
* Write into a 32 bit register (literal register value provided by client)
* @param offset address offset
* @param data 32 bit data
*/
u_int32_t writeRegister(u_int32_t offset, u_int32_t data) { u_int32_t writeRegister(u_int32_t offset, u_int32_t data) {
bus_w(offset << 11, data); bus_w(offset << 11, data);
return readRegister(offset); return readRegister(offset);
} }
/**
* Map FPGA
*/
int mapCSP0(void) { int mapCSP0(void) {
// if not mapped // if not mapped
if (!CSP0BASE) { if (!CSP0BASE) {

View File

@ -0,0 +1,58 @@
#ifndef COMMON_SERVER_FUNCTIONS_H
#define COMMON_SERVER_FUNCTIONS_H
#include "blackfin.h"
/* global variables */
void serializeToSPI(u_int32_t addr, u_int32_t val, u_int16_t csmask, int numbitstosend, u_int16_t clkmask, u_int16_t digoutmask, int digofset) {
#ifdef VERBOSE
if (numbitstosend == 16)
printf("Writing to SPI Register: 0x%04x\n",val);
else
printf("Writing to SPI Register: 0x%08x\n", val);
#endif
u_int16_t valw;
// start point
valw = 0xffff; /**todo testwith old board 0xff for adc_spi */ // old board compatibility (not using specific bits)
bus_w16 (addr, valw);
// chip sel bar down
valw &= ~csmask; /* todo with test: done a bit different, not with previous value */
bus_w16 (addr, valw);
{
int i = 0;
for (i = 0; i < numbitstosend; ++i) {
// clk down
valw &= ~clkmask;
bus_w16 (addr, valw);
// write data (i)
valw = ((valw & ~digoutmask) + // unset bit
(((val >> (numbitstosend - 1 - i)) & 0x1) << digofset)); // each bit from val starting from msb
bus_w16 (addr, valw);
// clk up
valw |= clkmask ;
bus_w16 (addr, valw);
}
}
// chip sel bar up
valw |= csmask; /* todo with test: not done for spi */
bus_w16 (addr, valw);
//clk down
valw &= ~clkmask;
bus_w16 (addr, valw);
// stop point = start point of course
valw = 0xffff; /**todo testwith old board 0xff for adc_spi */ // old board compatibility (not using specific bits)
bus_w16 (addr, valw);
}
#endif //COMMON_SERVER_FUNCTIONS_H

View File

@ -1,17 +1,14 @@
#ifdef SLS_DETECTOR_FUNCTION_LIST #ifdef SLS_DETECTOR_FUNCTION_LIST
#ifndef SLS_DETECTOR_FUNCTION_LIST_H #ifndef SLS_DETECTOR_FUNCTION_LIST_H
#define SLS_DETECTOR_FUNCTION_LIST_H #define SLS_DETECTOR_FUNCTION_LIST_H
#include "sls_detector_defs.h" #include "sls_receiver_defs.h"
#include "slsDetectorServer_defs.h" #include "slsDetectorServer_defs.h" // DAC_INDEX, ADC_INDEX, also include RegisterDefs.h
#include <stdlib.h> #include <stdlib.h>
#include <stdio.h> // FILE #include <stdio.h> // FILE
/**************************************************** /****************************************************
This functions are used by the slsDetectroServer_funcs interface. This functions are used by the slsDetectroServer_funcs interface.
Here are the definitions, but the actual implementation should be done for each single detector. Here are the definitions, but the actual implementation should be done for each single detector.
@ -60,8 +57,8 @@ void setupDetector();
// advanced read/write reg // advanced read/write reg
#ifndef EIGERD #ifndef EIGERD
extern u_int32_t writeRegister(u_int32_t offset, u_int32_t data); extern u_int32_t writeRegister(u_int32_t offset, u_int32_t data); // blackfin.h
extern u_int32_t readRegister(u_int32_t offset); extern u_int32_t readRegister(u_int32_t offset); // blackfin.h
#endif #endif
@ -126,8 +123,7 @@ int setThresholdEnergy(int ev, int imod);
#ifdef JUNGFRAUD #ifdef JUNGFRAUD
void serializeToSPI(u_int32_t addr, u_int32_t val, u_int16_t csmask, int numbitstosend, u_int16_t clkmask, u_int16_t digoutmask, int digofset); void serializeToSPI(u_int32_t addr, u_int32_t val, u_int16_t csmask, int numbitstosend, u_int16_t clkmask, u_int16_t digoutmask, int digofset);
void initDac(int dacnum); void initDac(int dacnum);
void prepareADC(); extern void setAdc(int addr, int val); // AD9257.h
void setAdc(int addr, int val);
int voltageToDac(int value); int voltageToDac(int value);
int dacToVoltage(unsigned int digital); int dacToVoltage(unsigned int digital);
#endif #endif
@ -169,10 +165,10 @@ int calibratePedestal(int frames);
void resetPLL(); void resetPLL();
u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val); u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val);
void configurePll(); void configurePll();
extern void eraseFlash(); extern void eraseFlash(); // programfpga.h
extern int startWritingFPGAprogram(FILE** filefp); extern int startWritingFPGAprogram(FILE** filefp); // programfpga.h
extern void stopWritingFPGAprogram(FILE* filefp); extern void stopWritingFPGAprogram(FILE* filefp); // programfpga.h
extern int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp); extern int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp); // programfpga.h
// eiger specific - iodelay, 10g, pulse, rate, temp, activate, delay nw parameter // eiger specific - iodelay, 10g, pulse, rate, temp, activate, delay nw parameter
#elif EIGERD #elif EIGERD