detectors/slsDetectorPackage
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made some functions common

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This commit is contained in:
Dhanya Maliakal 2017-06-14 10:43:15 +02:00
parent cb7b8713cf
commit a95dbd2215
11 changed files with 338 additions and 305 deletions
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2
slsDetectorSoftware/jungfrauDetectorServer/RegisterDefs.h
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@ -2,8 +2,6 @@
#define REGISTER_DEFS_H
/* Definitions for FPGA*/
#define CSP0 0x20200000
#define MEM_SIZE 0x100000
/* FPGA Version register */
#define FPGA_VERSION_REG (0x00 << 11)

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slsDetectorSoftware/jungfrauDetectorServer/bin/jungfrauDetectorServerv3.0.0.1.1
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slsDetectorSoftware/jungfrauDetectorServer/bin/jungfrauDetectorServerv3.0.0.1.2 Executable file
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1
slsDetectorSoftware/jungfrauDetectorServer/blackfin.h Symbolic link
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@ -0,0 +1 @@
../slsDetectorServer/blackfin.h

1
slsDetectorSoftware/jungfrauDetectorServer/programfpga.h Symbolic link
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@ -0,0 +1 @@
../slsDetectorServer/programfpga.h

245
slsDetectorSoftware/jungfrauDetectorServer/slsDetectorFunctionList.c
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@ -4,31 +4,24 @@
#include "slsDetectorFunctionList.h"
#include "gitInfoJungfrau.h"
#include "slsDetectorServer_defs.h" // also include RegisterDefs.h
#include "blackfin.h"
#include "programfpga.h"
#include <stdio.h>
#include <unistd.h> // usleep
#include <string.h>
#include <fcntl.h> // open
#include <sys/mman.h> // mmap
/* global variables */
sls_detector_module *detectorModules=NULL;
int *detectorChips=NULL;
int *detectorChans=NULL;
dacs_t *detectorDacs=NULL;
dacs_t *detectorAdcs=NULL;
int gpioDefined=0;
enum detectorSettings thisSettings;
enum masterFlags masterMode = NO_MASTER;
int highvoltage = 0;
int dacValues[NDAC];
u_int32_t CSP0BASE = 0;
int32_t clkPhase[2] = {0, 0};
char mtdvalue[10];
@ -280,119 +273,6 @@ void initStopServer() {
}
int mapCSP0(void) {
// if not mapped
if (!CSP0BASE) {
printf("Mapping memory\n");
#ifdef VIRTUAL
CSP0BASE = malloc(MEM_SIZE);
printf("memory allocated\n");
#else
int fd;
fd = open("/dev/mem", O_RDWR | O_SYNC, 0);
if (fd == -1) {
cprintf(BG_RED, "Error: Can't find /dev/mem\n");
return FAIL;
}
#ifdef VERBOSE
printf("/dev/mem opened\n");
#endif
CSP0BASE = (u_int32_t)mmap(0, MEM_SIZE, PROT_READ|PROT_WRITE, MAP_FILE|MAP_SHARED, fd, CSP0);
if (CSP0BASE == (u_int32_t)MAP_FAILED) {
cprintf(BG_RED, "Error: Can't map memmory area\n");
return FAIL;
}
printf("CSPOBASE mapped from %08x to %08x\n",CSP0BASE,CSP0BASE+MEM_SIZE);
#endif
printf("Status Register: %08x\n",bus_r(STATUS_REG));
}else
printf("Memory already mapped before\n");
return OK;
}
void bus_w16(u_int32_t offset, u_int16_t data) {
volatile u_int16_t *ptr1;
ptr1=(u_int16_t*)(CSP0BASE+offset*2);
*ptr1=data;
}
u_int16_t bus_r16(u_int32_t offset){
volatile u_int16_t *ptr1;
ptr1=(u_int16_t*)(CSP0BASE+offset*2);
return *ptr1;
}
void bus_w(u_int32_t offset, u_int32_t data) {
volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(CSP0BASE+offset*2);
*ptr1=data;
}
u_int32_t bus_r(u_int32_t offset) {
volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(CSP0BASE+offset*2);
return *ptr1;
}
int64_t set64BitReg(int64_t value, int aLSB, int aMSB){
int64_t v64;
u_int32_t vLSB,vMSB;
if (value!=-1) {
vLSB=value&(0xffffffff);
bus_w(aLSB,vLSB);
v64=value>> 32;
vMSB=v64&(0xffffffff);
bus_w(aMSB,vMSB);
}
return get64BitReg(aLSB, aMSB);
}
int64_t get64BitReg(int aLSB, int aMSB){
int64_t v64;
u_int32_t vLSB,vMSB;
vLSB=bus_r(aLSB);
vMSB=bus_r(aMSB);
v64=vMSB;
v64=(v64<<32) | vLSB;
printf(" reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB, v64);
return v64;
}
void defineGPIOpins(){
if (!gpioDefined) {
//define the gpio pins
system("echo 7 > /sys/class/gpio/export");
system("echo 9 > /sys/class/gpio/export");
//define their direction
system("echo in > /sys/class/gpio/gpio7/direction");
system("echo out > /sys/class/gpio/gpio9/direction");
printf("gpio pins defined\n");
gpioDefined = 1;
}else printf("gpio pins already defined earlier\n");
}
void resetFPGA(){
cprintf(BLUE,"\n*** Reseting FPGA ***\n");
FPGAdontTouchFlash();
FPGATouchFlash();
usleep(250*1000);
}
void FPGAdontTouchFlash(){
//tell FPGA to not touch flash
system("echo 0 > /sys/class/gpio/gpio9/value");
//usleep(100*1000);
}
void FPGATouchFlash(){
//tell FPGA to touch flash to program itself
system("echo 1 > /sys/class/gpio/gpio9/value");
}
@ -489,18 +369,6 @@ void setupDetector() {
/* advanced read/write reg */
u_int32_t writeRegister(u_int32_t offset, u_int32_t data) {
bus_w(offset << 11, data);
return readRegister(offset);
}
u_int32_t readRegister(u_int32_t offset) {
return bus_r(offset << 11);
}
/* firmware functions (resets) */
@ -1362,105 +1230,6 @@ void configurePll() {
void eraseFlash(){
#ifdef VERY_VERBOSE
printf("\nErasing Flash\n");
#endif
char command[255];
sprintf(command,"flash_eraseall %s",mtdvalue);
system(command);
printf("flash erased\n");
}
int startWritingFPGAprogram(FILE** filefp){
#ifdef VERY_VERBOSE
printf("\nStart Writing of FPGA program\n");
#endif
//getting the drive
char output[255];
FILE* fp = popen("awk \'$4== \"\\\"bitfile(spi)\\\"\" {print $1}\' /proc/mtd", "r");
fgets(output, sizeof(output), fp);
pclose(fp);
strcpy(mtdvalue,"/dev/");
char* pch = strtok(output,":");
if(pch == NULL){
cprintf(RED,"Could not get mtd value\n");
return FAIL;
}
strcat(mtdvalue,pch);
printf ("\nFlash drive found: %s\n",mtdvalue);
FPGAdontTouchFlash();
//writing the program to flash
*filefp = fopen(mtdvalue, "w");
if(*filefp == NULL){
cprintf(RED,"Unable to open %s in write mode\n",mtdvalue);
return FAIL;
}
printf("flash ready for writing\n");
return OK;
}
int stopWritingFPGAprogram(FILE* filefp){
#ifdef VERY_VERBOSE
printf("\nStopping of writing FPGA program\n");
#endif
int wait = 0;
if(filefp!= NULL){
fclose(filefp);
wait = 1;
}
//touch and program
FPGATouchFlash();
if(wait){
#ifdef VERY_VERBOSE
printf("Waiting for FPGA to program from flash\n");
#endif
//waiting for success or done
char output[255];
int res=0;
while(res == 0){
FILE* sysFile = popen("cat /sys/class/gpio/gpio7/value", "r");
fgets(output, sizeof(output), sysFile);
pclose(sysFile);
sscanf(output,"%d",&res);
#ifdef VERY_VERBOSE
printf("gpi07 returned %d\n",res);
#endif
}
}
printf("FPGA has picked up the program from flash\n\n");
return OK;
}
int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp){
#ifdef VERY_VERBOSE
printf("\nWriting of FPGA Program\n");
cprintf(BLUE,"address of fpgasrc:%p\n",(void *)fpgasrc);
cprintf(BLUE,"fsize:%d\n",fsize);
cprintf(BLUE,"pointer:%p\n",(void*)filefp);
#endif
if(fwrite((void*)fpgasrc , sizeof(char) , fsize , filefp )!= fsize){
cprintf(RED,"Could not write FPGA source to flash\n");
return FAIL;
}
#ifdef VERY_VERBOSE
cprintf(BLUE, "program written to flash\n");
#endif
return OK;
}
/* aquisition */
@ -1574,13 +1343,9 @@ u_int32_t runBusy(void) {
/* common */
int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod){
int ichip, idac, ichan, iadc;

1
slsDetectorSoftware/jungfrauDetectorServer/slsDetectorServer_defs.h
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@ -8,7 +8,6 @@
#define GOODBYE (-200)
#define CTRL_SRVR_INIT_TIME_US (300 * 1000)
//#define REQUIRED_FIRMWARE_VERSION 16

108
slsDetectorSoftware/slsDetectorServer/blackfin.h Executable file
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@ -0,0 +1,108 @@
#ifndef BLACKFIN_H
#define BLACKFIN_H
#include <stdio.h>
#include <fcntl.h> // open
#include <sys/mman.h> // mmap
/* global variables */
u_int32_t CSP0BASE = 0;
#define CSP0 0x20200000
#define MEM_SIZE 0x100000
void bus_w16(u_int32_t offset, u_int16_t data) {
volatile u_int16_t *ptr1;
ptr1=(u_int16_t*)(CSP0BASE+offset*2);
*ptr1=data;
}
u_int16_t bus_r16(u_int32_t offset){
volatile u_int16_t *ptr1;
ptr1=(u_int16_t*)(CSP0BASE+offset*2);
return *ptr1;
}
void bus_w(u_int32_t offset, u_int32_t data) {
volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(CSP0BASE+offset*2);
*ptr1=data;
}
u_int32_t bus_r(u_int32_t offset) {
volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(CSP0BASE+offset*2);
return *ptr1;
}
int64_t get64BitReg(int aLSB, int aMSB){
int64_t v64;
u_int32_t vLSB,vMSB;
vLSB=bus_r(aLSB);
vMSB=bus_r(aMSB);
v64=vMSB;
v64=(v64<<32) | vLSB;
printf(" reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB, v64);
return v64;
}
int64_t set64BitReg(int64_t value, int aLSB, int aMSB){
int64_t v64;
u_int32_t vLSB,vMSB;
if (value!=-1) {
vLSB=value&(0xffffffff);
bus_w(aLSB,vLSB);
v64=value>> 32;
vMSB=v64&(0xffffffff);
bus_w(aMSB,vMSB);
}
return get64BitReg(aLSB, aMSB);
}
u_int32_t readRegister(u_int32_t offset) {
return bus_r(offset << 11);
}
u_int32_t writeRegister(u_int32_t offset, u_int32_t data) {
bus_w(offset << 11, data);
return readRegister(offset);
}
int mapCSP0(void) {
// if not mapped
if (!CSP0BASE) {
printf("Mapping memory\n");
#ifdef VIRTUAL
CSP0BASE = malloc(MEM_SIZE);
printf("memory allocated\n");
#else
int fd;
fd = open("/dev/mem", O_RDWR | O_SYNC, 0);
if (fd == -1) {
cprintf(BG_RED, "Error: Can't find /dev/mem\n");
return FAIL;
}
#ifdef VERBOSE
printf("/dev/mem opened\n");
#endif
CSP0BASE = (u_int32_t)mmap(0, MEM_SIZE, PROT_READ|PROT_WRITE, MAP_FILE|MAP_SHARED, fd, CSP0);
if (CSP0BASE == (u_int32_t)MAP_FAILED) {
cprintf(BG_RED, "Error: Can't map memmory area\n");
return FAIL;
}
printf("CSPOBASE mapped from %08x to %08x\n",CSP0BASE,CSP0BASE+MEM_SIZE);
#endif
printf("Status Register: %08x\n",bus_r(STATUS_REG));
}else
printf("Memory already mapped before\n");
return OK;
}
#endif //BLACKFIN_H

178
slsDetectorSoftware/slsDetectorServer/programfpga.h Executable file
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@ -0,0 +1,178 @@
#ifndef PROGRAM_FPGA_H
#define PROGRAM_FPGA_H
#include "ansi.h"
#include <stdio.h>
#include <unistd.h> // usleep
#include <string.h>
/* global variables */
#define CTRL_SRVR_INIT_TIME_US (300 * 1000)
int gpioDefined=0;
char mtdvalue[10];
/**
* Define GPIO pins if not defined
*/
void defineGPIOpins(){
if (!gpioDefined) {
//define the gpio pins
system("echo 7 > /sys/class/gpio/export");
system("echo 9 > /sys/class/gpio/export");
//define their direction
system("echo in > /sys/class/gpio/gpio7/direction");
system("echo out > /sys/class/gpio/gpio9/direction");
printf("gpio pins defined\n");
gpioDefined = 1;
}else printf("gpio pins already defined earlier\n");
}
/**
* Notify FPGA to not touch flash
*/
void FPGAdontTouchFlash(){
//tell FPGA to not touch flash
system("echo 0 > /sys/class/gpio/gpio9/value");
//usleep(100*1000);
}
/**
* Notify FPGA to program from flash
*/
void FPGATouchFlash(){
//tell FPGA to touch flash to program itself
system("echo 1 > /sys/class/gpio/gpio9/value");
}
/**
* Reset FPGA
*/
void resetFPGA(){
cprintf(BLUE,"\n*** Reseting FPGA ***\n");
FPGAdontTouchFlash();
FPGATouchFlash();
usleep(CTRL_SRVR_INIT_TIME_US);
}
/**
* Erasing flash
*/
void eraseFlash(){
#ifdef VERY_VERBOSE
printf("\nErasing Flash\n");
#endif
char command[255];
sprintf(command,"flash_eraseall %s",mtdvalue);
system(command);
printf("flash erased\n");
}
/**
* Open the drive to copy program and
* notify FPGA not to touch the program
* @param filefp pointer to flash
* @return 0 for success, 1 for fail (cannot open file for writing program)
*/
int startWritingFPGAprogram(FILE** filefp){
#ifdef VERY_VERBOSE
printf("\nStart Writing of FPGA program\n");
#endif
//getting the drive
char output[255];
FILE* fp = popen("awk \'$4== \"\\\"bitfile(spi)\\\"\" {print $1}\' /proc/mtd", "r");
fgets(output, sizeof(output), fp);
pclose(fp);
strcpy(mtdvalue,"/dev/");
char* pch = strtok(output,":");
if(pch == NULL){
cprintf(RED,"Could not get mtd value\n");
return FAIL;
}
strcat(mtdvalue,pch);
printf ("\nFlash drive found: %s\n",mtdvalue);
FPGAdontTouchFlash();
//writing the program to flash
*filefp = fopen(mtdvalue, "w");
if(*filefp == NULL){
cprintf(RED,"Unable to open %s in write mode\n",mtdvalue);
return 1;
}
printf("flash ready for writing\n");
return 0;
}
/**
* When done writing the program, close file pointer and
* notify FPGA to pick up the program from flash
* @param filefp pointer to flash
*/
void stopWritingFPGAprogram(FILE* filefp){
#ifdef VERY_VERBOSE
printf("\nStopping of writing FPGA program\n");
#endif
int wait = 0;
if(filefp!= NULL){
fclose(filefp);
wait = 1;
}
//touch and program
FPGATouchFlash();
if(wait){
#ifdef VERY_VERBOSE
printf("Waiting for FPGA to program from flash\n");
#endif
//waiting for success or done
char output[255];
int res=0;
while(res == 0){
FILE* sysFile = popen("cat /sys/class/gpio/gpio7/value", "r");
fgets(output, sizeof(output), sysFile);
pclose(sysFile);
sscanf(output,"%d",&res);
#ifdef VERY_VERBOSE
printf("gpi07 returned %d\n",res);
#endif
}
}
printf("FPGA has picked up the program from flash\n\n");
}
/**
* Write FPGA Program to flash
* @param fpgasrc source program
* @param fsize size of program
* @param filefp pointer to flash
* @return 0 for success, 1 for fail (cannot write)
*/
int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp){
#ifdef VERY_VERBOSE
printf("\nWriting of FPGA Program\n");
cprintf(BLUE,"address of fpgasrc:%p\n",(void *)fpgasrc);
cprintf(BLUE,"fsize:%d\n",fsize);
cprintf(BLUE,"pointer:%p\n",(void*)filefp);
#endif
if(fwrite((void*)fpgasrc , sizeof(char) , fsize , filefp )!= fsize){
cprintf(RED,"Could not write FPGA source to flash\n");
return 1;
}
#ifdef VERY_VERBOSE
cprintf(BLUE, "program written to flash\n");
#endif
return 0;
}
#endif //PROGRAM_FPGA_H

101
slsDetectorSoftware/slsDetectorServer/slsDetectorFunctionList.h
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@ -52,19 +52,6 @@ void initStopServer();
#ifdef EIGERD
void getModuleConfiguration();
#endif
#ifdef JUNGFRAUD
int mapCSP0(void);
void bus_w16(u_int32_t offset, u_int16_t data);
u_int16_t bus_r16(u_int32_t offset);
void bus_w(u_int32_t offset, u_int32_t data);
u_int32_t bus_r(u_int32_t offset);
int64_t set64BitReg(int64_t value, int aLSB, int aMSB);
int64_t get64BitReg(int aLSB, int aMSB);
void defineGPIOpins();
void resetFPGA();
void FPGAdontTouchFlash();
void FPGATouchFlash();
#endif
// set up detector
void allocateDetectorStructureMemory();
@ -73,8 +60,8 @@ void setupDetector();
// advanced read/write reg
#ifndef EIGERD
u_int32_t writeRegister(u_int32_t offset, u_int32_t data);
u_int32_t readRegister(u_int32_t offset);
extern u_int32_t writeRegister(u_int32_t offset, u_int32_t data);
extern u_int32_t readRegister(u_int32_t offset);
#endif
@ -182,30 +169,30 @@ int calibratePedestal(int frames);
void resetPLL();
u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val);
void configurePll();
void eraseFlash();
int startWritingFPGAprogram(FILE** filefp);
int stopWritingFPGAprogram(FILE* filefp);
int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp);
extern void eraseFlash();
extern int startWritingFPGAprogram(FILE** filefp);
extern void stopWritingFPGAprogram(FILE* filefp);
extern int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp);
// eiger specific - iodelay, 10g, pulse, rate, temp, activate, delay nw parameter
#elif EIGERD
int setIODelay(int val, int imod);
int enableTenGigabitEthernet(int val);
int setCounterBit(int val);
int pulsePixel(int n, int x, int y);
int pulsePixelNMove(int n, int x, int y);
int pulseChip(int n);
int64_t setRateCorrection(int64_t custom_tau_in_nsec);
int getRateCorrectionEnable();
int getDefaultSettingsTau_in_nsec();
void setDefaultSettingsTau_in_nsec(int t);
int64_t getCurrentTau();
void setExternalGating(int enable[]);
int setAllTrimbits(int val);
int getAllTrimbits();
int getBebFPGATemp();
int activate(int enable);
int setNetworkParameter(enum NETWORKINDEX mode, int value);
int setIODelay(int val, int imod);
int enableTenGigabitEthernet(int val);
int setCounterBit(int val);
int pulsePixel(int n, int x, int y);
int pulsePixelNMove(int n, int x, int y);
int pulseChip(int n);
int64_t setRateCorrection(int64_t custom_tau_in_nsec);
int getRateCorrectionEnable();
int getDefaultSettingsTau_in_nsec();
void setDefaultSettingsTau_in_nsec(int t);
int64_t getCurrentTau();
void setExternalGating(int enable[]);
int setAllTrimbits(int val);
int getAllTrimbits();
int getBebFPGATemp();
int activate(int enable);
int setNetworkParameter(enum NETWORKINDEX mode, int value);
#endif
@ -213,39 +200,39 @@ int setNetworkParameter(enum NETWORKINDEX mode, int value);
// aquisition
#if defined(EIGERD) || defined(GOTTHARD)
int prepareAcquisition();
int prepareAcquisition();
#endif
int startStateMachine();
int stopStateMachine();
int startStateMachine();
int stopStateMachine();
#ifndef JUNGFRAUD
int startReadOut();
int startReadOut();
#endif
enum runStatus getRunStatus();
void readFrame(int *ret, char *mess);
enum runStatus getRunStatus();
void readFrame(int *ret, char *mess);
#ifdef JUNGFRAUD
u_int32_t runBusy(void);
u_int32_t runBusy(void);
#endif
//common
int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod);
int calculateDataBytes();
int getTotalNumberOfChannels();
int getTotalNumberOfChips();
int getTotalNumberOfModules();
int getNumberOfChannelsPerModule();
int getNumberOfChipsPerModule();
int getNumberOfDACsPerModule();
int getNumberOfADCsPerModule();
int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod);
int calculateDataBytes();
int getTotalNumberOfChannels();
int getTotalNumberOfChips();
int getTotalNumberOfModules();
int getNumberOfChannelsPerModule();
int getNumberOfChipsPerModule();
int getNumberOfDACsPerModule();
int getNumberOfADCsPerModule();
#ifdef EIGERD
int getNumberOfGainsPerModule();
int getNumberOfOffsetsPerModule();
int getNumberOfGainsPerModule();
int getNumberOfOffsetsPerModule();
#endif
int getNumberOfChannelsPerChip();
int getNumberOfChannelsPerChip();
// sync
enum masterFlags setMaster(enum masterFlags arg);
enum synchronizationMode setSynchronization(enum synchronizationMode arg);
enum masterFlags setMaster(enum masterFlags arg);
enum synchronizationMode setSynchronization(enum synchronizationMode arg);

6
slsDetectorSoftware/slsDetectorServer/slsDetectorServer_funcs.c
View File

@ -4603,11 +4603,7 @@ int program_fpga(int file_des) {
printf("\n");
//closing file pointer to flash and informing FPGA
if(stopWritingFPGAprogram(fp) == FAIL){
ret=FAIL;
sprintf(mess,"Could not write to flash. Error at end.\n");
cprintf(RED,"%s",mess);
}
stopWritingFPGAprogram(fp);
//free resources
if(fpgasrc != NULL)