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Delete legacy configs
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@@ -133,178 +133,4 @@ inline constexpr defs::GroupConfig Quad_iLGAD_tophalf{
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Quad_iLGAD_pix.num_pix_x - Quad_iLGAD_pix.guardring.x - 1, // 502
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Quad_iLGAD_pix.num_pix_y / 2 + 1, // 257
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Quad_iLGAD_pix.num_pix_y - Quad_iLGAD_pix.guardring.y - 1}}; // 502
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} // namespace aare::remap::config::jungfrau
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/**************************************
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* Legacy for reference, to be deleted
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**************************************/
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namespace aare::remap::legacy {
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enum class SensorTech : int { iLGAD, TEW };
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// This is dummy for now because it is not yet decided how best to depict
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// the differences in batches R&D, production and year in a scalable way
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// with unified naming conventions
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enum class SensorRevision : int { RevA, RevB, RevC };
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enum class SensorLayout : int {
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Halfmodule, // not implemented yet!
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Quad,
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DoubleChip, // not implemented yet (new batch)!
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SingleMP37, // not implemented yet (TEW 2024)
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SingleMP25,
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SingleMP18,
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SingleMP15
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};
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// Orientation of the sensor with respect to the ASICs / the HDI
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// Normal means lower part of sensor (as in GDS) aligns with lower part of
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// HDI
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enum class Rotation : int { Normal = 0, Inverse = 1 };
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struct SensorKey {
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SensorTech tech;
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SensorRevision rev = SensorRevision::RevA;
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SensorLayout layout;
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};
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struct BondShift {
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int x = 0;
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int y = 0;
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};
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/**
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* Helper structs for strong-typing
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*/
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struct ChipGeometry {
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int cols;
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int rows;
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int guardring;
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};
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struct StrixelGeometry {
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int multiplicator; // 2, 3, 5, or 4
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int x_shift; // to skip additional square pixels that are not remapped
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InclusiveROI strixel_roi; // in chip-local coords (no mirroring)
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int nrows_remap; // precomputed or computed once
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int ncols_remap; // same
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double pitch_um; // physical pitch (37.5 / 25 / 15 / 18.75)
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};
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// Separate mappings for the multi-pitch single-chip strixel sensor
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// (small pitch in vertical)
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struct SingleChipMP_iLGAD {
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static constexpr bool multi_chip = true;
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static constexpr ChipGeometry chip{
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.cols = 256, .rows = 256, .guardring = 9};
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// Sensor placement in module coordinates:
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static constexpr InclusiveROI chip1{256, 511, 0, 255};
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static constexpr InclusiveROI chip6{512, 767, 256, 511};
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// Group descriptors:
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// Group 1: 25um pitch, groups of 3, 1 column of square pixels
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static inline const StrixelGeometry P25 = {
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.multiplicator = 3,
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.x_shift = 1,
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.strixel_roi =
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InclusiveROI{chip.guardring + 1, chip.cols - chip.guardring - 1,
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chip.guardring, (chip.rows / 4) - 1},
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.nrows_remap = ((chip.rows / 4) - chip.guardring) * 3,
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.ncols_remap = (chip.cols - (2 * chip.guardring) - 1) / 3,
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.pitch_um = 25.0};
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// Group 2: 15um pitch, groups of 5, 3 columns of square pixels
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static inline const StrixelGeometry P15 = {
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.multiplicator = 5,
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.x_shift = 3,
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.strixel_roi =
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InclusiveROI{chip.guardring + 3, chip.cols - chip.guardring - 1,
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chip.rows / 4, (chip.rows / 4) * 2 - 1},
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.nrows_remap = (chip.rows / 4) * 5,
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.ncols_remap = (chip.cols - (2 * chip.guardring) - 3) / 5,
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.pitch_um = 15.0};
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// Group 3: 18.75um pitch, groups of 4, 2 columns of square pixels
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// (double the size of the other groups, differe in design of metal
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// layer)
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static inline const StrixelGeometry P18 = {
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.multiplicator = 4,
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.x_shift = 2,
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.strixel_roi =
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InclusiveROI{chip.guardring + 2, chip.cols - chip.guardring - 1,
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(chip.rows / 4) * 2, chip.rows - chip.guardring - 1},
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.nrows_remap = ((chip.rows / 4) * 2 - chip.guardring) * 4,
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.ncols_remap = (chip.cols - (2 * chip.guardring) - 2) / 4,
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.pitch_um = 18.75};
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};
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struct SingleChipMP_TEW {
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static constexpr bool multi_chip = true;
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static constexpr ChipGeometry chip{
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.cols = 256, .rows = 256, .guardring = 0};
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// Sensor placement in module coordinates:
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static constexpr InclusiveROI chip1{256, 511, 0, 255};
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static constexpr InclusiveROI chip6{512, 767, 256, 511};
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// Group descriptors:
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// Group 1: 25um pitch, groups of 3, 1 column of square pixels
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static inline const StrixelGeometry P25 = {
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.multiplicator = 3,
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.x_shift = 1,
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.strixel_roi = InclusiveROI{1, chip.cols - 1, 0, (chip.rows / 4) - 1},
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.nrows_remap = (chip.rows / 4) * 3,
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.ncols_remap = chip.cols / 3, // 85
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.pitch_um = 25.0};
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// Group 2: 15um pitch, groups of 5, 3 columns of square pixels
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static inline const StrixelGeometry P15 = {
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.multiplicator = 5,
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.x_shift = 1,
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.strixel_roi = InclusiveROI{1, chip.cols - 1, chip.rows / 4,
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(chip.rows / 4) * 2 - 1},
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.nrows_remap = (chip.rows / 4) * 5,
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.ncols_remap = chip.cols / 5, // 51
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.pitch_um = 15.0};
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// Group 3: 18.75um pitch, groups of 4, 2 columns of square pixels
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// (double the size of the other groups, differe in design of metal
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// layer)
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static inline const StrixelGeometry P18 = {
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.multiplicator = 4,
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.x_shift = 0,
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.strixel_roi =
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InclusiveROI{0, chip.cols - 1, (chip.rows / 4) * 2, chip.rows - 1},
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.nrows_remap = ((chip.rows / 4) * 2) * 4,
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.ncols_remap = chip.cols / 4,
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.pitch_um = 18.75};
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};
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// Constants describing the mapping of a 25µm strixel quad sensor
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// A detailed reference of the layout can be found at
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// https://1drv.ms/b/c/2c9cf72ecfd75ec5/EcVe188u95wggCx7HwMAAAABH4SoINkrNCUqPnmmsUjGRg?e=TwaHzY
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struct Quad_iLGAD {
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static constexpr bool multi_chip = false;
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static constexpr ChipGeometry chip{
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.cols = 512, .rows = 512, .guardring = 9};
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// Sensor placement in module coordinates:
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static constexpr InclusiveROI coords{256, 767, 0, 511};
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// Group descriptors:
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static inline const StrixelGeometry Half = {
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.multiplicator = 3,
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.x_shift = 2,
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.strixel_roi =
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InclusiveROI{chip.guardring + 2, chip.cols - chip.guardring - 1,
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chip.guardring, chip.rows / 2},
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.nrows_remap = (chip.rows - 1 - chip.guardring) * 3,
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.ncols_remap = (chip.cols - 2 - 2 * chip.guardring) / 3,
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.pitch_um = 25.0};
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};
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} // namespace aare::remap::legacy
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} // namespace aare::remap::config::jungfrau
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