Federico Rojas 87fc139e36 Chenge name of Outputs from bPowerOutput to just bOuput

2018-07-09 15:30:57 +02:00

solution

Chenge name of Outputs from bPowerOutput to just bOuput

2018-07-09 15:30:57 +02:00

.gitattributes

Add files .gitignore and .gitattributes

2017-11-06 09:04:06 +01:00

.gitignore

Exclude *.tmc files

2017-12-08 12:12:31 +01:00

.gitmodules

Add tc_mca_std_lib.

2017-12-08 09:47:56 +01:00

solution.sln

Chenge name of Outputs from bPowerOutput to just bOuput

2018-07-09 15:30:57 +02:00

Description

Testrig with linear axis

2.7 MiB

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