refactor(ddg): refactor delay generator for cSAXS #82

Merged
appel_c merged 7 commits from feat/add_new_ddg_integration into main 2025-07-16 14:30:51 +02:00
appel_c commented 2025-07-03 20:13:29 +02:00 (Migrated from gitlab.psi.ch)

Summary

This MR refactors the DigitalDelayGenerator645 integration for cSAXS. It rewrites the base class, simplifying access to delay pairs of the DDG, and adds two new classes for DDG1 & DDG2. We further add a PDF describing how the DDGs are cabled. Additional information about cabling is also written in the module docstring of the classes.

The current implementation still lacks the option to keep the shutter open during a stepscan (or flyscan), as it opens the shutter 2ms before the first pulse, and closes it 1ms after the last pulse. The additional functionality will be added through a refactoring in future as it might require additional cabling.

Related issues

closes #4

Notes

  • #5 was created to investigate if we can improve the operation of the IOC
# Summary This MR refactors the DigitalDelayGenerator645 integration for cSAXS. It rewrites the base class, simplifying access to delay pairs of the DDG, and adds two new classes for DDG1 & DDG2. We further add a PDF describing how the DDGs are cabled. Additional information about cabling is also written in the module docstring of the classes. The current implementation still lacks the option to keep the shutter open during a stepscan (or flyscan), as it opens the shutter 2ms before the first pulse, and closes it 1ms after the last pulse. The additional functionality will be added through a refactoring in future as it might require additional cabling. # Related issues closes #4 # Notes - #5 was created to investigate if we can improve the operation of the IOC
appel_c commented 2025-07-03 20:13:29 +02:00 (Migrated from gitlab.psi.ch)

assigned to @appel_c

assigned to @appel_c
appel_c (Migrated from gitlab.psi.ch) approved these changes 2025-07-03 20:13:29 +02:00
appel_c commented 2025-07-03 23:24:56 +02:00 (Migrated from gitlab.psi.ch)

added 1 commit

  • 2434f1ea - fix(ddg): EpicsSignal write_pv does not take prefix, workaround

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added 1 commit <ul><li>2434f1ea - fix(ddg): EpicsSignal write_pv does not take prefix, workaround</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46222&start_sha=e23cf7e1a328574c6b45e12c0b6bb4d4b451636a)
appel_c commented 2025-07-03 23:26:42 +02:00 (Migrated from gitlab.psi.ch)

added 1 commit

  • aebef4e5 - fix(ddg): EpicsSignal write_pv does not take prefix, workaround

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added 1 commit <ul><li>aebef4e5 - fix(ddg): EpicsSignal write_pv does not take prefix, workaround</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46223&start_sha=2434f1eaf80a193e90e01343a19aeae1a8ccdeab)
appel_c commented 2025-07-03 23:29:21 +02:00 (Migrated from gitlab.psi.ch)

added 1 commit

  • 0de0e496 - fix(ddg): EpicsSignal write_pv does not take prefix, workaround

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added 1 commit <ul><li>0de0e496 - fix(ddg): EpicsSignal write_pv does not take prefix, workaround</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46224&start_sha=aebef4e5291c3688c2329bc0025a2ee81dd74d2c)
appel_c commented 2025-07-03 23:30:25 +02:00 (Migrated from gitlab.psi.ch)

added 1 commit

  • fea4b922 - fix(ddg): EpicsSignal write_pv does not take prefix, workaround

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added 1 commit <ul><li>fea4b922 - fix(ddg): EpicsSignal write_pv does not take prefix, workaround</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46225&start_sha=0de0e4962ad0dd810b6db4464a94fa74fd025e9e)
appel_c commented 2025-07-03 23:34:33 +02:00 (Migrated from gitlab.psi.ch)

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  • e88e5b18 - wip

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appel_c commented 2025-07-04 16:54:33 +02:00 (Migrated from gitlab.psi.ch)

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  • bd7e7bf6 - done by Ana, sorry!

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appel_c commented 2025-07-04 16:56:53 +02:00 (Migrated from gitlab.psi.ch)

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  • 76943b08 - fix ca

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appel_c commented 2025-07-04 20:18:10 +02:00 (Migrated from gitlab.psi.ch)

added 10 commits

  • 76943b08...66622fd7 - 5 commits from branch main
  • 1bdb0aac - refactor(ddg): refactor delay generator for cSAXS
  • 6e05144a - fix(ddg): EpicsSignal write_pv does not take prefix, workaround
  • 67b53d59 - wip
  • a0376127 - done by Ana, sorry!
  • 0f337905 - fix ca

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added 10 commits <ul><li>76943b08...66622fd7 - 5 commits from branch <code>main</code></li><li>1bdb0aac - refactor(ddg): refactor delay generator for cSAXS</li><li>6e05144a - fix(ddg): EpicsSignal write_pv does not take prefix, workaround</li><li>67b53d59 - wip</li><li>a0376127 - done by Ana, sorry!</li><li>0f337905 - fix ca</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46243&start_sha=76943b08753f0403da18491a4e01f4247351f6db)
appel_c commented 2025-07-09 16:33:08 +02:00 (Migrated from gitlab.psi.ch)

added 1 commit

  • 2ba6448a - refactor: add ddg_master for cSAXS

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added 1 commit <ul><li>2ba6448a - refactor: add ddg_master for cSAXS</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46275&start_sha=0f337905c6f093902cf2628688d4d3d68fc8d553)
appel_c commented 2025-07-09 16:33:37 +02:00 (Migrated from gitlab.psi.ch)

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  • 23318971 - test config, to be deleted

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appel_c commented 2025-07-09 17:04:11 +02:00 (Migrated from gitlab.psi.ch)

added 1 commit

  • a10c5b4b - wip fixup

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appel_c commented 2025-07-09 18:00:31 +02:00 (Migrated from gitlab.psi.ch)

added 1 commit

  • 0310931e - ddg master fixup for cleanup

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added 1 commit <ul><li>0310931e - ddg master fixup for cleanup</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46279&start_sha=a10c5b4b28c496d3de086bf18fd274bbf7e7c232)
appel_c commented 2025-07-10 16:38:52 +02:00 (Migrated from gitlab.psi.ch)

added 2 commits

  • 87982999 - feat(ddg): rewrite of the delay generator integration for cSAXS
  • c772c7d2 - refactor(ddg): final refactoring and cleanup

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added 2 commits <ul><li>87982999 - feat(ddg): rewrite of the delay generator integration for cSAXS</li><li>c772c7d2 - refactor(ddg): final refactoring and cleanup</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46296&start_sha=0310931ec649a30cc16b8622f6f1b7ea2e17eb14)
appel_c commented 2025-07-10 18:06:17 +02:00 (Migrated from gitlab.psi.ch)

added 1 commit

  • 32a05d45 - refactor(ddg): final refactoring and cleanup

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appel_c commented 2025-07-10 18:25:00 +02:00 (Migrated from gitlab.psi.ch)

added 1 commit

  • bc749d56 - refacto: remove old configs

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added 1 commit <ul><li>bc749d56 - refacto: remove old configs</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46304&start_sha=32a05d45083c8fa53d665ae7a71fe4cfa580ee40)
appel_c commented 2025-07-11 08:23:13 +02:00 (Migrated from gitlab.psi.ch)

added 5 commits

  • bc749d56...ef76e4b4 - 2 commits from branch main
  • d9f40af9 - feat(ddg): rewrite of the delay generator integration for cSAXS
  • 24f5dd95 - refactor(ddg): final refactoring and cleanup
  • 0a849aae - refacto: remove old configs

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added 5 commits <ul><li>bc749d56...ef76e4b4 - 2 commits from branch <code>main</code></li><li>d9f40af9 - feat(ddg): rewrite of the delay generator integration for cSAXS</li><li>24f5dd95 - refactor(ddg): final refactoring and cleanup</li><li>0a849aae - refacto: remove old configs</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46307&start_sha=bc749d5623c4ed612661a04514cbebf83f1e8e5c)
appel_c commented 2025-07-11 08:28:07 +02:00 (Migrated from gitlab.psi.ch)

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  • f0ed05d1 - clean config

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appel_c commented 2025-07-11 11:29:40 +02:00 (Migrated from gitlab.psi.ch)

added 1 commit

  • d634fd17 - wip from the beamline

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appel_c commented 2025-07-14 18:14:33 +02:00 (Migrated from gitlab.psi.ch)

added 1 commit

  • c2dd1248 - feat: adding ddg1 and ddg2 logic for csaxs

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added 1 commit <ul><li>c2dd1248 - feat: adding ddg1 and ddg2 logic for csaxs</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46340&start_sha=d634fd1736de4ec87b56500c1b02f69b1e182134)
appel_c commented 2025-07-14 18:18:04 +02:00 (Migrated from gitlab.psi.ch)

added 1 commit

  • 0fcc38e4 - wip update test ddg config

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added 1 commit <ul><li>0fcc38e4 - wip update test ddg config</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46341&start_sha=c2dd124837f0803d5036e977426e75691c6c28a7)
appel_c commented 2025-07-14 18:28:41 +02:00 (Migrated from gitlab.psi.ch)

added 1 commit

  • 6d83cf9a - wip update test config

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added 1 commit <ul><li>6d83cf9a - wip update test config</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46342&start_sha=0fcc38e4ec8f57464f5b1c199470f2643b9b4fd0)
appel_c commented 2025-07-14 18:29:48 +02:00 (Migrated from gitlab.psi.ch)

added 1 commit

  • 9ec344fd - wip fixup

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added 1 commit <ul><li>9ec344fd - wip fixup</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46343&start_sha=6d83cf9aa8178e5a86e2d300c4b1eee301ca5169)
appel_c commented 2025-07-14 22:26:25 +02:00 (Migrated from gitlab.psi.ch)

added 1 commit

  • 8ae97c05 - wip fixup end of delay

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added 1 commit <ul><li>8ae97c05 - wip fixup end of delay</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46348&start_sha=9ec344fdb33b83ab79cb4f2c1f95e0a424bdcf0a)
appel_c commented 2025-07-15 10:03:14 +02:00 (Migrated from gitlab.psi.ch)

added 3 commits

  • 5983ff14 - refacto: remove old configs
  • 9f9a792d - feat: adding ddg1 and ddg2 logic for csaxs
  • a8d84f0b - test: add tests for ddg1 and ddg2 implementation at csaxs

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added 3 commits <ul><li>5983ff14 - refacto: remove old configs</li><li>9f9a792d - feat: adding ddg1 and ddg2 logic for csaxs</li><li>a8d84f0b - test: add tests for ddg1 and ddg2 implementation at csaxs</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46356&start_sha=8ae97c05846d3e0f79089cce6f03576f6b433b57)
appel_c commented 2025-07-15 13:59:27 +02:00 (Migrated from gitlab.psi.ch)

added 1 commit

  • 617dbad2 - refactor: cleanup and remove old classes from configs

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added 1 commit <ul><li>617dbad2 - refactor: cleanup and remove old classes from configs</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46366&start_sha=a8d84f0bc440028d1cd53cc336f88c211f449d7c)
appel_c commented 2025-07-15 13:59:46 +02:00 (Migrated from gitlab.psi.ch)

requested review from @wakonig_k, @menzel, and @diaz

requested review from @wakonig_k, @menzel, and @diaz
appel_c commented 2025-07-15 14:06:45 +02:00 (Migrated from gitlab.psi.ch)

changed the description

changed the description
appel_c commented 2025-07-16 07:44:41 +02:00 (Migrated from gitlab.psi.ch)

@menzel

I would do a final test at the beamline. If it works as intended, can we merge this?

@menzel I would do a final test at the beamline. If it works as intended, can we merge this?
appel_c commented 2025-07-16 14:21:57 +02:00 (Migrated from gitlab.psi.ch)

added 1 commit

  • f672b122 - fix: add sleep to ddg2 for pre_scan to be ready for triggers

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added 1 commit <ul><li>f672b122 - fix: add sleep to ddg2 for pre_scan to be ready for triggers</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46377&start_sha=617dbad24f1f286530e8c828fcbfd630d213e0a4)
appel_c commented 2025-07-16 14:25:47 +02:00 (Migrated from gitlab.psi.ch)

added 11 commits

  • f672b122...44a4dfc8 - 4 commits from branch main
  • 293e56fb - feat(ddg): rewrite of the delay generator integration for cSAXS
  • 1c539a1e - refactor(ddg): final refactoring and cleanup
  • 173893ec - refacto: remove old configs
  • 98e43641 - feat: adding ddg1 and ddg2 logic for csaxs
  • 809a8834 - test: add tests for ddg1 and ddg2 implementation at csaxs
  • 4812323e - refactor: cleanup and remove old classes from configs
  • 909f0d2c - fix: add sleep to ddg2 for pre_scan to be ready for triggers

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added 11 commits <ul><li>f672b122...44a4dfc8 - 4 commits from branch <code>main</code></li><li>293e56fb - feat(ddg): rewrite of the delay generator integration for cSAXS</li><li>1c539a1e - refactor(ddg): final refactoring and cleanup</li><li>173893ec - refacto: remove old configs</li><li>98e43641 - feat: adding ddg1 and ddg2 logic for csaxs</li><li>809a8834 - test: add tests for ddg1 and ddg2 implementation at csaxs</li><li>4812323e - refactor: cleanup and remove old classes from configs</li><li>909f0d2c - fix: add sleep to ddg2 for pre_scan to be ready for triggers</li></ul> [Compare with previous version](/bec/csaxs_bec/-/merge_requests/70/diffs?diff_id=46379&start_sha=f672b122390dbac2454b95fd95131da9aac0ec25)
appel_c commented 2025-07-16 14:30:41 +02:00 (Migrated from gitlab.psi.ch)

approved this merge request

approved this merge request
appel_c (Migrated from gitlab.psi.ch) merged commit into main 2025-07-16 14:30:51 +02:00
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Reference: bec/csaxs_bec#82