refactor: simple refactoring of ddg for test purposes

This commit is contained in:
gac-x12sa
2024-10-07 17:22:54 +02:00
parent b5a5082919
commit c16642b848
2 changed files with 74 additions and 3 deletions
@@ -0,0 +1,27 @@
ddg_detectors:
description: DelayGenerator for detector triggering
deviceClass: csaxs_bec.devices.epics.delay_generator_csaxs.DelayGeneratorcSAXS
deviceConfig:
prefix: 'X12SA-CPCL-DDG3:'
ddg_config:
delay_burst: 40.e-3
delta_width: 0
additional_triggers: 0
polarity:
- 1 # T0
- 0 # eiger and LeCroy4
- 1
- 1
- 1
amplitude: 4.5
offset: 0
thres_trig_level: 2.5
set_high_on_exposure: False
set_high_on_stage: False
deviceTags:
- cSAXS
- ddg_detectors
onFailure: buffer
enabled: true
readoutPriority: async
softwareTrigger: True
@@ -1,5 +1,6 @@
from bec_lib import bec_logger
from ophyd import Component
from ophyd_devices.interfaces.base_classes.psi_delay_generator_base import (
DDGCustomMixin,
PSIDelayGeneratorBase,
@@ -203,6 +204,7 @@ class DelayGeneratorcSAXS(PSIDelayGeneratorBase):
custom_prepare_cls = DDGSetup
delay_burst = Component(
bec_utils.ConfigSignal, name="delay_burst", kind="config", config_storage_name="ddg_config"
)
@@ -288,7 +290,6 @@ class DelayGeneratorcSAXS(PSIDelayGeneratorBase):
configuration_attrs=None,
parent=None,
device_manager=None,
sim_mode=False,
ddg_config=None,
**kwargs,
):
@@ -334,7 +335,6 @@ class DelayGeneratorcSAXS(PSIDelayGeneratorBase):
configuration_attrs=configuration_attrs,
parent=parent,
device_manager=device_manager,
sim_mode=sim_mode,
**kwargs,
)
@@ -342,4 +342,48 @@ class DelayGeneratorcSAXS(PSIDelayGeneratorBase):
if __name__ == "__main__":
# Start delay generator in simulation mode.
# Note: To run, access to Epics must be available.
dgen = DelayGeneratorcSAXS("delaygen:DG1:", name="dgen", sim_mode=True)
import time
config = {
"delay_burst": 40.0e-3,
"delta_width": 0,
"additional_triggers": 0,
"polarity": [1, 0, 1, 1, 1], # T0 # to eiger and lecroy4
"amplitude": 4.5,
"offset": 0,
"thres_trig_level": 2.5,
"set_high_on_exposure": False,
"set_high_on_stage": False,
}
start = time.time()
print(f"Start with init of DDG3 with config: {config}")
dgen = DelayGeneratorcSAXS("X12SA-CPCL-DDG3:", name="dgen", ddg_config=config)
print(f"Finished init after: {time.time()-start}s")
start = time.time()
print(f"Start setting up DDG3")
exp_time = 1/(2e3) # 2 kHz
readout = exp_time/10
delay = 0
num_burst_cycle = 1e4 # N triggers
total_exposure = exp_time+readout
delay_burst = dgen.delay_burst.get()
dgen.set_trigger(trigger_source=TriggerSource.SINGLE_SHOT)
dgen.set_channels(signal='width', value=exp_time)
dgen.set_channels(signal='delay', value=0)
dgen.burst_enable(count=num_burst_cycle, delay=delay_burst, period=total_exposure, config="first")
print(f"Start sending {num_burst_cycle} triggers after {time.time()-start}s, ETA {num_burst_cycle*total_exposure}s")
break_time = time.time()
dgen.trigger()
# Wait here briefly for status to finish, whether this is realiable has to be tested
time.sleep(num_burst_cycle*total_exposure)
timer = 0
while True:
dgen.trigger_burst_readout.put(1)
state = dgen.burst_cycle_finished.get()
if state == 1:
break
time.sleep(0.05)
timer +=0.05
if timer>3:
raise TimeoutError(f"dgen.name did not return with value {state} for state")
print(f"Finished trigger cascade of {num_burst_cycle} with {exp_time}s -> {num_burst_cycle*exp_time}s after {time.time()-start}s in total, {break_time} for sending triggers.")