version13
version 11/12 auch noch
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@ -33,7 +33,7 @@
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(++) Enable the CAN interface clock using __HAL_RCC_CANx_CLK_ENABLE()
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(++) Configure CAN pins
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(+++) Enable the clock for the CAN GPIOs
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(+++) Configure CAN pins as alternate function open-drain
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(+++) Configure CAN pins as alternate function
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(++) In case of using interrupts (e.g. HAL_CAN_ActivateNotification())
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(+++) Configure the CAN interrupt priority using
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HAL_NVIC_SetPriority()
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@ -235,6 +235,7 @@
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* @{
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*/
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#define CAN_TIMEOUT_VALUE 10U
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#define CAN_WAKEUP_TIMEOUT_COUNTER 1000000U
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/**
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* @}
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*/
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@ -248,8 +249,8 @@
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*/
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/** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
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* @brief Initialization and Configuration functions
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*
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* @brief Initialization and Configuration functions
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*
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@verbatim
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==============================================================================
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##### Initialization and de-initialization functions #####
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@ -328,7 +329,7 @@ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan)
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/* Init the low level hardware: CLOCK, NVIC */
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HAL_CAN_MspInit(hcan);
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}
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#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
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#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
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/* Request initialisation */
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SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ);
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@ -482,7 +483,7 @@ HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan)
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#else
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/* DeInit the low level hardware: CLOCK, NVIC */
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HAL_CAN_MspDeInit(hcan);
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#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
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#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
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/* Reset the CAN peripheral */
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SET_BIT(hcan->Instance->MCR, CAN_MCR_RESET);
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@ -814,8 +815,8 @@ HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_Ca
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*/
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/** @defgroup CAN_Exported_Functions_Group2 Configuration functions
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* @brief Configuration functions.
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*
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* @brief Configuration functions.
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*
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@verbatim
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==============================================================================
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##### Configuration functions #####
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@ -868,7 +869,7 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_Filter
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/* Check the parameters */
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assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank));
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#endif
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#endif /* CAN3 */
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/* Initialisation mode for the filter */
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SET_BIT(can_ip->FMR, CAN_FMR_FINIT);
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@ -878,7 +879,7 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_Filter
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CLEAR_BIT(can_ip->FMR, CAN_FMR_CAN2SB);
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SET_BIT(can_ip->FMR, sFilterConfig->SlaveStartFilterBank << CAN_FMR_CAN2SB_Pos);
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#endif
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#endif /* CAN3 */
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/* Convert filter number into bit position */
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filternbrbitpos = (uint32_t)1 << (sFilterConfig->FilterBank & 0x1FU);
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@ -970,8 +971,8 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_Filter
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*/
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/** @defgroup CAN_Exported_Functions_Group3 Control functions
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* @brief Control functions
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*
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* @brief Control functions
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*
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@verbatim
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==============================================================================
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##### Control functions #####
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@ -1143,7 +1144,6 @@ HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan)
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HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan)
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{
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__IO uint32_t count = 0;
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uint32_t timeout = 1000000U;
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HAL_CAN_StateTypeDef state = hcan->State;
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if ((state == HAL_CAN_STATE_READY) ||
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@ -1159,15 +1159,14 @@ HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan)
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count++;
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/* Check if timeout is reached */
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if (count > timeout)
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if (count > CAN_WAKEUP_TIMEOUT_COUNTER)
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{
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/* Update error code */
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hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
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return HAL_ERROR;
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}
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}
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while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U);
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} while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U);
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/* Return function status */
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return HAL_OK;
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@ -1524,7 +1523,15 @@ HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo,
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hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos;
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}
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pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR);
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pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos;
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if (((CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos) >= 8U)
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{
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/* Truncate DLC to 8 if received field is over range */
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pHeader->DLC = 8U;
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}
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else
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{
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pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos;
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}
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pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_FMI_Pos;
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pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_TIME_Pos;
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@ -1600,8 +1607,8 @@ uint32_t HAL_CAN_GetRxFifoFillLevel(const CAN_HandleTypeDef *hcan, uint32_t RxFi
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*/
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/** @defgroup CAN_Exported_Functions_Group4 Interrupts management
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* @brief Interrupts management
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*
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* @brief Interrupts management
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*
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@verbatim
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==============================================================================
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##### Interrupts management #####
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@ -2066,8 +2073,8 @@ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
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*/
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/** @defgroup CAN_Exported_Functions_Group5 Callback functions
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* @brief CAN Callback functions
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*
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* @brief CAN Callback functions
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*
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@verbatim
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==============================================================================
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##### Callback functions #####
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@ -2316,8 +2323,8 @@ __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan)
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*/
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/** @defgroup CAN_Exported_Functions_Group6 Peripheral State and Error functions
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* @brief CAN Peripheral State functions
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*
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* @brief CAN Peripheral State functions
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*
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@verbatim
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==============================================================================
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##### Peripheral State and Error functions #####
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