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version13

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version 11/12 auch noch
This commit is contained in:
pique_n
2025-05-23 11:44:24 +02:00
parent ec01320c33
commit b98c372f7e
71 changed files with 13172 additions and 16350 deletions
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22
Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h
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@ -70,7 +70,7 @@ static const uint8_t CHANNEL_OFFSET_TAB[] =
#define DMA_CSELR_OFFSET (uint32_t)(DMA1_CSELR_BASE - DMA1_BASE)
/* Defines used for the bit position in the register and perform offsets */
#define DMA_POSITION_CSELR_CXS POSITION_VAL(DMA_CSELR_C1S << (Channel*4U))
#define DMA_POSITION_CSELR_CXS(Channel) POSITION_VAL(DMA_CSELR_C1S << (((Channel)*4U) & 0x1FU))
/**
* @}
*/
@ -593,7 +593,7 @@ __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Cha
{
uint32_t dma_base_addr = (uint32_t)DMAx;
return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR,
DMA_CCR_EN) == (DMA_CCR_EN)) ? 1UL : 0UL);
DMA_CCR_EN) == (DMA_CCR_EN)) ? 1UL : 0UL);
}
/**
@ -752,8 +752,8 @@ __STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Channel)
*/
__STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcIncMode)
{
uint32_t dma_base_addr = (uint32_t)DMAx;
MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_PINC,
uint32_t dma_base_addr = (uint32_t)DMAx;
MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_PINC,
PeriphOrM2MSrcIncMode);
}
@ -848,7 +848,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Cha
__STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcDataSize)
{
uint32_t dma_base_addr = (uint32_t)DMAx;
MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_PSIZE,
MODIFY_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_PSIZE,
PeriphOrM2MSrcDataSize);
}
@ -1512,7 +1512,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Cha
__STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphRequest)
{
MODIFY_REG(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR,
DMA_CSELR_C1S << ((Channel) * 4U), PeriphRequest << DMA_POSITION_CSELR_CXS);
DMA_CSELR_C1S << (((Channel) * 4U) & 0x1FU), PeriphRequest << DMA_POSITION_CSELR_CXS(Channel));
}
/**
@ -1546,7 +1546,7 @@ __STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel
__STATIC_INLINE uint32_t LL_DMA_GetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel)
{
return (READ_BIT(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR,
DMA_CSELR_C1S << ((Channel) * 4U)) >> DMA_POSITION_CSELR_CXS);
DMA_CSELR_C1S << ((Channel) * 4U)) >> DMA_POSITION_CSELR_CXS(Channel));
}
#endif /* DMAMUX1 */
@ -2225,7 +2225,7 @@ __STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx)
*/
__STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
{
uint32_t dma_base_addr = (uint32_t)DMAx;
uint32_t dma_base_addr = (uint32_t)DMAx;
SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TCIE);
}
@ -2347,7 +2347,7 @@ __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TC(DMA_TypeDef *DMAx, uint32_t Chann
{
uint32_t dma_base_addr = (uint32_t)DMAx;
return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR,
DMA_CCR_TCIE) == (DMA_CCR_TCIE)) ? 1UL : 0UL);
DMA_CCR_TCIE) == (DMA_CCR_TCIE)) ? 1UL : 0UL);
}
/**
@ -2368,7 +2368,7 @@ __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_HT(DMA_TypeDef *DMAx, uint32_t Chann
{
uint32_t dma_base_addr = (uint32_t)DMAx;
return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR,
DMA_CCR_HTIE) == (DMA_CCR_HTIE)) ? 1UL : 0UL);
DMA_CCR_HTIE) == (DMA_CCR_HTIE)) ? 1UL : 0UL);
}
/**
@ -2389,7 +2389,7 @@ __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TE(DMA_TypeDef *DMAx, uint32_t Chann
{
uint32_t dma_base_addr = (uint32_t)DMAx;
return ((READ_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR,
DMA_CCR_TEIE) == (DMA_CCR_TEIE)) ? 1UL : 0UL);
DMA_CCR_TEIE) == (DMA_CCR_TEIE)) ? 1UL : 0UL);
}
/**