DEVEL: Added testbench for stream 3 (trigger mask mode)
This commit is contained in:
Oliver Bruendler
@ -76,6 +76,7 @@ add_sources "../tb" {
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psi_ms_daq/psi_ms_daq_tb_str0_pkg.vhd \
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psi_ms_daq/psi_ms_daq_tb_str1_pkg.vhd \
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psi_ms_daq/psi_ms_daq_tb_str2_pkg.vhd \
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psi_ms_daq/psi_ms_daq_tb_str3_pkg.vhd \
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psi_ms_daq/psi_ms_daq_tb.vhd \
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} -tag tb
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@ -23,6 +23,7 @@ library work;
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use work.psi_ms_daq_tb_str0_pkg.all;
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use work.psi_ms_daq_tb_str1_pkg.all;
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use work.psi_ms_daq_tb_str2_pkg.all;
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use work.psi_ms_daq_tb_str3_pkg.all;
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------------------------------------------------------------
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@ -82,6 +83,7 @@ architecture sim of psi_ms_daq_tb is
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when 0 => Str0Handler(clk, rqst, rsp);
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when 1 => Str1Handler(clk, rqst, rsp);
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when 2 => Str2Handler(clk, rqst, rsp);
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when 3 => Str3Handler(clk, rqst, rsp);
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when others => null;
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end case;
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end if;
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@ -193,17 +195,6 @@ begin
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wait;
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end process;
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end generate;
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------------------------------------------------------------
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-- TBD
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------------------------------------------------------------
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-- No influence when disabled
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-- Disable / re-enable
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-- Disable during transfer
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-- Version register!
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-- RINGBUF (OK), LINEAR (ONGOING)
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-- OVERWRITE (ONGOING), STOP (OK)
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-- Mode: CONTINUOUS (OK), SINGLE(ONGOING), MASK(TODO), MANUAL (OK)
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------------------------------------------------------------
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-- TMEM Process
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@ -213,6 +204,10 @@ begin
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variable Stream1Armed_v : boolean := false;
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variable Stream2Armed_v : boolean := false;
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begin
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print("*** Info ***");
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print("This testbench does not print any status information by default (only errors).");
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print("To change this behavior, change the constant PrintDefault_c in psi_ms_daq_tb_pkg.");
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wait for 1 us;
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Tmem_Rst <= '0';
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Smem_Rst <= '0';
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@ -225,6 +220,7 @@ begin
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Str0Setup(Tosca_Clk, TmemAcq, AcqTmem);
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Str1Setup(Tosca_Clk, TmemAcq, AcqTmem);
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Str2Setup(Tosca_Clk, TmemAcq, AcqTmem);
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Str3Setup(Tosca_Clk, TmemAcq, AcqTmem);
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-- Enable
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TmemWriteAndRead32(16#0000#, 16#0101#, Tosca_Clk, TmemAcq, AcqTmem);
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@ -242,6 +238,7 @@ begin
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Str0Update(Tosca_Clk, TmemAcq, AcqTmem);
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Str1Update(Tosca_Clk, TmemAcq, AcqTmem);
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Str2Update(Tosca_Clk, TmemAcq, AcqTmem);
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Str3Update(Tosca_Clk, TmemAcq, AcqTmem);
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end loop;
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TbRunning <= false;
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@ -249,7 +246,8 @@ begin
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-- *** Check end state ***
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assert Str0WinCheck >= 4 report "###ERROR###: Stream 0 checks not completed" severity error;
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assert Str1WinCheck = 1 report "###ERROR###: Stream 1 checks not completed" severity error;
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assert Str2WinCheck = 2 report "###ERROR###: Stream 2 checks not completed " & to_string(Str2WinCheck) severity error;
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assert Str2WinCheck = 2 report "###ERROR###: Stream 2 checks not completed" severity error;
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assert Str3WinCheck = 2 report "###ERROR###: Stream 3 checks not completed" severity error;
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wait;
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end process;
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@ -292,6 +290,12 @@ begin
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wait;
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end process;
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p_str3 : process
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begin
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Str3Data(Str_Clk(3), Str_Vld(3), Str_Trig(3), Str3_Data);
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wait;
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end process;
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------------------------------------------------------------
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-- Check Process
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------------------------------------------------------------
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@ -26,7 +26,7 @@ package psi_ms_daq_tb_pkg is
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signal Memory : t_aslv8(0 to MemSize_c-1);
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constant MaxWindows_c : integer := 16;
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constant PrintDefault_c : boolean := true;
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constant PrintDefault_c : boolean := false;
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--------------------------------------------------------
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-- Register MAP
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@ -45,6 +45,7 @@ package psi_ms_daq_tb_str0_pkg is
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shared variable Str0WinCheck : integer := 0;
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shared variable Str0LastTs : integer;
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shared variable Str0IrqOn : boolean := false;
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shared variable Str0Disabled : boolean := false;
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--------------------------------------------------------
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-- Data Generation
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@ -129,85 +130,91 @@ package body psi_ms_daq_tb_str0_pkg is
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HlGetCurWin(0, clk, rqst, rsp, curwin);
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print("CURWIN: " & to_string(curwin), PrintStr0_c);
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print("", PrintStr0_c);
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while Str0NextWin /= curwin loop
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print("*** Window " & to_string(Str0NextWin) & " / Number: " & to_string(Str0WinCheck) & " ***", PrintStr0_c);
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HlGetWinCnt(0, Str0NextWin, clk, rqst, rsp, wincnt);
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print("WINCNT: " & to_string(wincnt), PrintStr0_c);
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HlClrWinCnt(0, Str0NextWin, clk, rqst, rsp);
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HlGetWinLast(0, Str0NextWin, clk, rqst, rsp, winlast);
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print("WINLAST: " & to_string(winlast), PrintStr0_c);
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HlGetTsLo(0, Str0NextWin, clk, rqst, rsp, tslo);
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print("WINTSLO: " & to_string(tslo), PrintStr0_c);
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HlGetTsHi(0, Str0NextWin, clk, rqst, rsp, v);
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print("WINTSHI: " & to_string(v), PrintStr0_c);
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winstart := Str0BufStart_c + Str0NextWin*Str0WinSize_c;
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winend := winstart + Str0WinSize_c - 1;
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case Str0WinCheck is
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when 0 =>
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-- Windows full because dat received for quite some time
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IntCompare(Str0WinSize_c, wincnt, "WINCNT wrong");
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-- Check Values
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addr := winlast;
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for i in 256+30+3-99 to 256+30+3 loop
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if addr = winend then
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addr := winstart;
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else
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addr := addr + 1;
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end if;
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StdlvCompareInt (i mod 256, Memory(addr), "Wrong value at 0x" & to_hstring(to_unsigned(addr,32)), false);
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end loop;
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when 1 =>
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-- Trigger following each other with 30 samples difference
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IntCompare(30, wincnt, "WINCNT wrong");
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IntCompare(30*2, tslo-Str0LastTs, "TS difference wrong");
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-- Check Values
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addr := winstart;
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for i in 34 to 63 loop
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StdlvCompareInt (i, Memory(addr), "Wrong value", false);
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addr := addr + 1; -- does never wrap
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end loop;
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when 2 =>
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-- Trigger following each other with 30 samples difference
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IntCompare(30, wincnt, "WINCNT wrong");
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IntCompare(30*2, tslo-Str0LastTs, "TS difference wrong");
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-- Check Values
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addr := winstart;
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for i in 64 to 93 loop
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StdlvCompareInt (i, Memory(addr), "Wrong value", false);
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addr := addr + 1; -- does never wrap
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end loop;
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when 3 =>
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-- Full buffer recorded after emptying first buffer
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IntCompare(100, wincnt, "WINCNT wrong");
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IntCompare((256-2*30)*2, tslo-Str0LastTs, "TS difference wrong");
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-- Disable stream IRQ
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TmemRead32(REG_CONF_IRQENA_ADDR, v, clk, rqst, rsp);
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v := IntAnd(v, 16#0FE#);
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TmemWrite32(REG_CONF_IRQENA_ADDR, v, clk, rqst, rsp);
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TmemRead32(REG_CONF_STRENA_ADDR, v, clk, rqst, rsp);
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v := IntAnd(v, 16#0FE#);
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TmemWrite32(REG_CONF_STRENA_ADDR, v, clk, rqst, rsp);
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-- Check Values
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addr := winlast + 1;
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for i in 256+30+3-99 to 256+30+3 loop
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StdlvCompareInt (i mod 256, Memory(addr), "Wrong value", false);
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if addr = winend then
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addr := winstart;
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else
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addr := addr + 1;
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end if;
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end loop;
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when others => null;
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end case;
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if Str0Disabled then
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print("Skipped, stream disabled", PrintStr0_c);
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print("", PrintStr0_c);
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Str0LastTs := tslo;
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Str0NextWin := (Str0NextWin + 1) mod 3;
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Str0WinCheck := Str0WinCheck + 1;
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end loop;
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else
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while Str0NextWin /= curwin loop
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print("*** Window " & to_string(Str0NextWin) & " / Number: " & to_string(Str0WinCheck) & " ***", PrintStr0_c);
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HlGetWinCnt(0, Str0NextWin, clk, rqst, rsp, wincnt);
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print("WINCNT: " & to_string(wincnt), PrintStr0_c);
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HlClrWinCnt(0, Str0NextWin, clk, rqst, rsp);
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HlGetWinLast(0, Str0NextWin, clk, rqst, rsp, winlast);
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print("WINLAST: " & to_string(winlast), PrintStr0_c);
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HlGetTsLo(0, Str0NextWin, clk, rqst, rsp, tslo);
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print("WINTSLO: " & to_string(tslo), PrintStr0_c);
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HlGetTsHi(0, Str0NextWin, clk, rqst, rsp, v);
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print("WINTSHI: " & to_string(v), PrintStr0_c);
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winstart := Str0BufStart_c + Str0NextWin*Str0WinSize_c;
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winend := winstart + Str0WinSize_c - 1;
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case Str0WinCheck is
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when 0 =>
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-- Windows full because dat received for quite some time
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IntCompare(Str0WinSize_c, wincnt, "WINCNT wrong");
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-- Check Values
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addr := winlast;
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for i in 256+30+3-99 to 256+30+3 loop
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if addr = winend then
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addr := winstart;
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else
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addr := addr + 1;
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end if;
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StdlvCompareInt (i mod 256, Memory(addr), "Wrong value at 0x" & to_hstring(to_unsigned(addr,32)), false);
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end loop;
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when 1 =>
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-- Trigger following each other with 30 samples difference
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IntCompare(30, wincnt, "WINCNT wrong");
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IntCompare(30*2, tslo-Str0LastTs, "TS difference wrong");
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-- Check Values
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addr := winstart;
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for i in 34 to 63 loop
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StdlvCompareInt (i, Memory(addr), "Wrong value", false);
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addr := addr + 1; -- does never wrap
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end loop;
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when 2 =>
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-- Trigger following each other with 30 samples difference
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IntCompare(30, wincnt, "WINCNT wrong");
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IntCompare(30*2, tslo-Str0LastTs, "TS difference wrong");
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-- Check Values
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addr := winstart;
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for i in 64 to 93 loop
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StdlvCompareInt (i, Memory(addr), "Wrong value", false);
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addr := addr + 1; -- does never wrap
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end loop;
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when 3 =>
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-- Full buffer recorded after emptying first buffer
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IntCompare(100, wincnt, "WINCNT wrong");
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IntCompare((256-2*30)*2, tslo-Str0LastTs, "TS difference wrong");
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-- Disable stream IRQ
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TmemRead32(REG_CONF_IRQENA_ADDR, v, clk, rqst, rsp);
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v := IntAnd(v, 16#0FE#);
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TmemWrite32(REG_CONF_IRQENA_ADDR, v, clk, rqst, rsp);
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TmemRead32(REG_CONF_STRENA_ADDR, v, clk, rqst, rsp);
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v := IntAnd(v, 16#0FE#);
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TmemWrite32(REG_CONF_STRENA_ADDR, v, clk, rqst, rsp);
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Str0Disabled := true;
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-- Check Values
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addr := winlast + 1;
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for i in 256+30+3-99 to 256+30+3 loop
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StdlvCompareInt (i mod 256, Memory(addr), "Wrong value", false);
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if addr = winend then
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addr := winstart;
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else
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addr := addr + 1;
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end if;
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end loop;
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when others => null;
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end case;
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print("", PrintStr0_c);
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Str0LastTs := tslo;
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Str0NextWin := (Str0NextWin + 1) mod 3;
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Str0WinCheck := Str0WinCheck + 1;
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end loop;
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end if;
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end procedure;
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--------------------------------------------------------
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@ -42,6 +42,7 @@ package psi_ms_daq_tb_str2_pkg is
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shared variable Str2SplCnt : integer := 0;
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shared variable Str2WinCheck : integer := 0;
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shared variable Str2ExpFrame : integer := 0;
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shared variable Stream2Armed_v : boolean := false;
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--------------------------------------------------------
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-- Data Generation
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@ -180,7 +181,6 @@ package body psi_ms_daq_tb_str2_pkg is
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procedure Str2Update( signal clk : in std_logic;
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signal rqst : out TmemRqst_t;
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signal rsp : in TmemResp_t) is
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variable Stream2Armed_v : boolean := false;
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begin
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-- ARM Stream 2 after 3 bursts
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if ((Str2FrameCnt = 2) or (Str2FrameCnt = 12)) and
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213
tb/psi_ms_daq/psi_ms_daq_tb_str3_pkg.vhd
Normal file
213
tb/psi_ms_daq/psi_ms_daq_tb_str3_pkg.vhd
Normal file
@ -0,0 +1,213 @@
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------------------------------------------------------------
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-- Description
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------------------------------------------------------------
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------------------------------------------------------------
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-- Libraries
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------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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library work;
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use work.psi_common_math_pkg.all;
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use work.psi_common_array_pkg.all;
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use work.psi_ms_daq_pkg.all;
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library work;
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use work.psi_tb_txt_util.all;
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use work.psi_tb_compare_pkg.all;
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use work.psi_ms_daq_tb_pkg.all;
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------------------------------------------------------------
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-- Package Header
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------------------------------------------------------------
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package psi_ms_daq_tb_str3_pkg is
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constant PrintStr3_c : boolean := PrintDefault_c;
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-- Memory
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constant Str3BufStart_c : integer := 16#4000#;
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constant Str3WinSize_c : integer := 1024;
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constant Str3Windows_c : integer := 3;
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constant Str3PostTrig_c : integer := 9;
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constant Str3TrigPos_c : integer := 100;
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alias Memory3 : t_aslv8(0 to Str3WinSize_c*Str3Windows_c) is Memory(Str3BufStart_c to Str3BufStart_c+Str3WinSize_c*Str3Windows_c);
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--------------------------------------------------------
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-- Persistent State
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--------------------------------------------------------
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shared variable Str3ExpFrame : integer := 0;
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shared variable Str3FrameCnt : integer := 0;
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shared variable Str3SplCnt : integer := 0;
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shared variable Str3WinCheck : integer := 0;
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shared variable Stream3Armed_v : boolean := false;
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--------------------------------------------------------
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-- Data Generation
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--------------------------------------------------------
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procedure Str3Data( signal clk : in std_logic;
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signal vld : out std_logic;
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signal trig : out std_logic;
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signal data : out std_logic_vector(31 downto 0));
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--------------------------------------------------------
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-- IRQ Handler
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--------------------------------------------------------
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procedure Str3Handler( signal clk : in std_logic;
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signal rqst : out TmemRqst_t;
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signal rsp : in TmemResp_t);
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--------------------------------------------------------
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-- Setup
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--------------------------------------------------------
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procedure Str3Setup( signal clk : in std_logic;
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signal rqst : out TmemRqst_t;
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signal rsp : in TmemResp_t);
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--------------------------------------------------------
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-- Update
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--------------------------------------------------------
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procedure Str3Update( signal clk : in std_logic;
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signal rqst : out TmemRqst_t;
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signal rsp : in TmemResp_t);
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end package;
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------------------------------------------------------------
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-- Package Body
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------------------------------------------------------------
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package body psi_ms_daq_tb_str3_pkg is
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--------------------------------------------------------
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-- Data Generation
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--------------------------------------------------------
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procedure Str3Data( signal clk : in std_logic;
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signal vld : out std_logic;
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signal trig : out std_logic;
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signal data : out std_logic_vector(31 downto 0)) is
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begin
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while now < 8 us loop
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wait until rising_edge(clk);
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end loop;
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for i in 0 to 9 loop
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vld <= '1';
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Str3SplCnt := 0;
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for k in 0 to 999 loop
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data <= std_logic_vector(to_unsigned(Str3FrameCnt*2**16+Str3SplCnt, 32));
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if Str3SplCnt = Str3TrigPos_c then
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trig <= '1';
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else
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trig <= '0';
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end if;
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Str3SplCnt := Str3SplCnt + 1;
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wait until rising_edge(clk);
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end loop;
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Str3FrameCnt := Str3FrameCnt + 1;
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vld <= '0';
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wait for 1 us;
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wait until rising_edge(clk);
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end loop;
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end procedure;
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--------------------------------------------------------
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-- IRQ Handler
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--------------------------------------------------------
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procedure Str3Handler( signal clk : in std_logic;
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signal rqst : out TmemRqst_t;
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signal rsp : in TmemResp_t) is
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variable v : integer;
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variable curwin : integer;
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variable wincnt : integer;
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variable winlast : integer;
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variable spladdr : integer;
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variable splNr : integer;
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variable valRead : unsigned(15 downto 0);
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variable splInWin : integer;
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variable isRecording : boolean;
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begin
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print("------------ Stream 3 Handler ------------", PrintStr3_c);
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HlGetMaxLvl(3, clk, rqst, rsp, v);
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print("MAXLVL: " & to_string(v), PrintStr3_c);
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HlGetPtr(3, clk, rqst, rsp, v);
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print("PTR: " & to_string(v), PrintStr3_c);
|
||||
HlGetCurWin(3, clk, rqst, rsp, curwin);
|
||||
print("CURWIN: " & to_string(curwin), PrintStr3_c);
|
||||
-- Calculate window to read
|
||||
if curwin = 0 then
|
||||
curwin := Str3Windows_c-1;
|
||||
else
|
||||
curwin := curwin-1;
|
||||
end if;
|
||||
-- Check Data from this frame
|
||||
splNr := Str3TrigPos_c+Str3PostTrig_c;
|
||||
-- Read window data (Post-Trigger, from this window)
|
||||
print("check post-trigger", PrintStr3_c);
|
||||
HlGetWinLast(3, curwin, clk, rqst, rsp, winlast);
|
||||
print("WINLAST: " & to_string(winlast), PrintStr3_c);
|
||||
spladdr := winlast;
|
||||
while splNr >= 0 loop
|
||||
StdlvCompareInt(splNr, Memory(spladdr+1) & Memory(spladdr), "Sample " & to_string(Str3ExpFrame) & ":" & to_string(splNr) & " wrong CNT", false);
|
||||
StdlvCompareInt(Str3ExpFrame, Memory(spladdr+3) & Memory(spladdr+2), "Sample " & to_string(Str3ExpFrame) & ":" & to_string(splNr) & " wrong FRAME", false);
|
||||
-- Wraparound
|
||||
if spladdr = Str3BufStart_c+curwin*Str3WinSize_c then
|
||||
spladdr := Str3BufStart_c+(curwin+1)*Str3WinSize_c-4;
|
||||
-- Normal Counting
|
||||
else
|
||||
spladdr := spladdr - 4;
|
||||
end if;
|
||||
splNr := splNr - 1;
|
||||
end loop;
|
||||
-- Read window data (Pre-Trigger, from last window)
|
||||
print("check pre-trigger", PrintStr3_c);
|
||||
splNr := 999;
|
||||
while spladdr /= winlast loop
|
||||
StdlvCompareInt(splNr, Memory(spladdr+1) & Memory(spladdr), "Sample " & to_string(Str3ExpFrame-1) & ":" & to_string(splNr) & " wrong CNT", false);
|
||||
StdlvCompareInt(Str3ExpFrame-1, Memory(spladdr+3) & Memory(spladdr+2), "Sample " & to_string(Str3ExpFrame-1) & ":" & to_string(splNr) & " wrong FRAME", false);
|
||||
-- Wraparound
|
||||
if spladdr = Str3BufStart_c+curwin*Str3WinSize_c then
|
||||
spladdr := Str3BufStart_c+(curwin+1)*Str3WinSize_c-4;
|
||||
-- Normal Counting
|
||||
else
|
||||
spladdr := spladdr - 4;
|
||||
end if;
|
||||
splNr := splNr - 1;
|
||||
end loop;
|
||||
|
||||
Str3WinCheck := Str3WinCheck + 1;
|
||||
print("", PrintStr3_c);
|
||||
end procedure;
|
||||
|
||||
--------------------------------------------------------
|
||||
-- Setup
|
||||
--------------------------------------------------------
|
||||
procedure Str3Setup( signal clk : in std_logic;
|
||||
signal rqst : out TmemRqst_t;
|
||||
signal rsp : in TmemResp_t) is
|
||||
begin
|
||||
HlCheckMaxLvl(3, 0, clk, rqst, rsp);
|
||||
HlSetPostTrig(3, Str3PostTrig_c, clk, rqst, rsp);
|
||||
HlSetMode(3, VAL_MODE_RECM_TRIGMASK, clk, rqst, rsp);
|
||||
HlConfStream( str => 3, bufstart => Str3BufStart_c, ringbuf => true, overwrite => true, wincnt => Str3Windows_c, winsize => Str3WinSize_c,
|
||||
clk => clk, rqst => rqst, rsp => rsp);
|
||||
end procedure;
|
||||
|
||||
--------------------------------------------------------
|
||||
-- Update
|
||||
--------------------------------------------------------
|
||||
procedure Str3Update( signal clk : in std_logic;
|
||||
signal rqst : out TmemRqst_t;
|
||||
signal rsp : in TmemResp_t) is
|
||||
begin
|
||||
if ((Str3FrameCnt = 2) or (Str3FrameCnt = 7))
|
||||
and not Stream3Armed_v then
|
||||
HlSetMode(3, VAL_MODE_RECM_TRIGMASK + VAL_MODE_ARM, clk, rqst, rsp);
|
||||
Stream3Armed_v := true;
|
||||
Str3ExpFrame := Str3FrameCnt;
|
||||
elsif Str3FrameCnt = 6 then
|
||||
Stream3Armed_v := false;
|
||||
end if;
|
||||
end procedure;
|
||||
|
||||
end;
|
||||
Reference in New Issue
Block a user