Add robustness to comma-detection and reset generation.

This patch addresses issues I occasionally observed:

a) I have seen occurrences when the GTX deasserts RXBYTEISALIGNED
   while the RXLOSSOFSYNC is *not* asserted.

   The comma-alignment state machine can be stuck in 'idle' believing
   all is well when in fact RXBYTEISALIGNED is deasserted.

   The proposed patch monitors RXBYTEISALIGNED in addition to
   RXLOSSOFSYNC in 'idle' state.

b) The synchronizer (inst_cdc_fast_stat) which takes the pulse
   width/delay to the EVR clock domain relies on a proper
   reset sequence for correct operation.

   It is possible, however, that the 'evr_clk' (which is generated
   from the recovered RX clock) is not ticking at all when 'xuser_RESET'
   resets said synchronizer. If e.g., there is no GTX reference clock
   present (because it requires i2c initialization which is performed
   later) then the EVR clock may not be ticking and prevent the
   destination side of the synchronizer from being reset. This
   has the consequence of 'width' and 'delay' *never* being
   updated.

   The proposed patch asserts the synchronizer reset while the RX PLL
   and/or MMCM are not locked.
This commit is contained in:
till straumann
2021-02-24 14:03:16 +01:00
parent df8522473d
commit d135fbddca
2 changed files with 10 additions and 2 deletions

View File

@ -341,13 +341,21 @@ begin
signal usr_evt_shaped_s : std_logic_vector(4 downto 0);
signal usr_events_adj_s : std_logic_vector(4 downto 0);
signal usr_events_concat_s : std_logic_vector(4 downto 0);
signal mmcm_locked : std_logic;
signal rxpll_locked : std_logic;
signal evr_rst_in : std_logic;
begin
rxpll_locked <= mgt_status(1);
mmcm_locked <= mgt_status(2);
evr_rst_in <= xuser_RESET or (not rxpll_locked) or (not mmcm_locked);
--*** double stage sync for reset ***--
proc_rst : process(clk_evr)
begin
if rising_edge(clk_evr) then
rst0_s <= xuser_RESET;
rst0_s <= evr_rst_in;
rst1_s <= rst0_s;
end if;
end process;

View File

@ -260,7 +260,7 @@ begin
else
case s_align_fsm is
when align_idle =>
if o_mgt.rx.RXLOSSOFSYNC( 1) = '1' then
if o_mgt.rx.RXLOSSOFSYNC( 1) = '1' or o_mgt.rx.RXBYTEISALIGNED = '0' then
s_align_fsm <= align_slide;
end if;
when align_slide =>