AEK_8220_Libraries/firmware_vhdl_evr320
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2018-06-08 11:25:56 +02:00
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46
README.md
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@ -1,41 +1,41 @@
## General Information
The EVR320 Embedded Event Receiver (EEVR) is able to connect with a MRF Timing System.
# General Information
The EVR320 Embedded Event Receiver (EEVR) is able to connect with a MRF Timing System.
Mainly the EEVR is used to decode configurable events and use them in firmware as triggers.
## Maintainer
Patric Bucher [patric.bucher@psi.ch]
Patric Bucher [patric.bucher@psi.ch]
## Authors
Waldemar Koprek [waldemar.koprek@psi.ch]
Goran Marinkovic [goran.marinkovic@psi.ch]
Patric Bucher [patric.bucher@psi.ch]
Waldemar Koprek [waldemar.koprek@psi.ch]
Goran Marinkovic [goran.marinkovic@psi.ch]
Patric Bucher [patric.bucher@psi.ch]
## Documentation
See [EVR320 Documentation](doc/evr320.pdf "doc/evr320.pdf")
See [EVR320 Documentation](doc/evr320.pdf "doc/evr320.pdf")
## Changelog
See [Changelog](Changelog.md)
See [Changelog](Changelog.md)
## What belongs into this Library
All components and wrappers to connect various buses (AXI4, TOSCA-II, ..) and to use on different Xilinx FPGA's.
All components and wrappers to connect various buses (AXI4, TOSCA-II, ..) and to use on different Xilinx FPGA's.
Examples for things that belong into this library:
- Event Decoder / Core Functionality
- Different MGT types
Examples for things that belong into this library:
* Event Decoder / Core Functionality
* Different MGT types
Examples for things that do not belong into this library:
* Vivado IP Packager related files -> belong to separate git repo
Examples for things that do not belong into this library:
- Vivado IP Packager related files -> belong to separate git repo
## Dependencies
### Library
* Libraries/TCL/PsiSim
* Libraries/BoardSupport/ifc1210/tosca2 (with tosca2 only)
### Synthesis
- none
### Simulation
- Libraries/TCL/PsiSim
### with IFC1210 Bindings
- Libraries/BoardSupport/ifc1210/tosca2

66
hdl/evr320_ifc1210_wrapper.vhd
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@ -6,14 +6,16 @@
-- ---------------------------------------------------------------------------
-- Copyright© PSI, Section DSV
-- ---------------------------------------------------------------------------
-- Comment :
-- Comment : Wraps evr320 decoder together with GTX component and TMEM registers.
-- ---------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.math_real.all;
use work.tosca2_glb_pkg.all;
library tosca2;
use tosca2.tosca2_glb_pkg.all;
use work.evr320_pkg.all;
use work.pkg_v6vlx_gtxe1.all;
@ -69,11 +71,9 @@ architecture rtl of evr320_ifc1210_wrapper is
-- --------------------------------------------------------------------------
-- Parameters
-- --------------------------------------------------------------------------
-- constant c_BYTE : integer := 8;
constant c_TOSCA2_DATA_WIDTH : integer := 64;
-- constant c_EVR_REG64_COUNT : integer := 16;
-- constant c_EVR_MEM_SIZE : integer := 16384;
-- constant c_EVR_ADDR_WIDTH : integer := integer(ceil(log2(real(c_EVR_MEM_SIZE/(c_TOSCA2_DATA_WIDTH/c_BYTE)))));
constant c_EVR_REG64_COUNT : integer := 16; -- unused, only documentation
constant c_EVR_MEM_SIZE : integer := 16384; -- unused, only documentation
-- --------------------------------------------------------------------------
@ -83,21 +83,13 @@ architecture rtl of evr320_ifc1210_wrapper is
--signal clk_evr_monitor : std_logic; -- for debugging
signal rst_evr : std_logic;
signal mgt_control : std_logic_vector(31 downto 0) := (others => '0');
signal mgt_control_sync : std_logic_vector(31 downto 0) := (others => '0');
signal mgt_control_sync2 : std_logic_vector(31 downto 0) := (others => '0');
signal mgt_sfp_los : std_logic := '0';
signal mgt_sfp_los_sync : std_logic := '0';
signal mgt_control : std_logic_vector(31 downto 0) := (others => '0');
signal mgt_status : std_logic_vector(31 downto 0);
signal mgt_rx_data : std_logic_vector(15 downto 0);
signal mgt_rx_charisk : std_logic_vector( 1 downto 0);
signal mgt_lossofsync : std_logic;
signal mgt_reset_tmem_evr : std_logic; -- for legacy reasons, ifc1210 mgt control is in tmem_psi_generic part
signal mgt_reset_tmem_evr_sync1 : std_logic := '0';
signal mgt_reset_tmem_evr_sync2 : std_logic := '0';
signal mem_clk : std_logic;
signal mem_addr_evr : std_logic_vector(11 downto 0);
@ -105,8 +97,12 @@ architecture rtl of evr320_ifc1210_wrapper is
signal mem_data : std_logic_vector(c_TOSCA2_DATA_WIDTH-1 downto 0);
signal evr_params : typ_evr320_params;
signal evr_params_sync : typ_evr320_params;
signal evr_params_xuser : typ_evr320_params;
signal event_recorder_status : typ_evt_rec_status;
signal event_recorder_control : typ_evt_rec_ctrl;
signal event_recorder_control_sync : typ_evt_rec_ctrl;
signal event_recorder_control_xuser : typ_evt_rec_ctrl;
signal evr_counter_rst : std_logic_vector( 2 downto 0) := (others => '0');
signal evr_clk_counter : std_logic_vector(31 downto 0) := (others => '0');
@ -142,33 +138,23 @@ begin
mgt_control( 4 downto 1) <= mgt_control_i( 4 downto 1);
mgt_control(c_RXCDRRESET) <= mgt_control_i(c_RXCDRRESET);
mgt_control(31 downto 6) <= mgt_control_i(31 downto 6);
-- --------------------------------------------------------------------------
-- Synchronisation to EVR Clock
-- --------------------------------------------------------------------------
-- prc_sync_evr: process(clk_evr)
-- begin
-- if rising_edge(clk_evr) then
-- ---
-- -- mgt_sfp_los_sync <= mgt_sfp_los_i;
-- -- mgt_sfp_los <= mgt_sfp_los_sync;
-- ---
-- -- mgt_control_sync <= mgt_control_i;
-- -- mgt_control_sync2 <= mgt_control_sync;
-- ---
-- -- mgt_reset_tmem_evr_sync1 <= mgt_reset_tmem_evr;
-- -- mgt_reset_tmem_evr_sync2 <= mgt_reset_tmem_evr_sync1;
-- ---
-- -- evr_params and event_recorder_control add sync here or in evr320_decoder
-- ---
-- -- mgt_control(c_GTXRESET) <= mgt_control_sync2(c_GTXRESET);
-- -- -- mgt_control(c_GTXRESET) <= mgt_control_sync2(c_GTXRESET) or mgt_sfp_los or mgt_reset_tmem_evr_sync2;
-- -- mgt_control( 4 downto 1) <= mgt_control_sync2( 4 downto 1);
-- -- mgt_control(c_RXCDRRESET) <= mgt_control_sync2(c_RXCDRRESET);
-- -- mgt_control(31 downto 6) <= mgt_control_sync2(31 downto 6);
-- ---
-- end if;
-- end process;
prc_sync_evr: process(clk_evr)
begin
if rising_edge(clk_evr) then
---
evr_params_sync <= evr_params_xuser;
evr_params <= evr_params_sync;
---
event_recorder_control_sync <= event_recorder_control_xuser;
event_recorder_control <= event_recorder_control_sync;
---
end if;
end process;
-- --------------------------------------------------------------------------
@ -239,7 +225,7 @@ begin
xuser_TMEM_DATW => xuser_TMEM_DATW,
xuser_TMEM_DATR => xuser_TMEM_DATR,
-- EVR320 Memory/Parameter Interface
evr_params_o => evr_params,
evr_params_o => evr_params_xuser,
evr_frequency_i => evr_frequency,
evr_evt_rec_status_i => event_recorder_status,
evr_evt_rec_control_o => event_recorder_control,

6
hdl/evr320_tmem.vhd
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@ -6,7 +6,7 @@
-- ---------------------------------------------------------------------------
-- Copyright© PSI, Section DSV
-- ---------------------------------------------------------------------------
-- Comment :
-- Comment : TMEM address decoding for register and memory access to evr320.
-- ---------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
@ -14,7 +14,9 @@ use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
use ieee.math_real.all;
use work.tosca2_glb_pkg.all;
library tosca2;
use tosca2.tosca2_glb_pkg.all;
use work.evr320_pkg.all;

26
sim/config.tcl
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@ -1,6 +1,3 @@
#Constants
set LibPath "../../.."
#Import psi::sim library
namespace import psi::sim::*
@ -12,23 +9,24 @@ compile_suppress 135,1236
run_suppress 8684,3479,3813,8009,3812
# EVR320 Library
add_sources $LibPath/VHDL/evr320/hdl {
# EVR320 Decoder
add_sources $LibPath/Libraries/VHDL/evr320/hdl {
evr320_pkg.vhd \
evr320_buffer.vhd \
evr320_dpram.vhd \
evr320_timestamp.vhd \
evr320_decoder.vhd \
} -tag lib
} -tag evr320_decoder
# Lib tosca2 dependecies
add_sources $LibPath/BoardSupport/IFC1210/tosca2/hdl/top_ip/src/ {
tosca2_glb_pkg.vhd \
} -tag tosca2
# Lib ifc1210
add_sources $LibPath/VHDL/evr320/hdl {
# IFC1210 Bindings
add_sources $LibPath/Libraries/VHDL/evr320/hdl {
pkg_v6vlx_gtxe1.vhd \
evr320_tmem.vhd \
evr320_ifc1210_wrapper.vhd \
} -tag ifc1210
} -tag evr320_ifc1210
# tosca2_glb_pkg dependency
add_library tosca2
add_sources $LibPath/Libraries/BoardSupport/IFC1210/tosca2/hdl/top_ip/src {
tosca2_glb_pkg.vhd \
}

19
sim/run.tcl
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@ -1,5 +1,8 @@
# Library Path
set LibPath "../../../../"
#Load dependencies
source ../../../TCL/PsiSim/PsiSim.tcl
source $LibPath/Libraries/TCL/PsiSim/PsiSim.tcl
#Import psi::sim library
namespace import psi::sim::*
@ -10,15 +13,13 @@ init
#Configure
source ./config.tcl
#Run Simulation
# Run Simulation
puts "------------------------------"
puts "-- Compile EVR320 Core"
puts "-- Compile"
puts "------------------------------"
compile_files -tag lib -clean
#puts "------------------------------"
#puts "-- Compile TOSCA2 Bindings"
#puts "------------------------------"
#compile_files -tag tosca2
#compile_files -tag ifc1210
clean_libraries -all
compile_files -tag evr320_decoder
#compile_files -lib tosca2
#compile_files -lib evr320
run_check_errors "###ERROR###"