Files
sf_daq_broker/detector/JF02T09V02.config
2020-10-08 09:04:43 +02:00

93 lines
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detsizechan 1024 4608
hostname JF4M5-01+JF4M5-02+JF4M5-03+JF4M5-04+JF4M5-05+JF4M5-06+JF4M5-07+JF4M5-08+JF4M5-09+
#workaround for 4.0.1 version
reg 7c 0
#sf-daq-4
#rx_udpip 10.30.20.6
#rx_udpmac 9c:dc:71:4d:2a:b4
#sf-daq-8
rx_udpmac b8:83:03:6e:de:9c
rx_udpip 10.30.20.9
0:rx_tcpport 1954
0:rx_udpport 50020
0:detectorip 10.30.20.20
0:detectormac 00:aa:bb:cc:dd:30
0:configuremac 0
1:rx_tcpport 1955
1:rx_udpport 50021
1:detectorip 10.30.20.21
1:detectormac 00:aa:bb:cc:dd:31
1:configuremac 0
2:rx_tcpport 1956
2:rx_udpport 50022
2:detectorip 10.30.20.22
2:detectormac 00:aa:bb:cc:dd:32
2:configuremac 0
3:rx_tcpport 1957
3:rx_udpport 50023
3:detectorip 10.30.20.23
3:detectormac 00:aa:bb:cc:dd:33
3:configuremac 0
4:rx_tcpport 1958
4:rx_udpport 50024
4:detectorip 10.30.20.24
4:detectormac 00:aa:bb:cc:dd:34
4:configuremac 0
5:rx_tcpport 1959
5:rx_udpport 50025
5:detectorip 10.30.20.25
5:detectormac 00:aa:bb:cc:dd:35
5:configuremac 0
6:rx_tcpport 1960
6:rx_udpport 50026
6:detectorip 10.30.20.26
6:detectormac 00:aa:bb:cc:dd:36
6:configuremac 0
7:rx_tcpport 1961
7:rx_udpport 50027
7:detectorip 10.30.20.27
7:detectormac 00:aa:bb:cc:dd:37
7:configuremac 0
8:rx_tcpport 1962
8:rx_udpport 50028
8:detectorip 10.30.20.28
8:detectormac 00:aa:bb:cc:dd:38
8:configuremac 0
# use last two time slots (first 8 is occupied by 16M, but 4p5M will not be running together with full 16M yet). For 100Hz we can use 10 time slots.
# for 40G link (currently bottleneck at daq machines) - 4 modules/slot. With 100G - 8 modules/time slot
0:txndelay_frame 8
1:txndelay_frame 8
2:txndelay_frame 8
3:txndelay_frame 8
4:txndelay_frame 9
5:txndelay_frame 9
6:txndelay_frame 9
7:txndelay_frame 9
8:txndelay_frame 7
cycles 10000
frames 1
timing trigger
delay 0.001989
dac:0 2220
setbit 0x5d 4
# Temperature
temp_threshold 45
temp_control 1
# to clear event : temp_event 0