mirror of
https://github.com/paulscherrerinstitute/sf_daq_broker.git
synced 2026-05-04 13:54:12 +02:00
Dmitry Ozerov
42 lines
667 B
Plaintext
42 lines
667 B
Plaintext
hostname JF1M5B-01+JF1M5B-02+JF1M5B-03+
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detsizechan 1024 1536
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rx_udpmac 98:f2:b3:d4:5f:d0
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rx_udpip 10.30.10.7
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0:rx_udpport 50010
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0:detectorip 10.30.10.10
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0:detectormac 00:aa:bb:cc:dd:33
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0:configuremac 0
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1:rx_udpport 50011
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1:detectorip 10.30.10.11
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1:detectormac 00:aa:bb:cc:dd:44
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1:configuremac 0
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2:rx_udpport 50012
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2:detectorip 10.30.10.12
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2:detectormac 00:aa:bb:cc:dd:55
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2:configuremac 0
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#with more than 4 modules we need time multiplexing.
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0:txndelay_frame 9
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1:txndelay_frame 9
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2:txndelay_frame 9
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#3 modules per 1 ms slot (30Gbit/s max bw)
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delay 0.001990
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timing trigger
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frames 1
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cycles 1000
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powerchip 1
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vhighvoltage 120
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temp_threshold 55
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temp_control 1
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