169 lines
11 KiB
C++
169 lines
11 KiB
C++
// SPDX-FileCopyrightText: 2024 Filip Leonarski, Paul Scherrer Institute <filip.leonarski@psi.ch>
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// SPDX-License-Identifier: GPL-3.0-only
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#include <iostream>
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#include <bitset>
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#include "../common/NetworkAddressConvert.h"
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#include "../fpga/host_library/JungfraujochDevice.h"
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#include <map>
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std::string FIFO_check(uint64_t fifo_register,
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uint16_t pos_empty,
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uint16_t pos_full) {
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if (std::bitset<64>(fifo_register).test(pos_empty))
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return "empty";
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else if (std::bitset<64>(fifo_register).test(pos_full))
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return "full";
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else
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return "partial";
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}
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void FIFO_check(uint64_t fifo_register) {
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std::map<std::string, std::string> fifo_map;
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fifo_map["Frame generator"] = FIFO_check(fifo_register, 24, 25);
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fifo_map["UDP"] = FIFO_check(fifo_register, 6, 7);
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fifo_map["Pre-HBM input (data)"] = FIFO_check(fifo_register, 0, 1);
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fifo_map["Pre-HBM input (cmd)"] = FIFO_check(fifo_register, 2, 3);
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fifo_map["Post-HBM input (data)"] = FIFO_check(fifo_register, 34, 35);
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fifo_map["Post-HBM input (cmd)"] = FIFO_check(fifo_register, 36, 37);
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fifo_map["Processing FIFO (integration -> spot finding)"] = FIFO_check(fifo_register, 4, 5);
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fifo_map["Writer input (data)"] = FIFO_check(fifo_register, 16, 17);
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fifo_map["Writer input (cmd)"] = FIFO_check(fifo_register, 18, 19);
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fifo_map["C2H (data)"] = FIFO_check(fifo_register, 8, 9);
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fifo_map["C2H (cmd)"] = FIFO_check(fifo_register, 10, 11);
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fifo_map["H2C (data)"] = FIFO_check(fifo_register, 20, 21);
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fifo_map["H2C (cmd)"] = FIFO_check(fifo_register, 22, 23);
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fifo_map["HBM completion"] = FIFO_check(fifo_register, 28, 29);
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fifo_map["HBM handles #0"] = FIFO_check(fifo_register, 30, 31);
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fifo_map["HBM handles #1"] = FIFO_check(fifo_register, 32, 33);
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std::cout << "FIFO status" << std::endl;
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for (const auto &[x,y]: fifo_map)
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std::cout << " " << x << ": " << y << std::endl;
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}
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int main(int argc, char **argv) {
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if (argc != 2) {
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std::cout << "Usage: ./jfjoch_pcie_status <device name>" << std::endl;
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exit(EXIT_FAILURE);
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}
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std::cout << "Device " << argv[1] << std::endl;
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std::cout << std::endl;
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try {
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JungfraujochDevice device(argv[1], false);
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auto fpga_status = device.GetDataCollectionStatus();
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auto fpga_env_data = device.GetDeviceStatus();
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auto spot_finder_settings = device.GetSpotFinderParameters();
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auto config = device.GetConfig();
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std::cout << "PCIe/JFJoch card detected " << std::endl;
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std::cout << "PCIe ID " << fpga_env_data.device_number << std::endl;
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std::cout << "Version " << fpga_env_data.fpga_firmware_version << std::endl;
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std::cout << std::endl;
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std::cout << "Git SHA1 " << std::hex << fpga_status.git_sha1 << std::endl;
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std::cout << "Max modules " << std::dec << fpga_status.max_modules << std::endl;
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std::cout << "NUMA node " << device.GetNumaNode() << std::endl;
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if (fpga_status.jfjoch_fpga_variant == JFJOCH_FPGA_VARIANT_100G)
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std::cout << "FPGA variant " << "100G" << std::endl;
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else
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std::cout << "FPGA variant " << "8x10G" << std::endl;
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std::cout << "Ethernet status (*=link) ";
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for (int i = 0; i < fpga_env_data.eth_link_count; i++)
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std::cout << (((fpga_env_data.eth_link_status & (1U<<i)) != 0) ? "*" : "-");
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std::cout << std::endl;
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std::cout << "FPGA serial number " << fpga_env_data.serial_number << std::endl;
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std::cout << "FPGA 12V rail current [A] " << fpga_env_data.fpga_pcie_12V_I_mA / 1000.0 << std::endl;
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std::cout << "FPGA 12V rail voltage [V] " << fpga_env_data.fpga_pcie_12V_V_mV / 1000.0 << std::endl;
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std::cout << "FPGA 3.3V rail current [A] " << fpga_env_data.fpga_pcie_3p3V_I_mA / 1000.0 << std::endl;
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std::cout << "FPGA 3.3V rail voltage [V] " << fpga_env_data.fpga_pcie_3p3V_V_mV / 1000.0 << std::endl;
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std::cout << "FPGA temperature " << fpga_env_data.fpga_temp_C << std::endl;
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std::cout << "HBM temperature #0 " << fpga_env_data.hbm_0_temp_C << std::endl;
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std::cout << "HBM temperature #1 " << fpga_env_data.hbm_1_temp_C << std::endl;
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std::cout << "QSFP cage 0 temperature " << fpga_env_data.qsfp_cage_0_temp_C << std::endl;
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std::cout << "QSFP cage 1 temperature " << fpga_env_data.qsfp_cage_1_temp_C << std::endl;
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std::cout << "PCIe link " << "Gen" << (uint32_t) fpga_env_data.pcie_link_speed
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<< "x" << (uint32_t) fpga_env_data.pcie_link_width << std::endl;
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std::cout << "HBM size (MiB) " << fpga_status.hbm_size_bytes / static_cast<double>(1024 * 1024) << std::endl;
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std::cout << "Data acquisition run count " << fpga_status.run_counter << std::endl;
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std::cout << "Data collection idle " << device.IsIdle() << std::endl;
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std::cout << "Host writer idle " << ((fpga_status.ctrl_reg & (1<<4)) ? 1 : 0) << std::endl;
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std::cout << "Data collection cancel " << ((fpga_status.ctrl_reg & (1<<2)) ? 1 : 0) << std::endl;
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std::cout << "Mailbox status " << std::hex << fpga_env_data.mailbox_status_reg << std::dec << std::endl;
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std::cout << "Mailbox error " << std::hex << fpga_env_data.mailbox_err_reg << std::dec << std::endl;
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std::cout << "Mailbox interrupt status " << std::hex << fpga_env_data.mailbox_interrupt_status << std::dec << std::endl;
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std::cout << "Mailbox interrupt 0 " << ((fpga_status.ctrl_reg & (1<<16)) ? 1 : 0) << std::endl;
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std::cout << "Mailbox interrupt 1 " << ((fpga_status.ctrl_reg & (1<<17)) ? 1 : 0) << std::endl;
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std::cout << "Full status register " << std::bitset<32>(fpga_status.ctrl_reg) << std::endl;
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std::cout << "Work completion FIFO avail " << fpga_env_data.work_compl_fifo_avail << std::endl;
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std::cout << "Active handles " << fpga_env_data.active_handles << std::endl;
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std::cout << "AXI-STREAM beats encountered " << std::endl;
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std::cout << " - before HBM cache " << fpga_status.pipeline_beats_hbm << std::endl;
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std::cout << " - before host mem " << fpga_status.pipeline_beats_host << std::endl;
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std::cout << "Pipeline stalls" << std::endl;
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std::cout << " - before HBM cache " << fpga_status.pipeline_stalls_hbm << std::endl;
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std::cout << " - before host mem " << fpga_status.pipeline_stalls_host << std::endl;
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std::cout << "HBM ignored frames " << fpga_status.hbm_ignored << std::endl;
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std::cout << "Input FIFO count (curr) " << fpga_status.in_fifo_count << std::endl;
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std::cout << "Input FIFO count (max) " << fpga_status.in_fifo_count_max << std::endl;
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std::cout << "Output FIFO count (curr) " << fpga_status.out_fifo_count << std::endl;
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std::cout << "Output FIFO count (max) " << fpga_status.out_fifo_count_max << std::endl;
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std::cout << "ROI count " << fpga_status.fpga_roi_count << std::endl;
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DataCollectionConfig cfg = device.GetConfig();
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std::cout << "MAC address " << MacAddressToStr(device.GetMACAddress()) << std::endl;
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std::cout << "IPv4 address " << IPv4AddressToStr(device.GetIPv4Address()) << std::endl;
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std::cout << "Data collection mode (hex) " << std::hex << (cfg.mode & 0xFFFF) << std::dec << std::endl;
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std::cout << "Data collection ID (hex) " << std::hex << ((cfg.mode & 0xFFFF0000) >> 16) << std::dec << std::endl;
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std::cout << "Modules " << std::dec << cfg.nmodules << std::endl;
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std::cout << "Frames int. pkt. gen. " << std::dec << cfg.nframes << std::endl;
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std::cout << "Pulse ID " << fpga_status.current_pulseid << std::endl;
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std::cout << std::endl;
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std::cout << "Mode config reg. " << std::bitset<32>(config.mode) << std::endl;
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std::cout << "Summation " << config.nsummation + 1 << std::endl;
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std::cout << "Energy keV " << config.energy_kev << std::endl;
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std::cout << std::endl;
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std::cout << "Spot finder settings " << std::endl;
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std::cout << "Count threshold " << spot_finder_settings.count_threshold << std::endl;
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std::cout << "SNR threshold " << spot_finder_settings.snr_threshold / 4.0f << std::endl;
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std::cout << std::endl;
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FIFO_check(fpga_status.fifo_status);
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std::cout << "FIFO ever full " << std::bitset<32>(fpga_status.fifo_ever_full) << std::endl;
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std::cout << std::endl;
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std::cout << "Packet counters - UDP " << fpga_status.packets_udp << std::endl;
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std::cout << " - SLS " << fpga_status.packets_sls << std::endl;
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std::cout << " - JFJoch " << fpga_status.packets_processed << std::endl;
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std::cout << std::endl;
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std::cout << " - err. ETH " << fpga_status.udp_err_eth << std::endl;
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std::cout << " - err. len. " << fpga_status.udp_err_len << std::endl;
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std::cout << std::endl;
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std::cout << "User interrupts mask: " << std::bitset<32>(fpga_env_data.pcie_user_interrupt_mask)
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<< " pending: " << std::bitset<32>(fpga_env_data.pcie_user_interrupt_pending)
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<< " request: " << std::bitset<32>(fpga_env_data.pcie_user_interrupt_request) << std::endl;
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std::cout << "DMA interrupts mask: " << std::bitset<32>(fpga_env_data.pcie_dma_interrupt_mask)
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<< " pending: " << std::bitset<32>(fpga_env_data.pcie_dma_interrupt_pending)
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<< " request: " << std::bitset<32>(fpga_env_data.pcie_dma_interrupt_request) << std::endl;
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std::cout << "H2C descriptors:" << fpga_env_data.pcie_h2c_descriptors << " beats: " << fpga_env_data.pcie_h2c_beats
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<< " status:" << fpga_env_data.pcie_h2c_status << std::endl;
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std::cout << "C2H descriptors:" << fpga_env_data.pcie_c2h_descriptors << " beats: " << fpga_env_data.pcie_c2h_beats
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<< " status:" << fpga_env_data.pcie_c2h_status << std::endl;
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std::cout << std::endl;
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} catch (const std::runtime_error &e) {
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std::cout << e.what() << std::endl;
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std::cout << std::endl;
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}
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} |