The rc178 branch continued after #88 was squash-merged; this is its content fromb9ada7914(the tree #88 squashed) to094eee31a, as one change on main. The individual commits stay on the rc178 branch: - still battery: --cold evicts each set's input from the page cache; Alvra pixel masks; manifest fixes - AGIPD: converter to one rigid panel per module, int16 photons, mask folded in; still battery reads the converted sets - DetectorModules: panel look-up by id, plane -> panel, plane bounds and a per-pixel walk; mask size checked - tests: [PanelLayout] equivalence harness, stacked vs assembled panel layout - Dense per-pixel maps through the panel table (panel layout stage 1) - Panel id on spots and the panel table in the start message - Viewer and preview show a panel detector as it lies on the detector plane - Panel layout stage 3: per-panel spot finding (CPU+GPU, CCL) and raster algorithms on the plane raster - Panel layout stage 2: prediction and Bragg integration through the panel table - XTC reader: frames handed up as stored, streams indexed in parallel - XFEL reader: integer frames stay integer, one gain, placement by panel - EXTERNAL_TEST_DATA_STILLS.md: images used vs the entry for every set; drop "Not in the battery" - still battery: EuXFEL sets read the depositors' Cheetah CXI files directly; AGIPD converter removed - float32_to_int16.py: a non-finite pixel becomes -32768, the int16 error marker, not a zero count - CrystFEL geometry: read the pixel masks and bad regions instead of ignoring them - Panel layout stage 5: the XFEL reader hands up the stored frame and its panel table - Panel table persisted in NXmx; modulation grid and pre-scan memo key on the plane - still battery: Alvra sets take their pixel mask from the CrystFEL geometry, not --mask-good - still battery: take the deposited model as mmCIF where the RCSB has no PDB-format file - still battery: dimple gets PDB-format coordinates converted from an mmCIF-only deposition - stills fixed cost: geometry refinement and pre-scan do the same work in less wall time - stills geometry sample and trial spot finding run as many workers as the image pass - Stills integration: background ring reach measured on empty apertures, radial curvature from the whole frame - StillsPartialityRefine: the partiality width is the run's, measured on the crystals, not the prediction window's - MergeOnTheFly: capture term and multiplicative outlier band for the stills merge (both opt-in) - Stills given a cell: the written cell is the mean over the frames that are merged - Stills: the radial curvature correction decided per run on the same empty apertures - StillsPartialityRefine: measure the run width only on shells with signal - Stills pre-scan: report the paired z of the radial-correction comparison - module placement: the five concurrent fits each keep every thread - still battery: score R-free against the deposited data through the same dimple protocol - still battery: the R-free target is the lower of the deposition's dimple and published values - Stills: background clip follows the radial curve; signal disk from the lattice spacing - Stills keep an overloaded observation as a lower bound instead of dropping it - Stills: drop the lattice-spacing signal disk; the correction decision back on the plain clip - battery: R-free against the deposition without refinement only, one protocol for rotation and stills - still battery: EuXFEL sets run on a 2,000-image subset for now - stills geometry refinement: fit the detector distance and the cell together - stills geometry refinement: a distance given with --detector-distance is held in the joint fit - Metal integration engine: back to its panel-s5 kernels; Mac stills keep the old clip, no saturation count - Metal integration test: the CPU comparison runs on a rotation experiment - Stills: kept overloads go back to the drop where they are not concentrated at low resolution - stills distance search: an absolute 30-3000 mm scan, a sample found without d-limits, the fit iterated - battery results: XFEL still battery 20261022-1358 on rc1780cf62452c- 12 sets, cold, R_free unrefined - battery results: still summary gains the resolution of our merge and of the deposition - Pre-scan masks a pixel at the saturation limit on most frames, as one holding the error value - Stills keep an overload as a lower bound only where it has pixels at the limit; run-level gate removed - XFEL reader: a per-frame mask is read the way the frames are, its chunk inflated outside the HDF5 lock - stills distance search: every centre scanned with a wider acceptance, a larger sample where nothing indexes - rugnux usage: --beam-center-check describes the absolute 30-3000 mm stills distance scan, not the old 60-160 % grid - stills: detector tilt refined in the geometry pre-pass, kept where held-out frames agree - CLAUDE.md: the changelog is written once, just before the merge into main - condensed one-liners of what users get - broker: serve the placed model and its maps of the last rugnux live run (/rugnux/model.cif, /rugnux/map.ccp4) - frontend: Mol* viewer of the placed model and its density on the Rugnux live page - writer: _model.cif from rugnux live keeps the input model's metadata, as the served model.cif does - rugnux live maps: one unit cell centred on the model; the viewer opens on all of it - Anomalous difference map: ANOM/PHANOM in _maps.mtz, /rugnux/map.ccp4?type=anom, a magenta mesh in the viewer - Mol* viewer: open with the maps drawn within 10 A of the centre of view - Mol* viewer: aaredb's structure-viewer setup, on a black stage - rugnux: the gain of a stills file that states none is read off its single-photon peak where the background resolves photons - Mol* viewer: in line with AareDB's StructureView at its current head (8ece2c2) - ACKNOWLEDGEMENT: the web frontend's Mol* viewer follows AareDB's setup (G. Gotthard, PSI) - stills tilt decision: the modules stay where the run placed them - still battery: no distance pins and no per-set tuning flags; gain from the data except where a file's baseline hides it - battery results: rc178 6f6f69 - full still battery and full rotation battery with REFMAC - Bragg integration: a CCD rotation sweep's sigmas at the measured gain, intensities in photons - BackgroundGain: the gain of a frame that resolves photons is the spacing of its photon peaks, so a baseline left in the frame no longer hides it - ShadowFinder: measure the background's azimuthal modulation instead of predicting it from the polarization - BackgroundGain: one gain estimate for rotation and stills; the still battery no longer gives EuXFEL 152 its gain - ShadowFinder: measure the modulation robustly under a wide one-sided shadow - ShadowFinderTest: a one-sided shadow is not fitted as part of the background's modulation - ShadowFinder: back to the predicted polarization factor, in the plane the background shows - MXAnalysisAfterFPGA: the Bragg engine's edge mask in the image's layout, so raw / untransformed FPGA runs start again - battery results: still battery on rc178 e54f55 replaces the earlier rc178 still tables - XFELReader: per-frame mask and photon conversion without a library call or a branch per pixel - stills geometry trial: the hypotheses a search asks are indexed side by side - stills tilt decision: the fits start beside the pre-scan and the geometry trial - XFELReader: a deflated frame is inflated and converted a piece at a time, while it is in the cache - XFELReader: a byte-shuffled frame is unshuffled a piece at a time, a whole pixel per step - GeometryRefiner: residuals carry only the blocks a fit moves; beam and distance one block - GeometryRefiner: a spot's residual differentiates its observed and predicted halves apart - docs: EXTERNAL_TEST_DATA lists every open-arm battery set, with corrected values and counts - battery: doc_check.py cross-checks the manifests against the dataset pages - stills module placement: the placement fit gets half the threads, each held-out fit an eighth - still battery: the EuXFEL sets run on all their frames, as the published still runs did - battery results: still battery on rc178 a0ce6c, cold on a quiet machine, replaces the earlier rc178 table - macOS build: explicit size_t in the XFEL reader's row bounds; parentheses in the CPU preprocessor's select Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_015CeEGgpKdfkCTJb3YNMJcu
105 lines
6.1 KiB
C++
105 lines
6.1 KiB
C++
// SPDX-FileCopyrightText: 2026 Filip Leonarski, Paul Scherrer Institute <filip.leonarski@psi.ch>
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// SPDX-License-Identifier: GPL-3.0-only
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#pragma once
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#include <cstdint>
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#include <memory>
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#include <vector>
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#include "BraggIntegrationEngine.h"
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#include "../indexing/CUDAMemHelpers.h"
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#include "../../common/PixelMask.h"
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// CUDA engine: reproduces BraggIntegrationEngineCPU up to floating-point precision. Each stage is a
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// kernel with one CUDA block per reflection cooperating over the small window via shared-memory
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// reductions (the natural mapping for thousands of independent, tiny per-spot integrations).
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//
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// Pipeline (profile modes): reset -> mark_mask -> boxsum -> learn_profile -> build_profiles -> fit
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// (the resolution shell is computed inline, so there is no separate shell pass). BoxSum mode stops
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// after boxsum (that pass is the BraggIntegrate2D box integrator and the seed of the profile fit).
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// The preprocessed image already lives on the device (ImagePreprocessorBufferGPU::getGPUBuffer());
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// only the per-frame predicted centres are uploaded.
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class BraggIntegrationEngineGPU : public BraggIntegrationEngine {
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std::shared_ptr<CudaStream> stream;
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int threads;
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size_t fit_shared_bytes;
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int rad_w = 0; // radial-background window of boxsum, in bins of one pixel
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size_t boxsum_shared_bytes = 0;
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size_t capacity = 0; // per-reflection device/host arrays hold at least this many reflections
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// Whether d_mask / d_owner may still carry the marks of an earlier image. Run() clears what it
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// marked before it returns when that is cheaper than clearing the frame, and this is then false in
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// the steady state; it is true before the first call, after one that threw part-way through, and
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// whenever the marks covered enough of the frame that clearing all of it was the cheaper choice.
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bool dirty = true;
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size_t mask_box_px = 0; // pixels one reflection's mark_mask box covers, at the widest aperture
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// --- per-reflection device arrays (grown by EnsureCapacity) ---
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CudaDevicePtr<float> d_px_x, d_px_y, d_d;
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CudaDevicePtr<BraggPanel> d_panel; // the panel of each reflection (BraggStencil.h)
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CudaDevicePtr<uint8_t> d_mark; // the reflection marks its signal region in d_mask
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CudaDevicePtr<int> d_cx, d_cy;
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CudaDevicePtr<float> d_I, d_sigma, d_bkg, d_bkg_var, d_var_bkg, d_obs_x, d_obs_y;
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CudaDevicePtr<float> d_isum; // box-sum raw sum, for the radial correction
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CudaDevicePtr<int> d_ninner, d_rbin, d_kbin;
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// The run's pixel mask, one byte per pixel (PixelMask::GetBinaryMask), shared with the
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// preprocessor's copy. See BraggIntegrationEngineCPU::static_mask.
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std::shared_ptr<CudaDevicePtr<uint8_t>> d_static_mask;
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CudaDevicePtr<uint8_t> d_ok, d_strong, d_has_obs, d_overloaded;
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CudaDevicePtr<int> d_saturated; // signal-disk pixels at the saturation limit
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// --- radial background curvature correction (see BraggIntegrationEngine) ---
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int n_rad = 0; // radial bins, 0 when the correction is off
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CudaDevicePtr<unsigned long long> d_rad_sum; // integer pixel sums, see boxsum
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CudaDevicePtr<float> d_k_diff;
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CudaDevicePtr<int> d_rad_cnt;
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CudaDevicePtr<float> d_rad_curve; // the curve handed over (RadialBackgroundFromRings)
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// --- fixed-size device arrays ---
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// The learning/fit math is single precision: FP64 is heavily throttled on consumer GPUs and the
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// extraction is Poisson-noise limited, so float reproduces the double CPU path to ~1e-4.
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CudaDevicePtr<uint8_t> d_mask; // per-pixel inner-stencil reflection mask
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// Per-pixel (distance, reflection) key naming the nearest predicted centre; allocated only when
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// an overlap treatment is on, so the default path costs no extra device memory.
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CudaDevicePtr<uint32_t> d_owner;
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// Fixed-point (see PROFILE_FIXED): a float atomicAdd here made the profile depend on the order
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// the blocks arrived in, and with it every intensity fitted through it.
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CudaDevicePtr<unsigned long long> d_shell_grid, d_global_grid; // learned profile accumulators (N_SHELL*GG, GG)
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CudaDevicePtr<float> d_shell_P, d_global_P; // normalised profiles (empirical mode)
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CudaDevicePtr<unsigned long long> d_mom; // learned 2nd moments, 3 per shell + global
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CudaDevicePtr<float> d_sigma2_r, d_sigma2_t; // radial/tangential widths, N_SHELL + global
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CudaDevicePtr<int> d_shell_n, d_global_n;
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CudaDevicePtr<unsigned long long> d_invd2; // [min,max] inv-d^2 as monotonic bit patterns
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// BraggIntegrationCounts, accumulated on the device so an image costs no transfer; brought back
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// only when Counts() is asked for.
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CudaDevicePtr<unsigned long long> d_counts;
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// --- host staging (copied back once per frame) ---
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// Pinned, like every other engine's staging: a copy out of pageable memory does not return until the
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// driver has staged it through a bounce buffer, so eight of them in a row are eight serialised
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// round-trips rather than eight queued transfers.
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CudaHostPtr<float> h_px_x, h_px_y, h_d;
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CudaHostPtr<BraggPanel> h_panel;
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CudaHostPtr<uint8_t> h_mark;
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CudaHostPtr<float> h_I, h_sigma, h_bkg, h_var_bkg, h_obs_x, h_obs_y;
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CudaHostPtr<uint8_t> h_ok, h_has_obs, h_overloaded;
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CudaHostPtr<int> h_saturated;
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void EnsureCapacity(size_t n);
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public:
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BraggIntegrationEngineGPU(const DiffractionExperiment &experiment, std::shared_ptr<CudaStream> stream,
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const PixelMask &mask);
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// Waits for the stream: its pooled buffers are freed next (see CudaDevicePtr).
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~BraggIntegrationEngineGPU() override { if (stream) cudaStreamSynchronize(*stream); }
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std::vector<Reflection> Run(const ImagePreprocessorBuffer &image,
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const std::vector<Reflection> &predicted, size_t npredicted,
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int64_t image_number) override;
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// Brings the two device counters back before answering. Synchronises the stream, so ask once a
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// pass rather than once an image.
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[[nodiscard]] BraggIntegrationCounts Counts() const override;
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};
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