68 lines
1.8 KiB
C++
68 lines
1.8 KiB
C++
// SPDX-FileCopyrightText: 2024 Filip Leonarski, Paul Scherrer Institute <filip.leonarski@psi.ch>
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// SPDX-License-Identifier: GPL-3.0-only
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#include "../hls_simulation/hls_cores.h"
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#include <thread>
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int main() {
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size_t nframes = 12;
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int ret = 0;
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STREAM_768 input;
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STREAM_768 output;
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hls::stream<ap_axiu<64, 1, 1, 1>> integration_result;
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hls::stream<axis_completion> compl_in;
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hls::stream<axis_completion> compl_out;
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ap_uint<256> hbm_0[16384];
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ap_uint<256> hbm_1[16384];
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ap_uint<256> hbm_2[16384];
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ap_uint<256> hbm_3[16384];
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input << packet_768_t{.user = 0};
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for (int f = 0; f < nframes; f++) {
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compl_in << axis_completion{.frame_number = f, .module = 0, .last = 0};
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for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 64; i++)
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input << packet_768_t{.data = 0, .user = 0};
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}
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compl_in << axis_completion{.last = 1};
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input << packet_768_t{.user = 1};
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ap_uint<1> idle;
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integration(input, output, integration_result, compl_in, compl_out, hbm_0, hbm_1, hbm_2, hbm_3, idle, 0);
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if (input.size() != 0)
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ret = 1;
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if (compl_in.size() != 0)
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ret = 1;
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if (output.size() != nframes * RAW_MODULE_SIZE * sizeof(uint16_t) / 64 + 2)
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ret = 1;
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for (int i = 0; i < nframes * RAW_MODULE_SIZE * sizeof(uint16_t) / 64 + 2; i++)
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output.read();
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if (integration_result.size() != nframes * FPGA_INTEGRATION_BIN_COUNT+ 1)
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ret = 1;
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for (int i = 0; i < nframes * FPGA_INTEGRATION_BIN_COUNT + 1; i++)
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integration_result.read();
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if (compl_out.size() != nframes + 1)
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ret = 1;
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for (int i = 0; i < nframes + 1; i++)
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compl_out.read();
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if (ret != 0) {
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printf("Test failed !!!\n");
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ret = 1;
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} else {
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printf("Test passed !\n");
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}
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return ret;
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}
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