428 lines
18 KiB
C++
428 lines
18 KiB
C++
// Copyright (2019-2023) Paul Scherrer Institute
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#include "spot_finder.h"
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void calc_sum(ap_uint<SUM_BITWIDTH*32> &ext_column_sum,
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const ap_uint<512> ext_old_value,
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const ap_uint<512> ext_new_value) {
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#pragma HLS PIPELINE II=1
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ap_int<SUM_BITWIDTH> column_sum[32];
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ap_int<16> new_value[32];
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ap_int<16> old_value[32];
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unpack32(ext_new_value, new_value);
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unpack32(ext_old_value, old_value);
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for (int i = 0; i < 32; i++) {
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column_sum[i] = new_value[i] - old_value[i];
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}
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ext_column_sum = pack32(column_sum);
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}
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void calc_sum2(ap_uint<SUM2_BITWIDTH*32> &ext_column_sum2,
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const ap_uint<512> ext_old_value,
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const ap_uint<512> ext_new_value) {
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#pragma HLS PIPELINE II=1
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ap_int<SUM2_BITWIDTH> column_sum2[32];
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ap_int<16> new_value[32];
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ap_int<16> old_value[32];
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unpack32(ext_new_value, new_value);
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unpack32(ext_old_value, old_value);
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for (int i = 0; i < 32; i++) {
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column_sum2[i] = new_value[i]*new_value[i] - old_value[i] * old_value[i];
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// Apparently on FPGA this is easier, than using (new-old)*(new+old) - could it be DSP mapping?
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}
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ext_column_sum2 = pack32(column_sum2);
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}
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void calc_mask_diff(ap_uint<MASK_SUM_BITWIDTH*32> &ext_column_valid,
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const ap_uint<32> ext_old_value,
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const ap_uint<32> ext_new_value) {
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#pragma HLS PIPELINE II=1
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ap_int<MASK_SUM_BITWIDTH> column_valid[32];
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for (int i = 0; i < 32; i++)
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column_valid[i] = ap_int<MASK_SUM_BITWIDTH>(ext_new_value[i]) - ap_int<MASK_SUM_BITWIDTH>(ext_old_value[i]);
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ext_column_valid = pack32(column_valid);
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}
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void calc_mask(const ap_uint<512> &input, ap_uint<512> &output, ap_uint<32> &mask) {
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#pragma HLS PIPELINE II=1
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ap_int<16> value[32];
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ap_uint<32> tmp_mask;
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ap_uint<512> tmp_output;
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unpack32(input, value);
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for (int i = 0; i < 32; i++) {
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if ((value[i] == INT16_MAX) || (value[i] == INT16_MIN)) {
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tmp_mask[i] = 0;
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tmp_output(i * 16 + 15, i * 16) = 0;
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} else {
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tmp_mask[i] = 1;
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tmp_output(i * 16 + 15, i * 16) = input(i * 16 + 15, i * 16);
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}
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}
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mask = tmp_mask;
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output = tmp_output;
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}
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ap_uint<1> check_threshold(ap_int<16> val,
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ap_int<SUM_BITWIDTH> sum,
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ap_int<SUM2_BITWIDTH> sum2,
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ap_int<MASK_SUM_BITWIDTH> valid,
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strong_pixel_threshold_t strong_pixel_threshold,
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ap_int<16> photon_count_threshold) {
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#pragma HLS INLINE
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ap_int<SUM_BITWIDTH+5> in_minus_mean = val * valid - sum;
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ap_uint<SUM2_BITWIDTH+5> variance = valid * sum2 - sum * sum;
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if ((in_minus_mean * in_minus_mean * (valid - 1) > variance * strong_pixel_threshold * valid) &&
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(in_minus_mean > 0) &&
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(val > photon_count_threshold))
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return 1;
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else
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return 0;
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}
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ap_uint<32> check_threshold(const ap_uint<512> data_packed,
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const ap_uint<SUM_BITWIDTH*32> sum_packed,
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const ap_uint<SUM2_BITWIDTH*32> sum2_packed,
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const ap_uint<MASK_SUM_BITWIDTH*32> valid_packed,
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strong_pixel_threshold_t strong_pixel_threshold,
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ap_int<16> photon_count_threshold) {
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#pragma HLS PIPELINE II=1
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ap_int<16> data[32];
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ap_int<SUM_BITWIDTH> sum[32];
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ap_int<SUM2_BITWIDTH> sum2[32];
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ap_int<MASK_SUM_BITWIDTH> valid[32];
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unpack32(data_packed, data);
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unpack32(sum_packed, sum);
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unpack32(sum2_packed, sum2);
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unpack32(valid_packed, valid);
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ap_uint<32> tmp_output = 0;
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for (int i = 0; i < 32; i++)
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tmp_output[i] = check_threshold(data[i], sum[i], sum2[i], valid[i], strong_pixel_threshold, photon_count_threshold);
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return tmp_output;
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}
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void spot_finder_col_sum(STREAM_512 &data_in,
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hls::stream<spot_finder_packet> &data_out,
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hls::stream<ap_uint<SUM_BITWIDTH*32>> &sum_out,
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hls::stream<ap_uint<SUM2_BITWIDTH*32>> &sum2_out,
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hls::stream<ap_uint<MASK_SUM_BITWIDTH*32>> &valid_out) {
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ap_uint<512> data_cache[(2 * FPGA_NBX + 1) * 32];
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ap_uint<32> mask_cache[(2 * FPGA_NBX + 1) * 32];
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ap_uint<SUM_BITWIDTH*32> sum_cache[32];
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ap_uint<SUM2_BITWIDTH*32> sum2_cache[32];
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ap_uint<MASK_SUM_BITWIDTH*32> valid_cache[32];
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packet_512_t packet_in;
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data_in >> packet_in;
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data_out << spot_finder_packet{.data=packet_in.data, .user=0};
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data_in >> packet_in;
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while (!packet_in.user) {
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for (int i = 0; i < 32; i++) {
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#pragma HLS unroll
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sum_cache[i] = 0;
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sum2_cache[i] = 0;
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valid_cache[i] = 0;
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}
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for (int i = 0; i < (2 * FPGA_NBX + 1) * 32; i++) {
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#pragma HLS unroll
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data_cache[i] = 0;
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mask_cache[i] = 0;
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}
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for (int i = 0; i < (FPGA_NBX) * 32 + RAW_MODULE_SIZE * sizeof(uint16_t) / 64; i++) {
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#pragma HLS PIPELINE II = 1
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ap_uint<512> packet_in_data;
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ap_uint<32> packet_in_mask;
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if (i < RAW_MODULE_SIZE * sizeof(uint16_t) / 64) {
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data_out << spot_finder_packet{.data=packet_in.data, .user=0};
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calc_mask(packet_in.data, packet_in_data, packet_in_mask);
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data_in >> packet_in;
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} else {
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packet_in_data = 0;
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packet_in_mask = 0;
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}
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uint16_t cell_number_top = (i / 32) % (2 * FPGA_NBX + 1) * 32 + (i % 32);
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ap_uint<512> top_line = data_cache[cell_number_top];
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ap_uint<32> top_line_mask = mask_cache[cell_number_top];
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ap_uint<SUM_BITWIDTH * 32> diff_sum;
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ap_uint<SUM2_BITWIDTH * 32> diff_sum2;
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ap_uint<MASK_SUM_BITWIDTH * 32> diff_valid;
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ap_uint<SUM_BITWIDTH * 32> column_sum = sum_cache[i % 32];
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ap_uint<SUM2_BITWIDTH * 32> column_sum2 = sum2_cache[i % 32];
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ap_uint<MASK_SUM_BITWIDTH * 32> column_valid = valid_cache[i % 32];
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calc_sum(diff_sum, top_line, packet_in_data);
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calc_sum2(diff_sum2, top_line, packet_in_data);
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calc_mask_diff(diff_valid, top_line_mask, packet_in_mask);
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update_sum<SUM_BITWIDTH>(column_sum, diff_sum);
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update_sum<SUM2_BITWIDTH>(column_sum2, diff_sum2);
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update_sum<MASK_SUM_BITWIDTH>(column_valid, diff_valid);
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if (i >= (FPGA_NBX) * 32) {
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sum_out << column_sum;
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sum2_out << column_sum2;
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valid_out << column_valid;
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}
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sum_cache[i % 32] = column_sum;
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sum2_cache[i % 32] = column_sum2;
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valid_cache[i % 32] = column_valid;
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data_cache[cell_number_top] = packet_in_data;
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mask_cache[cell_number_top] = packet_in_mask;
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}
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}
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data_out << spot_finder_packet{.data=0, .user=1};
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}
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void spot_finder_line_sum(hls::stream<spot_finder_packet> &data_in,
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hls::stream<spot_finder_packet> &data_out,
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hls::stream<ap_uint<SUM_BITWIDTH*32>> &sum_in,
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hls::stream<ap_uint<SUM2_BITWIDTH*32>> &sum2_in,
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hls::stream<ap_uint<MASK_SUM_BITWIDTH*32>> &valid_in,
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hls::stream<ap_uint<SUM_BITWIDTH*32>> &sum_out,
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hls::stream<ap_uint<SUM2_BITWIDTH*32>> &sum2_out,
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hls::stream<ap_uint<MASK_SUM_BITWIDTH*32>> &valid_out) {
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spot_finder_packet packet_in;
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data_in >> packet_in;
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data_out << packet_in;
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ap_uint<SUM_BITWIDTH * 2 * FPGA_NBX> column_sum_val_save = 0;
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ap_uint<SUM2_BITWIDTH * 2 * FPGA_NBX> column_sum2_val_save = 0;
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ap_uint<MASK_SUM_BITWIDTH * 2 * FPGA_NBX> column_valid_val_save = 0;
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data_in >> packet_in;
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while (!packet_in.user) {
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ap_uint<SUM_BITWIDTH * 32> column_sum = 0;
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ap_uint<SUM2_BITWIDTH * 32> column_sum2 = 0;
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ap_uint<MASK_SUM_BITWIDTH * 32> column_valid = 0;
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ap_uint<SUM_BITWIDTH * 32> line_sum;
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ap_uint<SUM2_BITWIDTH * 32> line_sum2;
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ap_uint<MASK_SUM_BITWIDTH * 32> line_valid;
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#pragma HLS PIPELINE II=33
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for (int i = 0; i < 32; i++) {
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data_out << packet_in;
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data_in >> packet_in;
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sum_in >> column_sum;
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sum2_in >> column_sum2;
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valid_in >> column_valid;
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sum_out << prefix_sum<SUM_BITWIDTH>((column_sum, column_sum_val_save));
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sum2_out << prefix_sum<SUM2_BITWIDTH>((column_sum2, column_sum2_val_save));
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valid_out << prefix_sum<MASK_SUM_BITWIDTH>((column_valid, column_valid_val_save));
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column_sum_val_save = column_sum(SUM_BITWIDTH * 32 - 1, SUM_BITWIDTH * (32 - 2 * FPGA_NBX));
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column_sum2_val_save = column_sum2(SUM2_BITWIDTH * 32 - 1, SUM2_BITWIDTH * (32 - 2 * FPGA_NBX));
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column_valid_val_save = column_valid(MASK_SUM_BITWIDTH * 32 - 1, MASK_SUM_BITWIDTH * (32 - 2 * FPGA_NBX));
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}
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sum_out << prefix_sum<SUM_BITWIDTH>((ap_uint<SUM_BITWIDTH * 2 * FPGA_NBX>(0), column_sum_val_save));
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sum2_out << prefix_sum<SUM2_BITWIDTH>((ap_uint<SUM2_BITWIDTH * 2 * FPGA_NBX>(0), column_sum2_val_save));
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valid_out << prefix_sum<MASK_SUM_BITWIDTH>((ap_uint<MASK_SUM_BITWIDTH + 2 * FPGA_NBX>(0), column_valid_val_save));
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column_sum_val_save = 0;
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column_sum2_val_save = 0;
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column_valid_val_save = 0;
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}
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data_out << packet_in;
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}
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void spot_finder_line_sum_align(hls::stream<spot_finder_packet> &data_in,
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hls::stream<spot_finder_packet> &data_out,
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hls::stream<ap_uint<SUM_BITWIDTH*32>> &sum_in,
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hls::stream<ap_uint<SUM2_BITWIDTH*32>> &sum2_in,
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hls::stream<ap_uint<MASK_SUM_BITWIDTH*32>> &valid_in,
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hls::stream<ap_uint<SUM_BITWIDTH*32>> &sum_out,
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hls::stream<ap_uint<SUM2_BITWIDTH*32>> &sum2_out,
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hls::stream<ap_uint<MASK_SUM_BITWIDTH*32>> &valid_out) {
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spot_finder_packet packet_in;
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data_in >> packet_in;
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data_out << packet_in;
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data_in >> packet_in;
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while (!packet_in.user) {
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#pragma HLS PIPELINE II=33
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ap_uint<SUM_BITWIDTH * (32 - FPGA_NBX)> line_sum_val_save = 0;
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ap_uint<SUM2_BITWIDTH * (32 - FPGA_NBX)> line_sum2_val_save = 0;
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ap_uint<MASK_SUM_BITWIDTH * (32 - FPGA_NBX)> line_valid_val_save = 0;
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ap_uint<SUM_BITWIDTH * 32> line_sum = 0;
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ap_uint<SUM2_BITWIDTH * 32> line_sum2 = 0;
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ap_uint<MASK_SUM_BITWIDTH * 32> line_valid = 0;
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sum_in >> line_sum;
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sum2_in >> line_sum2;
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valid_in >> line_valid;
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line_sum_val_save = line_sum(SUM_BITWIDTH * 32 - 1, SUM_BITWIDTH * FPGA_NBX);
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line_sum2_val_save = line_sum2(SUM2_BITWIDTH * 32 - 1, SUM2_BITWIDTH * FPGA_NBX);
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line_valid_val_save = line_valid(MASK_SUM_BITWIDTH * 32 - 1, MASK_SUM_BITWIDTH * FPGA_NBX);
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for (int i = 0; i < 32; i++) {
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data_out << packet_in;
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data_in >> packet_in;
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sum_in >> line_sum;
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sum2_in >> line_sum2;
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valid_in >> line_valid;
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sum_out << (line_sum(SUM_BITWIDTH * FPGA_NBX - 1, 0), line_sum_val_save);
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sum2_out << (line_sum2(SUM2_BITWIDTH * FPGA_NBX - 1, 0), line_sum2_val_save);
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valid_out << (line_valid(MASK_SUM_BITWIDTH * FPGA_NBX - 1, 0), line_valid_val_save);
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line_sum_val_save = line_sum(SUM_BITWIDTH * 32 - 1, SUM_BITWIDTH * FPGA_NBX);
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line_sum2_val_save = line_sum2(SUM2_BITWIDTH * 32 - 1, SUM2_BITWIDTH * FPGA_NBX);
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line_valid_val_save = line_valid(MASK_SUM_BITWIDTH * 32 - 1, MASK_SUM_BITWIDTH * FPGA_NBX);
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}
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}
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data_out << packet_in;
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}
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strong_pixel_threshold_t calculate_threshold(volatile ap_uint<16> &in_strong_pixel_threshold) {
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#pragma HLS INLINE
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ap_uint<16> tmp = in_strong_pixel_threshold;
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strong_pixel_threshold_t strong_pixel_threshold = 0;
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for (int i = 0; i < 16; i++) {
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#pragma HLS UNROLL
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strong_pixel_threshold[i] = tmp[i];
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}
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return strong_pixel_threshold * strong_pixel_threshold;
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}
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void spot_finder_check_threshold(hls::stream<spot_finder_packet> &data_in,
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STREAM_512 &data_out,
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hls::stream<ap_uint<SUM_BITWIDTH*32>> &sum_in,
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hls::stream<ap_uint<SUM2_BITWIDTH*32>> &sum2_in,
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hls::stream<ap_uint<MASK_SUM_BITWIDTH*32>> &valid_in,
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hls::stream<ap_axiu<32,1,1,1>> &strong_pixel_out,
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volatile ap_int<16> &in_photon_count_threshold,
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volatile ap_uint<16> &in_strong_pixel_threshold) {
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spot_finder_packet packet_in;
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data_in >> packet_in;
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data_out << packet_512_t{.data=packet_in.data, .user=0, .last=0};
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ap_uint<SUM_BITWIDTH * 32> line_sum = 0;
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ap_uint<SUM2_BITWIDTH * 32> line_sum2 = 0;
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ap_uint<MASK_SUM_BITWIDTH * 32> line_valid = 0;
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data_in >> packet_in;
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while (!packet_in.user) {
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ap_int<16> photon_count_threshold = in_photon_count_threshold;
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strong_pixel_threshold_t strong_pixel_threshold_sq = calculate_threshold(in_strong_pixel_threshold);
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for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 64; i++) {
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#pragma HLS PIPELINE II=1
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data_out << packet_512_t{.data=packet_in.data, .user=0, .last=0};
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sum_in >> line_sum;
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sum2_in >> line_sum2;
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valid_in >> line_valid;
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ap_axiu<32, 1, 1, 1> strong_pixel{.user = 0};
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strong_pixel.data = check_threshold(packet_in.data, line_sum, line_sum2, line_valid,
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strong_pixel_threshold_sq, photon_count_threshold);
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strong_pixel_out << strong_pixel;
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data_in >> packet_in;
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}
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}
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strong_pixel_out << ap_axiu<32,1,1,1>{.data = 0, .user = 1};
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data_out << packet_512_t{.data=0, .user=1, .last=1};
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}
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void spot_finder(STREAM_512 &data_in,
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STREAM_512 &data_out,
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hls::stream<ap_axiu<32,1,1,1>> &strong_pixel_out,
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volatile ap_int<16> &in_photon_count_threshold,
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volatile ap_uint<16> &in_strong_pixel_threshold) {
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#pragma HLS INTERFACE ap_ctrl_none port=return
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#pragma HLS DATAFLOW
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#pragma HLS INTERFACE axis port=data_in
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#pragma HLS INTERFACE axis port=data_out
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#pragma HLS INTERFACE axis port=strong_pixel_out
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#pragma HLS INTERFACE ap_none register port=in_photon_count_threshold
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#pragma HLS INTERFACE ap_none register port=in_strong_pixel_threshold
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hls::stream<spot_finder_packet> data_stream_0, data_stream_1, data_stream_2;
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hls::stream<ap_uint<SUM_BITWIDTH*32>> sum_stream_0, sum_stream_1, sum_stream_2;
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hls::stream<ap_uint<SUM2_BITWIDTH*32>> sum2_stream_0, sum2_stream_1, sum2_stream_2;
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hls::stream<ap_uint<MASK_SUM_BITWIDTH*32>> valid_stream_0, valid_stream_1, valid_stream_2;
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#pragma HLS STREAM variable=data_stream_0 depth=512 type=fifo
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#pragma HLS bind_storage variable=data_stream_0 type=fifo impl=bram
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#pragma HLS STREAM variable=data_stream_1 depth=64 type=fifo
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#pragma HLS bind_storage variable=data_stream_1 type=fifo impl=bram
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#pragma HLS STREAM variable=data_stream_2 depth=64 type=fifo
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#pragma HLS bind_storage variable=data_stream_2 type=fifo impl=bram
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#pragma HLS STREAM variable=sum_stream_0 depth=512 type=fifo
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#pragma HLS bind_storage variable=sum_stream_0 type=fifo impl=bram
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#pragma HLS STREAM variable=sum_stream_1 depth=64 type=fifo
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#pragma HLS bind_storage variable=sum_stream_1 type=fifo impl=bram
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#pragma HLS STREAM variable=sum_stream_2 depth=64 type=fifo
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#pragma HLS bind_storage variable=sum_stream_2 type=fifo impl=bram
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#pragma HLS STREAM variable=sum2_stream_0 depth=512 type=fifo
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#pragma HLS bind_storage variable=sum2_stream_0 type=fifo impl=bram
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#pragma HLS STREAM variable=sum2_stream_1 depth=64 type=fifo
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#pragma HLS bind_storage variable=sum2_stream_1 type=fifo impl=bram
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#pragma HLS STREAM variable=sum2_stream_2 depth=64 type=fifo
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#pragma HLS bind_storage variable=sum2_stream_2 type=fifo impl=bram
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#pragma HLS STREAM variable=valid_stream_0 depth=512 type=fifo
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#pragma HLS bind_storage variable=valid_stream_0 type=fifo impl=bram
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#pragma HLS STREAM variable=valid_stream_1 depth=64 type=fifo
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#pragma HLS bind_storage variable=valid_stream_1 type=fifo impl=bram
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#pragma HLS STREAM variable=valid_stream_2 depth=64 type=fifo
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#pragma HLS bind_storage variable=valid_stream_2 type=fifo impl=bram
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#ifdef __SYNTHESIS__
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spot_finder_col_sum(data_in, data_stream_0, sum_stream_0, sum2_stream_0, valid_stream_0);
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spot_finder_line_sum(data_stream_0, data_stream_1,
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sum_stream_0, sum2_stream_0, valid_stream_0,
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sum_stream_1, sum2_stream_1, valid_stream_1);
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spot_finder_line_sum_align(data_stream_1, data_stream_2,
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sum_stream_1, sum2_stream_1, valid_stream_1,
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sum_stream_2, sum2_stream_2, valid_stream_2);
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spot_finder_check_threshold(data_stream_2, data_out, sum_stream_2, sum2_stream_2, valid_stream_2,
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strong_pixel_out, in_photon_count_threshold, in_strong_pixel_threshold);
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#else
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std::vector<std::thread> spot_finder_cores;
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spot_finder_cores.emplace_back([&] {spot_finder_col_sum(data_in, data_stream_0, sum_stream_0, sum2_stream_0, valid_stream_0);});
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spot_finder_cores.emplace_back([&] {spot_finder_line_sum(data_stream_0, data_stream_1,
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sum_stream_0, sum2_stream_0, valid_stream_0,
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sum_stream_1, sum2_stream_1, valid_stream_1);});
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spot_finder_cores.emplace_back([&] {spot_finder_line_sum_align(data_stream_1, data_stream_2,
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sum_stream_1, sum2_stream_1, valid_stream_1,
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sum_stream_2, sum2_stream_2, valid_stream_2);});
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spot_finder_cores.emplace_back([&] {spot_finder_check_threshold(data_stream_2, data_out, sum_stream_2, sum2_stream_2, valid_stream_2,
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strong_pixel_out, in_photon_count_threshold, in_strong_pixel_threshold);});
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for (auto &i : spot_finder_cores)
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i.join();
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#endif
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}
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