Files
Jungfraujoch/broker/gen/model/Fpga_status_inner.cpp
2025-10-25 22:05:47 +02:00

274 lines
7.4 KiB
C++

/**
* Jungfraujoch
* API to control Jungfraujoch developed by the Paul Scherrer Institute (Switzerland). Jungfraujoch is a data acquisition and analysis system for pixel array detectors, primarly PSI JUNGFRAU. Jungfraujoch uses FPGA boards to acquire data at high data rates. # License Clarification While this API definition is licensed under GPL-3.0, **the GPL copyleft provisions do not apply** when this file is used solely to generate OpenAPI clients or when implementing applications that interact with the API. Generated client code and applications using this API definition are not subject to the GPL license requirements and may be distributed under terms of your choosing. This exception is similar in spirit to the Linux Kernel's approach to userspace API headers and the GCC Runtime Library Exception. The Linux Kernel developers have explicitly stated that user programs that merely use the kernel interfaces (syscalls, ioctl definitions, etc.) are not derivative works of the kernel and are not subject to the terms of the GPL. This exception is intended to allow wider use of this API specification without imposing GPL requirements on applications that merely interact with the API, regardless of whether they communicate through network calls or other mechanisms.
*
* The version of the OpenAPI document: 1.0.0-rc.94
* Contact: filip.leonarski@psi.ch
*
* NOTE: This class is auto generated by OpenAPI Generator (https://openapi-generator.tech).
* https://openapi-generator.tech
* Do not edit the class manually.
*/
#include "Fpga_status_inner.h"
#include "Helpers.h"
#include <sstream>
namespace org::openapitools::server::model
{
Fpga_status_inner::Fpga_status_inner()
{
m_Pci_dev_id = "";
m_Serial_number = "";
m_Fw_version = "";
m_Base_mac_addr = "";
m_Eth_link_count = 0L;
m_Eth_link_status = 0L;
m_Power_usage_W = 0.0f;
m_Fpga_temp_C = 0.0f;
m_Hbm_temp_C = 0.0f;
m_Packets_udp = 0L;
m_Packets_sls = 0L;
m_Idle = false;
m_Pcie_link_speed = 0L;
m_Pcie_link_width = 0L;
}
void Fpga_status_inner::validate() const
{
std::stringstream msg;
if (!validate(msg))
{
throw org::openapitools::server::helpers::ValidationException(msg.str());
}
}
bool Fpga_status_inner::validate(std::stringstream& msg) const
{
return validate(msg, "");
}
bool Fpga_status_inner::validate(std::stringstream& msg, const std::string& pathPrefix) const
{
bool success = true;
const std::string _pathPrefix = pathPrefix.empty() ? "Fpga_status_inner" : pathPrefix;
return success;
}
bool Fpga_status_inner::operator==(const Fpga_status_inner& rhs) const
{
return
(getPciDevId() == rhs.getPciDevId())
&&
(getSerialNumber() == rhs.getSerialNumber())
&&
(getFwVersion() == rhs.getFwVersion())
&&
(getBaseMacAddr() == rhs.getBaseMacAddr())
&&
(getEthLinkCount() == rhs.getEthLinkCount())
&&
(getEthLinkStatus() == rhs.getEthLinkStatus())
&&
(getPowerUsageW() == rhs.getPowerUsageW())
&&
(getFpgaTempC() == rhs.getFpgaTempC())
&&
(getHbmTempC() == rhs.getHbmTempC())
&&
(getPacketsUdp() == rhs.getPacketsUdp())
&&
(getPacketsSls() == rhs.getPacketsSls())
&&
(isIdle() == rhs.isIdle())
&&
(getPcieLinkSpeed() == rhs.getPcieLinkSpeed())
&&
(getPcieLinkWidth() == rhs.getPcieLinkWidth())
;
}
bool Fpga_status_inner::operator!=(const Fpga_status_inner& rhs) const
{
return !(*this == rhs);
}
void to_json(nlohmann::json& j, const Fpga_status_inner& o)
{
j = nlohmann::json::object();
j["pci_dev_id"] = o.m_Pci_dev_id;
j["serial_number"] = o.m_Serial_number;
j["fw_version"] = o.m_Fw_version;
j["base_mac_addr"] = o.m_Base_mac_addr;
j["eth_link_count"] = o.m_Eth_link_count;
j["eth_link_status"] = o.m_Eth_link_status;
j["power_usage_W"] = o.m_Power_usage_W;
j["fpga_temp_C"] = o.m_Fpga_temp_C;
j["hbm_temp_C"] = o.m_Hbm_temp_C;
j["packets_udp"] = o.m_Packets_udp;
j["packets_sls"] = o.m_Packets_sls;
j["idle"] = o.m_Idle;
j["pcie_link_speed"] = o.m_Pcie_link_speed;
j["pcie_link_width"] = o.m_Pcie_link_width;
}
void from_json(const nlohmann::json& j, Fpga_status_inner& o)
{
j.at("pci_dev_id").get_to(o.m_Pci_dev_id);
j.at("serial_number").get_to(o.m_Serial_number);
j.at("fw_version").get_to(o.m_Fw_version);
j.at("base_mac_addr").get_to(o.m_Base_mac_addr);
j.at("eth_link_count").get_to(o.m_Eth_link_count);
j.at("eth_link_status").get_to(o.m_Eth_link_status);
j.at("power_usage_W").get_to(o.m_Power_usage_W);
j.at("fpga_temp_C").get_to(o.m_Fpga_temp_C);
j.at("hbm_temp_C").get_to(o.m_Hbm_temp_C);
j.at("packets_udp").get_to(o.m_Packets_udp);
j.at("packets_sls").get_to(o.m_Packets_sls);
j.at("idle").get_to(o.m_Idle);
j.at("pcie_link_speed").get_to(o.m_Pcie_link_speed);
j.at("pcie_link_width").get_to(o.m_Pcie_link_width);
}
std::string Fpga_status_inner::getPciDevId() const
{
return m_Pci_dev_id;
}
void Fpga_status_inner::setPciDevId(std::string const& value)
{
m_Pci_dev_id = value;
}
std::string Fpga_status_inner::getSerialNumber() const
{
return m_Serial_number;
}
void Fpga_status_inner::setSerialNumber(std::string const& value)
{
m_Serial_number = value;
}
std::string Fpga_status_inner::getFwVersion() const
{
return m_Fw_version;
}
void Fpga_status_inner::setFwVersion(std::string const& value)
{
m_Fw_version = value;
}
std::string Fpga_status_inner::getBaseMacAddr() const
{
return m_Base_mac_addr;
}
void Fpga_status_inner::setBaseMacAddr(std::string const& value)
{
m_Base_mac_addr = value;
}
int64_t Fpga_status_inner::getEthLinkCount() const
{
return m_Eth_link_count;
}
void Fpga_status_inner::setEthLinkCount(int64_t const value)
{
m_Eth_link_count = value;
}
int64_t Fpga_status_inner::getEthLinkStatus() const
{
return m_Eth_link_status;
}
void Fpga_status_inner::setEthLinkStatus(int64_t const value)
{
m_Eth_link_status = value;
}
float Fpga_status_inner::getPowerUsageW() const
{
return m_Power_usage_W;
}
void Fpga_status_inner::setPowerUsageW(float const value)
{
m_Power_usage_W = value;
}
float Fpga_status_inner::getFpgaTempC() const
{
return m_Fpga_temp_C;
}
void Fpga_status_inner::setFpgaTempC(float const value)
{
m_Fpga_temp_C = value;
}
float Fpga_status_inner::getHbmTempC() const
{
return m_Hbm_temp_C;
}
void Fpga_status_inner::setHbmTempC(float const value)
{
m_Hbm_temp_C = value;
}
int64_t Fpga_status_inner::getPacketsUdp() const
{
return m_Packets_udp;
}
void Fpga_status_inner::setPacketsUdp(int64_t const value)
{
m_Packets_udp = value;
}
int64_t Fpga_status_inner::getPacketsSls() const
{
return m_Packets_sls;
}
void Fpga_status_inner::setPacketsSls(int64_t const value)
{
m_Packets_sls = value;
}
bool Fpga_status_inner::isIdle() const
{
return m_Idle;
}
void Fpga_status_inner::setIdle(bool const value)
{
m_Idle = value;
}
int64_t Fpga_status_inner::getPcieLinkSpeed() const
{
return m_Pcie_link_speed;
}
void Fpga_status_inner::setPcieLinkSpeed(int64_t const value)
{
m_Pcie_link_speed = value;
}
int64_t Fpga_status_inner::getPcieLinkWidth() const
{
return m_Pcie_link_width;
}
void Fpga_status_inner::setPcieLinkWidth(int64_t const value)
{
m_Pcie_link_width = value;
}
} // namespace org::openapitools::server::model