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One analysis engine is built per worker thread, and each uploaded its own copy of tables that are pure functions of the detector geometry: the pixel -> azimuthal bin map and the per-pixel corrections (both in AzIntEngineGPU AND again in AdaptiveSpotFinderGPU, from the same mapping), plus the pixel mask. On an 18 Mpx detector that is ~224 MB per worker; with 32 workers ~7 GB of device memory held 32 identical copies. Upload each table once per GPU instead and hand every engine on that device a shared pointer to it. The cache is keyed by (device, source-vector address) because workers are pinned round-robin across GPUs, so on a multi-GPU node each device keeps its own copy - a kernel may only read memory resident on the device it runs on - and the table is freed on the device that allocated it. Entries are held weakly, so a table goes away with the last engine using it. Measured on an 18 Mpx detector, 32 worker threads, 16 GB card: the stills path went from exhausting the card (OOM in de-novo indexing) to 8.6 GB peak, and a normal rotation run from 14.6 GB to 7.4 GB - it had been running within 1.6 GB of the limit, so any larger detector or second GPU consumer would have tipped it over. Per-worker footprint drops 403 -> 173 MB. Merge statistics are unchanged on a six-crystal regression subset, including two-pass runs where the second pass rebuilds the mapping on refined geometry, and wall time is unchanged (13.5-13.8 s vs 13.8-14.1 s). Also take the launch configuration from the current device rather than device 0 in AzIntEngineGPU and ImagePreprocessorGPU: with round-robin pinning, device 0's SM count and shared-memory size can belong to a different card than the one the kernels use. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
146 lines
5.4 KiB
Plaintext
146 lines
5.4 KiB
Plaintext
// SPDX-FileCopyrightText: 2025 Filip Leonarski, Paul Scherrer Institute <filip.leonarski@psi.ch>
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// SPDX-License-Identifier: GPL-3.0-only
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#include "AzIntEngineGPU.h"
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inline void cuda_err(cudaError_t val) {
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if (val != cudaSuccess)
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throw JFJochException(JFJochExceptionCategory::GPUCUDAError, cudaGetErrorString(val));
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}
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__global__
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void gpu_azim_shared(
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const uint16_t *__restrict__ pixel_to_bin,
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const float *__restrict__ corrections,
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const int32_t *__restrict__ input_buffer,
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float *__restrict__ azint_sum,
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float *__restrict__ azint_sum2,
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uint32_t *__restrict__ azint_count,
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size_t num_pixels,
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int azint_bins) {
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extern __shared__ float shared[];
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float *s_sum = shared;
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float *s_sum2 = &s_sum[azint_bins];
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uint32_t *s_count = (uint32_t *) &s_sum2[azint_bins];
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// Initialize shared memory
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for (int i = threadIdx.x; i < azint_bins; i += blockDim.x) {
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s_sum[i] = 0.0f;
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s_sum2[i] = 0.0f;
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s_count[i] = 0;
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}
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__syncthreads();
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for (size_t idx = blockIdx.x * blockDim.x + threadIdx.x;
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idx < num_pixels;
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idx += blockDim.x * gridDim.x) {
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uint16_t bin = pixel_to_bin[idx];
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int32_t v = input_buffer[idx];
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bool valid = (v != INT32_MIN) & (v != INT32_MAX);
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if (bin < azint_bins && valid) {
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const float val = static_cast<float>(v) * corrections[idx];
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const float val2 = val * val;
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atomicAdd(&s_sum[bin], val);
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atomicAdd(&s_sum2[bin], val2);
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atomicAdd(&s_count[bin], 1);
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}
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}
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__syncthreads();
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// Merge to global memory
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for (unsigned int i = threadIdx.x; i < azint_bins; i += blockDim.x) {
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atomicAdd(&azint_sum[i], s_sum[i]);
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atomicAdd(&azint_sum2[i], s_sum2[i]);
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atomicAdd(&azint_count[i], s_count[i]);
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}
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}
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__global__
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void gpu_azim(
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const uint16_t *__restrict__ pixel_to_bin,
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const float *__restrict__ corrections,
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const int32_t *__restrict__ input_buffer,
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float *__restrict__ azint_sum,
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float *__restrict__ azint_sum2,
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uint32_t *__restrict__ azint_count,
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size_t num_pixels,
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int azint_bins) {
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for (size_t idx = blockIdx.x * blockDim.x + threadIdx.x;
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idx < num_pixels;
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idx += blockDim.x * gridDim.x) {
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uint16_t bin = pixel_to_bin[idx];
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int32_t v = input_buffer[idx];
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bool valid = (v != INT32_MIN) & (v != INT32_MAX);
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if (bin < azint_bins && valid) {
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const float val = static_cast<float>(v) * corrections[idx];
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const float val2 = val * val;
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atomicAdd(&azint_sum[bin], val);
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atomicAdd(&azint_sum2[bin], val2);
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atomicAdd(&azint_count[bin], 1);
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}
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}
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}
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AzIntEngineGPU::AzIntEngineGPU(const AzimuthalIntegrationMapping &integration, std::shared_ptr<CudaStream> stream)
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: AzIntEngine(integration),
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stream(stream),
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gpu_sum(azint_bins),
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gpu_sum2(azint_bins),
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gpu_count(azint_bins),
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cpu_sum_reg(azint_sum),
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cpu_sum2_reg(azint_sum2),
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cpu_count_reg(azint_count) {
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int device = 0;
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cuda_err(cudaGetDevice(&device)); // this worker's GPU, not necessarily 0
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cudaDeviceProp prop{};
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cuda_err(cudaGetDeviceProperties(&prop, device));
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threads = 128;
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blocks = 4 * prop.multiProcessorCount;
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shared_size = prop.sharedMemPerBlock;
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shared_needed = azint_bins * (2 * sizeof(float) + sizeof(uint32_t));
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// Geometry-only, so shared per GPU: the first engine on this device uploads them, the rest reuse
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// them. Keyed by the mapping's own vectors, which outlive every engine built from it.
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gpu_azint_correction = SharedDeviceTable(integration.Corrections().data(), npixel,
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integration.Corrections().data(), *stream);
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gpu_pixel_to_bin = SharedDeviceTable(integration.GetPixelToBin().data(), npixel,
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integration.GetPixelToBin().data(), *stream);
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}
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void AzIntEngineGPU::Run(const ImagePreprocessorBuffer &image, AzimuthalIntegrationProfile &profile) {
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if (image.size() != integration.GetPixelToBin().size())
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throw std::runtime_error("ImageSpotFinder::AzimIntegration: Mismatch in size");
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cuda_err(cudaMemsetAsync(gpu_sum, 0, sizeof(float) * azint_bins, *stream));
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cuda_err(cudaMemsetAsync(gpu_sum2, 0, sizeof(float) * azint_bins, *stream));
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cuda_err(cudaMemsetAsync(gpu_count, 0, sizeof(uint32_t) * azint_bins, *stream));
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if (shared_needed < shared_size) {
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gpu_azim_shared<<<blocks, threads, shared_needed, *stream>>>(
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gpu_pixel_to_bin->get(),gpu_azint_correction->get(),image.getGPUBuffer(), gpu_sum, gpu_sum2,
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gpu_count, npixel, azint_bins
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);
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} else {
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gpu_azim<<<blocks, threads, 0, *stream>>>(
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gpu_pixel_to_bin->get(),gpu_azint_correction->get(),image.getGPUBuffer(), gpu_sum, gpu_sum2,
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gpu_count, npixel, azint_bins
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);
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}
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cudaMemcpyAsync(azint_sum.data(), gpu_sum, sizeof(float) * azint_bins, cudaMemcpyDeviceToHost, *stream);
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cudaMemcpyAsync(azint_sum2.data(), gpu_sum2, sizeof(float) * azint_bins, cudaMemcpyDeviceToHost, *stream);
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cudaMemcpyAsync(azint_count.data(), gpu_count, sizeof(uint32_t) * azint_bins, cudaMemcpyDeviceToHost, *stream);
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cuda_err(cudaStreamSynchronize(*stream));
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profile.Clear(integration);
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profile.Add(azint_sum, azint_sum2, azint_count);
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}
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