The peak search gave each of the 16384 directions to one thread, a chain of dependent FP64 additions over 1572 bins - latency-bound on a card that holds far more threads. Each direction's spectrum is now split into four consecutive runs of bins, one thread each, and the runs' first-best peaks are combined in order with the same strict comparison, so the first bin of highest prominence is still the one returned. A run after the first sums its starting window afresh rather than carrying the running sum in. The double sums of float magnitudes are exact unless a magnitude is below ~1e-9 of its window sum, so the background is the same double: 0 of 491520 directions differ in a synthetic still/rotation harness, and the hkl of 3000 stills frames (-X fft) is byte-identical. Kernel (isolated, RTX 5080): 0.87 -> 0.65 ms per call. The stills de-novo loop gains ~4% (128 -> 133 frames/s, ABAB, load ~10): the FFT chain as a whole is bound by GPU memory bandwidth under the indexer pool's concurrency, so even a background in float (6x faster kernel, not adopted) gives only ~9%. Rotation first pass: FFT kernels are ~3% of the indexing step. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
329 lines
17 KiB
Plaintext
329 lines
17 KiB
Plaintext
// SPDX-FileCopyrightText: 2025 Filip Leonarski, Paul Scherrer Institute <filip.leonarski@psi.ch>
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// SPDX-License-Identifier: GPL-3.0-only
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#include "FFTIndexerGPU.h"
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#include <cufft.h>
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#include <cmath>
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#include <algorithm>
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__device__ __host__ inline float complex_abs(const cufftComplex &z) {
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return sqrtf(z.x * z.x + z.y * z.y);
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}
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// The magnitudes of the transform, transposed to bin-major order: mag_t[bin * directions + direction].
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// The R2C output is direction-major, and the peak search gives each direction to one thread, so read
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// straight from it neighbouring lanes are a whole spectrum apart - every load a separate sector, three
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// streams per thread. Transposed, a warp reads 32 consecutive floats per bin. On an idle card that buys
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// nothing (the search is latency-bound either way, and the transpose costs its own pass); with the
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// stills indexer pool's streams sharing the card it is the difference between 67 and 98 frames/s
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// (measured). A 32x32 tile in shared memory keeps both the read and the write coalesced. The search took
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// complex_abs of the same values, so the magnitudes are bit for bit the ones it computed itself.
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__global__ void magnitude_transpose(const cufftComplex *__restrict__ d_output,
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const int out_len,
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const int directions_size,
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float *__restrict__ mag_t) {
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__shared__ float tile[32][33];
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const int bin0 = blockIdx.x * 32;
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const int dir0 = blockIdx.y * 32;
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for (int r = threadIdx.y; r < 32; r += blockDim.y) {
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const int dir = dir0 + r;
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const int bin = bin0 + threadIdx.x;
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if (dir < directions_size && bin < out_len)
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tile[r][threadIdx.x] = complex_abs(d_output[static_cast<size_t>(dir) * out_len + bin]);
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}
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__syncthreads();
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for (int r = threadIdx.y; r < 32; r += blockDim.y) {
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const int bin = bin0 + r;
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const int dir = dir0 + threadIdx.x;
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if (dir < directions_size && bin < out_len)
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mag_t[static_cast<size_t>(bin) * directions_size + dir] = tile[threadIdx.x][r];
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}
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}
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// The peak search splits each direction's spectrum into PEAK_CHUNKS consecutive runs of bins and gives each
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// run to its own thread, which keeps a running window sum over its run; one thread per direction leaves the
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// card nearly empty (16384 threads), and this search, a chain of dependent FP64 additions per thread, is
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// then latency-bound. A block holds 32 directions (x, so the bin-major loads stay coalesced) times PEAK_CHUNKS.
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// A run after the first sums its starting window afresh instead of carrying the sum in from the bins before
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// it. That is the same double wherever the sums are exact, and they are: a window of float magnitudes fits
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// a double's 53 bits unless one of them is below ~1e-9 of the window sum (no difference over 3000 stills
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// frames and a rotation-style synthetic set). More runs buy nothing: the card's FP64 rate is then the limit.
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constexpr int PEAK_CHUNKS = 4;
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__global__ void calculate_fft_result(
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const float *__restrict__ mag_t,
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const float max_length_A,
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const float min_length_A,
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const int histogram_size,
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const int bg_half,
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const int directions_size,
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FFTResult *d_results) {
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__shared__ float run_prom[PEAK_CHUNKS][32];
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__shared__ float run_len[PEAK_CHUNKS][32];
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const int i = blockIdx.x * 32 + threadIdx.x;
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const int run = threadIdx.y;
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float best_prom = 0.0f;
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float best_len = -1.0f;
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if (i < directions_size) {
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const int out_len = (histogram_size / 2) + 1;
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// |transform| of bin k of this direction, from the bin-major array (magnitude_transpose)
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const auto mag_at = [&](int k) { return mag_t[static_cast<size_t>(k) * directions_size + i]; };
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const float len_coeff = 2.0f * max_length_A / static_cast<float>(histogram_size);
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// Pick the peak by PROMINENCE above a running-mean background of half-width bg_half:
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// the projected histogram has a broad low-frequency envelope whose magnitude can
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// exceed the true lattice peaks, so a plain argmax|spec| returns a short envelope
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// vector on weak/pink-beam frames. Subtracting the local mean removes that envelope
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// while sharp lattice peaks keep their height (mirrors FFTIndexerCPU).
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//
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// The window has a constant width, slid inward at the ends instead of truncated (see
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// FFTIndexerCPU): a peak within bg_half of either end - where the LONGEST cells sit - otherwise
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// gets a one-sided background and a biased prominence. A spectrum shorter than the window
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// averages over all of itself.
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const int width = min(2 * bg_half, out_len - 1);
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const int lo_max = out_len - 1 - width;
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const auto window_lo = [&](int j) { return min(max(j - bg_half, 0), lo_max); };
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// The window width is fixed, so the mean divides by one number throughout. A double division
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// is a long iteration on the FP64 units a consumer card has few of; multiplying by the correctly
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// rounded reciprocal and correcting the quotient once with its exact remainder gives the
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// correctly rounded quotient - the same double the division returns (Markstein (1990) IBM J.
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// Res. Dev. 34, 111-119).
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const double count = width + 1;
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const double inv_count = 1.0 / count;
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const int j0 = (out_len * run) / PEAK_CHUNKS;
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const int j1 = (out_len * (run + 1)) / PEAK_CHUNKS;
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int lo = window_lo(j0);
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double winsum = 0.0;
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for (int k = lo; k <= lo + width; ++k)
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winsum += mag_at(k);
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for (int j = j0; j < j1; ++j) {
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if (window_lo(j) > lo) {
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winsum += mag_at(lo + width + 1);
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winsum -= mag_at(lo);
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++lo;
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}
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const float len = len_coeff * static_cast<float>(j);
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if (len <= min_length_A)
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continue;
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const double q = __dmul_rn(winsum, inv_count);
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const float bg = static_cast<float>(__fma_rn(__fma_rn(-q, count, winsum), inv_count, q));
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const float prom = mag_at(j) - bg;
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if (prom > best_prom) {
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best_prom = prom;
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best_len = len;
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}
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}
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}
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run_prom[run][threadIdx.x] = best_prom;
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run_len[run][threadIdx.x] = best_len;
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__syncthreads();
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// Each run kept its first bin of highest prominence; taking the runs in order with the same strict
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// comparison gives the direction's first bin of highest prominence.
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if (run == 0 && i < directions_size) {
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FFTResult result{.magnitude = 0.0f, .direction = i, .length = -1};
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for (int r = 0; r < PEAK_CHUNKS; ++r) {
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if (run_prom[r][threadIdx.x] > result.magnitude) {
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result.magnitude = run_prom[r][threadIdx.x];
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result.length = run_len[r][threadIdx.x];
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}
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}
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d_results[i] = result;
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}
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}
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__global__ void histogram_kernel(const float *__restrict__ coord_x,
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const float *__restrict__ coord_y,
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const float *__restrict__ coord_z,
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const float *__restrict__ dir_x,
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const float *__restrict__ dir_y,
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const float *__restrict__ dir_z,
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float histogram_spacing,
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int histogram_size,
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int coord_size,
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int direction_vectors_size,
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float *__restrict__ output) {
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int direction_idx = blockIdx.x * blockDim.x + threadIdx.x;
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if (direction_idx < direction_vectors_size) {
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int base_offset = direction_idx * histogram_size;
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for (int i = 0; i < histogram_size; i++)
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output[base_offset + i] = 0;
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for (int i = 0; i < coord_size; i++) {
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float dot = fabsf(
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dir_x[direction_idx] * coord_x[i] + dir_y[direction_idx] * coord_y[i] + dir_z[direction_idx] * coord_z[
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i]);
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int64_t bin = static_cast<int64_t>(dot / histogram_spacing);
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if (bin >= 0 && bin < histogram_size)
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output[base_offset + bin] += 1.0;
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}
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}
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}
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// The same histogram, one block per direction with the bins in shared memory.
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//
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// The kernel above gives a whole direction to a single thread, so neighbouring lanes write
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// histogram_size floats apart - 12.6 kB at the default sizing. Every warp instruction then touches 32
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// separate sectors of a buffer that is hundreds of megabytes (16384 directions x 3142 bins), with no
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// hope of staying in a 4 MB L2, and the projection loop becomes 160 million scattered global
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// read-modify-writes.
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//
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// The bins are counts, so here they are integers in shared memory. That matters twice: an integer
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// atomicAdd is a real shared-memory instruction on Turing and Ada, where the float one compiles to a
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// compare-and-swap retry loop; and a count below 2^24 converts to float exactly, so the output is bit
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// for bit what the repeated `+= 1.0` above produces. The division by histogram_spacing stays a
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// division - turning it into a multiply by the reciprocal would move a spot across a bin edge.
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__global__ void histogram_shared_kernel(const float *__restrict__ coord_x,
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const float *__restrict__ coord_y,
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const float *__restrict__ coord_z,
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const float *__restrict__ dir_x,
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const float *__restrict__ dir_y,
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const float *__restrict__ dir_z,
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float histogram_spacing,
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int histogram_size,
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int coord_size,
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int direction_vectors_size,
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float *__restrict__ output) {
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extern __shared__ unsigned int bins[];
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const int direction_idx = blockIdx.x;
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if (direction_idx >= direction_vectors_size)
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return;
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for (int i = threadIdx.x; i < histogram_size; i += blockDim.x)
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bins[i] = 0;
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__syncthreads();
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const float dx = dir_x[direction_idx], dy = dir_y[direction_idx], dz = dir_z[direction_idx];
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for (int i = threadIdx.x; i < coord_size; i += blockDim.x) {
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const float dot = fabsf(dx * coord_x[i] + dy * coord_y[i] + dz * coord_z[i]);
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const int64_t bin = static_cast<int64_t>(dot / histogram_spacing);
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if (bin >= 0 && bin < histogram_size)
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atomicAdd(&bins[bin], 1u);
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}
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__syncthreads();
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float *out = output + static_cast<size_t>(direction_idx) * static_cast<size_t>(histogram_size);
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for (int i = threadIdx.x; i < histogram_size; i += blockDim.x)
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out[i] = static_cast<float>(bins[i]);
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}
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inline void cuda_err(cudaError_t val) {
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if (val != cudaSuccess)
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throw JFJochException(JFJochExceptionCategory::GPUCUDAError, cudaGetErrorString(val));
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}
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inline void cuda_err(cufftResult val) {
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if (val != cufftResult::CUFFT_SUCCESS)
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throw JFJochException(JFJochExceptionCategory::GPUCUDAError, "CuFFT error");
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}
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FFTIndexerGPU::FFTIndexerGPU(const IndexingSettings &settings)
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: FFTIndexer(settings), result_fft_reg(result_fft) {
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d_input_fft = CudaDevicePtr<float>(input_size);
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d_output_fft = CudaDevicePtr<cufftComplex>(output_size);
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d_result_fft = CudaDevicePtr<FFTResult>(nDirections);
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d_spot_x = CudaDevicePtr<float>(FFT_MAX_SPOTS);
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d_spot_y = CudaDevicePtr<float>(FFT_MAX_SPOTS);
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d_spot_z = CudaDevicePtr<float>(FFT_MAX_SPOTS);
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spot_x = CudaHostPtr<float>(FFT_MAX_SPOTS);
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spot_y = CudaHostPtr<float>(FFT_MAX_SPOTS);
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spot_z = CudaHostPtr<float>(FFT_MAX_SPOTS);
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d_dir_x = CudaDevicePtr<float>(nDirections);
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d_dir_y = CudaDevicePtr<float>(nDirections);
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d_dir_z = CudaDevicePtr<float>(nDirections);
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DirectionsChanged();
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int n[1] = {static_cast<int32_t>(histogram_size)}; // Size of the FFT along a single dimension
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plan = CudaFFTPlan(1, n, nullptr, 1, histogram_size, nullptr, 1, histogram_size / 2 + 1, CUFFT_R2C,
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nDirections);
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cuda_err(cufftSetStream(plan, stream));
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}
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void FFTIndexerGPU::DirectionsChanged() {
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std::vector<float> dir_x(nDirections), dir_y(nDirections), dir_z(nDirections);
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for (int i = 0; i < nDirections; i++) {
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dir_x[i] = direction_vectors.at(i).x;
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dir_y[i] = direction_vectors.at(i).y;
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dir_z[i] = direction_vectors.at(i).z;
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}
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// Checked like every other CUDA call here: a silently failed upload leaves the device holding the
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// PREVIOUS grid, so the directions the host reads the results against are not the ones the kernel
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// used - wrong rows reported as good ones, and nothing says so. On the engine's stream, which the
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// kernels reading them run on: a cudaMemcpy on the NULL stream is not ordered before those.
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cuda_err(cudaMemcpyAsync(d_dir_x, dir_x.data(), nDirections * sizeof(float), cudaMemcpyHostToDevice, stream));
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cuda_err(cudaMemcpyAsync(d_dir_y, dir_y.data(), nDirections * sizeof(float), cudaMemcpyHostToDevice, stream));
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cuda_err(cudaMemcpyAsync(d_dir_z, dir_z.data(), nDirections * sizeof(float), cudaMemcpyHostToDevice, stream));
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}
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void FFTIndexerGPU::ExecuteFFT(const std::vector<Coord> &coord, size_t nspots) {
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int l_blockDim = 128;
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int l_gridDim = (direction_vectors.size() + l_blockDim - 1) / l_blockDim;
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for (int i = 0; i < nspots; i++) {
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spot_x[i] = coord[i].x;
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spot_y[i] = coord[i].y;
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spot_z[i] = coord[i].z;
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}
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cuda_err(cudaMemcpyAsync(d_spot_x, spot_x, nspots * sizeof(float), cudaMemcpyHostToDevice, stream));
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cuda_err(cudaMemcpyAsync(d_spot_y, spot_y, nspots * sizeof(float), cudaMemcpyHostToDevice, stream));
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cuda_err(cudaMemcpyAsync(d_spot_z, spot_z, nspots * sizeof(float), cudaMemcpyHostToDevice, stream));
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// Shared-memory bins where they fit (they do at any sane sizing - 12.6 kB at the defaults), the
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// thread-per-direction kernel where they do not.
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const size_t hist_shared_bytes = static_cast<size_t>(histogram_size) * sizeof(unsigned int);
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if (hist_shared_bytes <= 48 * 1024) {
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histogram_shared_kernel<<<direction_vectors.size(), 256, hist_shared_bytes, stream>>>(
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d_spot_x, d_spot_y, d_spot_z, d_dir_x, d_dir_y, d_dir_z,
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histogram_spacing, histogram_size, nspots, direction_vectors.size(), d_input_fft);
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} else {
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histogram_kernel<<<l_gridDim, l_blockDim, 0, stream>>>(d_spot_x, d_spot_y, d_spot_z,
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d_dir_x, d_dir_y, d_dir_z,
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histogram_spacing, histogram_size,
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nspots,
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direction_vectors.size(),
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d_input_fft);
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}
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cuda_err(cudaGetLastError());
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cuda_err(cufftExecR2C(plan, d_input_fft, d_output_fft));
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// Background half-window ~15 A (length-based, so independent of histogram sizing); see
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// FFTIndexerCPU for the prominence-vs-envelope rationale and the validated optimum.
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const double len_coeff = 2.0 * static_cast<double>(max_length_A) / static_cast<double>(histogram_size);
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const int bg_half = std::max(1, static_cast<int>(std::lround(15.0 / len_coeff)));
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const int out_len = static_cast<int>(histogram_size / 2 + 1);
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const dim3 tr_grid((out_len + 31) / 32, (direction_vectors.size() + 31) / 32);
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// The histogram has been transformed and is not read again, so its buffer - histogram_size floats
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// per direction, more than the out_len magnitudes need - holds them.
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float *d_mag_t = d_input_fft;
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magnitude_transpose<<<tr_grid, dim3(32, 8), 0, stream>>>(d_output_fft, out_len,
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direction_vectors.size(), d_mag_t);
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cuda_err(cudaGetLastError());
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const int peak_grid = (static_cast<int>(direction_vectors.size()) + 31) / 32;
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calculate_fft_result<<<peak_grid, dim3(32, PEAK_CHUNKS), 0, stream>>>(d_mag_t,
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max_length_A, min_length_A, histogram_size,
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bg_half,
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direction_vectors.size(), d_result_fft);
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cuda_err(cudaGetLastError());
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cuda_err(cudaMemcpyAsync(result_fft.data(), d_result_fft, direction_vectors.size() * sizeof(FFTResult),
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cudaMemcpyDeviceToHost, stream));
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cuda_err(cudaStreamSynchronize(stream));
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}
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