The GPU engine copies six small per-ring arrays back to the host every frame - the clipped raw sum/sum2/count that the threshold is computed from, and the plain corrected sum/sum2/count that become the azimuthal profile. They were plain std::vectors, so the copies landed in pageable memory, and a device-to-host copy into pageable memory blocks the calling thread until it has completed whatever stream it was issued on. The profile snapshot sits between the plain pass and the two sigma-clip passes, so Detect() stopped there and the device then sat idle while the host caught up and enqueued the rest. Register them, as AzIntEngineGPU already does with its own, and the copies are genuinely asynchronous. Measured on a 4.5 Mpixel frame: 0.647 -> 0.621 ms per frame. Nothing else changes - the spot list and the profile are unaffected. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
366 lines
18 KiB
Plaintext
366 lines
18 KiB
Plaintext
// SPDX-FileCopyrightText: 2026 Filip Leonarski, Paul Scherrer Institute <filip.leonarski@psi.ch>
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// SPDX-License-Identifier: GPL-3.0-only
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#include "AdaptiveSpotFinderGPU.h"
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#include "AdaptiveThreshold.h"
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#include "../../common/JFJochException.h"
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namespace {
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inline void cuda_err(cudaError_t val) {
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if (val != cudaSuccess)
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throw JFJochException(JFJochExceptionCategory::GPUCUDAError, cudaGetErrorString(val));
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}
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// One ring reduction, staging per-ring sums in shared memory (fast path). Shared layout:
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// [ sum(float) | sum2(float) | count(uint32) | sum_corr(float) | sum2_corr(float) ] x nbins
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// The corrected arrays exist only when accumulate_corrected is true (the plain first pass); on the
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// sigma-clip passes only the first three are launched/used.
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__global__ void reduce_rings_shared(
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const uint16_t *__restrict__ pixel_to_bin,
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const float *__restrict__ corrections,
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const int32_t *__restrict__ image,
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const float *__restrict__ mean,
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const float *__restrict__ sigma,
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float clip_k,
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bool accumulate_corrected,
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unsigned long long *__restrict__ sum, unsigned long long *__restrict__ sum2, uint32_t *__restrict__ count,
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float *__restrict__ sum_corr, float *__restrict__ sum2_corr,
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size_t npix, int nbins) {
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// The raw accumulators are INTEGERS, not floats. A preprocessed pixel is an exact int32 (the
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// masked and saturated sentinels are skipped below), so v and v*v are exact in 64 bits and
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// integer addition is associative - which makes the ring mean and sigma, and therefore the
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// detection threshold, independent of the order the atomics happen to arrive in. With float
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// accumulators the threshold moved in its last bits between runs, and because detection compares
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// an integer pixel value against it, a threshold crossing an integer flipped every pixel of that
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// value in the ring at once.
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// The CORRECTED sums stay float: they are a pixel value times a float correction, so there is no
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// exact integer form. They feed the reported azimuthal profile, not the detection decision.
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extern __shared__ unsigned long long sh[];
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unsigned long long *s_sum = sh; // signed value carried as two's complement
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unsigned long long *s_sum2 = &s_sum[nbins];
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uint32_t *s_count = reinterpret_cast<uint32_t *>(&s_sum2[nbins]);
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float *s_sum_corr = reinterpret_cast<float *>(&s_count[nbins]);
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float *s_sum2_corr = &s_sum_corr[nbins];
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for (int i = threadIdx.x; i < nbins; i += blockDim.x) {
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s_sum[i] = 0;
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s_sum2[i] = 0;
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s_count[i] = 0;
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if (accumulate_corrected) {
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s_sum_corr[i] = 0.0f;
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s_sum2_corr[i] = 0.0f;
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}
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}
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__syncthreads();
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for (size_t idx = blockIdx.x * blockDim.x + threadIdx.x; idx < npix; idx += blockDim.x * gridDim.x) {
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const int32_t v = image[idx];
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if (v == INT32_MIN || v == INT32_MAX) continue;
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const uint16_t b = pixel_to_bin[idx];
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if (b >= nbins) continue;
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const float fv = static_cast<float>(v);
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if (clip_k > 0.0f) {
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const float lo = mean[b] - clip_k * sigma[b];
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const float hi = mean[b] + clip_k * sigma[b];
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if (fv < lo || fv > hi) continue;
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}
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atomicAdd(&s_sum[b], static_cast<unsigned long long>(static_cast<long long>(v)));
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atomicAdd(&s_sum2[b], static_cast<unsigned long long>(static_cast<long long>(v) * v));
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atomicAdd(&s_count[b], 1u);
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if (accumulate_corrected) {
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const float cv = fv * corrections[idx];
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atomicAdd(&s_sum_corr[b], cv);
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atomicAdd(&s_sum2_corr[b], cv * cv);
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}
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}
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__syncthreads();
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for (int i = threadIdx.x; i < nbins; i += blockDim.x) {
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atomicAdd(&sum[i], s_sum[i]);
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atomicAdd(&sum2[i], s_sum2[i]);
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atomicAdd(&count[i], s_count[i]);
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if (accumulate_corrected) {
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atomicAdd(&sum_corr[i], s_sum_corr[i]);
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atomicAdd(&sum2_corr[i], s_sum2_corr[i]);
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}
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}
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}
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// Same reduction with direct global atomics (used only when nbins is too large to stage in shared
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// memory - a rare, high-bin-count configuration).
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__global__ void reduce_rings_global(
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const uint16_t *__restrict__ pixel_to_bin,
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const float *__restrict__ corrections,
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const int32_t *__restrict__ image,
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const float *__restrict__ mean,
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const float *__restrict__ sigma,
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float clip_k,
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bool accumulate_corrected,
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unsigned long long *__restrict__ sum, unsigned long long *__restrict__ sum2, uint32_t *__restrict__ count,
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float *__restrict__ sum_corr, float *__restrict__ sum2_corr,
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size_t npix, int nbins) {
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for (size_t idx = blockIdx.x * blockDim.x + threadIdx.x; idx < npix; idx += blockDim.x * gridDim.x) {
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const int32_t v = image[idx];
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if (v == INT32_MIN || v == INT32_MAX) continue;
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const uint16_t b = pixel_to_bin[idx];
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if (b >= nbins) continue;
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const float fv = static_cast<float>(v);
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if (clip_k > 0.0f) {
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const float lo = mean[b] - clip_k * sigma[b];
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const float hi = mean[b] + clip_k * sigma[b];
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if (fv < lo || fv > hi) continue;
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}
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atomicAdd(&sum[b], static_cast<unsigned long long>(static_cast<long long>(v)));
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atomicAdd(&sum2[b], static_cast<unsigned long long>(static_cast<long long>(v) * v));
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atomicAdd(&count[b], 1u);
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if (accumulate_corrected) {
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const float cv = fv * corrections[idx];
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atomicAdd(&sum_corr[b], cv);
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atomicAdd(&sum2_corr[b], cv * cv);
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}
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}
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}
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// Per-ring mean/sigma from the current raw accumulators. Rings with no pixels this pass keep their
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// previous value (matches the CPU, which leaves ring_mean/ring_sigma untouched when the count is 0).
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__global__ void finalize_rings(const unsigned long long *__restrict__ sum,
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const unsigned long long *__restrict__ sum2,
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const uint32_t *__restrict__ count,
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float *__restrict__ mean, float *__restrict__ sigma, int nbins) {
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for (int b = blockIdx.x * blockDim.x + threadIdx.x; b < nbins; b += blockDim.x * gridDim.x) {
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if (count[b] > 0) {
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// In double, then rounded to float for the clip predicate - the same two steps, in the same
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// order and the same types, as AdaptiveSpotFinderCPU::AccumulateRings.
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const double m = static_cast<double>(static_cast<long long>(sum[b])) / count[b];
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const double var = fmax(0.0, static_cast<double>(sum2[b]) / count[b] - m * m);
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mean[b] = static_cast<float>(m);
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sigma[b] = static_cast<float>(sqrt(var));
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}
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}
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}
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// Flag strong pixels (value >= ring threshold, or saturated) into the packed bit buffer. Strong
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// pixels are sparse, so a plain atomicOr per strong pixel is simpler than warp aggregation and the
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// contention is negligible. Mirrors AdaptiveSpotFinderCPU Stage C exactly.
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__global__ void flag_strong(const int32_t *__restrict__ image,
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const uint16_t *__restrict__ pixel_to_bin,
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const float *__restrict__ thr,
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uint32_t *__restrict__ strong,
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size_t npix, int nbins) {
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for (size_t idx = blockIdx.x * blockDim.x + threadIdx.x; idx < npix; idx += blockDim.x * gridDim.x) {
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const int32_t v = image[idx];
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bool s = false;
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if (v == INT32_MAX) {
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s = true;
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} else if (v != INT32_MIN) {
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const uint16_t b = pixel_to_bin[idx];
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if (b < nbins && static_cast<float>(v) >= thr[b])
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s = true;
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}
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if (s)
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atomicOr(&strong[idx / 32], 1u << (idx % 32));
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}
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}
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} // namespace
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AdaptiveSpotFinderGPU::AdaptiveSpotFinderGPU(const AzimuthalIntegrationMapping &in_mapping,
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std::shared_ptr<CudaStream> in_stream)
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: ImageSpotFinder(static_cast<int32_t>(in_mapping.GetWidth()),
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static_cast<int32_t>(in_mapping.GetHeight()), false),
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mapping(in_mapping),
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stream(in_stream),
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nbins(in_mapping.GetBinNumber()),
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npix(in_mapping.GetPixelToBin().size()),
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gpu_sum(nbins),
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gpu_sum2(nbins),
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gpu_count(nbins),
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gpu_mean(nbins),
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gpu_sigma(nbins),
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gpu_sum_corr(nbins),
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gpu_sum2_corr(nbins),
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gpu_thr(nbins),
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gpu_strong(OutputSize()),
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host_sum(nbins),
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host_sum2(nbins),
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host_count(nbins),
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host_bkg(nbins, NAN),
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prof_sum(nbins),
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prof_sum2(nbins),
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prof_count(nbins),
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host_sum_reg(host_sum),
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host_sum2_reg(host_sum2),
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host_count_reg(host_count),
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prof_sum_reg(prof_sum),
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prof_sum2_reg(prof_sum2),
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prof_count_reg(prof_count),
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extractor(static_cast<int32_t>(in_mapping.GetWidth()),
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static_cast<int32_t>(in_mapping.GetHeight()), std::move(in_stream)),
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last_profile(in_mapping) {
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// The current device, not device 0: callers round-robin engines across GPUs, so device 0's shared
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// memory and SM count can belong to a different card than the one these kernels launch on.
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int device = 0;
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cuda_err(cudaGetDevice(&device));
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cudaDeviceProp prop{};
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cuda_err(cudaGetDeviceProperties(&prop, device));
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// Eight blocks per SM, not four. Both kernels are grid-stride loops, so any grid is correct and
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// a device that cannot co-schedule eight simply queues the rest - but four left only 512 of the
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// 1536 threads an SM can hold resident (33%), and reduce_rings_shared is bound by shared-memory
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// atomic replay rather than by bandwidth, which is exactly the case that wants more resident
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// warps to hide the serialisation. The per-block histogram is nbins * 20 B (~9.6 kB at the
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// default 0.01 1/A spacing), so eight blocks fit in an SM's shared memory with room to spare.
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reduce_blocks = 8 * prop.multiProcessorCount;
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// flag_strong stays at four: it is bandwidth-shaped rather than atomic-bound, and eight
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// measured no better (181 vs 175 us/launch).
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flag_blocks = 4 * prop.multiProcessorCount;
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shared_plain = static_cast<size_t>(nbins) * (2 * sizeof(unsigned long long) + 2 * sizeof(float) + sizeof(uint32_t));
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shared_clip = static_cast<size_t>(nbins) * (2 * sizeof(unsigned long long) + sizeof(uint32_t));
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use_shared = (shared_plain < prop.sharedMemPerBlock);
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// Both tables are functions of the detector geometry alone, so they are uploaded once per GPU and
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// shared: the azimuthal-integration engine in the same worker reads the very same two arrays.
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gpu_pixel_to_bin = SharedDeviceTable(mapping.GetPixelToBin().data(), npix,
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mapping.GetPixelToBin().data(), *stream);
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gpu_corrections = SharedDeviceTable(mapping.Corrections().data(), npix,
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mapping.Corrections().data(), *stream);
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}
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void AdaptiveSpotFinderGPU::ReducePass(const ImagePreprocessorBuffer &image, float clip_k,
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bool accumulate_corrected) {
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if (use_shared) {
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const size_t shared = accumulate_corrected ? shared_plain : shared_clip;
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reduce_rings_shared<<<reduce_blocks, reduce_threads, shared, *stream>>>(
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gpu_pixel_to_bin->get(), gpu_corrections->get(), image.getGPUBuffer(), gpu_mean, gpu_sigma,
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clip_k, accumulate_corrected, gpu_sum, gpu_sum2, gpu_count, gpu_sum_corr, gpu_sum2_corr,
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npix, nbins);
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} else {
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reduce_rings_global<<<reduce_blocks, reduce_threads, 0, *stream>>>(
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gpu_pixel_to_bin->get(), gpu_corrections->get(), image.getGPUBuffer(), gpu_mean, gpu_sigma,
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clip_k, accumulate_corrected, gpu_sum, gpu_sum2, gpu_count, gpu_sum_corr, gpu_sum2_corr,
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npix, nbins);
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}
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}
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void AdaptiveSpotFinderGPU::FinalizeStats() {
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const int threads = 128;
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const int blocks = (nbins + threads - 1) / threads;
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finalize_rings<<<blocks, threads, 0, *stream>>>(gpu_sum, gpu_sum2, gpu_count, gpu_mean, gpu_sigma, nbins);
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}
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// Host reproduction of AdaptiveSpotFinderCPU Stage B, from the clipped raw per-ring stats.
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void AdaptiveSpotFinderGPU::ComputeThresholds(const SpotFindingSettings &settings) {
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int64_t n_total = 0;
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double g_sum = 0.0, g_sum2 = 0.0;
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for (int b = 0; b < nbins; ++b) {
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n_total += host_count[b];
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g_sum += static_cast<double>(static_cast<int64_t>(host_sum[b]));
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g_sum2 += static_cast<double>(host_sum2[b]);
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}
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if (n_total == 0) {
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host_thr.clear();
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std::fill(host_bkg.begin(), host_bkg.end(), NAN);
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return;
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}
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const double E = std::max(1.0f, settings.false_pixels_per_frame);
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double p = E / static_cast<double>(n_total);
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p = std::min(std::max(p, 1e-9), 0.1);
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const float z = static_cast<float>(adaptive_threshold::NormalQuantile(1.0 - p));
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const double g_mean = g_sum / n_total;
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const double g_sigma = std::sqrt(std::max(0.0, g_sum2 / n_total - g_mean * g_mean));
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const float g_thr = adaptive_threshold::RingThreshold(static_cast<float>(g_mean),
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static_cast<float>(g_sigma), p, z);
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host_thr.assign(nbins, 0.0f);
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for (int b = 0; b < nbins; ++b) {
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if (host_count[b] < adaptive_threshold::MIN_RING_PIXELS) {
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host_thr[b] = g_thr;
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host_bkg[b] = NAN;
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} else {
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const double m = static_cast<double>(static_cast<int64_t>(host_sum[b])) / host_count[b];
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const double var = std::max(0.0, static_cast<double>(host_sum2[b]) / host_count[b] - m * m);
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host_thr[b] = adaptive_threshold::RingThreshold(static_cast<float>(m),
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static_cast<float>(std::sqrt(var)), p, z);
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host_bkg[b] = static_cast<float>(m);
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}
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}
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}
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void AdaptiveSpotFinderGPU::Detect(const ImagePreprocessorBuffer &image,
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const SpotFindingSettings &settings) {
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if (image.size() != npix)
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throw JFJochException(JFJochExceptionCategory::InputParameterInvalid,
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"AdaptiveSpotFinderGPU::Detect: mismatch in pixel size");
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// --- Stage A: robust per-ring background (one plain pass + two sigma-clip passes) ---
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cuda_err(cudaMemsetAsync(gpu_sum, 0, sizeof(unsigned long long) * nbins, *stream));
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cuda_err(cudaMemsetAsync(gpu_sum2, 0, sizeof(unsigned long long) * nbins, *stream));
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cuda_err(cudaMemsetAsync(gpu_count, 0, sizeof(uint32_t) * nbins, *stream));
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cuda_err(cudaMemsetAsync(gpu_mean, 0, sizeof(float) * nbins, *stream));
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cuda_err(cudaMemsetAsync(gpu_sigma, 0, sizeof(float) * nbins, *stream));
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cuda_err(cudaMemsetAsync(gpu_sum_corr, 0, sizeof(float) * nbins, *stream));
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cuda_err(cudaMemsetAsync(gpu_sum2_corr, 0, sizeof(float) * nbins, *stream));
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ReducePass(image, 0.0f, true); // plain pass also fills the corrected profile accumulators
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FinalizeStats();
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// Snapshot the plain corrected profile (and its pixel count) before the raw accumulators are
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// re-zeroed for the sigma-clip passes.
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cuda_err(cudaMemcpyAsync(prof_sum.data(), gpu_sum_corr, sizeof(float) * nbins, cudaMemcpyDeviceToHost, *stream));
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cuda_err(cudaMemcpyAsync(prof_sum2.data(), gpu_sum2_corr, sizeof(float) * nbins, cudaMemcpyDeviceToHost, *stream));
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cuda_err(cudaMemcpyAsync(prof_count.data(), gpu_count, sizeof(uint32_t) * nbins, cudaMemcpyDeviceToHost, *stream));
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for (int pass = 0; pass < 2; ++pass) {
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cuda_err(cudaMemsetAsync(gpu_sum, 0, sizeof(unsigned long long) * nbins, *stream));
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cuda_err(cudaMemsetAsync(gpu_sum2, 0, sizeof(unsigned long long) * nbins, *stream));
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cuda_err(cudaMemsetAsync(gpu_count, 0, sizeof(uint32_t) * nbins, *stream));
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ReducePass(image, 3.0f, false);
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FinalizeStats();
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}
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// Snapshot the clipped raw stats that drive the threshold.
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cuda_err(cudaMemcpyAsync(host_sum.data(), gpu_sum, sizeof(unsigned long long) * nbins, cudaMemcpyDeviceToHost, *stream));
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cuda_err(cudaMemcpyAsync(host_sum2.data(), gpu_sum2, sizeof(unsigned long long) * nbins, cudaMemcpyDeviceToHost, *stream));
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cuda_err(cudaMemcpyAsync(host_count.data(), gpu_count, sizeof(uint32_t) * nbins, cudaMemcpyDeviceToHost, *stream));
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cuda_err(cudaStreamSynchronize(*stream));
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// --- Stage B: per-ring threshold on the host (shared with the CPU finder) ---
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ComputeThresholds(settings);
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// The profile is a byproduct even when the frame has no valid pixels for detection.
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last_profile.Clear(mapping);
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last_profile.Add(prof_sum, prof_sum2, prof_count);
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if (host_thr.empty()) {
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// Nothing valid to threshold against: leave no strong pixels for the extractor to build on.
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cuda_err(cudaMemsetAsync(gpu_strong, 0, OutputByteSize(), *stream));
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cuda_err(cudaStreamSynchronize(*stream));
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return;
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}
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// --- Stage C: flag strong pixels into the bit buffer (value >= ring threshold) ---
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cuda_err(cudaMemcpyAsync(gpu_thr, host_thr.data(), sizeof(float) * nbins, cudaMemcpyHostToDevice, *stream));
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cuda_err(cudaMemsetAsync(gpu_strong, 0, OutputByteSize(), *stream));
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flag_strong<<<flag_blocks, flag_threads, 0, *stream>>>(
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image.getGPUBuffer(), gpu_pixel_to_bin->get(), gpu_thr, gpu_strong, npix, nbins);
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// The bit buffer stays on the device - ExtractComponents reads it there.
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cuda_err(cudaStreamSynchronize(*stream));
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}
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void AdaptiveSpotFinderGPU::SetResolutionMask(const std::vector<bool> &mask) {
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ImageSpotFinder::SetResolutionMask(mask);
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extractor.SetResolutionMask(res_mask_bits);
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}
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const std::vector<DiffractionSpot> &AdaptiveSpotFinderGPU::ExtractComponents(const ImagePreprocessorBuffer &image,
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const SpotFindingSettings &settings) {
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extractor.Extract(gpu_strong, image.getGPUBuffer(), settings, components);
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return components;
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}
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