leonarski_f
30b6800289
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* Rugnux: basic support for CCD images (marCCD, SMV) and for gzipped miniCBF. * `jfjoch_viewer`: opens the CCD formats, and fixes to the dataset plots. * Documentation updates. Reviewed-on: #81 Co-authored-by: Filip Leonarski <filip.leonarski@psi.ch>
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FPGA data flow
The following steps are performed on FPGA (in the order of operation):
- UDP header decoding
- SLS detector header decoding
- State machine that controls data acquisition (start/stop/cancel)
- High-bandwidth memory cache to buffer network packets and reorder them to form full modules
- ADU histogram for JUNGFRAU
- Mask pixels from missing packets with special value
- Reorder lines for EIGER to form a proper module
- Mask pixels based on provided pixel mask
- JUNGFRAU conversion with gain and pedestal corrections
- Threshold: pixel values below a set minimum are zeroed, values above a set maximum saturated
- Frame summation (up to 256 frames)
- Integration according to predefined map (e.g., 1D azimuthal integration)
- Spot finding
- ROI calculation
- Image lossy compression using N*sqrt(pixel) values
- Send images, analysis results and metadata to host memory via PCI Express
Each step has a dedicated core, written in high-level synthesis. Exact operation of cores for data analysis is explained in dedicated document.