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mx/Jungfraujoch
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Code Issues Pull Requests Actions 2 Packages Projects Releases 72 Wiki Activity
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4dfc8a1a59b0b07209b4b692875e73dce3166370
Jungfraujoch/fpga/scripts
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History
leonarski_f a70e3cf444 FPGA: integration & jf_conversion use hbm_size_bytes as external signal - hbm_size_bytes is constant, so to allow constant propagation in synthesis
2023-09-22 21:49:41 +02:00
..
bd_pcie.tcl
FPGA: add integration routine (work in progress)
2023-09-21 17:12:01 +02:00
build_pcie_design.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
check_hls.sh
FPGA: Split receiver and FPGA design directories
2023-06-07 21:21:22 +02:00
hbm_u55c.tcl
FPGA: add integration routine (work in progress)
2023-09-21 17:12:01 +02:00
jfjoch.tcl
FPGA: integration & jf_conversion use hbm_size_bytes as external signal - hbm_size_bytes is constant, so to allow constant propagation in synthesis
2023-09-22 21:49:41 +02:00
mac_100g_pcie.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
network_stack.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
pcie_dma.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
setup_action.sh
FPGA: Split receiver and FPGA design directories
2023-06-07 21:21:22 +02:00
synth_and_impl.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
synth_hls_function.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
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