100 lines
3.5 KiB
C++
100 lines
3.5 KiB
C++
// Copyright (2019-2022) Paul Scherrer Institute
|
|
// SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later
|
|
|
|
#include "hls_jfjoch.h"
|
|
|
|
void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out,
|
|
hls::stream<axis_addr> &addr_in,
|
|
hls::stream<axis_addr> &addr_out,
|
|
ap_uint<512> *frame,
|
|
volatile ap_uint<1> &in_cancel) {
|
|
#pragma HLS INTERFACE ap_ctrl_none port=return
|
|
#pragma HLS INTERFACE register both axis port=data_in
|
|
#pragma HLS INTERFACE register both axis port=data_out
|
|
#pragma HLS INTERFACE register both axis port=addr_in
|
|
#pragma HLS INTERFACE register both axis port=addr_out
|
|
#pragma HLS INTERFACE m_axi port=frame bundle=frame depth=512 offset=off \
|
|
max_read_burst_length=64 max_write_burst_length=2 latency=3 num_write_outstanding=2 num_read_outstanding=2
|
|
|
|
#pragma HLS INTERFACE ap_none register port=in_cancel
|
|
|
|
packet_512_t packet_in;
|
|
packet_512_t packet_out;
|
|
|
|
// Read and forward packet #0
|
|
data_in >> packet_in;
|
|
ap_uint<5> modules = ACT_REG_NMODULES(packet_in.data);
|
|
ap_uint<64> mode = ACT_REG_MODE(packet_in.data);
|
|
ap_uint<1> internal_packet_generator = (mode & MODE_INTERNAL_PACKET_GEN) ? 1 : 0;
|
|
ap_uint<32> nframes = ACT_REG_NFRAMES(packet_in.data);
|
|
ap_uint<5> storage_cells = ACT_REG_NSTORAGE_CELLS(packet_in.data);
|
|
ap_uint<1> conversion = (mode & MODE_CONV) ? 1 : 0;
|
|
|
|
data_out << packet_in;
|
|
axis_addr addr;
|
|
addr_in >> addr;
|
|
addr_out << addr;
|
|
|
|
if (conversion) {
|
|
forward_gain:
|
|
for (int i = 0; i < modules * (3 + storage_cells * 3) * (RAW_MODULE_SIZE * 2 / 64); i++) {
|
|
#pragma HLS PIPELINE II=1
|
|
data_in >> packet_in;
|
|
data_out << packet_in;
|
|
}
|
|
}
|
|
|
|
if (internal_packet_generator) {
|
|
uint32_t frame_number = 1;
|
|
uint8_t module_number = 0;
|
|
|
|
generate_frames:
|
|
while (!in_cancel.read() && (frame_number <= nframes)) {
|
|
for (uint32_t i = 0; i < RAW_MODULE_SIZE * 2 / 64; i++) {
|
|
#pragma HLS PIPELINE II=1
|
|
uint32_t eth_packet = i / 128;
|
|
uint32_t axis_packet = i % 128;
|
|
if (axis_packet == 0) {
|
|
axis_addr addr_x;
|
|
addr_x.eth_packet = eth_packet;
|
|
addr_x.module = module_number;
|
|
addr_x.frame_number = frame_number;
|
|
addr_x.debug = INT_PKT_GEN_DEBUG;
|
|
addr_x.timestamp = INT_PKT_GEN_TIMESTAMP;
|
|
addr_x.bunchid = INT_PKT_GEN_BUNCHID;
|
|
addr_x.exptime = INT_PKT_GEN_EXPTTIME;
|
|
addr_x.last = 0;
|
|
addr_out << addr_x;
|
|
}
|
|
packet_out.user = 0;
|
|
packet_out.id = 0;
|
|
packet_out.last = (axis_packet == 127) ? 1 : 0;
|
|
packet_out.data = frame[i];
|
|
data_out << packet_out;
|
|
}
|
|
if (module_number == modules - 1) {
|
|
frame_number++;
|
|
module_number = 0;
|
|
} else
|
|
module_number++;
|
|
}
|
|
}
|
|
|
|
addr_in >> addr;
|
|
|
|
forward_packets:
|
|
while (!addr.last) {
|
|
#pragma HLS PIPELINE II=1
|
|
data_in >> packet_in;
|
|
data_out << packet_in;
|
|
if (packet_in.last) {
|
|
addr_out << addr;
|
|
addr_in >> addr;
|
|
}
|
|
}
|
|
|
|
addr_out << addr;
|
|
data_in >> packet_in;
|
|
data_out << packet_in;
|
|
}
|