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2c9d623265df20a5498bcc1d79dd1c35066a94d4
Jungfraujoch/fpga/scripts
History
Filip Leonarski 2c9d623265 integration: use separate FIFO for integration results
2023-09-22 17:49:14 +02:00
..
bd_pcie.tcl
FPGA: add integration routine (work in progress)
2023-09-21 17:12:01 +02:00
build_pcie_design.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
check_hls.sh
FPGA: Split receiver and FPGA design directories
2023-06-07 21:21:22 +02:00
hbm_u55c.tcl
FPGA: add integration routine (work in progress)
2023-09-21 17:12:01 +02:00
jfjoch.tcl
integration: use separate FIFO for integration results
2023-09-22 17:49:14 +02:00
mac_100g_pcie.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
network_stack.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
pcie_dma.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
setup_action.sh
FPGA: Split receiver and FPGA design directories
2023-06-07 21:21:22 +02:00
synth_and_impl.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
synth_hls_function.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
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