Files
Jungfraujoch/image_analysis/MXAnalysisAfterFPGA.h
T
leonarski_fandClaude Opus 4.8 51451f167b Force CPU azimuthal integration in FPGA workflow
Add AzimuthalIntegrationSettings::ForceCPUinFPGAWorkflow so the FPGA
data-acquisition path can compute azimuthal integration on the CPU instead
of the FPGA. This removes the FPGA bin-count limit (FPGA_INTEGRATION_BIN_COUNT)
and adds per-bin standard deviation.

- MXAnalysisAfterFPGA runs AzIntEngineCPU on the assembled image; the FPGA
  integration-map load and per-module read-back are skipped when forced.
- JFJochReceiverFPGA rejects bin counts above the FPGA limit at acquisition
  start (unless CPU is forced) with an actionable error.
- Wire force_cpu through the broker (both directions) and the frontend.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
2026-06-15 16:43:48 +02:00

55 lines
2.1 KiB
C++

// SPDX-FileCopyrightText: 2024 Filip Leonarski, Paul Scherrer Institute <filip.leonarski@psi.ch>
// SPDX-License-Identifier: GPL-3.0-only
#pragma once
#include "../common/DiffractionExperiment.h"
#include "bragg_prediction/BraggPrediction.h"
#include "indexing/IndexerThreadPool.h"
#include "spot_finding/StrongPixelSet.h"
#include "azint/AzIntEngineCPU.h"
#include "IndexAndRefine.h"
class MXAnalysisAfterFPGA {
mutable std::mutex read_from_cpu_mutex;
const DiffractionExperiment &experiment;
const AzimuthalIntegrationMapping &integration;
IndexAndRefine &indexer;
std::unique_ptr<BraggPrediction> prediction;
std::unique_ptr<AzIntEngineCPU> cpu_azint;
bool find_spots = false;
std::vector<DiffractionSpot> spots;
constexpr static const float spot_distance_threshold_pxl = 2.0f;
std::vector<float> arr_mean;
std::vector<float> arr_sttdev;
std::vector<uint32_t> arr_valid_count;
std::vector<uint32_t> arr_strong_pixel;
enum class State {Idle, Disabled, Enabled} state = State::Idle;
std::chrono::duration<double, std::micro> spot_finding_time_total{0.0};
bool spot_finding_timing_active = false;
public:
MXAnalysisAfterFPGA(const DiffractionExperiment& experiment,
const AzimuthalIntegrationMapping &integration,
IndexAndRefine &indexer);
void ReadFromFPGA(const DeviceOutput* output,
const SpotFindingSettings& settings,
size_t module_number);
void ReadFromCPU(DeviceOutput *output,
const SpotFindingSettings &settings,
size_t module_number);
// Computes the azimuthal integration profile on the CPU from the assembled image.
// Only active when the settings force the CPU backend; otherwise a no-op (the FPGA
// fills the profile). image points to the uncompressed image of GetByteDepthImage() pixels.
void RunAzimuthalIntegration(const void *image, AzimuthalIntegrationProfile &profile);
void Process(DataMessage &message, const SpotFindingSettings& settings);
};