Add AzimuthalIntegrationSettings::ForceCPUinFPGAWorkflow so the FPGA data-acquisition path can compute azimuthal integration on the CPU instead of the FPGA. This removes the FPGA bin-count limit (FPGA_INTEGRATION_BIN_COUNT) and adds per-bin standard deviation. - MXAnalysisAfterFPGA runs AzIntEngineCPU on the assembled image; the FPGA integration-map load and per-module read-back are skipped when forced. - JFJochReceiverFPGA rejects bin counts above the FPGA limit at acquisition start (unless CPU is forced) with an actionable error. - Wire force_cpu through the broker (both directions) and the frontend. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
55 lines
2.1 KiB
C++
55 lines
2.1 KiB
C++
// SPDX-FileCopyrightText: 2024 Filip Leonarski, Paul Scherrer Institute <filip.leonarski@psi.ch>
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// SPDX-License-Identifier: GPL-3.0-only
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#pragma once
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#include "../common/DiffractionExperiment.h"
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#include "bragg_prediction/BraggPrediction.h"
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#include "indexing/IndexerThreadPool.h"
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#include "spot_finding/StrongPixelSet.h"
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#include "azint/AzIntEngineCPU.h"
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#include "IndexAndRefine.h"
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class MXAnalysisAfterFPGA {
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mutable std::mutex read_from_cpu_mutex;
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const DiffractionExperiment &experiment;
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const AzimuthalIntegrationMapping &integration;
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IndexAndRefine &indexer;
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std::unique_ptr<BraggPrediction> prediction;
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std::unique_ptr<AzIntEngineCPU> cpu_azint;
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bool find_spots = false;
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std::vector<DiffractionSpot> spots;
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constexpr static const float spot_distance_threshold_pxl = 2.0f;
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std::vector<float> arr_mean;
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std::vector<float> arr_sttdev;
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std::vector<uint32_t> arr_valid_count;
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std::vector<uint32_t> arr_strong_pixel;
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enum class State {Idle, Disabled, Enabled} state = State::Idle;
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std::chrono::duration<double, std::micro> spot_finding_time_total{0.0};
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bool spot_finding_timing_active = false;
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public:
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MXAnalysisAfterFPGA(const DiffractionExperiment& experiment,
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const AzimuthalIntegrationMapping &integration,
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IndexAndRefine &indexer);
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void ReadFromFPGA(const DeviceOutput* output,
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const SpotFindingSettings& settings,
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size_t module_number);
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void ReadFromCPU(DeviceOutput *output,
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const SpotFindingSettings &settings,
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size_t module_number);
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// Computes the azimuthal integration profile on the CPU from the assembled image.
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// Only active when the settings force the CPU backend; otherwise a no-op (the FPGA
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// fills the profile). image points to the uncompressed image of GetByteDepthImage() pixels.
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void RunAzimuthalIntegration(const void *image, AzimuthalIntegrationProfile &profile);
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void Process(DataMessage &message, const SpotFindingSettings& settings);
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};
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