71 lines
2.7 KiB
Tcl
71 lines
2.7 KiB
Tcl
# SPDX-FileCopyrightText: 2024 Filip Leonarski, Paul Scherrer Institute <filip.leonarski@psi.ch>
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# SPDX-License-Identifier: CERN-OHL-S-2.0
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set origin_dir [file dirname [file normalize [info script]]]
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set project [create_project -force -part "xcu55c-fsvh2892-2L-e" "jfjoch_pcie" "vivado"]
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current_project $project
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# Get the directory path for the new project
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set proj_dir [get_property directory $project]
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set_property ip_repo_paths [concat [get_property ip_repo_paths [current_project]] "action/ip"] [current_project]
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update_ip_catalog
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# Create 'sources_1' fileset (if not found)
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if {[string equal [get_filesets -quiet sources_1] ""]} {
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create_fileset -srcset sources_1
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}
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set source_set [get_filesets sources_1]
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set hdl_files [list \
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[file normalize "action/hdl/action_config.v"] \
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[file normalize "action/hdl/network_config.v"] \
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[file normalize "action/hdl/gen_xdma_descriptor.v"] \
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[file normalize "action/hdl/eth_4x10g_leds.v"] \
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]
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if { [llength $hdl_files] > 0 } {
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add_files -norecurse -fileset $source_set $hdl_files
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}
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if {[string equal [get_filesets -quiet constrs_1] ""]} {
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create_fileset -constrset constrs_1
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}
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set constraint_set [get_filesets constrs_1]
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# Add constraints files
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# Put target .xdc as LAST in list
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set constraint_files [list \
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[file normalize "$origin_dir/../xdc/pcie_u55c.xdc"] \
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[file normalize "$origin_dir/../xdc/pcie_100g.xdc"] \
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[file normalize "$origin_dir/../xdc/pcie_timing.xdc"] \
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]
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add_files -norecurse -fileset $constraint_set $constraint_files
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set_property "target_constrs_file" [lindex $constraint_files 0] $constraint_set
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source action/scripts/pcie_release.tcl
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source $origin_dir/network_stack.tcl
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source $origin_dir/frame_generator.tcl
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source $origin_dir/hbm_u55c.tcl
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source $origin_dir/jfjoch.tcl
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source $origin_dir/hbm_cache.tcl
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source $origin_dir/image_processing.tcl
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source $origin_dir/pcie_dma.tcl
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source $origin_dir/mac_100g_pcie.tcl
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source $origin_dir/bd_pcie.tcl > build_pcie.log
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make_wrapper -files [get_files "vivado/jfjoch_pcie.srcs/sources_1/bd/jfjoch_pcie/jfjoch_pcie.bd"] -top >> make_wrapper.log
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add_files -norecurse "vivado/jfjoch_pcie.gen/sources_1/bd/jfjoch_pcie/hdl/jfjoch_pcie_wrapper.v"
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set_property top jfjoch_pcie_wrapper [current_fileset]
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update_compile_order -fileset sources_1
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set_property synth_checkpoint_mode None [get_files vivado/jfjoch_pcie.srcs/sources_1/bd/jfjoch_pcie/jfjoch_pcie.bd]
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generate_target all [get_files vivado/jfjoch_pcie.srcs/sources_1/bd/jfjoch_pcie/jfjoch_pcie.bd] >> generate_target.log
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set_property flow {Vivado Synthesis 2022} [get_runs synth_1]
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set_property strategy Flow_PerfOptimized_high [get_runs synth_1]
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set_property strategy Performance_ExploreWithRemap [get_runs impl_1]
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