// Copyright (2019-2023) Paul Scherrer Institute

#ifndef DEFINITIONS_H
#define DEFINITIONS_H

#include "../fpga/include/jfjoch_fpga.h"

#define WVL_1A_IN_KEV           12.39854f

#define CONVERTED_MODULE_LINES  (514L)
#define CONVERTED_MODULE_COLS   (1030L)
#define CONVERTED_MODULE_SIZE   (CONVERTED_MODULE_LINES * CONVERTED_MODULE_COLS)
#define JUNGFRAU_PACKET_SIZE_BYTES  (8192)

#define MIN_COUNT_TIME_IN_US 5
#define MIN_FRAME_TIME_HALF_SPEED_IN_US 1000
#define MIN_FRAME_TIME_FULL_SPEED_IN_US 470
#define MAX_FRAME_TIME 2000
#define MIN_STORAGE_CELL_DELAY_IN_NS 2100
#define READOUT_TIME_IN_US 20

#define MIN_ENERGY 0.1
#define MAX_ENERGY 25.0

#define FRAME_TIME_PEDE_G1G2_IN_US (10*1000)

#define DEFAULT_G0_FACTOR   (41.0)
#define DEFAULT_G1_FACTOR   (-1.439)
#define DEFAULT_G2_FACTOR   (-0.1145)
#define DEFAULT_HG0_FACTOR  (100.0)

#define MAX_SPOT_COUNT (100)

#endif //DEFINITIONS_H