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* Enhancements for XFEL

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* Enhancements for EIGER
* Writer is more flexible and capable of handling DECTRIS data
This commit is contained in:
leonarski_f
2024-03-05 20:41:47 +01:00
parent 71d862b706
commit d315506633
165 changed files with 5440 additions and 2230 deletions
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72
tests/FPGAFrameGeneratorTest.cpp
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@@ -8,19 +8,73 @@ TEST_CASE("FPGA_FrameGenerator_Cancel") {
std::vector<ap_uint<256>> d_hbm_p0(RAW_MODULE_SIZE/(256/8));
std::vector<ap_uint<256>> d_hbm_p1(RAW_MODULE_SIZE/(256/8));
ap_uint<1> cancel = 1;
ap_uint<32> nframes = 256;
ap_uint<6> nmodules = 8;
REQUIRE(frame_generator(data_out, d_hbm_p0.data(), d_hbm_p1.data(), 0, nframes, nmodules, 0, 0, 0, 0, 0, 0, 0, cancel) == 0);
FrameGeneratorConfig config{
.frames = 256,
.modules = 8,
.detector_type = SLS_DETECTOR_TYPE_JUNGFRAU
};
REQUIRE(frame_generator(data_out, d_hbm_p0.data(), d_hbm_p1.data(), 0, 0, 0, cancel, config) == 0);
REQUIRE(data_out.size() == 130);
}
TEST_CASE("FPGA_FrameGenerator_No_Cancel") {
TEST_CASE("FPGA_FrameGenerator_WrongDetectorType") {
STREAM_512 data_out;
std::vector<ap_uint<256>> d_hbm_p0(RAW_MODULE_SIZE/(256/8));
std::vector<ap_uint<256>> d_hbm_p1(RAW_MODULE_SIZE/(256/8));
ap_uint<1> cancel = 1;
FrameGeneratorConfig config{
.frames = 256,
.modules = 8,
.detector_type = 0
};
REQUIRE(frame_generator(data_out, d_hbm_p0.data(), d_hbm_p1.data(), 0, 0, 0, cancel, config) != 0);
REQUIRE(data_out.size() == 0);
}
TEST_CASE("FPGA_FrameGenerator_WrongModuleCount") {
STREAM_512 data_out;
std::vector<ap_uint<256>> d_hbm_p0(RAW_MODULE_SIZE/(256/8));
std::vector<ap_uint<256>> d_hbm_p1(RAW_MODULE_SIZE/(256/8));
ap_uint<1> cancel = 1;
FrameGeneratorConfig config{
.frames = 256,
.modules = MAX_MODULES_FPGA + 1,
.detector_type = SLS_DETECTOR_TYPE_JUNGFRAU
};
REQUIRE(frame_generator(data_out, d_hbm_p0.data(), d_hbm_p1.data(), 0, 0, 0, cancel, config) != 0);
REQUIRE(data_out.size() == 0);
config.modules = 0;
REQUIRE(frame_generator(data_out, d_hbm_p0.data(), d_hbm_p1.data(), 0, 0, 0, cancel, config) != 0);
REQUIRE(data_out.size() == 0);
}
TEST_CASE("FPGA_FrameGenerator_Run_JF") {
STREAM_512 data_out;
std::vector<ap_uint<256>> d_hbm_p0(2*RAW_MODULE_SIZE/(256/8));
std::vector<ap_uint<256>> d_hbm_p1(2*RAW_MODULE_SIZE/(256/8));
ap_uint<1> cancel = 0;
ap_uint<32> nframes = 2;
ap_uint<6> nmodules = 2;
REQUIRE(frame_generator(data_out, d_hbm_p0.data(), d_hbm_p1.data(), 0, nframes, nmodules, 0, 0, 0, 0, 0, 0, 0, cancel) == 0);
REQUIRE(data_out.size() == (nframes * nmodules * 128 + 1) * 130);
}
FrameGeneratorConfig config{
.frames = 2,
.modules = 2,
.detector_type = SLS_DETECTOR_TYPE_JUNGFRAU
};
REQUIRE(frame_generator(data_out, d_hbm_p0.data(), d_hbm_p1.data(), 0, 0, 0, cancel, config) == 0);
REQUIRE(data_out.size() == (config.frames * config.modules * 128 + 1) * 130);
}
TEST_CASE("FPGA_FrameGenerator_Run_EIGER") {
STREAM_512 data_out;
std::vector<ap_uint<256>> d_hbm_p0(2*RAW_MODULE_SIZE/(256/8));
std::vector<ap_uint<256>> d_hbm_p1(2*RAW_MODULE_SIZE/(256/8));
ap_uint<1> cancel = 0;
FrameGeneratorConfig config{
.frames = 2,
.modules = 2,
.detector_type = SLS_DETECTOR_TYPE_EIGER
};
REQUIRE(frame_generator(data_out, d_hbm_p0.data(), d_hbm_p1.data(), 0, 0, 0, cancel, config) == 0);
REQUIRE(data_out.size() == (config.frames * config.modules * 256) * 66 + 130); // Trailing packet is JF type!
}