FPGA: Internal packet generator uses external memory to store image, and this memory is accessible via PCIe BAR

This commit is contained in:
2023-09-06 08:19:03 +02:00
parent f61ffc1533
commit caf950f99f
7 changed files with 58 additions and 24 deletions
+6 -3
View File
@@ -41,7 +41,7 @@ HLSSimulatedDevice::HLSSimulatedDevice(uint16_t data_stream, size_t in_frame_buf
MapBuffersStandard(in_frame_buffer_size_modules,
(3 + 3 * 16) * max_modules + 2, numa_node);
auto in_mem_location32 = (uint32_t *) in_mem_location;
auto in_mem_location32 = (uint32_t *) calibration_addr_bram;
for (int i = 0; i < max_modules * (3 + 3 * 16) + 2; i++) {
in_mem_location32[2 * i ] = ((uint64_t) buffer_device[i]) & UINT32_MAX;
@@ -51,6 +51,8 @@ HLSSimulatedDevice::HLSSimulatedDevice(uint16_t data_stream, size_t in_frame_buf
for (auto &i: hbm_memory)
// i.resize(SIZE_OF_HBM_BLOCK_IN_BYTES);
i.resize(32*1024*1024); // only 32 MiB instead of 256 MiB per HBM interface (should be more than enough for all the tests anyway)
internal_packet_generator_uram.resize(RAW_MODULE_SIZE * sizeof(uint16_t) / 512 * 8);
}
void HLSSimulatedDevice::CreateFinalPacket(const DiffractionExperiment& experiment) {
@@ -286,10 +288,11 @@ void HLSSimulatedDevice::HLSMainThread() {
// Load external calibration
hls_cores.emplace_back([&] { load_calibration(raw1, raw2, datamover_in.GetCtrlStream(), datamover_in.GetDataStream(),
in_mem_location); });
calibration_addr_bram); });
// Generate internal packets
hls_cores.emplace_back([&] { internal_packet_generator(raw2, raw3, addr1, addr2, cancel_data_collection); });
hls_cores.emplace_back([&] { internal_packet_generator(raw2, raw3, addr1, addr2, internal_packet_generator_uram.data(),
cancel_data_collection); });
// Timer procedure - count how many times pedestal_corr/gain_corr is not accepting input (to help track down latency issues)
hls_cores.emplace_back([&] { timer_hbm(raw3, raw4, counter_hbm); });