From c2b42916c29a14aaf63618423445c2d25b531c25 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 24 May 2023 11:54:51 +0200 Subject: [PATCH 001/224] FPGA: host_writer allows to skip frames, if no available location in host memory --- common/Definitions.h | 1 + receiver/hls/hls_jfjoch.h | 2 +- receiver/hls/host_writer.cpp | 69 ++++++++++++++++++++++-------------- 3 files changed, 44 insertions(+), 28 deletions(-) diff --git a/common/Definitions.h b/common/Definitions.h index f6721194..db35df5f 100644 --- a/common/Definitions.h +++ b/common/Definitions.h @@ -55,6 +55,7 @@ #define MODE_CONV 0x0001L #define MODE_INTERNAL_PACKET_GEN 0x0002L +#define MODE_NONBLOCKING_ON_WR 0x0004L // Don't block acquisition if there is no WR available #define TASK_NO_DATA_STREAM UINT16_MAX diff --git a/receiver/hls/hls_jfjoch.h b/receiver/hls/hls_jfjoch.h index 7ac8519f..7de9ac66 100644 --- a/receiver/hls/hls_jfjoch.h +++ b/receiver/hls/hls_jfjoch.h @@ -59,7 +59,7 @@ typedef hls::stream STREAM_512; #define addr_bunch_id(x) x(255,192) #define addr_exptime(x) x(256+63, 256) -#define ACT_REG_MODE(x) ((x)(63, 0)) // 64 bit +#define ACT_REG_MODE(x) ((x)(32, 0)) // 64 bit #define ACT_REG_ONE_OVER_ENERGY(x) ((x)(95, 64)) // 32 bit #define ACT_REG_NFRAMES(x) ((x)(127, 96)) // 32 bit #define ACT_REG_NMODULES(x) ((x)(132, 128)) // 5 bit (0..31) diff --git a/receiver/hls/host_writer.cpp b/receiver/hls/host_writer.cpp index 13898579..3dc17bfc 100644 --- a/receiver/hls/host_writer.cpp +++ b/receiver/hls/host_writer.cpp @@ -8,6 +8,7 @@ #endif #define PACKET_SIZE 8192 +#define HANDLE_SKIP_FRAME (UINT32_MAX - 1) inline void write_completion(hls::stream > &m_axis_completion, const ap_uint<32> &handle, @@ -91,15 +92,6 @@ void host_writer(STREAM_512 &data_in, #pragma HLS INTERFACE register ap_vld port=packets_processed #pragma HLS INTERFACE register ap_vld port=err_reg - ap_uint addr; - addr_in >> addr; - - packet_512_t packet_in; - data_in >> packet_in; - - ap_uint<8> internal_err_reg = 0; - err_reg = internal_err_reg; - ap_uint<128> packet_mask[MAX_MODULES_FPGA*2]; #pragma HLS RESOURCE variable=packet_mask core=RAM_1P ap_uint<16> packet_count[MAX_MODULES_FPGA*2]; @@ -132,6 +124,17 @@ void host_writer(STREAM_512 &data_in, jf_bunchid[i] = 0; } + ap_uint addr; + addr_in >> addr; + + packet_512_t packet_in; + data_in >> packet_in; + ap_uint<32> data_collection_mode = ACT_REG_MODE(packet_in.data); + ap_uint<1> mode_nonblocking = data_collection_mode & MODE_NONBLOCKING_ON_WR; + + ap_uint<8> internal_err_reg = 0; + err_reg = internal_err_reg; + write_completion(m_axis_completion, UINT32_MAX - 1, 0, 0, 0, 0, 0, 0, 0, 0); uint64_t total_counter = 0; @@ -157,18 +160,8 @@ void host_writer(STREAM_512 &data_in, ap_uint<7> eth_packet = addr_eth_packet(addr); ap_uint<5> id = module * 2 + (frame_number % 2); - for (int i = 0; i < 128; i++) { - data_in >> packet_in; - packet_out.data = packet_in.data; - packet_out.last = packet_in.last; - host_memory_out << packet_out; - } - - if (packet_in.last != 1) - internal_err_reg[1] = 1; - if (curr_frame[id] != frame_number) { - if (packet_mask[id] != 0) { + if ((packet_mask[id] != 0) && (handle[id] != HANDLE_SKIP_FRAME)) { ap_uint<32> comp_handle = handle[id]; ap_uint<64> comp_frame = curr_frame[id]; ap_uint<256> comp_packet_mask = packet_mask[id]; @@ -184,8 +177,13 @@ void host_writer(STREAM_512 &data_in, comp_exptime); } - if (read_request(s_axis_work_request, req_handle, req_host_offset)) - internal_err_reg[2] = 1; + if (s_axis_work_request.empty() && mode_nonblocking) { + req_handle = HANDLE_SKIP_FRAME; + req_host_offset = 0; + } else { + if (read_request(s_axis_work_request, req_handle, req_host_offset)) + internal_err_reg[2] = 1; + } if (req_handle == UINT32_MAX) internal_err_reg[4] = 1; @@ -206,13 +204,30 @@ void host_writer(STREAM_512 &data_in, packet_mask[id] |= ap_uint<128>(1) << eth_packet; } - size_t out_frame_addr = curr_offset[id] + eth_packet * PACKET_SIZE; + if (handle[id] != HANDLE_SKIP_FRAME) { + for (int i = 0; i < 128; i++) { + data_in >> packet_in; + packet_out.data = packet_in.data; + packet_out.last = packet_in.last; + host_memory_out << packet_out; + } - if (out_frame_addr % 128 != 0) internal_err_reg[0] = 1; - if (curr_offset[id] == 0) internal_err_reg[3] = 1; - packets_processed = ++total_counter; + if (packet_in.last != 1) + internal_err_reg[1] = 1; - setup_datamover(datamover_out_cmd, out_frame_addr, PACKET_SIZE); + size_t out_frame_addr = curr_offset[id] + eth_packet * PACKET_SIZE; + + if (out_frame_addr % 128 != 0) internal_err_reg[0] = 1; + if (curr_offset[id] == 0) internal_err_reg[3] = 1; + packets_processed = ++total_counter; + setup_datamover(datamover_out_cmd, out_frame_addr, PACKET_SIZE); + } else { + for (int i = 0; i < 128; i++) + data_in >> packet_in; + + if (packet_in.last != 1) + internal_err_reg[1] = 1; + } addr_in >> addr; err_reg = internal_err_reg; } From 2dfd6e916d5a9d42e8f5baa610c9540716655683 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 24 May 2023 11:57:56 +0200 Subject: [PATCH 002/224] FPGA: work completion queue is extended to 32768 elements. --- receiver/scripts/jfjoch.tcl | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/receiver/scripts/jfjoch.tcl b/receiver/scripts/jfjoch.tcl index 0b87e910..4d2abb65 100644 --- a/receiver/scripts/jfjoch.tcl +++ b/receiver/scripts/jfjoch.tcl @@ -275,8 +275,8 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { # Create instance: axis_work_completion_fifo_0, and set properties set axis_work_completion_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_work_completion_fifo_0 ] set_property -dict [ list \ - CONFIG.FIFO_DEPTH {1024} \ - CONFIG.FIFO_MEMORY_TYPE {auto} \ + CONFIG.FIFO_DEPTH {32768} \ + CONFIG.FIFO_MEMORY_TYPE {ultra} \ CONFIG.HAS_AEMPTY {1} \ CONFIG.HAS_AFULL {1} \ ] $axis_work_completion_fifo_0 From 021e652dc67f2a14ed34cc66a40cfe8eae8156d1 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 26 May 2023 16:11:07 +0200 Subject: [PATCH 003/224] FPGA: non-blocking mode (to be tested) --- common/Definitions.h | 4 ++ receiver/hls/host_writer.cpp | 67 +++++++++++++++-------------- receiver/host/AcquisitionDevice.cpp | 6 ++- receiver/host/AcquisitionDevice.h | 2 + receiver/host/Completion.cpp | 5 ++- tests/FPGAIntegrationTest.cpp | 20 +++++++++ 6 files changed, 69 insertions(+), 35 deletions(-) diff --git a/common/Definitions.h b/common/Definitions.h index db35df5f..45c43863 100644 --- a/common/Definitions.h +++ b/common/Definitions.h @@ -118,4 +118,8 @@ #define CTRL_REGISTER_IDLE (1<<1u) +#define HANDLE_START (UINT32_MAX - 1) +#define HANDLE_SKIP_FRAME (UINT32_MAX - 2) +#define HANDLE_END (UINT32_MAX ) + #endif //DEFINITIONS_H diff --git a/receiver/hls/host_writer.cpp b/receiver/hls/host_writer.cpp index 3dc17bfc..6167b0b9 100644 --- a/receiver/hls/host_writer.cpp +++ b/receiver/hls/host_writer.cpp @@ -8,18 +8,17 @@ #endif #define PACKET_SIZE 8192 -#define HANDLE_SKIP_FRAME (UINT32_MAX - 1) inline void write_completion(hls::stream > &m_axis_completion, - const ap_uint<32> &handle, - const ap_uint<8> &module, - const ap_uint<64> &frame_num, - const ap_uint<256> &packet_mask, - const ap_uint<16> &packet_count, - const ap_uint<32> &debug, - const ap_uint<64> ×tamp, - const ap_uint<64> &bunchid, - const ap_uint<32> &exptime) { + const ap_uint<32> &handle, + const ap_uint<8> &module_number, + const ap_uint<64> &frame_num, + const ap_uint<256> &packet_mask, + const ap_uint<16> &packet_count, + const ap_uint<32> &debug, + const ap_uint<64> ×tamp, + const ap_uint<64> &bunchid, + const ap_uint<32> &exptime) { #pragma HLS INLINE ap_uint<1> all_packets_ok = packet_mask.and_reduce(); ap_uint<1> any_packets_received = packet_mask.or_reduce(); @@ -27,28 +26,32 @@ inline void write_completion(hls::stream > &m_axis_completion, status[0] = all_packets_ok; status[1] = any_packets_received; - ap_uint<128> tmp = (handle, packet_count, status, module, frame_num); + ap_uint<128> tmp = (handle, packet_count, status, module_number, frame_num); status[7] = tmp.xor_reduce(); // ensure completion has even parity - m_axis_completion << handle; - m_axis_completion << (packet_count, status, module); - m_axis_completion << frame_num(63, 32); - m_axis_completion << frame_num(31, 0); + if (handle != HANDLE_SKIP_FRAME) { + m_axis_completion << handle; + m_axis_completion << (packet_count, status, module_number); + m_axis_completion << frame_num(63, 32); + m_axis_completion << frame_num(31, 0); - m_axis_completion << timestamp(63,32); - m_axis_completion << timestamp(31,0); - m_axis_completion << bunchid(63,32); - m_axis_completion << bunchid(31,0); + m_axis_completion << timestamp(63,32); + m_axis_completion << timestamp(31,0); + m_axis_completion << bunchid(63,32); + m_axis_completion << bunchid(31,0); - m_axis_completion << exptime; - m_axis_completion << debug; - m_axis_completion << 0; - m_axis_completion << 0; + m_axis_completion << + exptime; + m_axis_completion << + debug; + m_axis_completion << 0; + m_axis_completion << 0; - m_axis_completion << packet_mask(127,96); - m_axis_completion << packet_mask( 95,64); - m_axis_completion << packet_mask( 63,32); - m_axis_completion << packet_mask( 31, 0); + m_axis_completion << packet_mask(127,96); + m_axis_completion << packet_mask( 95,64); + m_axis_completion << packet_mask( 63,32); + m_axis_completion << packet_mask( 31, 0); + } } @@ -130,12 +133,12 @@ void host_writer(STREAM_512 &data_in, packet_512_t packet_in; data_in >> packet_in; ap_uint<32> data_collection_mode = ACT_REG_MODE(packet_in.data); - ap_uint<1> mode_nonblocking = data_collection_mode & MODE_NONBLOCKING_ON_WR; + ap_uint<1> mode_nonblocking = (data_collection_mode & MODE_NONBLOCKING_ON_WR) ? 1 : 0; ap_uint<8> internal_err_reg = 0; err_reg = internal_err_reg; - write_completion(m_axis_completion, UINT32_MAX - 1, 0, 0, 0, 0, 0, 0, 0, 0); + write_completion(m_axis_completion, HANDLE_START, 0, 0, 0, 0, 0, 0, 0, 0); uint64_t total_counter = 0; packets_processed = 0; @@ -161,7 +164,7 @@ void host_writer(STREAM_512 &data_in, ap_uint<5> id = module * 2 + (frame_number % 2); if (curr_frame[id] != frame_number) { - if ((packet_mask[id] != 0) && (handle[id] != HANDLE_SKIP_FRAME)) { + if (packet_mask[id] != 0) { ap_uint<32> comp_handle = handle[id]; ap_uint<64> comp_frame = curr_frame[id]; ap_uint<256> comp_packet_mask = packet_mask[id]; @@ -185,7 +188,7 @@ void host_writer(STREAM_512 &data_in, internal_err_reg[2] = 1; } - if (req_handle == UINT32_MAX) + if (req_handle >= HANDLE_START) internal_err_reg[4] = 1; handle[id] = req_handle; @@ -248,7 +251,7 @@ void host_writer(STREAM_512 &data_in, data_in >> packet_in; - write_completion(m_axis_completion, UINT32_MAX, 0, total_counter, 0, 0, 0, 0, 0, 0); + write_completion(m_axis_completion, HANDLE_END, 0, total_counter, 0, 0, 0, 0, 0, 0); read_request(s_axis_work_request, req_handle, req_host_offset); diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index 1426dd57..eaf55551 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -58,7 +58,7 @@ void AcquisitionDevice::FillActionRegister(const DiffractionExperiment& x, Actio job.nframes = x.GetFrameNum(); job.one_over_energy = std::lround((1<<20)/ x.GetPhotonEnergy_keV()); job.nstorage_cells = x.GetStorageCellNumber() - 1; - job.mode = 0; + job.mode = fpga_non_blocking_mode ? MODE_NONBLOCKING_ON_WR : 0; if ((x.GetDetectorMode() == DetectorMode::Conversion) && x.GetConversionOnFPGA()) job.mode |= MODE_CONV; @@ -434,4 +434,8 @@ uint32_t AcquisitionDevice::GetExptime(size_t curr_frame, uint16_t module_number uint64_t AcquisitionDevice::GetTimestamp(size_t curr_frame, uint16_t module_number) const { return counters.GetTimestamp(curr_frame, module_number); +} + +void AcquisitionDevice::SetFPGANonBlockingMode(bool input) { + fpga_non_blocking_mode = input; } \ No newline at end of file diff --git a/receiver/host/AcquisitionDevice.h b/receiver/host/AcquisitionDevice.h index e75ccb89..c8b7eb58 100644 --- a/receiver/host/AcquisitionDevice.h +++ b/receiver/host/AcquisitionDevice.h @@ -27,6 +27,7 @@ void *mmap_acquisition_buffer(size_t size, int16_t numa_node); class AcquisitionDevice { uint64_t bytes_received = 0; + bool fpga_non_blocking_mode = true; std::vector buffer_err; @@ -122,6 +123,7 @@ public: std::string GetMACAddress() const; virtual uint16_t GetUDPPort() const; virtual int32_t GetNUMANode() const; + void SetFPGANonBlockingMode(bool input); }; diff --git a/receiver/host/Completion.cpp b/receiver/host/Completion.cpp index f64a0056..7b1cddb4 100644 --- a/receiver/host/Completion.cpp +++ b/receiver/host/Completion.cpp @@ -5,6 +5,7 @@ #include "Completion.h" #include "../../common/JFJochException.h" +#include "../../common/Definitions.h" inline uint64_t bit_concat(uint32_t high, uint32_t low) { return (uint64_t(high) << 32) | low; @@ -25,9 +26,9 @@ Completion parse_hw_completion(uint32_t tmp[16]) { if (parity == 1) throw JFJochException(JFJochExceptionCategory::HardwareParityError, "Wrong parity in work completion"); - if (c.handle == UINT32_MAX -1) { + if (c.handle == HANDLE_START) { c.type = Completion::Type::Start; - } else if (c.handle == UINT32_MAX) { + } else if (c.handle == HANDLE_END) { c.type = Completion::Type::End; c.frame_number = detector_frame_number; } else { diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index 1647bc37..116fde64 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -39,6 +39,26 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator", "[FPGA][Full]") { } } +TEST_CASE("HLS_C_Simulation_internal_packet_generator_skip_packets", "[FPGA][Full]") { + const uint16_t nmodules = 1; + + DiffractionExperiment x((DetectorGeometry(nmodules))); + + x.Mode(DetectorMode::Raw); + x.UseInternalPacketGenerator(true).ImagesPerTrigger(1000).PedestalG0Frames(0); + + HLSSimulatedDevice test(0, 64); + + REQUIRE_NOTHROW(test.StartAction(x)); + REQUIRE_NOTHROW(test.WaitForActionComplete()); + + REQUIRE(test.OutputStream().size() == 1); + + JFJochProtoBuf::AcquisitionDeviceStatistics device_statistics; + REQUIRE_NOTHROW(test.SaveStatistics(x, device_statistics)); + REQUIRE(device_statistics.efficiency() < 1.0); +} + TEST_CASE("HLS_C_Simulation_internal_packet_generator_custom_frame", "[FPGA][Full]") { const uint16_t nmodules = 4; From 8b87bb857b3329147542a3fa346626c365e11916 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 26 May 2023 19:38:07 +0200 Subject: [PATCH 004/224] FPGA: clean-up unnecessary signals (from OC design) --- receiver/hdl/action_config.v | 99 +------------------------------- receiver/scripts/bd_pcie.tcl | 4 +- receiver/scripts/jfjoch.tcl | 22 ------- receiver/scripts/setup_action.sh | 6 -- 4 files changed, 4 insertions(+), 127 deletions(-) diff --git a/receiver/hdl/action_config.v b/receiver/hdl/action_config.v index 197f9585..785103ba 100644 --- a/receiver/hdl/action_config.v +++ b/receiver/hdl/action_config.v @@ -15,7 +15,7 @@ `define ADDR_ACTION_TYPE 32'h0010 `define ADDR_RELEASE_LEVEL 32'h0014 -`define ADDR_HBM_TEMP 16'h0018 + `define ADDR_MAX_MODULES_FPGA 16'h0020 `define ADDR_MODS_INT_PKT_GEN 16'h0024 @@ -93,9 +93,6 @@ module action_config output reg data_collection_start , output reg data_collection_cancel , input data_collection_idle , - input [6:0] hbm_temperature , - input hbm_temp_trip , - input apb_complete_0 , input calib_data_fifo_empty , input calib_data_fifo_full , @@ -140,16 +137,8 @@ module action_config input [31:0] udp_err_len , input udp_err_len_valid , - input [3:0] host_writer_err , - input host_writer_err_valid , - input eth_stat_rx_status , - input eth_stat_rx_aligned , - input eth_busy , - input eth_stat_rx_packet_bad_fcs , - input mm2s_error , - input s2mm_error , - output qsfp_led_busy , - output qsfp_led_conn , + input [3:0] host_writer_err , + input host_writer_err_valid , output reg clear_counters ); //------------------------Parameter---------------------- @@ -178,33 +167,8 @@ localparam wire [ADDR_BITS-1:0] raddr; // JFJoch signals - (* ASYNC_REG = "TRUE" *) reg [6:0] reg_hbm_temperature_1; - (* ASYNC_REG = "TRUE" *) reg [6:0] reg_hbm_temperature_2; - - (* ASYNC_REG = "TRUE" *) reg reg_hbm_temp_trip_1; - (* ASYNC_REG = "TRUE" *) reg reg_hbm_temp_trip_2; - - (* ASYNC_REG = "TRUE" *) reg reg_apb_complete_0_1; - (* ASYNC_REG = "TRUE" *) reg reg_apb_complete_0_2; - - (* ASYNC_REG = "TRUE" *) reg reg_eth_busy_1; - (* ASYNC_REG = "TRUE" *) reg reg_eth_busy_2; - - (* ASYNC_REG = "TRUE" *) reg reg_eth_stat_rx_status_1; - (* ASYNC_REG = "TRUE" *) reg reg_eth_stat_rx_aligned_1; - - (* ASYNC_REG = "TRUE" *) reg reg_eth_stat_rx_status_2; - (* ASYNC_REG = "TRUE" *) reg reg_eth_stat_rx_aligned_2; - - (* ASYNC_REG = "TRUE" *) reg reg_eth_stat_rx_packet_bad_fcs_1; - (* ASYNC_REG = "TRUE" *) reg reg_eth_stat_rx_packet_bad_fcs_2; - reg reg_eth_stat_rx_packet_bad_fcs_ever; reg [31:0] reg_ctrl; - reg [6:0] reg_hbm_temperature; - reg reg_hbm_temp_trip; - reg reg_hbm_temp_trip_ever; - reg [63:0] reg_stalls_hbm; reg [63:0] reg_stalls_host; reg [63:0] reg_packets_processed; @@ -347,9 +311,6 @@ always @(posedge clk) begin `ADDR_MODS_INT_PKT_GEN: begin rdata <= 32'd1; end - `ADDR_HBM_TEMP: begin - rdata <= reg_hbm_temperature; - end `ADDR_STALLS_HBM_HI: begin rdata <= reg_stalls_hbm[63:32]; end @@ -423,16 +384,6 @@ always @(posedge clk) begin reg_ctrl[2] <= data_collection_cancel; reg_ctrl[3] <= clear_counters; reg_ctrl[7] <= DESIGN_NUMBER; - reg_ctrl[8] <= reg_eth_stat_rx_status_2; - reg_ctrl[9] <= reg_eth_stat_rx_aligned_2; - if (mm2s_error) - reg_ctrl[10] <= 1; - if (s2mm_error) - reg_ctrl[11] <= 1; - reg_ctrl[12] <= reg_hbm_temp_trip; - reg_ctrl[13] <= reg_hbm_temp_trip_ever; - reg_ctrl[14] <= reg_apb_complete_0_2; - reg_ctrl[15] <= reg_eth_stat_rx_packet_bad_fcs_ever; reg_ctrl[16] <= mailbox_interrupt_0; reg_ctrl[17] <= mailbox_interrupt_1; reg_ctrl[31:24] <= reg_host_writer_err; @@ -542,31 +493,6 @@ always @(posedge clk) begin end end -always @ (posedge clk) begin - reg_eth_stat_rx_status_1 <= eth_stat_rx_status; - reg_eth_stat_rx_status_2 <= reg_eth_stat_rx_status_1; - - reg_eth_stat_rx_aligned_1 <= eth_stat_rx_aligned; - reg_eth_stat_rx_aligned_2 <= reg_eth_stat_rx_aligned_1; - - reg_eth_stat_rx_packet_bad_fcs_1 <= eth_stat_rx_packet_bad_fcs; - reg_eth_stat_rx_packet_bad_fcs_2 <= reg_eth_stat_rx_packet_bad_fcs_1; - - reg_eth_busy_1 <= eth_busy; - reg_eth_busy_2 <= reg_eth_busy_1; - - reg_apb_complete_0_1 <= apb_complete_0; - reg_apb_complete_0_2 <= reg_apb_complete_0_1; - - reg_hbm_temperature_1 <= hbm_temperature; - reg_hbm_temperature_2 <= reg_hbm_temperature_1; - reg_hbm_temperature <= reg_hbm_temperature_2; - - reg_hbm_temp_trip_1 <= hbm_temp_trip; - reg_hbm_temp_trip_2 <= reg_hbm_temp_trip_1; - reg_hbm_temp_trip <= reg_hbm_temp_trip_2; -end - always @ (posedge clk) begin if (!resetn) begin @@ -604,22 +530,6 @@ always @ (posedge clk) begin end end -// HBM temperature trip is only cleared on card restart to protect the card -always @ (posedge clk) begin - if (!resetn) - reg_hbm_temp_trip_ever <= 0; - else if (reg_hbm_temp_trip_2) - reg_hbm_temp_trip_ever <= 1; -end - -// Ethernet RX packet bad FCS is kept from last reset -always @ (posedge clk) begin - if (!resetn) - reg_eth_stat_rx_packet_bad_fcs_ever <= 0; - else if (reg_eth_stat_rx_packet_bad_fcs_2) - reg_eth_stat_rx_packet_bad_fcs_ever <= 1; -end - // FIFO status always @(posedge clk) begin if (!resetn) @@ -647,7 +557,4 @@ always @(posedge clk) begin end end -assign qsfp_led_conn = !reg_eth_stat_rx_status_2; -assign qsfp_led_busy = !reg_eth_busy_2; - endmodule diff --git a/receiver/scripts/bd_pcie.tcl b/receiver/scripts/bd_pcie.tcl index 224faf87..ff893f00 100644 --- a/receiver/scripts/bd_pcie.tcl +++ b/receiver/scripts/bd_pcie.tcl @@ -607,8 +607,6 @@ proc create_root_design { parentCell } { connect_bd_net -net axi_clk_1 [get_bd_pins pcie_dma_0/axi_aclk] [get_bd_pins proc_sys_reset_pcie_0/slowest_sync_clk] [get_bd_pins smartconnect_0/aclk3] [get_bd_pins smartconnect_2/aclk1] connect_bd_net -net axi_quad_spi_0_ip2intc_irpt [get_bd_pins axi_quad_spi_0/ip2intc_irpt] [get_bd_pins xlconcat_irq/In0] connect_bd_net -net cms_subsystem_0_interrupt_host [get_bd_pins cms_subsystem_0/interrupt_host] [get_bd_pins xlconcat_irq/In1] - connect_bd_net -net hbm_infrastructure_apb_complete_0 [get_bd_pins hbm_infrastructure/apb_complete_0] [get_bd_pins jungfraujoch_0/apb_complete] - connect_bd_net -net hbm_infrastructure_apb_complete_1 [get_bd_pins hbm_infrastructure/apb_complete_1] [get_bd_pins jungfraujoch_1/apb_complete] connect_bd_net -net hbm_infrastructure_hbm_temp_trip_1 [get_bd_ports hbm_cattrip] [get_bd_pins cms_subsystem_0/interrupt_hbm_cattrip] [get_bd_pins hbm_infrastructure/hbm_cattrip] connect_bd_net -net hbm_infrastructure_hbm_temperature_1 [get_bd_pins cms_subsystem_0/hbm_temp_1] [get_bd_pins hbm_infrastructure/hbm_temperature_0] connect_bd_net -net hbm_infrastructure_hbm_temperature_2 [get_bd_pins cms_subsystem_0/hbm_temp_2] [get_bd_pins hbm_infrastructure/hbm_temperature_1] @@ -634,7 +632,7 @@ proc create_root_design { parentCell } { connect_bd_net -net usr_irq_req_1 [get_bd_pins axi_intc_0/irq] [get_bd_pins pcie_dma_0/usr_irq_req] connect_bd_net -net usr_irq_req_2 [get_bd_pins axi_intc_1/irq] [get_bd_pins pcie_dma_1/usr_irq_req] connect_bd_net -net xlconcat_irq_dout [get_bd_pins axi_intc_0/intr] [get_bd_pins axi_intc_1/intr] [get_bd_pins xlconcat_irq/dout] - connect_bd_net -net zero_dout [get_bd_pins axi_quad_spi_0/usrcclkts] [get_bd_pins jungfraujoch_0/eth_busy] [get_bd_pins jungfraujoch_0/eth_stat_rx_aligned] [get_bd_pins jungfraujoch_0/eth_stat_rx_packet_bad_fcs] [get_bd_pins jungfraujoch_0/eth_stat_rx_status] [get_bd_pins jungfraujoch_0/hbm_temp_trip] [get_bd_pins jungfraujoch_0/hbm_temperature] [get_bd_pins jungfraujoch_0/mm2s_error] [get_bd_pins jungfraujoch_0/s2mm_error] [get_bd_pins jungfraujoch_1/eth_busy] [get_bd_pins jungfraujoch_1/eth_stat_rx_aligned] [get_bd_pins jungfraujoch_1/eth_stat_rx_packet_bad_fcs] [get_bd_pins jungfraujoch_1/eth_stat_rx_status] [get_bd_pins jungfraujoch_1/hbm_temp_trip] [get_bd_pins jungfraujoch_1/hbm_temperature] [get_bd_pins jungfraujoch_1/mm2s_error] [get_bd_pins jungfraujoch_1/s2mm_error] [get_bd_pins zero/dout] + connect_bd_net -net zero_dout [get_bd_pins axi_quad_spi_0/usrcclkts] [get_bd_pins zero/dout] # Create address segments assign_bd_address -offset 0x00010000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/action_config_0/s_axi/reg0] -force diff --git a/receiver/scripts/jfjoch.tcl b/receiver/scripts/jfjoch.tcl index 4d2abb65..153615a5 100644 --- a/receiver/scripts/jfjoch.tcl +++ b/receiver/scripts/jfjoch.tcl @@ -77,19 +77,8 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { # Create pins create_bd_pin -dir I -type rst ap_rst_n - create_bd_pin -dir I apb_complete create_bd_pin -dir I -type clk axi_clk create_bd_pin -dir I -type rst axi_rst_n - create_bd_pin -dir I eth_busy - create_bd_pin -dir I eth_stat_rx_aligned - create_bd_pin -dir I eth_stat_rx_packet_bad_fcs - create_bd_pin -dir I eth_stat_rx_status - create_bd_pin -dir I hbm_temp_trip - create_bd_pin -dir I -from 6 -to 0 hbm_temperature - create_bd_pin -dir I mm2s_error - create_bd_pin -dir O qsfp_led_busy - create_bd_pin -dir O qsfp_led_conn - create_bd_pin -dir I s2mm_error # Create instance: action_config_0, and set properties set block_name action_config @@ -420,11 +409,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net action_config_0_nstorage_cells [get_bd_pins action_config_0/nstorage_cells] [get_bd_pins data_collection_fsm_0/nstorage_cells] connect_bd_net -net action_config_0_one_over_energy [get_bd_pins action_config_0/one_over_energy] [get_bd_pins data_collection_fsm_0/one_over_energy] connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_0/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins internal_packet_generator_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins timer_hbm_0/ap_clk] [get_bd_pins timer_host_0/ap_clk] - connect_bd_net -net apb_complete_1 [get_bd_pins apb_complete] [get_bd_pins action_config_0/apb_complete_0] - connect_bd_net -net axilite_ctrl_infrastructure_qsfp_led_busy [get_bd_pins qsfp_led_busy] [get_bd_pins action_config_0/qsfp_led_busy] - connect_bd_net -net axilite_ctrl_infrastructure_qsfp_led_conn [get_bd_pins qsfp_led_conn] [get_bd_pins action_config_0/qsfp_led_conn] - connect_bd_net -net aximm_host_infrastructure_err_encountered [get_bd_pins mm2s_error] [get_bd_pins action_config_0/mm2s_error] - connect_bd_net -net aximm_host_infrastructure_err_encountered1 [get_bd_pins s2mm_error] [get_bd_pins action_config_0/s2mm_error] connect_bd_net -net axis_addr_fifo_2_almost_empty [get_bd_pins action_config_0/calib_addr_fifo_empty] [get_bd_pins axis_addr_fifo_1/almost_empty] connect_bd_net -net axis_addr_fifo_2_almost_full [get_bd_pins action_config_0/calib_addr_fifo_full] [get_bd_pins axis_addr_fifo_1/almost_full] connect_bd_net -net axis_addr_fifo_4_almost_empty [get_bd_pins action_config_0/last_addr_fifo_empty] [get_bd_pins axis_addr_fifo_2/almost_empty] @@ -444,12 +428,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net axis_work_request_fifo_0_almost_empty [get_bd_pins action_config_0/work_req_fifo_empty] [get_bd_pins axis_work_request_fifo_0/almost_empty] connect_bd_net -net axis_work_request_fifo_0_almost_full [get_bd_pins action_config_0/work_req_fifo_full] [get_bd_pins axis_work_request_fifo_0/almost_full] connect_bd_net -net data_collection_fsm_0_out_idle_V [get_bd_pins action_config_0/data_collection_idle] [get_bd_pins data_collection_fsm_0/out_idle] - connect_bd_net -net eth_busy_1 [get_bd_pins eth_busy] [get_bd_pins action_config_0/eth_busy] - connect_bd_net -net eth_stat_rx_aligned_1 [get_bd_pins eth_stat_rx_aligned] [get_bd_pins action_config_0/eth_stat_rx_aligned] - connect_bd_net -net eth_stat_rx_packet_bad_fcs_1 [get_bd_pins eth_stat_rx_packet_bad_fcs] [get_bd_pins action_config_0/eth_stat_rx_packet_bad_fcs] - connect_bd_net -net eth_stat_rx_status_1 [get_bd_pins eth_stat_rx_status] [get_bd_pins action_config_0/eth_stat_rx_status] - connect_bd_net -net hbm_temp_trip_1 [get_bd_pins hbm_temp_trip] [get_bd_pins action_config_0/hbm_temp_trip] - connect_bd_net -net hbm_temperature_1 [get_bd_pins hbm_temperature] [get_bd_pins action_config_0/hbm_temperature] connect_bd_net -net host_writer_0_err_reg_V [get_bd_pins action_config_0/host_writer_err] [get_bd_pins host_writer_0/err_reg] connect_bd_net -net host_writer_0_err_reg_V_ap_vld [get_bd_pins action_config_0/host_writer_err_valid] [get_bd_pins host_writer_0/err_reg_ap_vld] connect_bd_net -net host_writer_0_packets_processed [get_bd_pins action_config_0/packets_processed] [get_bd_pins host_writer_0/packets_processed] diff --git a/receiver/scripts/setup_action.sh b/receiver/scripts/setup_action.sh index 11ce5888..8ad1ba63 100644 --- a/receiver/scripts/setup_action.sh +++ b/receiver/scripts/setup_action.sh @@ -26,12 +26,6 @@ clean: echo -n "" EOF -cat < ${SRC_DIR}/oc-accel/snap_env.sh -export ACTION_ROOT=$PWD/action -export TIMING_LABLIMIT="-100" -export OCSE_ROOT=$SRC_DIR/ocse -EOF - cp ${SRC_DIR}/hdl/*.v action/hw/hdl # Update action type and release level based on Definitions.h From b926e69885f7c11c076740f43c27f30353dc0446 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 22 May 2023 22:36:48 +0200 Subject: [PATCH 005/224] FPGA: data_collection_fsm counter --- grpc/jfjoch.proto | 4 +- python/jfjoch_pb2.py | 96 ++++++++++++------------- receiver/hdl/action_config.v | 10 ++- receiver/hls/data_collection_fsm.cpp | 6 ++ receiver/hls/hls_jfjoch.h | 10 +-- receiver/hls/host_writer.cpp | 20 +++--- receiver/host/AcquisitionDevice.cpp | 4 +- receiver/host/ActionConfig.h | 6 +- receiver/host/Completion.cpp | 2 +- receiver/host/Completion.h | 1 + receiver/host/FPGAAcquisitionDevice.cpp | 2 +- receiver/host/HLSSimulatedDevice.cpp | 2 + receiver/host/jfjoch_pcie_status.cpp | 2 +- receiver/scripts/jfjoch.tcl | 1 + tests/FPGAIntegrationTest.cpp | 17 ++++- 15 files changed, 104 insertions(+), 79 deletions(-) diff --git a/grpc/jfjoch.proto b/grpc/jfjoch.proto index 0468b606..559b07f7 100644 --- a/grpc/jfjoch.proto +++ b/grpc/jfjoch.proto @@ -357,8 +357,6 @@ message FPGAStatus { uint32 git_sha1 = 16; uint32 mailbox_err_reg = 17; uint32 mailbox_status_reg = 18; - bool datamover_mm2s_error = 19; - bool datamover_s2mm_error = 20; bool frame_statistics_alignment_err = 21; bool frame_statistics_tlast_err = 22; bool frame_statistics_work_req_err = 23; @@ -381,6 +379,8 @@ message FPGAStatus { uint64 packets_sls = 37; uint32 error_eth = 38; uint32 error_packet_len = 39; + + uint32 data_collection_counter = 40; } message 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_builder.BuildMessageAndEnumDescriptors(DESCRIPTOR, globals()) _builder.BuildTopDescriptorsAndMessages(DESCRIPTOR, 'jfjoch_pb2', globals()) @@ -24,18 +24,18 @@ if _descriptor._USE_C_DESCRIPTORS == False: _RADIALINTEGRATIONPROFILES_PLOTSENTRY._serialized_options = b'8\001' _FPGASTATUS_FIFOSTATUSENTRY._options = None _FPGASTATUS_FIFOSTATUSENTRY._serialized_options = b'8\001' - _COMPRESSION._serialized_start=8845 - _COMPRESSION._serialized_end=8929 - _DETECTORTYPE._serialized_start=8931 - _DETECTORTYPE._serialized_end=8970 - _DETECTORMODE._serialized_start=8972 - _DETECTORMODE._serialized_end=9062 - _FPGAFIFOSTATUS._serialized_start=9064 - _FPGAFIFOSTATUS._serialized_end=9114 - _STATE._serialized_start=9116 - _STATE._serialized_end=9210 - _PLOTTYPE._serialized_start=9212 - _PLOTTYPE._serialized_end=9316 + _COMPRESSION._serialized_start=8818 + _COMPRESSION._serialized_end=8902 + _DETECTORTYPE._serialized_start=8904 + _DETECTORTYPE._serialized_end=8943 + _DETECTORMODE._serialized_start=8945 + _DETECTORMODE._serialized_end=9035 + _FPGAFIFOSTATUS._serialized_start=9037 + _FPGAFIFOSTATUS._serialized_end=9087 + _STATE._serialized_start=9089 + _STATE._serialized_end=9183 + _PLOTTYPE._serialized_start=9185 + _PLOTTYPE._serialized_end=9289 _EMPTY._serialized_start=32 _EMPTY._serialized_end=39 _UNITCELL._serialized_start=41 @@ -103,39 +103,39 @@ if _descriptor._USE_C_DESCRIPTORS == False: _DETECTORSTATUS._serialized_start=5352 _DETECTORSTATUS._serialized_end=5450 _FPGASTATUS._serialized_start=5453 - _FPGASTATUS._serialized_end=6523 - _FPGASTATUS_FIFOSTATUSENTRY._serialized_start=6442 - _FPGASTATUS_FIFOSTATUSENTRY._serialized_end=6523 - _DATAPROCESSINGSETTINGS._serialized_start=6526 - _DATAPROCESSINGSETTINGS._serialized_end=6872 - _PREVIEWFRAMESPOT._serialized_start=6874 - _PREVIEWFRAMESPOT._serialized_end=6931 - _PREVIEWFRAME._serialized_start=6934 - _PREVIEWFRAME._serialized_end=7252 - _MODULESTATISTICS._serialized_start=7255 - _MODULESTATISTICS._serialized_end=7492 - _IMAGE._serialized_start=7494 - _IMAGE._serialized_end=7567 - _MASKTOLOAD._serialized_start=7569 - _MASKTOLOAD._serialized_end=7615 - _MEASUREMENTSTATISTICS._serialized_start=7618 - _MEASUREMENTSTATISTICS._serialized_end=8231 - _BROKERSTATUS._serialized_start=8234 - _BROKERSTATUS._serialized_end=8449 - _BROKERFULLSTATUS._serialized_start=8452 - _BROKERFULLSTATUS._serialized_end=8616 - _DETECTORLISTELEMENT._serialized_start=8618 - _DETECTORLISTELEMENT._serialized_end=8690 - _DETECTORLIST._serialized_start=8692 - _DETECTORLIST._serialized_end=8810 - _DETECTORSELECTION._serialized_start=8812 - _DETECTORSELECTION._serialized_end=8843 - _GRPC_JFJOCHRECEIVER._serialized_start=9319 - _GRPC_JFJOCHRECEIVER._serialized_end=10086 - _GRPC_JFJOCHWRITER._serialized_start=10089 - _GRPC_JFJOCHWRITER._serialized_end=10291 - _GRPC_JFJOCHDETECTOR._serialized_start=10294 - _GRPC_JFJOCHDETECTOR._serialized_end=10680 - _GRPC_JFJOCHBROKER._serialized_start=10683 - _GRPC_JFJOCHBROKER._serialized_end=12372 + _FPGASTATUS._serialized_end=6496 + _FPGASTATUS_FIFOSTATUSENTRY._serialized_start=6415 + _FPGASTATUS_FIFOSTATUSENTRY._serialized_end=6496 + _DATAPROCESSINGSETTINGS._serialized_start=6499 + _DATAPROCESSINGSETTINGS._serialized_end=6845 + _PREVIEWFRAMESPOT._serialized_start=6847 + _PREVIEWFRAMESPOT._serialized_end=6904 + _PREVIEWFRAME._serialized_start=6907 + _PREVIEWFRAME._serialized_end=7225 + _MODULESTATISTICS._serialized_start=7228 + _MODULESTATISTICS._serialized_end=7465 + _IMAGE._serialized_start=7467 + _IMAGE._serialized_end=7540 + _MASKTOLOAD._serialized_start=7542 + _MASKTOLOAD._serialized_end=7588 + _MEASUREMENTSTATISTICS._serialized_start=7591 + _MEASUREMENTSTATISTICS._serialized_end=8204 + _BROKERSTATUS._serialized_start=8207 + _BROKERSTATUS._serialized_end=8422 + _BROKERFULLSTATUS._serialized_start=8425 + _BROKERFULLSTATUS._serialized_end=8589 + _DETECTORLISTELEMENT._serialized_start=8591 + _DETECTORLISTELEMENT._serialized_end=8663 + _DETECTORLIST._serialized_start=8665 + _DETECTORLIST._serialized_end=8783 + _DETECTORSELECTION._serialized_start=8785 + _DETECTORSELECTION._serialized_end=8816 + _GRPC_JFJOCHRECEIVER._serialized_start=9292 + _GRPC_JFJOCHRECEIVER._serialized_end=10059 + _GRPC_JFJOCHWRITER._serialized_start=10062 + _GRPC_JFJOCHWRITER._serialized_end=10264 + _GRPC_JFJOCHDETECTOR._serialized_start=10267 + _GRPC_JFJOCHDETECTOR._serialized_end=10653 + _GRPC_JFJOCHBROKER._serialized_start=10656 + _GRPC_JFJOCHBROKER._serialized_end=12345 # @@protoc_insertion_point(module_scope) diff --git a/receiver/hdl/action_config.v b/receiver/hdl/action_config.v index 785103ba..fb9ae092 100644 --- a/receiver/hdl/action_config.v +++ b/receiver/hdl/action_config.v @@ -13,9 +13,9 @@ `define ADDR_SET_LED 16'h0008 `define ADDR_GIT_SHA1 16'h000C -`define ADDR_ACTION_TYPE 32'h0010 -`define ADDR_RELEASE_LEVEL 32'h0014 - +`define ADDR_ACTION_TYPE 16'h0010 +`define ADDR_RELEASE_LEVEL 16'h0014 +`define ADDR_DATA_COLL_COUNTER 16'h0018 `define ADDR_MAX_MODULES_FPGA 16'h0020 `define ADDR_MODS_INT_PKT_GEN 16'h0024 @@ -93,6 +93,7 @@ module action_config output reg data_collection_start , output reg data_collection_cancel , input data_collection_idle , + input [0:32] data_collection_counter , input calib_data_fifo_empty , input calib_data_fifo_full , @@ -362,6 +363,9 @@ always @(posedge clk) begin `ADDR_FIFO_STATUS: begin rdata <= reg_fifo_status; end + `ADDR_DATA_COLL_COUNTER: begin + rdata <= data_collection_counter; + end default: rdata <= 32'hffffffff; endcase diff --git a/receiver/hls/data_collection_fsm.cpp b/receiver/hls/data_collection_fsm.cpp index db921757..308d170d 100644 --- a/receiver/hls/data_collection_fsm.cpp +++ b/receiver/hls/data_collection_fsm.cpp @@ -11,6 +11,7 @@ void data_collection_fsm(AXI_STREAM ð_in, volatile ap_uint<1> &in_run, volatile ap_uint<1> &in_cancel, volatile ap_uint<1> &out_idle, + uint32_t &counter, ap_uint<32> mode, ap_uint<32> one_over_energy, ap_uint<32> nframes, @@ -25,6 +26,7 @@ void data_collection_fsm(AXI_STREAM ð_in, #pragma HLS INTERFACE ap_none register port=in_run #pragma HLS INTERFACE ap_none register port=in_cancel #pragma HLS INTERFACE ap_none register port=out_idle +#pragma HLS INTERFACE ap_vld register port=counter #pragma HLS INTERFACE ap_none register port=mode #pragma HLS INTERFACE ap_none register port=one_over_energy @@ -41,6 +43,7 @@ void data_collection_fsm(AXI_STREAM ð_in, enum rcv_state_t {RCV_WAIT_FOR_START = 0, RCV_WAIT_FOR_START_LOW = 1, RCV_START = 2, RCV_INIT = 3, RCV_GOOD = 4, RCV_FLUSH = 5, RCV_LAST = 6, RCV_FLUSH_IDLE = 7, RCV_IGNORE = 8}; static rcv_state_t rcv_state = RCV_WAIT_FOR_START; + static uint64_t internal_counter = 0; #pragma HLS RESET variable=rcv_state @@ -76,6 +79,8 @@ void data_collection_fsm(AXI_STREAM ð_in, ACT_REG_NFRAMES(packet_out.data) = nframes; ACT_REG_NMODULES(packet_out.data) = nmodules; ACT_REG_NSTORAGE_CELLS(packet_out.data) = nstorage_cells + 1; + ACT_REG_COUNTER(packet_out.data) = internal_counter++; + packet_out.user = 0; packet_out.last = 0; packet_out.dest = 0; @@ -144,5 +149,6 @@ void data_collection_fsm(AXI_STREAM ð_in, rcv_state = RCV_WAIT_FOR_START; break; } + counter = internal_counter; } diff --git a/receiver/hls/hls_jfjoch.h b/receiver/hls/hls_jfjoch.h index 7de9ac66..70acb2de 100644 --- a/receiver/hls/hls_jfjoch.h +++ b/receiver/hls/hls_jfjoch.h @@ -59,9 +59,10 @@ typedef hls::stream STREAM_512; #define addr_bunch_id(x) x(255,192) #define addr_exptime(x) x(256+63, 256) -#define ACT_REG_MODE(x) ((x)(32, 0)) // 64 bit -#define ACT_REG_ONE_OVER_ENERGY(x) ((x)(95, 64)) // 32 bit -#define ACT_REG_NFRAMES(x) ((x)(127, 96)) // 32 bit +#define ACT_REG_MODE(x) ((x)(32 , 0)) // 32 bit +#define ACT_REG_ONE_OVER_ENERGY(x) ((x)(63 , 32)) // 32 bit +#define ACT_REG_NFRAMES(x) ((x)(95 , 64)) // 32 bit +#define ACT_REG_COUNTER(x) ((x)(127, 96)) // 32 bit #define ACT_REG_NMODULES(x) ((x)(132, 128)) // 5 bit (0..31) #define ACT_REG_NSTORAGE_CELLS(x) ((x)(148, 144)) // 5 bit @@ -78,9 +79,10 @@ void data_collection_fsm(AXI_STREAM ð_in, volatile ap_uint<1> &in_run, volatile ap_uint<1> &in_cancel, volatile ap_uint<1> &out_idle, + uint32_t &counter, ap_uint<32> mode, ap_uint<32> one_over_energy, - ap_uint<32> frames_per_trigger, + ap_uint<32> nframes, ap_uint<8> nmodules, ap_uint<4> nstorage_cells); diff --git a/receiver/hls/host_writer.cpp b/receiver/hls/host_writer.cpp index 6167b0b9..d7b03039 100644 --- a/receiver/hls/host_writer.cpp +++ b/receiver/hls/host_writer.cpp @@ -18,7 +18,8 @@ inline void write_completion(hls::stream > &m_axis_completion, const ap_uint<32> &debug, const ap_uint<64> ×tamp, const ap_uint<64> &bunchid, - const ap_uint<32> &exptime) { + const ap_uint<32> &exptime, + const ap_uint<32> &data_collection_counter) { #pragma HLS INLINE ap_uint<1> all_packets_ok = packet_mask.and_reduce(); ap_uint<1> any_packets_received = packet_mask.or_reduce(); @@ -40,12 +41,10 @@ inline void write_completion(hls::stream > &m_axis_completion, m_axis_completion << bunchid(63,32); m_axis_completion << bunchid(31,0); - m_axis_completion << - exptime; - m_axis_completion << - debug; - m_axis_completion << 0; + m_axis_completion << exptime; + m_axis_completion << debug; m_axis_completion << 0; + m_axis_completion << data_collection_counter; m_axis_completion << packet_mask(127,96); m_axis_completion << packet_mask( 95,64); @@ -134,11 +133,12 @@ void host_writer(STREAM_512 &data_in, data_in >> packet_in; ap_uint<32> data_collection_mode = ACT_REG_MODE(packet_in.data); ap_uint<1> mode_nonblocking = (data_collection_mode & MODE_NONBLOCKING_ON_WR) ? 1 : 0; + ap_uint<32> data_collection_counter = ACT_REG_COUNTER(packet_in.data); ap_uint<8> internal_err_reg = 0; err_reg = internal_err_reg; - write_completion(m_axis_completion, HANDLE_START, 0, 0, 0, 0, 0, 0, 0, 0); + write_completion(m_axis_completion, HANDLE_START, 0, 0, 0, 0, 0, 0, 0, 0, data_collection_counter); uint64_t total_counter = 0; packets_processed = 0; @@ -177,7 +177,7 @@ void host_writer(STREAM_512 &data_in, write_completion(m_axis_completion, comp_handle, module, comp_frame, comp_packet_mask, comp_packet_count, comp_debug, comp_timestamp, comp_bunchid, - comp_exptime); + comp_exptime, data_collection_counter); } if (s_axis_work_request.empty() && mode_nonblocking) { @@ -246,12 +246,12 @@ void host_writer(STREAM_512 &data_in, write_completion(m_axis_completion, handle[m], m / 2, curr_frame[m], packet_mask[m], packet_count[m], debug[m], timestamp[m], jf_bunchid[m], - exptime[m]); + exptime[m], data_collection_counter); } data_in >> packet_in; - write_completion(m_axis_completion, HANDLE_END, 0, total_counter, 0, 0, 0, 0, 0, 0); + write_completion(m_axis_completion, HANDLE_END, 0, total_counter, 0, 0, 0, 0, 0, 0, data_collection_counter); read_request(s_axis_work_request, req_handle, req_host_offset); diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index eaf55551..e21c59ed 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -365,9 +365,7 @@ JFJochProtoBuf::FPGAStatus AcquisitionDevice::GetStatus() const { ret.set_packets_sls(status.packets_sls); ret.set_error_eth(status.udp_err_eth); ret.set_error_packet_len(status.udp_err_len); - - ret.set_datamover_mm2s_error(full_status_register & (1 << 10)); - ret.set_datamover_s2mm_error(full_status_register & (1 << 11)); + ret.set_data_collection_counter(status.data_collection_counter); ret.set_frame_statistics_alignment_err(full_status_register & (1 << 24)); ret.set_frame_statistics_tlast_err(full_status_register & (1 << 25)); diff --git a/receiver/host/ActionConfig.h b/receiver/host/ActionConfig.h index 422cb3ef..2b95d83b 100644 --- a/receiver/host/ActionConfig.h +++ b/receiver/host/ActionConfig.h @@ -29,14 +29,14 @@ struct ActionStatus { uint32_t git_sha1; uint32_t action_type; uint32_t release_level; - uint32_t hbm_temperature; - uint32_t hbm_max_temperature; + uint32_t data_collection_counter; + uint32_t reserved_1; uint32_t max_modules; uint32_t modules_internal_packet_generator; uint64_t pipeline_stalls_host; uint64_t pipeline_stalls_hbm; uint32_t fifo_status; - uint32_t reserved_1; + uint32_t reserved_2; uint64_t packets_processed; uint64_t packets_eth; uint64_t packets_icmp; diff --git a/receiver/host/Completion.cpp b/receiver/host/Completion.cpp index 7b1cddb4..7c1aefd0 100644 --- a/receiver/host/Completion.cpp +++ b/receiver/host/Completion.cpp @@ -17,7 +17,7 @@ Completion parse_hw_completion(uint32_t tmp[16]) { c.handle = tmp[0]; c.module = tmp[1] & 0xFF; c.packet_count = (tmp[1] & (0xFFFF0000)) >> 16; - + c.data_collection_counter = tmp[11]; uint64_t detector_frame_number = bit_concat(tmp[2], tmp[3]); uint32_t parity = (std::bitset<32>(tmp[0]).count() + std::bitset<32>(tmp[1]).count() diff --git a/receiver/host/Completion.h b/receiver/host/Completion.h index af450947..2277cba2 100644 --- a/receiver/host/Completion.h +++ b/receiver/host/Completion.h @@ -21,6 +21,7 @@ struct Completion { uint32_t exptime; uint32_t debug; uint32_t handle; + uint32_t data_collection_counter; uint16_t packet_count; uint8_t module; }; diff --git a/receiver/host/FPGAAcquisitionDevice.cpp b/receiver/host/FPGAAcquisitionDevice.cpp index a97aeaaa..e526639b 100644 --- a/receiver/host/FPGAAcquisitionDevice.cpp +++ b/receiver/host/FPGAAcquisitionDevice.cpp @@ -27,7 +27,7 @@ void FPGAAcquisitionDevice::HW_EndAction() { void FPGAAcquisitionDevice::ReadWorkCompletionThread() { uint32_t values[12]; - Completion c; + Completion c{}; do { while (!HW_ReadMailbox(values)) std::this_thread::sleep_for(std::chrono::microseconds(10)); diff --git a/receiver/host/HLSSimulatedDevice.cpp b/receiver/host/HLSSimulatedDevice.cpp index fe7a50c0..ac23e2b2 100644 --- a/receiver/host/HLSSimulatedDevice.cpp +++ b/receiver/host/HLSSimulatedDevice.cpp @@ -194,6 +194,7 @@ void HLSSimulatedDevice::HLSMainThread() { uint64_t sls_packets; uint32_t udp_len_err; uint32_t udp_eth_err; + uint32_t data_collection_counter; ap_uint<1> clear_counters = 0; @@ -272,6 +273,7 @@ void HLSSimulatedDevice::HLSMainThread() { run_data_collection, cancel_data_collection, idle_data_collection, + data_collection_counter, cfg.mode, cfg.one_over_energy, cfg.nframes, diff --git a/receiver/host/jfjoch_pcie_status.cpp b/receiver/host/jfjoch_pcie_status.cpp index 6869963b..3fecb303 100644 --- a/receiver/host/jfjoch_pcie_status.cpp +++ b/receiver/host/jfjoch_pcie_status.cpp @@ -34,7 +34,7 @@ int main(int argc, char **argv) { std::cout << "HBM temperature #0 " << status.hbm_temp_0_degc() << std::endl; std::cout << "HBM temperature #1 " << status.hbm_temp_1_degc() << std::endl; std::cout << "Idle " << status.fpga_idle() << std::endl; - + std::cout << "Data collection counter " << status.data_collection_counter() << std::endl; std::cout << "Full status register " << std::bitset<32>(status.full_status_register()) << std::endl; std::cout << "Stalls HBM " << status.stalls_hbm() << std::endl; diff --git a/receiver/scripts/jfjoch.tcl b/receiver/scripts/jfjoch.tcl index 153615a5..bf94e069 100644 --- a/receiver/scripts/jfjoch.tcl +++ b/receiver/scripts/jfjoch.tcl @@ -427,6 +427,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net axis_work_completion_fifo_0_almost_full [get_bd_pins action_config_0/work_compl_fifo_full] [get_bd_pins axis_work_completion_fifo_0/almost_full] connect_bd_net -net axis_work_request_fifo_0_almost_empty [get_bd_pins action_config_0/work_req_fifo_empty] [get_bd_pins axis_work_request_fifo_0/almost_empty] connect_bd_net -net axis_work_request_fifo_0_almost_full [get_bd_pins action_config_0/work_req_fifo_full] [get_bd_pins axis_work_request_fifo_0/almost_full] + connect_bd_net -net data_collection_counter_0 [get_bd_pins data_collection_fsm_0/counter] [get_bd_pins action_config_0/data_collection_counter] connect_bd_net -net data_collection_fsm_0_out_idle_V [get_bd_pins action_config_0/data_collection_idle] [get_bd_pins data_collection_fsm_0/out_idle] connect_bd_net -net host_writer_0_err_reg_V [get_bd_pins action_config_0/host_writer_err] [get_bd_pins host_writer_0/err_reg] connect_bd_net -net host_writer_0_err_reg_V_ap_vld [get_bd_pins action_config_0/host_writer_err_valid] [get_bd_pins host_writer_0/err_reg_ap_vld] diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index 116fde64..d111c294 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -197,8 +197,6 @@ TEST_CASE("HLS_C_Simulation_check_cancel_conversion", "[FPGA][Full]") { TEST_CASE("HLS_C_Simulation_check_delay", "[FPGA][Full]") { std::vector raw_frames(RAW_MODULE_SIZE*20); - Completion c; - const uint16_t nmodules = 4; DiffractionExperiment x((DetectorGeometry(nmodules))); @@ -675,7 +673,8 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { ap_uint<1> run_data_collection = 0; ap_uint<1> cancel_data_collection = 0; ap_uint<1> idle_data_collection; - + uint32_t data_collection_counter = 0; + uint32_t save_data_collection_counter; act_reg.mode = MODE_CONV; // state = WAIT_FOR_START @@ -685,6 +684,7 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, + data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -693,6 +693,7 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { REQUIRE(idle_data_collection == 1); REQUIRE(addr1.empty()); REQUIRE(raw1.empty()); + save_data_collection_counter = data_collection_counter; run_data_collection = 1; @@ -702,6 +703,7 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, + data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -717,6 +719,7 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, + data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -735,6 +738,7 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, + data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -750,6 +754,7 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, + data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -767,6 +772,7 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, + data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -777,6 +783,7 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { REQUIRE(addr1.size() == 1); REQUIRE(raw1.size() == 1); + REQUIRE(data_collection_counter == save_data_collection_counter + 1); // state = INIT cancel_data_collection = 1; @@ -786,6 +793,7 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, + data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -803,6 +811,7 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, + data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -820,6 +829,7 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, + data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -841,6 +851,7 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { addr = addr1.read(); REQUIRE(addr_last_flag(addr)); + REQUIRE(data_collection_counter == save_data_collection_counter + 1); } TEST_CASE("HLS_C_Simulation_internal_packet_generator_storage_cell_convert_G0", "[FPGA][Full]") { From c1212a14d9742aacedd4bef0d003d20d202e3544 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 26 May 2023 22:12:34 +0200 Subject: [PATCH 006/224] FPGA: work requests are consumed while host_writer not working --- common/Definitions.h | 3 +-- receiver/hls/host_writer.cpp | 19 +++++++++---------- receiver/host/AcquisitionDevice.cpp | 2 ++ receiver/host/AcquisitionDevice.h | 3 +-- receiver/host/FPGAAcquisitionDevice.cpp | 8 +++----- receiver/host/FPGAAcquisitionDevice.h | 1 + receiver/host/HLSSimulatedDevice.cpp | 5 +---- 7 files changed, 18 insertions(+), 23 deletions(-) diff --git a/common/Definitions.h b/common/Definitions.h index 45c43863..eca261df 100644 --- a/common/Definitions.h +++ b/common/Definitions.h @@ -49,9 +49,8 @@ #define DEFAULT_G2_FACTOR (-0.1145) // For FPGA -/* This number is unique and is declared in ~snap/ActionTypes.md */ #define ACTION_TYPE 0x52324158 -#define RELEASE_LEVEL 0x0035 +#define RELEASE_LEVEL 0x0036 #define MODE_CONV 0x0001L #define MODE_INTERNAL_PACKET_GEN 0x0002L diff --git a/receiver/hls/host_writer.cpp b/receiver/hls/host_writer.cpp index d7b03039..e73fca95 100644 --- a/receiver/hls/host_writer.cpp +++ b/receiver/hls/host_writer.cpp @@ -126,6 +126,15 @@ void host_writer(STREAM_512 &data_in, jf_bunchid[i] = 0; } + ap_uint<32> req_handle; + ap_uint<64> req_host_offset; + + while (data_in.empty()) { +#pragma HLS PIPELINE II=4 + if (!s_axis_work_request.empty()) + read_request(s_axis_work_request, req_handle, req_host_offset); + } + ap_uint addr; addr_in >> addr; @@ -150,9 +159,6 @@ void host_writer(STREAM_512 &data_in, packet_out.dest = 0; packet_out.id = 0; packet_out.user = 0; - - ap_uint<32> req_handle; - ap_uint<64> req_host_offset; Loop_good_packet: while (!addr_last_flag(addr)) { @@ -252,11 +258,4 @@ void host_writer(STREAM_512 &data_in, data_in >> packet_in; write_completion(m_axis_completion, HANDLE_END, 0, total_counter, 0, 0, 0, 0, 0, 0, data_collection_counter); - - read_request(s_axis_work_request, req_handle, req_host_offset); - - while (req_handle != UINT32_MAX) { -#pragma HLS PIPELINE II=4 - read_request(s_axis_work_request, req_handle, req_host_offset); - } } diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index e21c59ed..d4cda054 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -130,6 +130,8 @@ void AcquisitionDevice::StartAction(const DiffractionExperiment &experiment) { if (c.type != Completion::Type::Start) throw JFJochException(JFJochExceptionCategory::AcquisitionDeviceError, "Mismatch in completion queue"); + StartSendingWorkRequests(); + start_time = std::chrono::system_clock::now(); if (logger) diff --git a/receiver/host/AcquisitionDevice.h b/receiver/host/AcquisitionDevice.h index c8b7eb58..5a15e697 100644 --- a/receiver/host/AcquisitionDevice.h +++ b/receiver/host/AcquisitionDevice.h @@ -40,8 +40,6 @@ class AcquisitionDevice { AcquisitionOnlineCounters counters; AcquisitionOfflineCounters completion_vector; - void EndWorkRequestAndSignalQueues(); - virtual void HW_WriteActionRegister(const ActionConfig *job) = 0; virtual void HW_ReadActionRegister(ActionConfig *job) = 0; virtual void HW_StartAction() = 0; @@ -56,6 +54,7 @@ class AcquisitionDevice { virtual uint64_t HW_GetMACAddress() const = 0; virtual void HW_EndAction() {}; // do clean-up after action is done virtual void CopyInternalPacketGenFrameToDeviceBuffer(); + virtual void StartSendingWorkRequests() {}; protected: ThreadSafeFIFO work_completion_queue; ThreadSafeFIFO work_request_queue; diff --git a/receiver/host/FPGAAcquisitionDevice.cpp b/receiver/host/FPGAAcquisitionDevice.cpp index e526639b..6455b2d4 100644 --- a/receiver/host/FPGAAcquisitionDevice.cpp +++ b/receiver/host/FPGAAcquisitionDevice.cpp @@ -5,11 +5,12 @@ void FPGAAcquisitionDevice::HW_StartAction() { FPGA_StartAction(); + read_work_completion_future = std::async(std::launch::async, &FPGAAcquisitionDevice::ReadWorkCompletionThread, this); +} +void FPGAAcquisitionDevice::StartSendingWorkRequests() { stop_work_requests = false; send_work_request_future = std::async(std::launch::async, &FPGAAcquisitionDevice::SendWorkRequestThread, this); - - read_work_completion_future = std::async(std::launch::async, &FPGAAcquisitionDevice::ReadWorkCompletionThread, this); } void FPGAAcquisitionDevice::HW_EndAction() { @@ -18,9 +19,6 @@ void FPGAAcquisitionDevice::HW_EndAction() { stop_work_requests = true; send_work_request_future.get(); - while (!HW_SendWorkRequest(UINT32_MAX)) - std::this_thread::sleep_for(std::chrono::microseconds(10)); - FPGA_EndAction(); } diff --git a/receiver/host/FPGAAcquisitionDevice.h b/receiver/host/FPGAAcquisitionDevice.h index 4df98d2c..831c032d 100644 --- a/receiver/host/FPGAAcquisitionDevice.h +++ b/receiver/host/FPGAAcquisitionDevice.h @@ -22,6 +22,7 @@ class FPGAAcquisitionDevice : public AcquisitionDevice { virtual bool HW_ReadMailbox(uint32_t values[16]) = 0; virtual bool HW_SendWorkRequest(uint32_t handle) = 0; + void StartSendingWorkRequests() override; protected: explicit FPGAAcquisitionDevice(uint16_t data_stream) : AcquisitionDevice(data_stream) {} }; diff --git a/receiver/host/HLSSimulatedDevice.cpp b/receiver/host/HLSSimulatedDevice.cpp index ac23e2b2..b488f495 100644 --- a/receiver/host/HLSSimulatedDevice.cpp +++ b/receiver/host/HLSSimulatedDevice.cpp @@ -352,10 +352,7 @@ void HLSSimulatedDevice::HLSMainThread() { if (!datamover_in.GetDataStream().empty()) throw std::runtime_error("Datamover queue is not empty"); - if (!work_request_stream.empty()) - throw std::runtime_error("Work request stream is not empty"); - - if (err_reg != 0) + if (err_reg != 0) throw std::runtime_error("Error reg for frame_statistics not zero, val=" + std::to_string(err_reg)); while (!datamover_out.IsIdle()) From 8c3ff990149f8555ad687f54e0c386b8013c73c0 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 26 May 2023 22:12:49 +0200 Subject: [PATCH 007/224] Adjust PCIe driver (there were wrong interrupt levels) --- receiver/pcie_driver/jfjoch_function.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/receiver/pcie_driver/jfjoch_function.c b/receiver/pcie_driver/jfjoch_function.c index e546eeb0..86475a8e 100644 --- a/receiver/pcie_driver/jfjoch_function.c +++ b/receiver/pcie_driver/jfjoch_function.c @@ -13,10 +13,6 @@ DEFINE_MUTEX(set_mac_mutex); DEFINE_MUTEX(send_wr_mutex); DEFINE_MUTEX(read_wc_mutex); -u32 parity(uint32_t values[4]) { - return (hweight32(values[0]) + hweight32(values[1]) + hweight32(values[2])) % 2; -} - void jfjoch_start(struct jfjoch_drvdata *drvdata) { u32 run_val = XDMA_CTRL_RUN_STOP | XDMA_CTRL_IE_DESC_ALIGN_MISMATCH | XDMA_CTRL_IE_DESC_ERROR | XDMA_CTRL_IE_READ_ERROR | XDMA_CTRL_IE_WRITE_ERROR | XDMA_CTRL_IE_DESC_COMPLETED @@ -35,9 +31,10 @@ void jfjoch_start(struct jfjoch_drvdata *drvdata) { // RUN ==> C2H channel 0 control register iowrite32(run_val, drvdata->bar0 + PCIE_OFFSET + (1<<12) + 0x04); - // Set Mailbox FIFOs, so interrupt threshold is 4 messages - iowrite32(251, drvdata->bar0 + MAILBOX_OFFSET + ADDR_MAILBOX_SIT); - iowrite32(11, drvdata->bar0 + MAILBOX_OFFSET + ADDR_MAILBOX_RIT); + // Set Mailbox FIFOs, so interrupt threshold is 16 messages + // => This way it ensures that one can always execute read/write operation on the FIFO + iowrite32(255-16, drvdata->bar0 + MAILBOX_OFFSET + ADDR_MAILBOX_SIT); + iowrite32(15 , drvdata->bar0 + MAILBOX_OFFSET + ADDR_MAILBOX_RIT); // Write Start value to action config register iowrite32(0x1, drvdata->bar0 + ACTION_CONFIG_OFFSET); From a9a00db8e9d0295094fe6bc48a87c67c18b48256 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 27 May 2023 17:59:26 +0200 Subject: [PATCH 008/224] PreviewTest: Fix --- tools/PreviewTest.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/PreviewTest.cpp b/tools/PreviewTest.cpp index cf3f08e6..03d2ce84 100644 --- a/tools/PreviewTest.cpp +++ b/tools/PreviewTest.cpp @@ -62,9 +62,10 @@ int main(int argc, char **argv) { publisher.Start(x, calibration); for (int i = 0; i < nimages; i++) { + DataMessage message{.number = i}; publisher.Publish(x, image_conv.data() + i * file_space.GetDimensions()[1] * file_space.GetDimensions()[2], - i); + message); std::this_thread::sleep_for(std::chrono::seconds(1)); } From 19476dc6ea9eca707e91ca55f5d7a936b8f88d91 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 27 May 2023 18:01:58 +0200 Subject: [PATCH 009/224] jfjoch_action_test: Fix --- receiver/jfjoch_action_test.cpp | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/receiver/jfjoch_action_test.cpp b/receiver/jfjoch_action_test.cpp index af6b27bd..9bf5f2c4 100644 --- a/receiver/jfjoch_action_test.cpp +++ b/receiver/jfjoch_action_test.cpp @@ -121,9 +121,7 @@ int main(int argc, char **argv) { logger.Error("Device {}: error in AXI-Stream sequence", i); if (output.device_statistics(i).fpga_status().frame_statistics_work_req_err()) logger.Error("Device {}: parity error in work request", i); - if (output.device_statistics(i).fpga_status().datamover_s2mm_error()) - logger.Error("Device {}: AXI-Stream to AXImm error", i); - if (output.device_statistics(i).fpga_status().mailbox_err_reg() != 0) + if (output.device_statistics(i).fpga_status().mailbox_err_reg() != 0) logger.Error("Device {}: Mailbox error {:x}", i, output.device_statistics(i).fpga_status().mailbox_err_reg()); } From 5ef0cd0f749c2b1343cd47af2d32f63ade5d0072 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 27 May 2023 18:18:00 +0200 Subject: [PATCH 010/224] jfjoch_action_test: Improve output clarity --- common/TestImagePusher.cpp | 6 +++--- receiver/jfjoch_action_test.cpp | 3 ++- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/common/TestImagePusher.cpp b/common/TestImagePusher.cpp index 99d4c6bc..5a449b2b 100644 --- a/common/TestImagePusher.cpp +++ b/common/TestImagePusher.cpp @@ -106,13 +106,13 @@ bool TestImagePusher::CheckImage(const DiffractionExperiment &x, const std::vect decompressed_image.data(), storage_cell); if (x.GetBinning2x2() && (result > 1.5)) { - logger.Error("Mean conversion error ({}) larger than threshold", result); + logger.Error("Mean conversion error ({:.3f}) larger than threshold", result); no_errors = false; } else if (!x.GetBinning2x2() && (result > 0.5)) { - logger.Error("Mean conversion error ({}) larger than threshold", result); + logger.Error("Mean conversion error ({:.3f}) larger than threshold", result); no_errors = false; } else - logger.Info("Mean conversion error: {}", result); + logger.Info("Mean conversion error: {:.3f}", result); } else if (x.GetDetectorMode() == DetectorMode::Raw) { if (memcmp(raw_reference_image.data(), decompressed_image.data(), sizeof(uint16_t) * x.GetPixelsNum()) != 0) { diff --git a/receiver/jfjoch_action_test.cpp b/receiver/jfjoch_action_test.cpp index 9bf5f2c4..bac3f859 100644 --- a/receiver/jfjoch_action_test.cpp +++ b/receiver/jfjoch_action_test.cpp @@ -99,8 +99,9 @@ int main(int argc, char **argv) { double receiving_time = static_cast(output.end_time_ms() - output.start_time_ms())/1000.0; + logger.Info("Efficiency: {:.2f}%", output.efficiency() * 100.f); logger.Info("Max delay: {}",output.max_receive_delay()); - logger.Info("Compression ratio: {}", output.compressed_ratio()); + logger.Info("Compression factor: {}x", output.compressed_ratio()); logger.Info("Receiving time: {} s", receiving_time); logger.Info("Frame rate: {} Hz", static_cast(nimages)/receiving_time); logger.Info("Total throughput: {:.2f} GB/s", From 79c9b3e322de68ec667a75decb0db4dd2957d075 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 27 May 2023 18:20:16 +0200 Subject: [PATCH 011/224] jfjoch_action_test: Use nonblocking mode --- receiver/jfjoch_action_test.cpp | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/receiver/jfjoch_action_test.cpp b/receiver/jfjoch_action_test.cpp index bac3f859..c61e412e 100644 --- a/receiver/jfjoch_action_test.cpp +++ b/receiver/jfjoch_action_test.cpp @@ -46,6 +46,7 @@ int main(int argc, char **argv) { bool print_status_updates = true; uint16_t nthreads = 64; uint64_t clock_MHz = 200; + bool nonblocking_mode = true; logger.Verbose(verbose); @@ -65,9 +66,14 @@ int main(int argc, char **argv) { oc_devices.push_back(std::make_unique(dev_name[i], i)); oc_devices[i]->SetCustomInternalGeneratorFrame(input); oc_devices[i]->EnableLogging(&logger); + oc_devices[i]->SetFPGANonBlockingMode(nonblocking_mode); aq_devices.push_back(oc_devices[i].get()); } + if (nonblocking_mode) + logger.Warning("FPGA uses non-blocking mode - in case data acquisition is aborted, it is necessary to cold reboot the machine"); + + volatile bool done = false; JFJochProtoBuf::ReceiverOutput output; bool ret; From 7c9a5238e27ac0e90dfafa3427581556c597adab Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 27 May 2023 18:39:35 +0200 Subject: [PATCH 012/224] FPGA: Minor improvements to data_collection_fsm --- receiver/hdl/action_config.v | 9 +++++++-- receiver/hls/data_collection_fsm.cpp | 3 ++- receiver/scripts/jfjoch.tcl | 1 + 3 files changed, 10 insertions(+), 3 deletions(-) diff --git a/receiver/hdl/action_config.v b/receiver/hdl/action_config.v index fb9ae092..607e8426 100644 --- a/receiver/hdl/action_config.v +++ b/receiver/hdl/action_config.v @@ -93,7 +93,8 @@ module action_config output reg data_collection_start , output reg data_collection_cancel , input data_collection_idle , - input [0:32] data_collection_counter , + input [0:31] data_collection_counter , + input data_collection_counter_valid, input calib_data_fifo_empty , input calib_data_fifo_full , @@ -178,6 +179,7 @@ localparam reg [63:0] reg_packets_udp; reg [63:0] reg_packets_sls; + reg [31:0] reg_data_collection_counter; reg [31:0] reg_udp_err_len; reg [31:0] reg_udp_err_eth; @@ -364,7 +366,7 @@ always @(posedge clk) begin rdata <= reg_fifo_status; end `ADDR_DATA_COLL_COUNTER: begin - rdata <= data_collection_counter; + rdata <= reg_data_collection_counter; end default: rdata <= 32'hffffffff; @@ -508,6 +510,7 @@ always @ (posedge clk) begin reg_packets_icmp <= 0; reg_packets_sls <= 0; reg_host_writer_err <= 0; + reg_data_collection_counter <= 0; end else begin @@ -517,6 +520,8 @@ always @ (posedge clk) begin reg_stalls_host <= stalls_host; if (packets_processed_valid) reg_packets_processed <= packets_processed; + if (data_collection_counter_valid) + reg_data_collection_counter <= data_collection_counter; if (packets_eth_valid) reg_packets_eth <= packets_eth; if (packets_udp_valid) diff --git a/receiver/hls/data_collection_fsm.cpp b/receiver/hls/data_collection_fsm.cpp index 308d170d..8980885e 100644 --- a/receiver/hls/data_collection_fsm.cpp +++ b/receiver/hls/data_collection_fsm.cpp @@ -74,12 +74,13 @@ void data_collection_fsm(AXI_STREAM ð_in, case RCV_START: out_idle = 0; packet_out.data = 0; + internal_counter++; ACT_REG_MODE(packet_out.data) = mode; ACT_REG_ONE_OVER_ENERGY(packet_out.data) = one_over_energy; ACT_REG_NFRAMES(packet_out.data) = nframes; ACT_REG_NMODULES(packet_out.data) = nmodules; ACT_REG_NSTORAGE_CELLS(packet_out.data) = nstorage_cells + 1; - ACT_REG_COUNTER(packet_out.data) = internal_counter++; + ACT_REG_COUNTER(packet_out.data) = internal_counter; packet_out.user = 0; packet_out.last = 0; diff --git a/receiver/scripts/jfjoch.tcl b/receiver/scripts/jfjoch.tcl index bf94e069..ca76bf82 100644 --- a/receiver/scripts/jfjoch.tcl +++ b/receiver/scripts/jfjoch.tcl @@ -428,6 +428,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net axis_work_request_fifo_0_almost_empty [get_bd_pins action_config_0/work_req_fifo_empty] [get_bd_pins axis_work_request_fifo_0/almost_empty] connect_bd_net -net axis_work_request_fifo_0_almost_full [get_bd_pins action_config_0/work_req_fifo_full] [get_bd_pins axis_work_request_fifo_0/almost_full] connect_bd_net -net data_collection_counter_0 [get_bd_pins data_collection_fsm_0/counter] [get_bd_pins action_config_0/data_collection_counter] + connect_bd_net -net data_collection_counter_valid_0 [get_bd_pins data_collection_fsm_0/counter_ap_vld] [get_bd_pins action_config_0/data_collection_counter_valid] connect_bd_net -net data_collection_fsm_0_out_idle_V [get_bd_pins action_config_0/data_collection_idle] [get_bd_pins data_collection_fsm_0/out_idle] connect_bd_net -net host_writer_0_err_reg_V [get_bd_pins action_config_0/host_writer_err] [get_bd_pins host_writer_0/err_reg] connect_bd_net -net host_writer_0_err_reg_V_ap_vld [get_bd_pins action_config_0/host_writer_err_valid] [get_bd_pins host_writer_0/err_reg_ap_vld] From 2b00cdadbec2172ffb54f215a0dc75b45ef8c8bf Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 27 May 2023 20:03:24 +0200 Subject: [PATCH 013/224] jfjoch_action_test: Fix message for blocking mode --- receiver/jfjoch_action_test.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/receiver/jfjoch_action_test.cpp b/receiver/jfjoch_action_test.cpp index c61e412e..9fe7c162 100644 --- a/receiver/jfjoch_action_test.cpp +++ b/receiver/jfjoch_action_test.cpp @@ -70,8 +70,8 @@ int main(int argc, char **argv) { aq_devices.push_back(oc_devices[i].get()); } - if (nonblocking_mode) - logger.Warning("FPGA uses non-blocking mode - in case data acquisition is aborted, it is necessary to cold reboot the machine"); + if (!nonblocking_mode) + logger.Warning("FPGA uses blocking mode - in case data acquisition is aborted, it is necessary to cold reboot the machine"); volatile bool done = false; From 19753c697bd8a76769edea277405338118483de5 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 27 May 2023 21:00:31 +0200 Subject: [PATCH 014/224] AcquisitionDevice: Rewind to start at the beginning to recover FPGA --- receiver/host/AcquisitionDevice.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index d4cda054..08881d04 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -127,8 +127,8 @@ void AcquisitionDevice::StartAction(const DiffractionExperiment &experiment) { SendWorkRequest(i); auto c = work_completion_queue.GetBlocking(); - if (c.type != Completion::Type::Start) - throw JFJochException(JFJochExceptionCategory::AcquisitionDeviceError, "Mismatch in completion queue"); + while (c.type != Completion::Type::Start) + c = work_completion_queue.GetBlocking(); StartSendingWorkRequests(); From 72cdb88c0c751ad7f037c6679c92d9ea42a2e43b Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 27 May 2023 21:45:21 +0200 Subject: [PATCH 015/224] FPGA: Add host_writer idle marker --- grpc/jfjoch.proto | 1 + python/jfjoch_pb2.py | 96 ++++++++++++++-------------- receiver/hdl/action_config.v | 2 + receiver/hls/hls_jfjoch.h | 1 + receiver/hls/host_writer.cpp | 6 ++ receiver/host/AcquisitionDevice.cpp | 1 + receiver/host/HLSSimulatedDevice.cpp | 5 +- receiver/host/HLSSimulatedDevice.h | 3 + receiver/host/jfjoch_pcie_status.cpp | 4 +- receiver/scripts/jfjoch.tcl | 2 + 10 files changed, 70 insertions(+), 51 deletions(-) diff --git a/grpc/jfjoch.proto b/grpc/jfjoch.proto index 559b07f7..f1e97c12 100644 --- a/grpc/jfjoch.proto +++ b/grpc/jfjoch.proto @@ -381,6 +381,7 @@ message FPGAStatus { uint32 error_packet_len = 39; uint32 data_collection_counter = 40; + bool host_writer_idle = 41; } message DataProcessingSettings { diff --git a/python/jfjoch_pb2.py b/python/jfjoch_pb2.py index 2eb7a1ee..a20d74d2 100644 --- a/python/jfjoch_pb2.py +++ b/python/jfjoch_pb2.py @@ -13,7 +13,7 @@ _sym_db = _symbol_database.Default() -DESCRIPTOR = _descriptor_pool.Default().AddSerializedFile(b'\n\x0cjfjoch.proto\x12\x0eJFJochProtoBuf\"\x07\n\x05\x45mpty\"W\n\x08UnitCell\x12\t\n\x01\x61\x18\x01 \x01(\x02\x12\t\n\x01\x62\x18\x02 \x01(\x02\x12\t\n\x01\x63\x18\x03 \x01(\x02\x12\r\n\x05\x61lpha\x18\x04 \x01(\x02\x12\x0c\n\x04\x62\x65ta\x18\x05 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_builder.BuildMessageAndEnumDescriptors(DESCRIPTOR, globals()) _builder.BuildTopDescriptorsAndMessages(DESCRIPTOR, 'jfjoch_pb2', globals()) @@ -24,18 +24,18 @@ if _descriptor._USE_C_DESCRIPTORS == False: _RADIALINTEGRATIONPROFILES_PLOTSENTRY._serialized_options = b'8\001' _FPGASTATUS_FIFOSTATUSENTRY._options = None _FPGASTATUS_FIFOSTATUSENTRY._serialized_options = b'8\001' - _COMPRESSION._serialized_start=8818 - _COMPRESSION._serialized_end=8902 - _DETECTORTYPE._serialized_start=8904 - _DETECTORTYPE._serialized_end=8943 - _DETECTORMODE._serialized_start=8945 - _DETECTORMODE._serialized_end=9035 - _FPGAFIFOSTATUS._serialized_start=9037 - _FPGAFIFOSTATUS._serialized_end=9087 - _STATE._serialized_start=9089 - _STATE._serialized_end=9183 - _PLOTTYPE._serialized_start=9185 - _PLOTTYPE._serialized_end=9289 + _COMPRESSION._serialized_start=8844 + _COMPRESSION._serialized_end=8928 + _DETECTORTYPE._serialized_start=8930 + _DETECTORTYPE._serialized_end=8969 + _DETECTORMODE._serialized_start=8971 + _DETECTORMODE._serialized_end=9061 + _FPGAFIFOSTATUS._serialized_start=9063 + _FPGAFIFOSTATUS._serialized_end=9113 + _STATE._serialized_start=9115 + _STATE._serialized_end=9209 + _PLOTTYPE._serialized_start=9211 + _PLOTTYPE._serialized_end=9315 _EMPTY._serialized_start=32 _EMPTY._serialized_end=39 _UNITCELL._serialized_start=41 @@ -103,39 +103,39 @@ if _descriptor._USE_C_DESCRIPTORS == False: _DETECTORSTATUS._serialized_start=5352 _DETECTORSTATUS._serialized_end=5450 _FPGASTATUS._serialized_start=5453 - _FPGASTATUS._serialized_end=6496 - _FPGASTATUS_FIFOSTATUSENTRY._serialized_start=6415 - _FPGASTATUS_FIFOSTATUSENTRY._serialized_end=6496 - _DATAPROCESSINGSETTINGS._serialized_start=6499 - _DATAPROCESSINGSETTINGS._serialized_end=6845 - _PREVIEWFRAMESPOT._serialized_start=6847 - _PREVIEWFRAMESPOT._serialized_end=6904 - _PREVIEWFRAME._serialized_start=6907 - _PREVIEWFRAME._serialized_end=7225 - _MODULESTATISTICS._serialized_start=7228 - _MODULESTATISTICS._serialized_end=7465 - _IMAGE._serialized_start=7467 - _IMAGE._serialized_end=7540 - _MASKTOLOAD._serialized_start=7542 - _MASKTOLOAD._serialized_end=7588 - _MEASUREMENTSTATISTICS._serialized_start=7591 - _MEASUREMENTSTATISTICS._serialized_end=8204 - _BROKERSTATUS._serialized_start=8207 - _BROKERSTATUS._serialized_end=8422 - _BROKERFULLSTATUS._serialized_start=8425 - _BROKERFULLSTATUS._serialized_end=8589 - _DETECTORLISTELEMENT._serialized_start=8591 - _DETECTORLISTELEMENT._serialized_end=8663 - _DETECTORLIST._serialized_start=8665 - _DETECTORLIST._serialized_end=8783 - _DETECTORSELECTION._serialized_start=8785 - _DETECTORSELECTION._serialized_end=8816 - _GRPC_JFJOCHRECEIVER._serialized_start=9292 - _GRPC_JFJOCHRECEIVER._serialized_end=10059 - _GRPC_JFJOCHWRITER._serialized_start=10062 - _GRPC_JFJOCHWRITER._serialized_end=10264 - _GRPC_JFJOCHDETECTOR._serialized_start=10267 - _GRPC_JFJOCHDETECTOR._serialized_end=10653 - _GRPC_JFJOCHBROKER._serialized_start=10656 - _GRPC_JFJOCHBROKER._serialized_end=12345 + _FPGASTATUS._serialized_end=6522 + _FPGASTATUS_FIFOSTATUSENTRY._serialized_start=6441 + _FPGASTATUS_FIFOSTATUSENTRY._serialized_end=6522 + _DATAPROCESSINGSETTINGS._serialized_start=6525 + _DATAPROCESSINGSETTINGS._serialized_end=6871 + _PREVIEWFRAMESPOT._serialized_start=6873 + _PREVIEWFRAMESPOT._serialized_end=6930 + _PREVIEWFRAME._serialized_start=6933 + _PREVIEWFRAME._serialized_end=7251 + _MODULESTATISTICS._serialized_start=7254 + _MODULESTATISTICS._serialized_end=7491 + _IMAGE._serialized_start=7493 + _IMAGE._serialized_end=7566 + _MASKTOLOAD._serialized_start=7568 + _MASKTOLOAD._serialized_end=7614 + _MEASUREMENTSTATISTICS._serialized_start=7617 + _MEASUREMENTSTATISTICS._serialized_end=8230 + _BROKERSTATUS._serialized_start=8233 + _BROKERSTATUS._serialized_end=8448 + _BROKERFULLSTATUS._serialized_start=8451 + _BROKERFULLSTATUS._serialized_end=8615 + _DETECTORLISTELEMENT._serialized_start=8617 + _DETECTORLISTELEMENT._serialized_end=8689 + _DETECTORLIST._serialized_start=8691 + _DETECTORLIST._serialized_end=8809 + _DETECTORSELECTION._serialized_start=8811 + _DETECTORSELECTION._serialized_end=8842 + _GRPC_JFJOCHRECEIVER._serialized_start=9318 + _GRPC_JFJOCHRECEIVER._serialized_end=10085 + _GRPC_JFJOCHWRITER._serialized_start=10088 + _GRPC_JFJOCHWRITER._serialized_end=10290 + _GRPC_JFJOCHDETECTOR._serialized_start=10293 + _GRPC_JFJOCHDETECTOR._serialized_end=10679 + _GRPC_JFJOCHBROKER._serialized_start=10682 + _GRPC_JFJOCHBROKER._serialized_end=12371 # @@protoc_insertion_point(module_scope) diff --git a/receiver/hdl/action_config.v b/receiver/hdl/action_config.v index 607e8426..0d165018 100644 --- a/receiver/hdl/action_config.v +++ b/receiver/hdl/action_config.v @@ -96,6 +96,7 @@ module action_config input [0:31] data_collection_counter , input data_collection_counter_valid, + input host_writer_idle , input calib_data_fifo_empty , input calib_data_fifo_full , input calib_addr_fifo_empty , @@ -389,6 +390,7 @@ always @(posedge clk) begin reg_ctrl[1] <= reg_data_collection_idle; reg_ctrl[2] <= data_collection_cancel; reg_ctrl[3] <= clear_counters; + reg_ctrl[4] <= host_writer_idle; reg_ctrl[7] <= DESIGN_NUMBER; reg_ctrl[16] <= mailbox_interrupt_0; reg_ctrl[17] <= mailbox_interrupt_1; diff --git a/receiver/hls/hls_jfjoch.h b/receiver/hls/hls_jfjoch.h index 70acb2de..274672ee 100644 --- a/receiver/hls/hls_jfjoch.h +++ b/receiver/hls/hls_jfjoch.h @@ -108,6 +108,7 @@ void host_writer(STREAM_512 &data_in, hls::stream > &s_axis_work_request, hls::stream > &m_axis_completion, volatile uint64_t &packets_processed, + volatile ap_uint<1> &idle, ap_uint<8> &err_reg); void timer_hbm(STREAM_512 &in, STREAM_512 &data_out, uint64_t &counter); diff --git a/receiver/hls/host_writer.cpp b/receiver/hls/host_writer.cpp index e73fca95..e779898e 100644 --- a/receiver/hls/host_writer.cpp +++ b/receiver/hls/host_writer.cpp @@ -83,6 +83,7 @@ void host_writer(STREAM_512 &data_in, hls::stream > &s_axis_work_request, hls::stream > &m_axis_completion, volatile uint64_t &packets_processed, + volatile ap_uint<1> &idle, ap_uint<8> &err_reg) { #pragma HLS INTERFACE ap_ctrl_none port=return #pragma HLS INTERFACE register both axis port=data_in @@ -93,6 +94,7 @@ void host_writer(STREAM_512 &data_in, #pragma HLS INTERFACE register both axis port=s_axis_work_request #pragma HLS INTERFACE register ap_vld port=packets_processed #pragma HLS INTERFACE register ap_vld port=err_reg +#pragma HLS INTERFACE register ap_none port=idle ap_uint<128> packet_mask[MAX_MODULES_FPGA*2]; #pragma HLS RESOURCE variable=packet_mask core=RAM_1P @@ -113,6 +115,8 @@ void host_writer(STREAM_512 &data_in, ap_uint<64> curr_offset[MAX_MODULES_FPGA*2]; #pragma HLS RESOURCE variable=curr_offset core=RAM_1P + idle = 1; + for (int i = 0; i < MAX_MODULES_FPGA*2; i++) { #pragma HLS UNROLL curr_frame[i] = UINT64_MAX; @@ -149,6 +153,7 @@ void host_writer(STREAM_512 &data_in, write_completion(m_axis_completion, HANDLE_START, 0, 0, 0, 0, 0, 0, 0, 0, data_collection_counter); + idle = 0; uint64_t total_counter = 0; packets_processed = 0; addr_in >> addr; @@ -258,4 +263,5 @@ void host_writer(STREAM_512 &data_in, data_in >> packet_in; write_completion(m_axis_completion, HANDLE_END, 0, total_counter, 0, 0, 0, 0, 0, 0, data_collection_counter); + idle = 1; } diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index 08881d04..81fc129b 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -369,6 +369,7 @@ JFJochProtoBuf::FPGAStatus AcquisitionDevice::GetStatus() const { ret.set_error_packet_len(status.udp_err_len); ret.set_data_collection_counter(status.data_collection_counter); + ret.set_host_writer_idle(full_status_register & (1<<4)); ret.set_frame_statistics_alignment_err(full_status_register & (1 << 24)); ret.set_frame_statistics_tlast_err(full_status_register & (1 << 25)); ret.set_frame_statistics_work_req_err(full_status_register & (1 << 26)); diff --git a/receiver/host/HLSSimulatedDevice.cpp b/receiver/host/HLSSimulatedDevice.cpp index b488f495..95b1ba38 100644 --- a/receiver/host/HLSSimulatedDevice.cpp +++ b/receiver/host/HLSSimulatedDevice.cpp @@ -194,7 +194,6 @@ void HLSSimulatedDevice::HLSMainThread() { uint64_t sls_packets; uint32_t udp_len_err; uint32_t udp_eth_err; - uint32_t data_collection_counter; ap_uint<1> clear_counters = 0; @@ -311,7 +310,7 @@ void HLSSimulatedDevice::HLSMainThread() { hls_cores.emplace_back([&] { host_writer(converted_2, addr3, datamover_out.GetDataStream(), datamover_out.GetCtrlStream(), work_request_stream, completion_stream, - packets_processed, err_reg); }); + packets_processed, host_writer_idle, err_reg); }); for (auto &i : hls_cores) i.join(); @@ -372,6 +371,8 @@ uint64_t HLSSimulatedDevice::HW_GetMACAddress() const { void HLSSimulatedDevice::HW_GetStatus(ActionStatus *status) const { memset(status, 0, sizeof(ActionStatus)); + status->ctrl_reg = ap_uint<1>(host_writer_idle) ? (1 << 4) : 0; status->modules_internal_packet_generator = 1; status->max_modules = max_modules; + status->data_collection_counter = data_collection_counter; } \ No newline at end of file diff --git a/receiver/host/HLSSimulatedDevice.h b/receiver/host/HLSSimulatedDevice.h index fd1fcf38..8361995a 100644 --- a/receiver/host/HLSSimulatedDevice.h +++ b/receiver/host/HLSSimulatedDevice.h @@ -32,6 +32,9 @@ class HLSSimulatedDevice : public FPGAAcquisitionDevice { Datamover<512> datamover_out; ap_uint<1> run_data_collection; ap_uint<1> cancel_data_collection; + volatile ap_uint<1> host_writer_idle; + uint32_t data_collection_counter; + uint64_t in_mem_location[LOAD_CALIBRATION_BRAM_SIZE]; static const uint64_t fpga_mac_addr = 0xCCAA11223344; static const uint32_t fpga_ipv4_addr = 0x0132010A; diff --git a/receiver/host/jfjoch_pcie_status.cpp b/receiver/host/jfjoch_pcie_status.cpp index 3fecb303..e139f641 100644 --- a/receiver/host/jfjoch_pcie_status.cpp +++ b/receiver/host/jfjoch_pcie_status.cpp @@ -33,8 +33,10 @@ int main(int argc, char **argv) { std::cout << "FPGA temperature " << status.fpga_temp_degc() << std::endl; std::cout << "HBM temperature #0 " << status.hbm_temp_0_degc() << std::endl; std::cout << "HBM temperature #1 " << status.hbm_temp_1_degc() << std::endl; - std::cout << "Idle " << status.fpga_idle() << std::endl; + std::cout << "Data collection idle " << status.fpga_idle() << std::endl; std::cout << "Data collection counter " << status.data_collection_counter() << std::endl; + std::cout << "Host writer idle " << status.host_writer_idle() << std::endl; + std::cout << "Full status register " << std::bitset<32>(status.full_status_register()) << std::endl; std::cout << "Stalls HBM " << status.stalls_hbm() << std::endl; diff --git a/receiver/scripts/jfjoch.tcl b/receiver/scripts/jfjoch.tcl index ca76bf82..ced39ca9 100644 --- a/receiver/scripts/jfjoch.tcl +++ b/receiver/scripts/jfjoch.tcl @@ -432,6 +432,8 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net data_collection_fsm_0_out_idle_V [get_bd_pins action_config_0/data_collection_idle] [get_bd_pins data_collection_fsm_0/out_idle] connect_bd_net -net host_writer_0_err_reg_V [get_bd_pins action_config_0/host_writer_err] [get_bd_pins host_writer_0/err_reg] connect_bd_net -net host_writer_0_err_reg_V_ap_vld [get_bd_pins action_config_0/host_writer_err_valid] [get_bd_pins host_writer_0/err_reg_ap_vld] + connect_bd_net -net host_writer_0_idle [get_bd_pins action_config_0/host_writer_idle] [get_bd_pins host_writer_0/idle] + connect_bd_net -net host_writer_0_packets_processed [get_bd_pins action_config_0/packets_processed] [get_bd_pins host_writer_0/packets_processed] connect_bd_net -net host_writer_0_packets_processed_ap_vld [get_bd_pins action_config_0/packets_processed_valid] [get_bd_pins host_writer_0/packets_processed_ap_vld] connect_bd_net -net mailbox_0_Interrupt_0 [get_bd_pins action_config_0/mailbox_interrupt_0] [get_bd_pins mailbox_0/Interrupt_0] From effcd2d2b7432d4fd8c2bde917e4697cb7fa162e Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 27 May 2023 21:54:36 +0200 Subject: [PATCH 016/224] AcquisitionDevice: Set cancel data collection bit before starting new data collection --- receiver/host/AcquisitionDevice.cpp | 2 ++ receiver/host/MockAcquisitionDevice.cpp | 14 +++++++++----- receiver/host/MockAcquisitionDevice.h | 2 ++ 3 files changed, 13 insertions(+), 5 deletions(-) diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index 81fc129b..715eb275 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -80,6 +80,8 @@ void AcquisitionDevice::PrepareAction(const DiffractionExperiment &experiment) { } void AcquisitionDevice::StartAction(const DiffractionExperiment &experiment) { + HW_SetCancelDataCollectionBit(); + if (!HW_IsIdle()) throw(JFJochException(JFJochExceptionCategory::AcquisitionDeviceError, "Hardware action running prior to start of data acquisition")); diff --git a/receiver/host/MockAcquisitionDevice.cpp b/receiver/host/MockAcquisitionDevice.cpp index 1571aab9..f78421c1 100644 --- a/receiver/host/MockAcquisitionDevice.cpp +++ b/receiver/host/MockAcquisitionDevice.cpp @@ -13,12 +13,16 @@ void MockAcquisitionDevice::HW_WriteActionRegister(const ActionConfig *job) { memcpy(&cfg, job, sizeof(ActionConfig)); } -void MockAcquisitionDevice::HW_StartAction() {} +void MockAcquisitionDevice::HW_StartAction() { + idle = false; +} void MockAcquisitionDevice::HW_SetCancelDataCollectionBit() { - if (logger) - logger->Info("MockAcquisitionDevice cancelling " + std::to_string(data_stream)); - Terminate(); + if (!idle) { + if (logger) + logger->Info("MockAcquisitionDevice cancelling " + std::to_string(data_stream)); + Terminate(); + } } bool MockAcquisitionDevice::HW_IsIdle() const { @@ -65,7 +69,7 @@ void MockAcquisitionDevice::Terminate() { .type = Completion::Type::End, .frame_number = current_handle * 128 }); - work_completion_queue.Put(Completion{.type = Completion::Type::Start}); + idle = true; } uint64_t MockAcquisitionDevice::HW_GetMACAddress() const { diff --git a/receiver/host/MockAcquisitionDevice.h b/receiver/host/MockAcquisitionDevice.h index 0af04f15..d20b8dc1 100644 --- a/receiver/host/MockAcquisitionDevice.h +++ b/receiver/host/MockAcquisitionDevice.h @@ -12,6 +12,8 @@ class MockAcquisitionDevice : public AcquisitionDevice { uint32_t max_handle = 0; ActionConfig cfg; + bool idle = true; + void SendCompletion(uint32_t handle, uint16_t module_number, uint64_t frame_number); constexpr static const uint32_t frames_int_pkt_gen = 1; void HW_ReadActionRegister(ActionConfig *job) override; From 7ad4fbe0615aea2cc942071850a24132e3fefd83 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 27 May 2023 21:54:55 +0200 Subject: [PATCH 017/224] AcquisitionDevice: Print information on data collection counter in start message --- receiver/host/AcquisitionDevice.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index 715eb275..0518e4ea 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -129,8 +129,13 @@ void AcquisitionDevice::StartAction(const DiffractionExperiment &experiment) { SendWorkRequest(i); auto c = work_completion_queue.GetBlocking(); - while (c.type != Completion::Type::Start) + while (c.type != Completion::Type::Start) { + if (logger) + logger->Info("Old message data collection ID {}", c.data_collection_counter ); c = work_completion_queue.GetBlocking(); + } + if (logger) + logger->Info("Start message data collection ID {}", c.data_collection_counter ); StartSendingWorkRequests(); From 8c1e55b6f3a55bc6abfcb68e74aba2324dc5ebd1 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 27 May 2023 22:08:22 +0200 Subject: [PATCH 018/224] Add tool to cancel data collection on PCIe card --- receiver/host/CMakeLists.txt | 4 +++ receiver/host/PCIExpressDevice.h | 2 +- .../jfjoch_pcie_cancel_data_collection.cpp | 26 +++++++++++++++++++ 3 files changed, 31 insertions(+), 1 deletion(-) create mode 100644 receiver/host/jfjoch_pcie_cancel_data_collection.cpp diff --git a/receiver/host/CMakeLists.txt b/receiver/host/CMakeLists.txt index 254ee2e7..125ff1ee 100644 --- a/receiver/host/CMakeLists.txt +++ b/receiver/host/CMakeLists.txt @@ -45,6 +45,10 @@ ADD_EXECUTABLE(jfjoch_pcie_set_network jfjoch_pcie_set_network.cpp) TARGET_LINK_LIBRARIES(jfjoch_pcie_set_network JungfraujochHost) INSTALL(TARGETS jfjoch_pcie_set_network RUNTIME) +ADD_EXECUTABLE(jfjoch_pcie_cancel_data_collection jfjoch_pcie_cancel_data_collection.cpp) +TARGET_LINK_LIBRARIES(jfjoch_pcie_cancel_data_collection JungfraujochHost) +INSTALL(TARGETS jfjoch_pcie_cancel_data_collection RUNTIME) + ADD_EXECUTABLE(jfjoch_pcie_clear_net_counters jfjoch_pcie_clear_net_counters.cpp) TARGET_LINK_LIBRARIES(jfjoch_pcie_clear_net_counters JungfraujochHost) INSTALL(TARGETS jfjoch_pcie_clear_net_counters RUNTIME) \ No newline at end of file diff --git a/receiver/host/PCIExpressDevice.h b/receiver/host/PCIExpressDevice.h index 993ba7c0..883241ea 100644 --- a/receiver/host/PCIExpressDevice.h +++ b/receiver/host/PCIExpressDevice.h @@ -10,7 +10,6 @@ class PCIExpressDevice : public FPGAAcquisitionDevice { int fd; bool HW_ReadMailbox(uint32_t values[16]); - void HW_SetCancelDataCollectionBit() override; bool HW_SendWorkRequest(uint32_t handle) override; void FPGA_StartAction() override; bool HW_IsIdle() const final; @@ -30,6 +29,7 @@ public: PCIExpressDevice(const std::string &device_name, uint16_t data_stream); ~PCIExpressDevice() override; + void HW_SetCancelDataCollectionBit() override; void HW_GetStatus(ActionStatus *status) const override; void HW_GetEnvParams(ActionEnvParams *status) const override; uint32_t GetNumKernelBuffers() const; diff --git a/receiver/host/jfjoch_pcie_cancel_data_collection.cpp b/receiver/host/jfjoch_pcie_cancel_data_collection.cpp new file mode 100644 index 00000000..555994b4 --- /dev/null +++ b/receiver/host/jfjoch_pcie_cancel_data_collection.cpp @@ -0,0 +1,26 @@ +// Copyright (2019-2022) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#include + +#include "../common/JFJochException.h" +#include "PCIExpressDevice.h" +#include "../common/Logger.h" + +int main(int argc, char **argv) { + Logger logger("jfjoch_pcie_cancel_data_collection"); + + if (argc != 2) { + logger.Error("Usage: ./jfjoch_pcie_cancel_data_collection "); + exit(EXIT_FAILURE); + } + logger.Info("Device {}", argv[1]); + std::cout << std::endl; + try { + PCIExpressDevice test(argv[1], 0); + test.HW_SetCancelDataCollectionBit(); + logger.Info("Done"); + } catch (const JFJochException &e) { + logger.ErrorException(e); + } +} \ No newline at end of file From a3996a81e3bb5fe408ccf0c4e82231f1d6813d35 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 30 May 2023 20:13:54 +0200 Subject: [PATCH 019/224] FPGA: Remove data collection counter --- grpc/jfjoch.proto | 1 - image_analysis/fast-feedback-indexer | 2 +- python/jfjoch_pb2.py | 96 ++++++++++++++-------------- receiver/hdl/action_config.v | 10 --- receiver/hls/data_collection_fsm.cpp | 7 -- receiver/hls/hls_jfjoch.h | 2 - receiver/hls/host_writer.cpp | 14 ++-- receiver/host/AcquisitionDevice.cpp | 7 +- receiver/host/ActionConfig.h | 2 +- receiver/host/Completion.cpp | 1 - receiver/host/Completion.h | 1 - receiver/host/HLSSimulatedDevice.cpp | 2 - receiver/host/HLSSimulatedDevice.h | 1 - receiver/scripts/jfjoch.tcl | 2 - tests/FPGAIntegrationTest.cpp | 13 ---- 15 files changed, 57 insertions(+), 104 deletions(-) diff --git a/grpc/jfjoch.proto b/grpc/jfjoch.proto index f1e97c12..7fcfc8b0 100644 --- a/grpc/jfjoch.proto +++ b/grpc/jfjoch.proto @@ -380,7 +380,6 @@ message FPGAStatus { uint32 error_eth = 38; uint32 error_packet_len = 39; - uint32 data_collection_counter = 40; bool host_writer_idle = 41; } diff --git a/image_analysis/fast-feedback-indexer b/image_analysis/fast-feedback-indexer index 0db516f1..6eccc70b 160000 --- a/image_analysis/fast-feedback-indexer +++ b/image_analysis/fast-feedback-indexer @@ -1 +1 @@ -Subproject commit 0db516f124dd868297e49f4942f3e6c1fa4895cb +Subproject commit 6eccc70b524ba7a0207aa2c93b85769c1c9f5a62 diff --git a/python/jfjoch_pb2.py b/python/jfjoch_pb2.py index a20d74d2..d35585f9 100644 --- a/python/jfjoch_pb2.py +++ b/python/jfjoch_pb2.py @@ -13,7 +13,7 @@ _sym_db = _symbol_database.Default() -DESCRIPTOR = _descriptor_pool.Default().AddSerializedFile(b'\n\x0cjfjoch.proto\x12\x0eJFJochProtoBuf\"\x07\n\x05\x45mpty\"W\n\x08UnitCell\x12\t\n\x01\x61\x18\x01 \x01(\x02\x12\t\n\x01\x62\x18\x02 \x01(\x02\x12\t\n\x01\x63\x18\x03 \x01(\x02\x12\r\n\x05\x61lpha\x18\x04 \x01(\x02\x12\x0c\n\x04\x62\x65ta\x18\x05 \x01(\x02\x12\r\n\x05gamma\x18\x06 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_builder.BuildMessageAndEnumDescriptors(DESCRIPTOR, globals()) _builder.BuildTopDescriptorsAndMessages(DESCRIPTOR, 'jfjoch_pb2', globals()) @@ -24,18 +24,18 @@ if _descriptor._USE_C_DESCRIPTORS == False: _RADIALINTEGRATIONPROFILES_PLOTSENTRY._serialized_options = b'8\001' _FPGASTATUS_FIFOSTATUSENTRY._options = None _FPGASTATUS_FIFOSTATUSENTRY._serialized_options = b'8\001' - _COMPRESSION._serialized_start=8844 - _COMPRESSION._serialized_end=8928 - _DETECTORTYPE._serialized_start=8930 - _DETECTORTYPE._serialized_end=8969 - _DETECTORMODE._serialized_start=8971 - _DETECTORMODE._serialized_end=9061 - _FPGAFIFOSTATUS._serialized_start=9063 - _FPGAFIFOSTATUS._serialized_end=9113 - _STATE._serialized_start=9115 - _STATE._serialized_end=9209 - _PLOTTYPE._serialized_start=9211 - _PLOTTYPE._serialized_end=9315 + _COMPRESSION._serialized_start=8811 + _COMPRESSION._serialized_end=8895 + _DETECTORTYPE._serialized_start=8897 + _DETECTORTYPE._serialized_end=8936 + _DETECTORMODE._serialized_start=8938 + _DETECTORMODE._serialized_end=9028 + _FPGAFIFOSTATUS._serialized_start=9030 + _FPGAFIFOSTATUS._serialized_end=9080 + _STATE._serialized_start=9082 + _STATE._serialized_end=9176 + _PLOTTYPE._serialized_start=9178 + _PLOTTYPE._serialized_end=9282 _EMPTY._serialized_start=32 _EMPTY._serialized_end=39 _UNITCELL._serialized_start=41 @@ -103,39 +103,39 @@ if _descriptor._USE_C_DESCRIPTORS == False: _DETECTORSTATUS._serialized_start=5352 _DETECTORSTATUS._serialized_end=5450 _FPGASTATUS._serialized_start=5453 - _FPGASTATUS._serialized_end=6522 - _FPGASTATUS_FIFOSTATUSENTRY._serialized_start=6441 - _FPGASTATUS_FIFOSTATUSENTRY._serialized_end=6522 - _DATAPROCESSINGSETTINGS._serialized_start=6525 - _DATAPROCESSINGSETTINGS._serialized_end=6871 - _PREVIEWFRAMESPOT._serialized_start=6873 - _PREVIEWFRAMESPOT._serialized_end=6930 - _PREVIEWFRAME._serialized_start=6933 - _PREVIEWFRAME._serialized_end=7251 - _MODULESTATISTICS._serialized_start=7254 - _MODULESTATISTICS._serialized_end=7491 - _IMAGE._serialized_start=7493 - _IMAGE._serialized_end=7566 - _MASKTOLOAD._serialized_start=7568 - _MASKTOLOAD._serialized_end=7614 - _MEASUREMENTSTATISTICS._serialized_start=7617 - _MEASUREMENTSTATISTICS._serialized_end=8230 - _BROKERSTATUS._serialized_start=8233 - _BROKERSTATUS._serialized_end=8448 - _BROKERFULLSTATUS._serialized_start=8451 - _BROKERFULLSTATUS._serialized_end=8615 - _DETECTORLISTELEMENT._serialized_start=8617 - _DETECTORLISTELEMENT._serialized_end=8689 - _DETECTORLIST._serialized_start=8691 - _DETECTORLIST._serialized_end=8809 - _DETECTORSELECTION._serialized_start=8811 - _DETECTORSELECTION._serialized_end=8842 - _GRPC_JFJOCHRECEIVER._serialized_start=9318 - _GRPC_JFJOCHRECEIVER._serialized_end=10085 - _GRPC_JFJOCHWRITER._serialized_start=10088 - _GRPC_JFJOCHWRITER._serialized_end=10290 - _GRPC_JFJOCHDETECTOR._serialized_start=10293 - _GRPC_JFJOCHDETECTOR._serialized_end=10679 - _GRPC_JFJOCHBROKER._serialized_start=10682 - _GRPC_JFJOCHBROKER._serialized_end=12371 + _FPGASTATUS._serialized_end=6489 + _FPGASTATUS_FIFOSTATUSENTRY._serialized_start=6408 + _FPGASTATUS_FIFOSTATUSENTRY._serialized_end=6489 + _DATAPROCESSINGSETTINGS._serialized_start=6492 + _DATAPROCESSINGSETTINGS._serialized_end=6838 + _PREVIEWFRAMESPOT._serialized_start=6840 + _PREVIEWFRAMESPOT._serialized_end=6897 + _PREVIEWFRAME._serialized_start=6900 + _PREVIEWFRAME._serialized_end=7218 + _MODULESTATISTICS._serialized_start=7221 + _MODULESTATISTICS._serialized_end=7458 + _IMAGE._serialized_start=7460 + _IMAGE._serialized_end=7533 + _MASKTOLOAD._serialized_start=7535 + _MASKTOLOAD._serialized_end=7581 + _MEASUREMENTSTATISTICS._serialized_start=7584 + _MEASUREMENTSTATISTICS._serialized_end=8197 + _BROKERSTATUS._serialized_start=8200 + _BROKERSTATUS._serialized_end=8415 + _BROKERFULLSTATUS._serialized_start=8418 + _BROKERFULLSTATUS._serialized_end=8582 + _DETECTORLISTELEMENT._serialized_start=8584 + _DETECTORLISTELEMENT._serialized_end=8656 + _DETECTORLIST._serialized_start=8658 + _DETECTORLIST._serialized_end=8776 + _DETECTORSELECTION._serialized_start=8778 + _DETECTORSELECTION._serialized_end=8809 + _GRPC_JFJOCHRECEIVER._serialized_start=9285 + _GRPC_JFJOCHRECEIVER._serialized_end=10052 + _GRPC_JFJOCHWRITER._serialized_start=10055 + _GRPC_JFJOCHWRITER._serialized_end=10257 + _GRPC_JFJOCHDETECTOR._serialized_start=10260 + _GRPC_JFJOCHDETECTOR._serialized_end=10646 + _GRPC_JFJOCHBROKER._serialized_start=10649 + _GRPC_JFJOCHBROKER._serialized_end=12338 # @@protoc_insertion_point(module_scope) diff --git a/receiver/hdl/action_config.v b/receiver/hdl/action_config.v index 0d165018..fe86ebc2 100644 --- a/receiver/hdl/action_config.v +++ b/receiver/hdl/action_config.v @@ -15,7 +15,6 @@ `define ADDR_ACTION_TYPE 16'h0010 `define ADDR_RELEASE_LEVEL 16'h0014 -`define ADDR_DATA_COLL_COUNTER 16'h0018 `define ADDR_MAX_MODULES_FPGA 16'h0020 `define ADDR_MODS_INT_PKT_GEN 16'h0024 @@ -93,8 +92,6 @@ module action_config output reg data_collection_start , output reg data_collection_cancel , input data_collection_idle , - input [0:31] data_collection_counter , - input data_collection_counter_valid, input host_writer_idle , input calib_data_fifo_empty , @@ -180,7 +177,6 @@ localparam reg [63:0] reg_packets_udp; reg [63:0] reg_packets_sls; - reg [31:0] reg_data_collection_counter; reg [31:0] reg_udp_err_len; reg [31:0] reg_udp_err_eth; @@ -366,9 +362,6 @@ always @(posedge clk) begin `ADDR_FIFO_STATUS: begin rdata <= reg_fifo_status; end - `ADDR_DATA_COLL_COUNTER: begin - rdata <= reg_data_collection_counter; - end default: rdata <= 32'hffffffff; endcase @@ -512,7 +505,6 @@ always @ (posedge clk) begin reg_packets_icmp <= 0; reg_packets_sls <= 0; reg_host_writer_err <= 0; - reg_data_collection_counter <= 0; end else begin @@ -522,8 +514,6 @@ always @ (posedge clk) begin reg_stalls_host <= stalls_host; if (packets_processed_valid) reg_packets_processed <= packets_processed; - if (data_collection_counter_valid) - reg_data_collection_counter <= data_collection_counter; if (packets_eth_valid) reg_packets_eth <= packets_eth; if (packets_udp_valid) diff --git a/receiver/hls/data_collection_fsm.cpp b/receiver/hls/data_collection_fsm.cpp index 8980885e..1dade42a 100644 --- a/receiver/hls/data_collection_fsm.cpp +++ b/receiver/hls/data_collection_fsm.cpp @@ -1,7 +1,6 @@ // Copyright (2019-2022) Paul Scherrer Institute // SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later -#include #include "hls_jfjoch.h" void data_collection_fsm(AXI_STREAM ð_in, @@ -11,7 +10,6 @@ void data_collection_fsm(AXI_STREAM ð_in, volatile ap_uint<1> &in_run, volatile ap_uint<1> &in_cancel, volatile ap_uint<1> &out_idle, - uint32_t &counter, ap_uint<32> mode, ap_uint<32> one_over_energy, ap_uint<32> nframes, @@ -26,7 +24,6 @@ void data_collection_fsm(AXI_STREAM ð_in, #pragma HLS INTERFACE ap_none register port=in_run #pragma HLS INTERFACE ap_none register port=in_cancel #pragma HLS INTERFACE ap_none register port=out_idle -#pragma HLS INTERFACE ap_vld register port=counter #pragma HLS INTERFACE ap_none register port=mode #pragma HLS INTERFACE ap_none register port=one_over_energy @@ -43,7 +40,6 @@ void data_collection_fsm(AXI_STREAM ð_in, enum rcv_state_t {RCV_WAIT_FOR_START = 0, RCV_WAIT_FOR_START_LOW = 1, RCV_START = 2, RCV_INIT = 3, RCV_GOOD = 4, RCV_FLUSH = 5, RCV_LAST = 6, RCV_FLUSH_IDLE = 7, RCV_IGNORE = 8}; static rcv_state_t rcv_state = RCV_WAIT_FOR_START; - static uint64_t internal_counter = 0; #pragma HLS RESET variable=rcv_state @@ -74,13 +70,11 @@ void data_collection_fsm(AXI_STREAM ð_in, case RCV_START: out_idle = 0; packet_out.data = 0; - internal_counter++; ACT_REG_MODE(packet_out.data) = mode; ACT_REG_ONE_OVER_ENERGY(packet_out.data) = one_over_energy; ACT_REG_NFRAMES(packet_out.data) = nframes; ACT_REG_NMODULES(packet_out.data) = nmodules; ACT_REG_NSTORAGE_CELLS(packet_out.data) = nstorage_cells + 1; - ACT_REG_COUNTER(packet_out.data) = internal_counter; packet_out.user = 0; packet_out.last = 0; @@ -150,6 +144,5 @@ void data_collection_fsm(AXI_STREAM ð_in, rcv_state = RCV_WAIT_FOR_START; break; } - counter = internal_counter; } diff --git a/receiver/hls/hls_jfjoch.h b/receiver/hls/hls_jfjoch.h index 274672ee..e60885bf 100644 --- a/receiver/hls/hls_jfjoch.h +++ b/receiver/hls/hls_jfjoch.h @@ -62,7 +62,6 @@ typedef hls::stream STREAM_512; #define ACT_REG_MODE(x) ((x)(32 , 0)) // 32 bit #define ACT_REG_ONE_OVER_ENERGY(x) ((x)(63 , 32)) // 32 bit #define ACT_REG_NFRAMES(x) ((x)(95 , 64)) // 32 bit -#define ACT_REG_COUNTER(x) ((x)(127, 96)) // 32 bit #define ACT_REG_NMODULES(x) ((x)(132, 128)) // 5 bit (0..31) #define ACT_REG_NSTORAGE_CELLS(x) ((x)(148, 144)) // 5 bit @@ -79,7 +78,6 @@ void data_collection_fsm(AXI_STREAM ð_in, volatile ap_uint<1> &in_run, volatile ap_uint<1> &in_cancel, volatile ap_uint<1> &out_idle, - uint32_t &counter, ap_uint<32> mode, ap_uint<32> one_over_energy, ap_uint<32> nframes, diff --git a/receiver/hls/host_writer.cpp b/receiver/hls/host_writer.cpp index e779898e..e08efe6f 100644 --- a/receiver/hls/host_writer.cpp +++ b/receiver/hls/host_writer.cpp @@ -18,8 +18,7 @@ inline void write_completion(hls::stream > &m_axis_completion, const ap_uint<32> &debug, const ap_uint<64> ×tamp, const ap_uint<64> &bunchid, - const ap_uint<32> &exptime, - const ap_uint<32> &data_collection_counter) { + const ap_uint<32> &exptime) { #pragma HLS INLINE ap_uint<1> all_packets_ok = packet_mask.and_reduce(); ap_uint<1> any_packets_received = packet_mask.or_reduce(); @@ -44,7 +43,7 @@ inline void write_completion(hls::stream > &m_axis_completion, m_axis_completion << exptime; m_axis_completion << debug; m_axis_completion << 0; - m_axis_completion << data_collection_counter; + m_axis_completion << 0; m_axis_completion << packet_mask(127,96); m_axis_completion << packet_mask( 95,64); @@ -146,12 +145,11 @@ void host_writer(STREAM_512 &data_in, data_in >> packet_in; ap_uint<32> data_collection_mode = ACT_REG_MODE(packet_in.data); ap_uint<1> mode_nonblocking = (data_collection_mode & MODE_NONBLOCKING_ON_WR) ? 1 : 0; - ap_uint<32> data_collection_counter = ACT_REG_COUNTER(packet_in.data); ap_uint<8> internal_err_reg = 0; err_reg = internal_err_reg; - write_completion(m_axis_completion, HANDLE_START, 0, 0, 0, 0, 0, 0, 0, 0, data_collection_counter); + write_completion(m_axis_completion, HANDLE_START, 0, 0, 0, 0, 0, 0, 0, 0); idle = 0; uint64_t total_counter = 0; @@ -188,7 +186,7 @@ void host_writer(STREAM_512 &data_in, write_completion(m_axis_completion, comp_handle, module, comp_frame, comp_packet_mask, comp_packet_count, comp_debug, comp_timestamp, comp_bunchid, - comp_exptime, data_collection_counter); + comp_exptime); } if (s_axis_work_request.empty() && mode_nonblocking) { @@ -257,11 +255,11 @@ void host_writer(STREAM_512 &data_in, write_completion(m_axis_completion, handle[m], m / 2, curr_frame[m], packet_mask[m], packet_count[m], debug[m], timestamp[m], jf_bunchid[m], - exptime[m], data_collection_counter); + exptime[m]); } data_in >> packet_in; - write_completion(m_axis_completion, HANDLE_END, 0, total_counter, 0, 0, 0, 0, 0, 0, data_collection_counter); + write_completion(m_axis_completion, HANDLE_END, 0, total_counter, 0, 0, 0, 0, 0, 0); idle = 1; } diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index 0518e4ea..ed4794f9 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -130,12 +130,8 @@ void AcquisitionDevice::StartAction(const DiffractionExperiment &experiment) { auto c = work_completion_queue.GetBlocking(); while (c.type != Completion::Type::Start) { - if (logger) - logger->Info("Old message data collection ID {}", c.data_collection_counter ); - c = work_completion_queue.GetBlocking(); + c = work_completion_queue.GetBlocking(); } - if (logger) - logger->Info("Start message data collection ID {}", c.data_collection_counter ); StartSendingWorkRequests(); @@ -374,7 +370,6 @@ JFJochProtoBuf::FPGAStatus AcquisitionDevice::GetStatus() const { ret.set_packets_sls(status.packets_sls); ret.set_error_eth(status.udp_err_eth); ret.set_error_packet_len(status.udp_err_len); - ret.set_data_collection_counter(status.data_collection_counter); ret.set_host_writer_idle(full_status_register & (1<<4)); ret.set_frame_statistics_alignment_err(full_status_register & (1 << 24)); diff --git a/receiver/host/ActionConfig.h b/receiver/host/ActionConfig.h index 2b95d83b..0e2fd0ce 100644 --- a/receiver/host/ActionConfig.h +++ b/receiver/host/ActionConfig.h @@ -29,7 +29,7 @@ struct ActionStatus { uint32_t git_sha1; uint32_t action_type; uint32_t release_level; - uint32_t data_collection_counter; + uint32_t reserved_3; uint32_t reserved_1; uint32_t max_modules; uint32_t modules_internal_packet_generator; diff --git a/receiver/host/Completion.cpp b/receiver/host/Completion.cpp index 7c1aefd0..03025980 100644 --- a/receiver/host/Completion.cpp +++ b/receiver/host/Completion.cpp @@ -17,7 +17,6 @@ Completion parse_hw_completion(uint32_t tmp[16]) { c.handle = tmp[0]; c.module = tmp[1] & 0xFF; c.packet_count = (tmp[1] & (0xFFFF0000)) >> 16; - c.data_collection_counter = tmp[11]; uint64_t detector_frame_number = bit_concat(tmp[2], tmp[3]); uint32_t parity = (std::bitset<32>(tmp[0]).count() + std::bitset<32>(tmp[1]).count() diff --git a/receiver/host/Completion.h b/receiver/host/Completion.h index 2277cba2..af450947 100644 --- a/receiver/host/Completion.h +++ b/receiver/host/Completion.h @@ -21,7 +21,6 @@ struct Completion { uint32_t exptime; uint32_t debug; uint32_t handle; - uint32_t data_collection_counter; uint16_t packet_count; uint8_t module; }; diff --git a/receiver/host/HLSSimulatedDevice.cpp b/receiver/host/HLSSimulatedDevice.cpp index 95b1ba38..7c55861a 100644 --- a/receiver/host/HLSSimulatedDevice.cpp +++ b/receiver/host/HLSSimulatedDevice.cpp @@ -272,7 +272,6 @@ void HLSSimulatedDevice::HLSMainThread() { run_data_collection, cancel_data_collection, idle_data_collection, - data_collection_counter, cfg.mode, cfg.one_over_energy, cfg.nframes, @@ -374,5 +373,4 @@ void HLSSimulatedDevice::HW_GetStatus(ActionStatus *status) const { status->ctrl_reg = ap_uint<1>(host_writer_idle) ? (1 << 4) : 0; status->modules_internal_packet_generator = 1; status->max_modules = max_modules; - status->data_collection_counter = data_collection_counter; } \ No newline at end of file diff --git a/receiver/host/HLSSimulatedDevice.h b/receiver/host/HLSSimulatedDevice.h index 8361995a..3ff19f3e 100644 --- a/receiver/host/HLSSimulatedDevice.h +++ b/receiver/host/HLSSimulatedDevice.h @@ -33,7 +33,6 @@ class HLSSimulatedDevice : public FPGAAcquisitionDevice { ap_uint<1> run_data_collection; ap_uint<1> cancel_data_collection; volatile ap_uint<1> host_writer_idle; - uint32_t data_collection_counter; uint64_t in_mem_location[LOAD_CALIBRATION_BRAM_SIZE]; static const uint64_t fpga_mac_addr = 0xCCAA11223344; diff --git a/receiver/scripts/jfjoch.tcl b/receiver/scripts/jfjoch.tcl index ced39ca9..da4e1ed2 100644 --- a/receiver/scripts/jfjoch.tcl +++ b/receiver/scripts/jfjoch.tcl @@ -427,8 +427,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net axis_work_completion_fifo_0_almost_full [get_bd_pins action_config_0/work_compl_fifo_full] [get_bd_pins axis_work_completion_fifo_0/almost_full] connect_bd_net -net axis_work_request_fifo_0_almost_empty [get_bd_pins action_config_0/work_req_fifo_empty] [get_bd_pins axis_work_request_fifo_0/almost_empty] connect_bd_net -net axis_work_request_fifo_0_almost_full [get_bd_pins action_config_0/work_req_fifo_full] [get_bd_pins axis_work_request_fifo_0/almost_full] - connect_bd_net -net data_collection_counter_0 [get_bd_pins data_collection_fsm_0/counter] [get_bd_pins action_config_0/data_collection_counter] - connect_bd_net -net data_collection_counter_valid_0 [get_bd_pins data_collection_fsm_0/counter_ap_vld] [get_bd_pins action_config_0/data_collection_counter_valid] connect_bd_net -net data_collection_fsm_0_out_idle_V [get_bd_pins action_config_0/data_collection_idle] [get_bd_pins data_collection_fsm_0/out_idle] connect_bd_net -net host_writer_0_err_reg_V [get_bd_pins action_config_0/host_writer_err] [get_bd_pins host_writer_0/err_reg] connect_bd_net -net host_writer_0_err_reg_V_ap_vld [get_bd_pins action_config_0/host_writer_err_valid] [get_bd_pins host_writer_0/err_reg_ap_vld] diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index d111c294..8375ac49 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -673,7 +673,6 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { ap_uint<1> run_data_collection = 0; ap_uint<1> cancel_data_collection = 0; ap_uint<1> idle_data_collection; - uint32_t data_collection_counter = 0; uint32_t save_data_collection_counter; act_reg.mode = MODE_CONV; @@ -684,7 +683,6 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, - data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -693,7 +691,6 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { REQUIRE(idle_data_collection == 1); REQUIRE(addr1.empty()); REQUIRE(raw1.empty()); - save_data_collection_counter = data_collection_counter; run_data_collection = 1; @@ -703,7 +700,6 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, - data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -719,7 +715,6 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, - data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -738,7 +733,6 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, - data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -754,7 +748,6 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, - data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -772,7 +765,6 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, - data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -783,7 +775,6 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { REQUIRE(addr1.size() == 1); REQUIRE(raw1.size() == 1); - REQUIRE(data_collection_counter == save_data_collection_counter + 1); // state = INIT cancel_data_collection = 1; @@ -793,7 +784,6 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, - data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -811,7 +801,6 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, - data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -829,7 +818,6 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { run_data_collection, cancel_data_collection, idle_data_collection, - data_collection_counter, act_reg.mode, act_reg.one_over_energy, act_reg.nframes, @@ -851,7 +839,6 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { addr = addr1.read(); REQUIRE(addr_last_flag(addr)); - REQUIRE(data_collection_counter == save_data_collection_counter + 1); } TEST_CASE("HLS_C_Simulation_internal_packet_generator_storage_cell_convert_G0", "[FPGA][Full]") { From 5cd483eeb3fa4871c8b800e120cf6467eb1a492b Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 30 May 2023 20:20:09 +0200 Subject: [PATCH 020/224] jfjoch_pcie_status: Fix data collection counter --- receiver/host/jfjoch_pcie_status.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/receiver/host/jfjoch_pcie_status.cpp b/receiver/host/jfjoch_pcie_status.cpp index e139f641..c02298e9 100644 --- a/receiver/host/jfjoch_pcie_status.cpp +++ b/receiver/host/jfjoch_pcie_status.cpp @@ -34,7 +34,6 @@ int main(int argc, char **argv) { std::cout << "HBM temperature #0 " << status.hbm_temp_0_degc() << std::endl; std::cout << "HBM temperature #1 " << status.hbm_temp_1_degc() << std::endl; std::cout << "Data collection idle " << status.fpga_idle() << std::endl; - std::cout << "Data collection counter " << status.data_collection_counter() << std::endl; std::cout << "Host writer idle " << status.host_writer_idle() << std::endl; std::cout << "Full status register " << std::bitset<32>(status.full_status_register()) << std::endl; From 0994e142b3eeec92c9e62e884d7f00a4729b00a7 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 30 May 2023 20:47:10 +0200 Subject: [PATCH 021/224] JFJochReceiverIntegrationTest: Increase buffer count for storage cell pedestal G2 test --- tests/JFJochReceiverIntegrationTest.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/JFJochReceiverIntegrationTest.cpp b/tests/JFJochReceiverIntegrationTest.cpp index d5821afd..72213ffe 100644 --- a/tests/JFJochReceiverIntegrationTest.cpp +++ b/tests/JFJochReceiverIntegrationTest.cpp @@ -274,7 +274,7 @@ TEST_CASE("JFJochReceiverTest_PedestalG2_storage_cell", "[JFJochReceiver]") { std::vector> aq_devices; for (int i = 0; i < x.GetDataStreamsNum(); i++) { HLSSimulatedDevice *test; - test = new HLSSimulatedDevice(i, 64); + test = new HLSSimulatedDevice(i, nframes * 2); for (int j = 0; j < nframes; j++) { test->CreatePackets(x, 2 * j + 1, 1, 0, pedestal_in2.data() + j * RAW_MODULE_SIZE, false); From 4671f392bd37f19b6d066dc8497cabdc61b32929 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 30 May 2023 20:48:17 +0200 Subject: [PATCH 022/224] FPGA: Trigger --- receiver/hls/hls_jfjoch.h | 1 - 1 file changed, 1 deletion(-) diff --git a/receiver/hls/hls_jfjoch.h b/receiver/hls/hls_jfjoch.h index e60885bf..0d53b206 100644 --- a/receiver/hls/hls_jfjoch.h +++ b/receiver/hls/hls_jfjoch.h @@ -237,5 +237,4 @@ void sls_detector(AXI_STREAM &udp_payload_in, uint32_t& counter_eth_error, uint32_t& counter_len_error, volatile ap_uint<1> &in_clear_counters); - #endif From 5ec4d41e6892e8277c2acae1ef973aa0f271c5d0 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 31 May 2023 10:53:29 +0200 Subject: [PATCH 023/224] internal_packet_generator: quit main loop in case of cancel --- receiver/hls/internal_packet_generator.cpp | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/receiver/hls/internal_packet_generator.cpp b/receiver/hls/internal_packet_generator.cpp index 4f462af7..afd3c530 100644 --- a/receiver/hls/internal_packet_generator.cpp +++ b/receiver/hls/internal_packet_generator.cpp @@ -57,12 +57,11 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, if (internal_packet_generator) { generate_frames: for (uint32_t frame_number = 1; frame_number <= nframes; frame_number++ ) { + ap_uint<1> cancel = in_cancel; + if (cancel) + break; for (uint8_t module = 0; module < modules; module++) { - ap_uint<1> cancel = in_cancel; - if (cancel) - break; - for (uint32_t i = 0; i < RAW_MODULE_SIZE * 2 / 64; i++) { #pragma HLS PIPELINE II=1 uint32_t eth_packet = i / 128; From b868a24dad02876148b7a8020fc3420c230ad59c Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 31 May 2023 11:08:28 +0200 Subject: [PATCH 024/224] FPGA: Minor improvements to internal_packet_generator - should now better break in case of cancellation --- common/Definitions.h | 4 +++ receiver/hls/hls_jfjoch.h | 4 +-- receiver/hls/internal_packet_generator.cpp | 40 ++++++++++++---------- receiver/host/AcquisitionDevice.cpp | 3 +- tests/FPGAIntegrationTest.cpp | 6 ++-- 5 files changed, 32 insertions(+), 25 deletions(-) diff --git a/common/Definitions.h b/common/Definitions.h index eca261df..e4024e84 100644 --- a/common/Definitions.h +++ b/common/Definitions.h @@ -121,4 +121,8 @@ #define HANDLE_SKIP_FRAME (UINT32_MAX - 2) #define HANDLE_END (UINT32_MAX ) +#define INT_PKT_GEN_DEBUG 0x0 +#define INT_PKT_GEN_TIMESTAMP 0xABCDEFABCDEF +#define INT_PKT_GEN_BUNCHID 0xCACACACACA +#define INT_PKT_GEN_EXPTTIME 10000 #endif //DEFINITIONS_H diff --git a/receiver/hls/hls_jfjoch.h b/receiver/hls/hls_jfjoch.h index 0d53b206..c1d5a271 100644 --- a/receiver/hls/hls_jfjoch.h +++ b/receiver/hls/hls_jfjoch.h @@ -146,7 +146,7 @@ inline void setup_datamover (hls::stream &datamover_cmd_str } inline ap_uint addr_packet(ap_uint<8> eth_packet, - ap_uint<5> module, + ap_uint<5> module_number, ap_uint<64> frame, ap_uint<32> jf_debug, ap_uint<64> timestamp, @@ -155,7 +155,7 @@ inline ap_uint addr_packet(ap_uint<8> eth_packet, #pragma HLS INLINE ap_uint retval = 0; addr_eth_packet(retval) = eth_packet; - addr_module(retval) = module; + addr_module(retval) = module_number; addr_frame_number(retval) = frame; addr_jf_debug(retval) = jf_debug; addr_timestamp(retval) = timestamp; diff --git a/receiver/hls/internal_packet_generator.cpp b/receiver/hls/internal_packet_generator.cpp index afd3c530..13c5f4e6 100644 --- a/receiver/hls/internal_packet_generator.cpp +++ b/receiver/hls/internal_packet_generator.cpp @@ -55,27 +55,31 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, } if (internal_packet_generator) { - generate_frames: - for (uint32_t frame_number = 1; frame_number <= nframes; frame_number++ ) { - ap_uint<1> cancel = in_cancel; - if (cancel) - break; + uint32_t frame_number = 1; + uint8_t module_number = 0; + ap_uint<1> cancel = in_cancel; - for (uint8_t module = 0; module < modules; module++) { - for (uint32_t i = 0; i < RAW_MODULE_SIZE * 2 / 64; i++) { + generate_frames: + while (!cancel && (frame_number <= nframes)) { + for (uint32_t i = 0; i < RAW_MODULE_SIZE * 2 / 64; i++) { #pragma HLS PIPELINE II=1 - uint32_t eth_packet = i / 128; - uint32_t axis_packet = i % 128; - if (axis_packet == 0) - addr_out << addr_packet(eth_packet, module, frame_number, 0, - 0xABCDEFABCDEF, 0xCACACACACA, 10000); - packet_out.user = 0; - packet_out.id = 0; - packet_out.last = (axis_packet == 127) ? 1 : 0; - packet_out.data = module_cache[i]; - data_out << packet_out; - } + uint32_t eth_packet = i / 128; + uint32_t axis_packet = i % 128; + if (axis_packet == 0) + addr_out << addr_packet(eth_packet, module_number, frame_number, INT_PKT_GEN_DEBUG, + INT_PKT_GEN_TIMESTAMP, INT_PKT_GEN_BUNCHID, INT_PKT_GEN_EXPTTIME); + packet_out.user = 0; + packet_out.id = 0; + packet_out.last = (axis_packet == 127) ? 1 : 0; + packet_out.data = module_cache[i]; + data_out << packet_out; } + if (module_number == modules - 1) { + frame_number++; + module_number = 0; + } else + module_number++; + cancel = in_cancel; } } diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index ed4794f9..d4c42543 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -129,9 +129,8 @@ void AcquisitionDevice::StartAction(const DiffractionExperiment &experiment) { SendWorkRequest(i); auto c = work_completion_queue.GetBlocking(); - while (c.type != Completion::Type::Start) { + while (c.type != Completion::Type::Start) c = work_completion_queue.GetBlocking(); - } StartSendingWorkRequests(); diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index 8375ac49..c7586726 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -87,9 +87,9 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_custom_frame", "[FPGA][Ful for (int image = 0; image < 4; image++) { for (int m = 0; m < nmodules; m++) { - REQUIRE(test.GetTimestamp(image, m) == 0xABCDEFABCDEF); - REQUIRE(test.GetBunchID(image,m) == 0xCACACACACA); - REQUIRE(test.GetExptime(image, m) == 10000); + REQUIRE(test.GetTimestamp(image, m) == INT_PKT_GEN_TIMESTAMP); + REQUIRE(test.GetBunchID(image,m) == INT_PKT_GEN_BUNCHID); + REQUIRE(test.GetExptime(image, m) == INT_PKT_GEN_EXPTTIME); auto imageBuf = (uint16_t *) test.GetFrameBuffer(image, m); for (int i = 0; i < RAW_MODULE_SIZE; i++) { From 8ac012ae998aa59da09e3baf19d653da7b8c538c Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 31 May 2023 11:38:17 +0200 Subject: [PATCH 025/224] FPGA: Use upper 16-bits of mode as data_collection_id --- receiver/hls/host_writer.cpp | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/receiver/hls/host_writer.cpp b/receiver/hls/host_writer.cpp index e08efe6f..4e80d27e 100644 --- a/receiver/hls/host_writer.cpp +++ b/receiver/hls/host_writer.cpp @@ -18,7 +18,8 @@ inline void write_completion(hls::stream > &m_axis_completion, const ap_uint<32> &debug, const ap_uint<64> ×tamp, const ap_uint<64> &bunchid, - const ap_uint<32> &exptime) { + const ap_uint<32> &exptime, + const ap_uint<32> &data_collection_id) { #pragma HLS INLINE ap_uint<1> all_packets_ok = packet_mask.and_reduce(); ap_uint<1> any_packets_received = packet_mask.or_reduce(); @@ -43,7 +44,7 @@ inline void write_completion(hls::stream > &m_axis_completion, m_axis_completion << exptime; m_axis_completion << debug; m_axis_completion << 0; - m_axis_completion << 0; + m_axis_completion << data_collection_id; m_axis_completion << packet_mask(127,96); m_axis_completion << packet_mask( 95,64); @@ -144,12 +145,14 @@ void host_writer(STREAM_512 &data_in, packet_512_t packet_in; data_in >> packet_in; ap_uint<32> data_collection_mode = ACT_REG_MODE(packet_in.data); + ap_uint<32> data_collection_id = data_collection_mode(31, 16); // upper 16-bit of mode + ap_uint<1> mode_nonblocking = (data_collection_mode & MODE_NONBLOCKING_ON_WR) ? 1 : 0; ap_uint<8> internal_err_reg = 0; err_reg = internal_err_reg; - write_completion(m_axis_completion, HANDLE_START, 0, 0, 0, 0, 0, 0, 0, 0); + write_completion(m_axis_completion, HANDLE_START, 0, 0, 0, 0, 0, 0, 0, 0, data_collection_id); idle = 0; uint64_t total_counter = 0; @@ -186,7 +189,7 @@ void host_writer(STREAM_512 &data_in, write_completion(m_axis_completion, comp_handle, module, comp_frame, comp_packet_mask, comp_packet_count, comp_debug, comp_timestamp, comp_bunchid, - comp_exptime); + comp_exptime, data_collection_id); } if (s_axis_work_request.empty() && mode_nonblocking) { @@ -255,11 +258,11 @@ void host_writer(STREAM_512 &data_in, write_completion(m_axis_completion, handle[m], m / 2, curr_frame[m], packet_mask[m], packet_count[m], debug[m], timestamp[m], jf_bunchid[m], - exptime[m]); + exptime[m], data_collection_id); } data_in >> packet_in; - write_completion(m_axis_completion, HANDLE_END, 0, total_counter, 0, 0, 0, 0, 0, 0); + write_completion(m_axis_completion, HANDLE_END, 0, total_counter, 0, 0, 0, 0, 0, 0, data_collection_id); idle = 1; } From ea3f976e66c7dbea63dfc5e55930fe6127a67f1b Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 31 May 2023 11:47:49 +0200 Subject: [PATCH 026/224] Update receiver/README.md --- receiver/README.md | 122 +++++++++++++++++++++++---------------------- 1 file changed, 63 insertions(+), 59 deletions(-) diff --git a/receiver/README.md b/receiver/README.md index 235dfe48..b565c035 100644 --- a/receiver/README.md +++ b/receiver/README.md @@ -44,52 +44,53 @@ To test that FPGA board is working properly without access to a JUNGFRAU detecto ## FPGA reference FPGA setup can be done via 32-bit registers: -| Address | Bits | Meaning | Mode | Notes | -|-------------------|------|-----------------------------------------------------------------------|:-----|-----------------------------------| -| 0x00000 - 0x0FFFF | | Reserved for internal memory of MicroBlaze | | | -| 0x10000 | 32 | Action Control Register | | | -| | | Bit 0 - Action start | R/W | | -| | | Bit 1 - Action idle | R | | -| | | Bit 2 - Action cancel | R/W | cleared on reset or action start | -| | | Bit 12 - HBM catastrophic temp. error | R | | -| | | Bit 13 - HBM catastrophic temp. error | R | cleared on reset or action start | -| | | Bit 14 - HBM setup complete | R | | -| | | Bit 16 - AXI Mailbox interrupt 0 | R | | -| | | Bit 17 - AXI Mailbox interrupt 1 | R | | -| | | Bits 24-27 - Various errors in host memory writer | R | cleared on reset or action start | -| 0x10004 | 32 | Reserved | - | | -| 0x10008 | 32 | Set user LED G0 (yellow or green), 1 is on, 0 is off | R/W | | -| 0x1000C | 32 | Action GIT SHA1 | R | | -| 0x10010 | 32 | Action Type | R | | -| 0x10014 | 32 | Action Release Level | R | | -| 0x10018 | 32 | HBM current temperature | R | | -| 0x1001C | 32 | HBM max. temperature | R | reset on action start | -| 0x10020 | 32 | Max. number supported detector modules | R | constant | -| 0x10024 | 32 | Number of modules in internal packet generator memory | R | constant | -| 0x10028 | 64 | Pipeline stalls before writing to host memory | R | reset on action start | -| 0x10030 | 64 | Pipeline stalls before accessing HBM | R | reset on action start | -| 0x10038 | 32 | FIFO status (see action_config.v for details) | R/W | | -| 0x1003C | 32 | Reserved | - | | -| 0x10040 | 64 | Packets processed by the action | R/W | cleared on reset or action start | -| 0x10048 | 64 | Valid ethernet packets | R/W | cleared on reset | -| 0x10050 | 64 | Valid ICMP packets | R/W | cleared on reset | -| 0x10058 | 64 | Valid UDP packets | R/W | cleared on reset | -| 0x10060 | 64 | MAC address of FPGA card | R/W | network byte order | -| 0x10068 | 32 | IPv4 address of FPGA card | R/W | network byte order | -| 0x1006C | 32 | Number of detector modules | R/W | | -| 0x10070 | 32 | Data collection mode | R/W | | -| 0x10074 | 32 | One over energy in keV (in fixed-point:12 int. + 24 frac. bit format) | R/W | | -| 0x10078 | 32 | Number of frames to be generated by internal packet generator | R/W | | -| 0x1007C | 32 | Number of storage cells | R/W | | -| | | | | | -| 0x20000 - 0x2FFFF | | CMAC 100G | | See Xilinx PG203 for register map | -| 0x30000 - 0x3FFFF | | AXI Mailbox for Work Request / Work Completion | | See Xilinx PG114 for register map | -| 0x40000 - 0x4FFFF | | QuadSPI flash | | See Xilinx PG153 for register map | -| 0x60000 - 0x60FFF | 64 | Input calibration memory addresses block RAM | | | -| 0x70000 - 0x7FFFF | | AXI Firewall | | See Xilinx PG293 for register map | -| 0x80000 - 0x8FFFF | | Interrupt controller | | See Xilinx PG099 for register map | -| 0x70000 - 0x7FFFF | | PCIe DMA control | | See Xilinx PG195 for register map | -| 0xC0000 - 0xFFFFF | | Xilinx Card Management Solution Subsystem management subsystem | | See Xilinx PG348 for register map | +| Address | Bits | Meaning | Mode | Notes | +|-------------------|------|------------------------------------------------------------------------------------------------------|:-----|-----------------------------------| +| 0x00000 - 0x0FFFF | | Reserved for internal memory of MicroBlaze | | | +| 0x10000 | 32 | Action Control Register | | | +| | | Bit 0 - Action start | R/W | | +| | | Bit 1 - Action idle | R | | +| | | Bit 2 - Action cancel | R/W | cleared on reset or action start | +| | | Bit 3 - Clear network counters | R/W | cleared on reset or action start | +| | | Bit 4 - Host writer idle | R | cleared on reset | +| | | Bit 7 - Design number | R | 0 = PCIe #0, 1 = PCIe #1 | +| | | Bit 16 - AXI Mailbox interrupt 0 | R | | +| | | Bit 17 - AXI Mailbox interrupt 1 | R | | +| | | Bits 24-27 - Various errors in host memory writer | R | cleared on reset or action start | +| 0x10004 | 32 | Reserved | - | | +| 0x1000C | 32 | Action GIT SHA1 | R | | +| 0x10010 | 32 | Action Type | R | | +| 0x10014 | 32 | Action Release Level | R | | +| 0x10020 | 32 | Max. number supported detector modules | R | constant | +| 0x10024 | 32 | Number of modules in internal packet generator memory | R | constant | +| 0x10028 | 64 | Pipeline stalls before writing to host memory | R | reset on action start | +| 0x10030 | 64 | Pipeline stalls before accessing HBM | R | reset on action start | +| 0x10038 | 32 | FIFO status (see action_config.v for details) | R/W | | +| 0x1003C | 32 | Reserved | - | | +| 0x10040 | 64 | Packets processed by the action | R/W | cleared on reset or action start | +| 0x10048 | 64 | Valid ethernet packets | R/W | cleared on reset | +| 0x10050 | 64 | Valid ICMP packets | R/W | cleared on reset | +| 0x10058 | 64 | Valid UDP packets | R/W | cleared on reset | +| 0x10060 | 64 | MAC address of FPGA card | R/W | network byte order | +| 0x10068 | 32 | IPv4 address of FPGA card | R/W | network byte order | +| 0x1006C | 32 | Number of detector modules | R/W | | +| 0x10070 | 32 | Data collection mode | R/W | | +| | | Bit 0 - Conversion to photons | | | +| | | Bit 1 - Use internal packet generator | | | +| | | Bit 2 - Nonblocking operation (host writer will ignore frames if there is no available work request) | | | +| | | Bit 16:31 - Data collection ID (carried with completions) | | | +| 0x10074 | 32 | One over energy in keV (in fixed-point:12 int. + 24 frac. bit format) | R/W | | +| 0x10078 | 32 | Number of frames to be generated by internal packet generator | R/W | | +| 0x1007C | 32 | Number of storage cells | R/W | | +| | | | | | +| 0x20000 - 0x2FFFF | | CMAC 100G | | See Xilinx PG203 for register map | +| 0x30000 - 0x3FFFF | | AXI Mailbox for Work Request / Work Completion | | See Xilinx PG114 for register map | +| 0x40000 - 0x4FFFF | | QuadSPI flash | | See Xilinx PG153 for register map | +| 0x60000 - 0x60FFF | 64 | Input calibration memory addresses block RAM | | | +| 0x70000 - 0x7FFFF | | AXI Firewall | | See Xilinx PG293 for register map | +| 0x80000 - 0x8FFFF | | Interrupt controller | | See Xilinx PG099 for register map | +| 0x70000 - 0x7FFFF | | PCIe DMA control | | See Xilinx PG195 for register map | +| 0xC0000 - 0xFFFFF | | Xilinx Card Management Solution Subsystem management subsystem | | See Xilinx PG348 for register map | ### AXI Mailbox @@ -105,16 +106,19 @@ Work request has the following structure: Work completion has the following structure: -| Bit start | Bit end | Meaning | -|-----------|---------|--------------------------------------------------------------------------------------------------------------| -| 0 | 31 | Work request ID (handle) | -| 32 | 39 | Module number | -| 40 | 40 | All packets for the module arrived OK | -| 41 | 41 | Trigger signal high | -| 42 | 62 | Reserved | -| 63 | 63 | Parity bit - bits 0-127 are even parity | -| 64 | 127 | Frame number | -| 128 | 159 | JF debug | -| 160 | 191 | JF Timestamp (low 32-bit) | -| 192 | 255 | Bunch ID | -| 256 | 383 | Optional packet mask (1 bit per packet: 0 packet missing, 1 packet arrived); transmitted only if bit 40 is 0 | +| Bit start | Bit end | Meaning | +|-----------|---------|--------------------------------------------------------------------| +| 0 | 31 | Work request ID (handle) | +| 32 | 39 | Module number | +| 40 | 40 | All packets for the module arrived OK | +| 41 | 41 | Trigger signal high | +| 42 | 62 | Reserved | +| 63 | 63 | Parity bit - bits 0-127 are even parity | +| 64 | 127 | Frame number | +| 128 | 191 | JF Timestamp | +| 192 | 255 | Bunch ID | +| 256 | 287 | Exptime | +| 288 | 319 | JF debug | +| 320 | 351 | Reserved | +| 352 | 383 | Data collection ID (16-bit) | +| 384 | 511 | Packet mask (1 bit per packet: 0 packet missing, 1 packet arrived) | From 47330228ef89a6a88257e3cfc1740816e4125640 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 31 May 2023 12:10:57 +0200 Subject: [PATCH 027/224] Use data_collection_id to detect issues in work completion queue --- common/Definitions.h | 2 +- jungfrau/ProcessJFPacket.cpp | 2 +- receiver/host/AcquisitionDevice.cpp | 15 +++++++++------ receiver/host/AcquisitionDevice.h | 1 + receiver/host/AcquisitionOfflineCounters.cpp | 4 ++-- receiver/host/AcquisitionOnlineCounters.cpp | 20 ++++++++++---------- receiver/host/Completion.cpp | 8 +++++--- receiver/host/Completion.h | 3 ++- receiver/host/FPGAAcquisitionDevice.cpp | 3 ++- receiver/host/MockAcquisitionDevice.cpp | 2 +- tests/AcquisitionCountersTest.cpp | 6 +++--- tests/ProcessRawPacketTest.cpp | 6 +++--- 12 files changed, 40 insertions(+), 32 deletions(-) diff --git a/common/Definitions.h b/common/Definitions.h index e4024e84..69758c91 100644 --- a/common/Definitions.h +++ b/common/Definitions.h @@ -50,7 +50,7 @@ // For FPGA #define ACTION_TYPE 0x52324158 -#define RELEASE_LEVEL 0x0036 +#define RELEASE_LEVEL 0x0037 #define MODE_CONV 0x0001L #define MODE_INTERNAL_PACKET_GEN 0x0002L diff --git a/jungfrau/ProcessJFPacket.cpp b/jungfrau/ProcessJFPacket.cpp index 5c0a2001..20e18b74 100644 --- a/jungfrau/ProcessJFPacket.cpp +++ b/jungfrau/ProcessJFPacket.cpp @@ -56,7 +56,7 @@ void ProcessJFPacket::ProcessPacket(jf_udp_payload *datagram) { module_info[module_info_location].c.packet_mask[0] = 0; module_info[module_info_location].c.packet_mask[1] = 0; module_info[module_info_location].c.packet_count = 0; - module_info[module_info_location].c.module = module_number; + module_info[module_info_location].c.module_number = module_number; module_info[module_info_location].c.handle = wr.handle; module_info[module_info_location].ptr = wr.ptr; diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index d4c42543..ccb90335 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -11,7 +11,6 @@ #include #include #include -#include #include "../../common/JFJochException.h" #include "AcquisitionDevice.h" @@ -53,12 +52,16 @@ uint64_t AcquisitionDevice::GetBufferHandle(size_t frame, uint8_t module_number) } void AcquisitionDevice::FillActionRegister(const DiffractionExperiment& x, ActionConfig &job) { + data_collection_id = rand() & UINT16_MAX; job.nmodules = x.GetModulesNum(data_stream); job.nframes = x.GetFrameNum(); job.one_over_energy = std::lround((1<<20)/ x.GetPhotonEnergy_keV()); job.nstorage_cells = x.GetStorageCellNumber() - 1; - job.mode = fpga_non_blocking_mode ? MODE_NONBLOCKING_ON_WR : 0; + job.mode = data_collection_id << 16; + + if (fpga_non_blocking_mode) + job.mode |= MODE_NONBLOCKING_ON_WR; if ((x.GetDetectorMode() == DetectorMode::Conversion) && x.GetConversionOnFPGA()) job.mode |= MODE_CONV; @@ -129,8 +132,8 @@ void AcquisitionDevice::StartAction(const DiffractionExperiment &experiment) { SendWorkRequest(i); auto c = work_completion_queue.GetBlocking(); - while (c.type != Completion::Type::Start) - c = work_completion_queue.GetBlocking(); + if (c.type != Completion::Type::Start) + throw JFJochException(JFJochExceptionCategory::AcquisitionDeviceError, "Mismatch in work completions"); StartSendingWorkRequests(); @@ -181,7 +184,7 @@ void AcquisitionDevice::WaitForActionComplete() { if (logger != nullptr) logger->Debug("Data stream " + std::to_string(data_stream) + " completion frame number " + std::to_string(c.frame_number) - + " module " + std::to_string(c.module) + + " module " + std::to_string(c.module_number) + " handle " + std::to_string(c.handle) + " timestamp " + std::to_string(c.timestamp)); @@ -192,7 +195,7 @@ void AcquisitionDevice::WaitForActionComplete() { counters.SetAcquisitionFinished(); end_time = std::chrono::system_clock::now(); - HW_SetCancelDataCollectionBit(); + HW_SetCancelDataCollectionBit(); HW_EndAction(); while (!HW_IsIdle()) std::this_thread::sleep_for(std::chrono::milliseconds(1)); diff --git a/receiver/host/AcquisitionDevice.h b/receiver/host/AcquisitionDevice.h index 5a15e697..40b3e91d 100644 --- a/receiver/host/AcquisitionDevice.h +++ b/receiver/host/AcquisitionDevice.h @@ -65,6 +65,7 @@ protected: uint16_t data_stream; Logger *logger; uint32_t max_modules = 1; + uint16_t data_collection_id = 0; explicit AcquisitionDevice(uint16_t data_stream); diff --git a/receiver/host/AcquisitionOfflineCounters.cpp b/receiver/host/AcquisitionOfflineCounters.cpp index 2e72bfe8..402cf8b9 100644 --- a/receiver/host/AcquisitionOfflineCounters.cpp +++ b/receiver/host/AcquisitionOfflineCounters.cpp @@ -39,13 +39,13 @@ void AcquisitionOfflineCounters::FillStatistics(const DiffractionExperiment &x, uint64_t total_packets = 0; for (const auto &c: completion) { - size_t i = c.frame_number * nmodules + c.module; + size_t i = c.frame_number * nmodules + c.module_number; timestamp[i] = c.timestamp; debug[i] = c.debug; bunchid[i] = c.bunchid; packet_count[i] = c.packet_count; total_packets += packet_count[i]; - packets_received_per_module[c.module] += packet_count[i]; + packets_received_per_module[c.module_number] += packet_count[i]; for (int j = 0; j < masks_per_module; j++) packet_mask[i * masks_per_module + j] = c.packet_mask[j]; diff --git a/receiver/host/AcquisitionOnlineCounters.cpp b/receiver/host/AcquisitionOnlineCounters.cpp index b1d682d2..fc3edcbe 100644 --- a/receiver/host/AcquisitionOnlineCounters.cpp +++ b/receiver/host/AcquisitionOnlineCounters.cpp @@ -39,15 +39,15 @@ void AcquisitionOnlineCounters::Reset(const DiffractionExperiment &experiment, u void AcquisitionOnlineCounters::UpdateCounters(const Completion *c) { std::unique_lock ul(m); - if (c->module >= nmodules) + if (c->module_number >= nmodules) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, - "UpdateCounters wrong module number: " + std::to_string(c->module) + " for frame " + std::to_string(c->frame_number)); + "UpdateCounters wrong module number: " + std::to_string(c->module_number) + " for frame " + std::to_string(c->frame_number)); if (c->frame_number >= expected_frames) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "UpdateCounters frame number is out of bounds"); else { - if (head.at(c->module) < c->frame_number) - head.at(c->module) = c->frame_number; + if (head.at(c->module_number) < c->frame_number) + head.at(c->module_number) = c->frame_number; if (c->frame_number > slowest_head) { slowest_head = head[0]; @@ -56,12 +56,12 @@ void AcquisitionOnlineCounters::UpdateCounters(const Completion *c) { slowest_head = head[i]; } - full_module_collected.at(c->frame_number * nmodules + c->module) = (c->packet_count == expected_packets_per_module); - handle_for_frame.at(c->frame_number * nmodules + c->module) = c->handle; - bunch_id.at(c->frame_number * nmodules + c->module) = c->bunchid; - jf_info.at(c->frame_number * nmodules + c->module) = c->debug; - timestamp.at(c->frame_number * nmodules + c->module) = c->timestamp; - exptime.at(c->frame_number * nmodules + c->module) = c->exptime; + full_module_collected.at(c->frame_number * nmodules + c->module_number) = (c->packet_count == expected_packets_per_module); + handle_for_frame.at(c->frame_number * nmodules + c->module_number) = c->handle; + bunch_id.at(c->frame_number * nmodules + c->module_number) = c->bunchid; + jf_info.at(c->frame_number * nmodules + c->module_number) = c->debug; + timestamp.at(c->frame_number * nmodules + c->module_number) = c->timestamp; + exptime.at(c->frame_number * nmodules + c->module_number) = c->exptime; } data_updated.notify_all(); diff --git a/receiver/host/Completion.cpp b/receiver/host/Completion.cpp index 03025980..505a5ee9 100644 --- a/receiver/host/Completion.cpp +++ b/receiver/host/Completion.cpp @@ -14,9 +14,11 @@ inline uint64_t bit_concat(uint32_t high, uint32_t low) { Completion parse_hw_completion(uint32_t tmp[16]) { Completion c{}; - c.handle = tmp[0]; - c.module = tmp[1] & 0xFF; - c.packet_count = (tmp[1] & (0xFFFF0000)) >> 16; + c.handle = tmp[0]; + c.module_number = tmp[1] & 0xFF; + c.packet_count = (tmp[1] & (0xFFFF0000)) >> 16; + c.data_collection_id = tmp[11] & UINT16_MAX; + uint64_t detector_frame_number = bit_concat(tmp[2], tmp[3]); uint32_t parity = (std::bitset<32>(tmp[0]).count() + std::bitset<32>(tmp[1]).count() diff --git a/receiver/host/Completion.h b/receiver/host/Completion.h index af450947..6c6a1e91 100644 --- a/receiver/host/Completion.h +++ b/receiver/host/Completion.h @@ -22,7 +22,8 @@ struct Completion { uint32_t debug; uint32_t handle; uint16_t packet_count; - uint8_t module; + uint16_t data_collection_id; + uint8_t module_number; }; Completion parse_hw_completion(uint32_t hw_input[16]); diff --git a/receiver/host/FPGAAcquisitionDevice.cpp b/receiver/host/FPGAAcquisitionDevice.cpp index 6455b2d4..a792c4e2 100644 --- a/receiver/host/FPGAAcquisitionDevice.cpp +++ b/receiver/host/FPGAAcquisitionDevice.cpp @@ -31,7 +31,8 @@ void FPGAAcquisitionDevice::ReadWorkCompletionThread() { std::this_thread::sleep_for(std::chrono::microseconds(10)); c = parse_hw_completion(values); - work_completion_queue.PutBlocking(c); + if (c.data_collection_id == data_collection_id) + work_completion_queue.PutBlocking(c); } while (c.type != Completion::Type::End); } diff --git a/receiver/host/MockAcquisitionDevice.cpp b/receiver/host/MockAcquisitionDevice.cpp index f78421c1..d2a01b17 100644 --- a/receiver/host/MockAcquisitionDevice.cpp +++ b/receiver/host/MockAcquisitionDevice.cpp @@ -40,7 +40,7 @@ MockAcquisitionDevice::MockAcquisitionDevice(uint16_t data_stream, size_t in_fra void MockAcquisitionDevice::SendCompletion(uint32_t handle, uint16_t module_number, uint64_t frame_number) { Completion c; c.handle = handle; - c.module = module_number; + c.module_number = module_number; c.frame_number = frame_number - 1; c.type = Completion::Type::Image; c.packet_mask[0] = UINT64_MAX; diff --git a/tests/AcquisitionCountersTest.cpp b/tests/AcquisitionCountersTest.cpp index 08d30516..90cd09e5 100644 --- a/tests/AcquisitionCountersTest.cpp +++ b/tests/AcquisitionCountersTest.cpp @@ -20,7 +20,7 @@ TEST_CASE("AcquisitionDeviceCountersTest","[AcquisitionDeviceCounters]") { Completion c{}; c.frame_number = 32; - c.module = 1; + c.module_number = 1; c.handle = 17; c.bunchid = 1ul<<56; c.debug = 1u<<31; @@ -40,7 +40,7 @@ TEST_CASE("AcquisitionDeviceCountersTest","[AcquisitionDeviceCounters]") { REQUIRE(counters.GetTimestamp(32, 1) == c.timestamp); c.frame_number = 15; - c.module = 0; + c.module_number = 0; counters.UpdateCounters(&c); REQUIRE(counters.GetSlowestHead() == 15); @@ -80,6 +80,6 @@ TEST_CASE("AcquisitionDeviceCountersTest_OutOfBounds","[AcquisitionDeviceCounter REQUIRE_THROWS(counters.UpdateCounters(&c)); c.frame_number = 20; - c.module = 2; + c.module_number = 2; REQUIRE_THROWS(counters.UpdateCounters(&c)); } \ No newline at end of file diff --git a/tests/ProcessRawPacketTest.cpp b/tests/ProcessRawPacketTest.cpp index 935a0ce5..e2b6dc21 100644 --- a/tests/ProcessRawPacketTest.cpp +++ b/tests/ProcessRawPacketTest.cpp @@ -64,7 +64,7 @@ TEST_CASE("ProcessRawPacketTest") { Completion c; REQUIRE(c_fifo.Get(c)); - CHECK(c.module == 2); + CHECK(c.module_number == 2); CHECK(c.bunchid == 84); CHECK(c.frame_number == 0); CHECK(c.packet_count == 1); @@ -72,7 +72,7 @@ TEST_CASE("ProcessRawPacketTest") { CHECK(c.packet_mask[1] == 0); REQUIRE(c_fifo.Get(c)); - CHECK(c.module == 2); + CHECK(c.module_number == 2); CHECK(c.bunchid == 84); CHECK(c.frame_number == 1); CHECK(c.packet_count == 1); @@ -81,7 +81,7 @@ TEST_CASE("ProcessRawPacketTest") { REQUIRE(c_fifo.Get(c)); - CHECK(c.module == 3); + CHECK(c.module_number == 3); CHECK(c.bunchid == 84); CHECK(c.frame_number == 2); CHECK(c.packet_count == 1); From 98ad3a6fdccc967667c9a22cbde35e55d84d0a94 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 31 May 2023 21:16:54 +0200 Subject: [PATCH 028/224] FPGA: Reduce UltraRAM usage by 4 MiB to improve timing --- receiver/scripts/jfjoch.tcl | 6 +++--- receiver/scripts/mac_100g_pcie.tcl | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/receiver/scripts/jfjoch.tcl b/receiver/scripts/jfjoch.tcl index da4e1ed2..570e7215 100644 --- a/receiver/scripts/jfjoch.tcl +++ b/receiver/scripts/jfjoch.tcl @@ -127,7 +127,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { # Create instance: axis_data_fifo_0, and set properties set axis_data_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_0 ] set_property -dict [ list \ - CONFIG.FIFO_DEPTH {16384} \ + CONFIG.FIFO_DEPTH {4096} \ CONFIG.FIFO_MEMORY_TYPE {ultra} \ ] $axis_data_fifo_0 @@ -164,7 +164,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { # Create instance: axis_data_fifo_5, and set properties set axis_data_fifo_5 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_5 ] set_property -dict [ list \ - CONFIG.FIFO_DEPTH {16384} \ + CONFIG.FIFO_DEPTH {8192} \ CONFIG.FIFO_MEMORY_TYPE {ultra} \ CONFIG.HAS_AEMPTY {1} \ CONFIG.HAS_AFULL {1} \ @@ -264,7 +264,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { # Create instance: axis_work_completion_fifo_0, and set properties set axis_work_completion_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_work_completion_fifo_0 ] set_property -dict [ list \ - CONFIG.FIFO_DEPTH {32768} \ + CONFIG.FIFO_DEPTH {8192} \ CONFIG.FIFO_MEMORY_TYPE {ultra} \ CONFIG.HAS_AEMPTY {1} \ CONFIG.HAS_AFULL {1} \ diff --git a/receiver/scripts/mac_100g_pcie.tcl b/receiver/scripts/mac_100g_pcie.tcl index 0a157394..87785efd 100644 --- a/receiver/scripts/mac_100g_pcie.tcl +++ b/receiver/scripts/mac_100g_pcie.tcl @@ -65,7 +65,7 @@ proc create_hier_cell_mac_100g { parentCell nameHier } { # Create instance: axis_data_fifo_rx_1, and set properties set axis_data_fifo_rx_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_rx_1 ] set_property -dict [ list \ - CONFIG.FIFO_DEPTH {16384} \ + CONFIG.FIFO_DEPTH {4096} \ CONFIG.FIFO_MEMORY_TYPE {ultra} \ CONFIG.ENABLE_ECC {1} \ ] $axis_data_fifo_rx_1 From ba39423a103ff218e087c556075e83e41c0ca3aa Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 1 Jun 2023 20:45:00 +0200 Subject: [PATCH 029/224] AcquisitionDevice: Use C++11 random number generator --- receiver/host/AcquisitionDevice.cpp | 4 ++-- receiver/host/AcquisitionDevice.h | 6 ++++++ 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index ccb90335..6dfdbb92 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -35,7 +35,7 @@ void *mmap_acquisition_buffer(size_t size, int16_t numa_node) { } AcquisitionDevice::AcquisitionDevice(uint16_t in_data_stream) : -buffer_err(RAW_MODULE_SIZE), internal_pkt_gen_frame(RAW_MODULE_SIZE) { +buffer_err(RAW_MODULE_SIZE), internal_pkt_gen_frame(RAW_MODULE_SIZE), mt(rd()) { logger = nullptr; data_stream = in_data_stream; @@ -52,7 +52,7 @@ uint64_t AcquisitionDevice::GetBufferHandle(size_t frame, uint8_t module_number) } void AcquisitionDevice::FillActionRegister(const DiffractionExperiment& x, ActionConfig &job) { - data_collection_id = rand() & UINT16_MAX; + data_collection_id = dist(mt); job.nmodules = x.GetModulesNum(data_stream); job.nframes = x.GetFrameNum(); diff --git a/receiver/host/AcquisitionDevice.h b/receiver/host/AcquisitionDevice.h index 40b3e91d..52c2837e 100644 --- a/receiver/host/AcquisitionDevice.h +++ b/receiver/host/AcquisitionDevice.h @@ -8,6 +8,7 @@ #include #include #include +#include #include @@ -55,6 +56,11 @@ class AcquisitionDevice { virtual void HW_EndAction() {}; // do clean-up after action is done virtual void CopyInternalPacketGenFrameToDeviceBuffer(); virtual void StartSendingWorkRequests() {}; + + std::random_device rd; + std::mt19937 mt; + std::uniform_int_distribution dist; + protected: ThreadSafeFIFO work_completion_queue; ThreadSafeFIFO work_request_queue; From 115e8c0dd03aaff99aa385fdc7056000361dc578 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 1 Jun 2023 20:56:15 +0200 Subject: [PATCH 030/224] AcquisitionDevice: Use random_device directly to simplify the code --- receiver/host/AcquisitionDevice.cpp | 7 +++++-- receiver/host/AcquisitionDevice.h | 6 ------ 2 files changed, 5 insertions(+), 8 deletions(-) diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index 6dfdbb92..45d8dc96 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -11,6 +11,7 @@ #include #include #include +#include #include "../../common/JFJochException.h" #include "AcquisitionDevice.h" @@ -35,7 +36,7 @@ void *mmap_acquisition_buffer(size_t size, int16_t numa_node) { } AcquisitionDevice::AcquisitionDevice(uint16_t in_data_stream) : -buffer_err(RAW_MODULE_SIZE), internal_pkt_gen_frame(RAW_MODULE_SIZE), mt(rd()) { +buffer_err(RAW_MODULE_SIZE), internal_pkt_gen_frame(RAW_MODULE_SIZE) { logger = nullptr; data_stream = in_data_stream; @@ -52,7 +53,9 @@ uint64_t AcquisitionDevice::GetBufferHandle(size_t frame, uint8_t module_number) } void AcquisitionDevice::FillActionRegister(const DiffractionExperiment& x, ActionConfig &job) { - data_collection_id = dist(mt); + std::random_device rd; + std::uniform_int_distribution dist; + data_collection_id = dist(rd); job.nmodules = x.GetModulesNum(data_stream); job.nframes = x.GetFrameNum(); diff --git a/receiver/host/AcquisitionDevice.h b/receiver/host/AcquisitionDevice.h index 52c2837e..40b3e91d 100644 --- a/receiver/host/AcquisitionDevice.h +++ b/receiver/host/AcquisitionDevice.h @@ -8,7 +8,6 @@ #include #include #include -#include #include @@ -56,11 +55,6 @@ class AcquisitionDevice { virtual void HW_EndAction() {}; // do clean-up after action is done virtual void CopyInternalPacketGenFrameToDeviceBuffer(); virtual void StartSendingWorkRequests() {}; - - std::random_device rd; - std::mt19937 mt; - std::uniform_int_distribution dist; - protected: ThreadSafeFIFO work_completion_queue; ThreadSafeFIFO work_request_queue; From 612c2b8aa2928366fbe3df61243878402d902466 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 1 Jun 2023 20:58:01 +0200 Subject: [PATCH 031/224] jfjoch_pcie_status: Print data collection ID separately --- receiver/host/jfjoch_pcie_status.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/receiver/host/jfjoch_pcie_status.cpp b/receiver/host/jfjoch_pcie_status.cpp index c02298e9..32b77dd6 100644 --- a/receiver/host/jfjoch_pcie_status.cpp +++ b/receiver/host/jfjoch_pcie_status.cpp @@ -44,7 +44,8 @@ int main(int argc, char **argv) { ActionConfig cfg = test.ReadActionRegister(); std::cout << "MAC address " << test.GetMACAddress() << std::endl; std::cout << "IPv4 address " << test.GetIPv4Address() << std::endl; - std::cout << "Mode " << std::hex << cfg.mode << std::dec << std::endl; + std::cout << "Data collection mode " << std::hex << (cfg.mode & 0xFFFF) << std::dec << std::endl; + std::cout << "Data collection ID " << std::hex << ((cfg.mode & 0xFFFF0000) >> 16) << std::dec << std::endl; std::cout << "Modules " << std::dec << cfg.nmodules << std::endl; std::cout << "Frames int. pkt. gen. " << std::dec << cfg.nframes << std::endl; std::cout << std::endl; From 577bec5dbca1694b5a4a333f5a761c85ffc2b5f9 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 1 Jun 2023 20:59:38 +0200 Subject: [PATCH 032/224] FPGAAcquisitionDevice: Add extra verbosity for dropped completions --- receiver/host/FPGAAcquisitionDevice.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/receiver/host/FPGAAcquisitionDevice.cpp b/receiver/host/FPGAAcquisitionDevice.cpp index a792c4e2..da92fbbd 100644 --- a/receiver/host/FPGAAcquisitionDevice.cpp +++ b/receiver/host/FPGAAcquisitionDevice.cpp @@ -33,6 +33,8 @@ void FPGAAcquisitionDevice::ReadWorkCompletionThread() { c = parse_hw_completion(values); if (c.data_collection_id == data_collection_id) work_completion_queue.PutBlocking(c); + else if (logger) + logger->Info("Dropped completion with data collection ID {} for frame number {}", c.data_collection_id, c.frame_number); } while (c.type != Completion::Type::End); } From e8ec298a4c461cc773c0d6a4d76ece9e9213172e Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 1 Jun 2023 21:07:03 +0200 Subject: [PATCH 033/224] FPGAAcquisitionDevice: Minor fixes to verbosity --- receiver/host/FPGAAcquisitionDevice.cpp | 2 +- receiver/host/jfjoch_pcie_status.cpp | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/receiver/host/FPGAAcquisitionDevice.cpp b/receiver/host/FPGAAcquisitionDevice.cpp index da92fbbd..f3205b3d 100644 --- a/receiver/host/FPGAAcquisitionDevice.cpp +++ b/receiver/host/FPGAAcquisitionDevice.cpp @@ -34,7 +34,7 @@ void FPGAAcquisitionDevice::ReadWorkCompletionThread() { if (c.data_collection_id == data_collection_id) work_completion_queue.PutBlocking(c); else if (logger) - logger->Info("Dropped completion with data collection ID {} for frame number {}", c.data_collection_id, c.frame_number); + logger->Info("Dropped completion with data collection ID {:04x} for frame number {}", c.data_collection_id, c.frame_number); } while (c.type != Completion::Type::End); } diff --git a/receiver/host/jfjoch_pcie_status.cpp b/receiver/host/jfjoch_pcie_status.cpp index 32b77dd6..7bd3b821 100644 --- a/receiver/host/jfjoch_pcie_status.cpp +++ b/receiver/host/jfjoch_pcie_status.cpp @@ -44,8 +44,8 @@ int main(int argc, char **argv) { ActionConfig cfg = test.ReadActionRegister(); std::cout << "MAC address " << test.GetMACAddress() << std::endl; std::cout << "IPv4 address " << test.GetIPv4Address() << std::endl; - std::cout << "Data collection mode " << std::hex << (cfg.mode & 0xFFFF) << std::dec << std::endl; - std::cout << "Data collection ID " << std::hex << ((cfg.mode & 0xFFFF0000) >> 16) << std::dec << std::endl; + std::cout << "Data collection mode (hex) " << std::hex << (cfg.mode & 0xFFFF) << std::dec << std::endl; + std::cout << "Data collection ID (hex) " << std::hex << ((cfg.mode & 0xFFFF0000) >> 16) << std::dec << std::endl; std::cout << "Modules " << std::dec << cfg.nmodules << std::endl; std::cout << "Frames int. pkt. gen. " << std::dec << cfg.nframes << std::endl; std::cout << std::endl; From 9bbf1c06a1dfc543ca4b9a801d90b14d9d90ae9f Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 1 Jun 2023 21:20:59 +0200 Subject: [PATCH 034/224] FPGAAcquisitionDevice: Add extra verbosity --- receiver/host/FPGAAcquisitionDevice.cpp | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/receiver/host/FPGAAcquisitionDevice.cpp b/receiver/host/FPGAAcquisitionDevice.cpp index f3205b3d..840620c6 100644 --- a/receiver/host/FPGAAcquisitionDevice.cpp +++ b/receiver/host/FPGAAcquisitionDevice.cpp @@ -33,8 +33,19 @@ void FPGAAcquisitionDevice::ReadWorkCompletionThread() { c = parse_hw_completion(values); if (c.data_collection_id == data_collection_id) work_completion_queue.PutBlocking(c); - else if (logger) - logger->Info("Dropped completion with data collection ID {:04x} for frame number {}", c.data_collection_id, c.frame_number); + else if (logger) { + switch (c.type) { + case Completion::Type::Start: + logger->Info("Dropped start completion with data collection ID {:04x}", c.data_collection_id); + break; + case Completion::Type::End: + logger->Info("Dropped end completion with data collection ID {:04x}", c.data_collection_id); + break; + case Completion::Type::Image: + logger->Info("Dropped image completion with data collection ID {:04x} for frame number {}", c.data_collection_id, c.frame_number); + break; + } + } } while (c.type != Completion::Type::End); } From 9178bbd689edcbfdfc7d016d93faa4399b62bd5c Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 1 Jun 2023 21:29:38 +0200 Subject: [PATCH 035/224] jfjoch_pcie_status: show data collection cancel bit --- grpc/jfjoch.proto | 1 + python/jfjoch_pb2.py | 96 ++++++++++++++-------------- receiver/host/AcquisitionDevice.cpp | 2 +- receiver/host/jfjoch_pcie_status.cpp | 1 + 4 files changed, 51 insertions(+), 49 deletions(-) diff --git a/grpc/jfjoch.proto b/grpc/jfjoch.proto index 7fcfc8b0..eb4547b9 100644 --- a/grpc/jfjoch.proto +++ b/grpc/jfjoch.proto @@ -381,6 +381,7 @@ message FPGAStatus { uint32 error_packet_len = 39; bool host_writer_idle = 41; + bool cancel_bit = 42; } message DataProcessingSettings { diff --git a/python/jfjoch_pb2.py b/python/jfjoch_pb2.py index d35585f9..ba71e236 100644 --- a/python/jfjoch_pb2.py +++ b/python/jfjoch_pb2.py @@ -13,7 +13,7 @@ _sym_db = _symbol_database.Default() -DESCRIPTOR = _descriptor_pool.Default().AddSerializedFile(b'\n\x0cjfjoch.proto\x12\x0eJFJochProtoBuf\"\x07\n\x05\x45mpty\"W\n\x08UnitCell\x12\t\n\x01\x61\x18\x01 \x01(\x02\x12\t\n\x01\x62\x18\x02 \x01(\x02\x12\t\n\x01\x63\x18\x03 \x01(\x02\x12\r\n\x05\x61lpha\x18\x04 \x01(\x02\x12\x0c\n\x04\x62\x65ta\x18\x05 \x01(\x02\x12\r\n\x05gamma\x18\x06 \x01(\x02\")\n\x06Vector\x12\t\n\x01x\x18\x01 \x01(\x02\x12\t\n\x01y\x18\x02 \x01(\x02\x12\t\n\x01z\x18\x03 \x01(\x02\"|\n\x10RotationSettings\x12\x17\n\x0fstart_angle_deg\x18\x01 \x01(\x02\x12 \n\x18\x61ngle_incr_per_image_deg\x18\x02 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_builder.BuildMessageAndEnumDescriptors(DESCRIPTOR, globals()) _builder.BuildTopDescriptorsAndMessages(DESCRIPTOR, 'jfjoch_pb2', globals()) @@ -24,18 +24,18 @@ if _descriptor._USE_C_DESCRIPTORS == False: _RADIALINTEGRATIONPROFILES_PLOTSENTRY._serialized_options = b'8\001' _FPGASTATUS_FIFOSTATUSENTRY._options = None _FPGASTATUS_FIFOSTATUSENTRY._serialized_options = b'8\001' - _COMPRESSION._serialized_start=8811 - _COMPRESSION._serialized_end=8895 - _DETECTORTYPE._serialized_start=8897 - _DETECTORTYPE._serialized_end=8936 - _DETECTORMODE._serialized_start=8938 - _DETECTORMODE._serialized_end=9028 - _FPGAFIFOSTATUS._serialized_start=9030 - _FPGAFIFOSTATUS._serialized_end=9080 - _STATE._serialized_start=9082 - _STATE._serialized_end=9176 - _PLOTTYPE._serialized_start=9178 - _PLOTTYPE._serialized_end=9282 + _COMPRESSION._serialized_start=8831 + _COMPRESSION._serialized_end=8915 + _DETECTORTYPE._serialized_start=8917 + _DETECTORTYPE._serialized_end=8956 + _DETECTORMODE._serialized_start=8958 + _DETECTORMODE._serialized_end=9048 + _FPGAFIFOSTATUS._serialized_start=9050 + _FPGAFIFOSTATUS._serialized_end=9100 + _STATE._serialized_start=9102 + _STATE._serialized_end=9196 + _PLOTTYPE._serialized_start=9198 + _PLOTTYPE._serialized_end=9302 _EMPTY._serialized_start=32 _EMPTY._serialized_end=39 _UNITCELL._serialized_start=41 @@ -103,39 +103,39 @@ if _descriptor._USE_C_DESCRIPTORS == False: _DETECTORSTATUS._serialized_start=5352 _DETECTORSTATUS._serialized_end=5450 _FPGASTATUS._serialized_start=5453 - _FPGASTATUS._serialized_end=6489 - _FPGASTATUS_FIFOSTATUSENTRY._serialized_start=6408 - _FPGASTATUS_FIFOSTATUSENTRY._serialized_end=6489 - _DATAPROCESSINGSETTINGS._serialized_start=6492 - _DATAPROCESSINGSETTINGS._serialized_end=6838 - _PREVIEWFRAMESPOT._serialized_start=6840 - _PREVIEWFRAMESPOT._serialized_end=6897 - _PREVIEWFRAME._serialized_start=6900 - _PREVIEWFRAME._serialized_end=7218 - _MODULESTATISTICS._serialized_start=7221 - _MODULESTATISTICS._serialized_end=7458 - _IMAGE._serialized_start=7460 - _IMAGE._serialized_end=7533 - _MASKTOLOAD._serialized_start=7535 - _MASKTOLOAD._serialized_end=7581 - _MEASUREMENTSTATISTICS._serialized_start=7584 - _MEASUREMENTSTATISTICS._serialized_end=8197 - _BROKERSTATUS._serialized_start=8200 - _BROKERSTATUS._serialized_end=8415 - _BROKERFULLSTATUS._serialized_start=8418 - _BROKERFULLSTATUS._serialized_end=8582 - _DETECTORLISTELEMENT._serialized_start=8584 - _DETECTORLISTELEMENT._serialized_end=8656 - _DETECTORLIST._serialized_start=8658 - _DETECTORLIST._serialized_end=8776 - _DETECTORSELECTION._serialized_start=8778 - _DETECTORSELECTION._serialized_end=8809 - _GRPC_JFJOCHRECEIVER._serialized_start=9285 - _GRPC_JFJOCHRECEIVER._serialized_end=10052 - _GRPC_JFJOCHWRITER._serialized_start=10055 - _GRPC_JFJOCHWRITER._serialized_end=10257 - _GRPC_JFJOCHDETECTOR._serialized_start=10260 - _GRPC_JFJOCHDETECTOR._serialized_end=10646 - _GRPC_JFJOCHBROKER._serialized_start=10649 - _GRPC_JFJOCHBROKER._serialized_end=12338 + _FPGASTATUS._serialized_end=6509 + _FPGASTATUS_FIFOSTATUSENTRY._serialized_start=6428 + _FPGASTATUS_FIFOSTATUSENTRY._serialized_end=6509 + _DATAPROCESSINGSETTINGS._serialized_start=6512 + _DATAPROCESSINGSETTINGS._serialized_end=6858 + _PREVIEWFRAMESPOT._serialized_start=6860 + _PREVIEWFRAMESPOT._serialized_end=6917 + _PREVIEWFRAME._serialized_start=6920 + _PREVIEWFRAME._serialized_end=7238 + _MODULESTATISTICS._serialized_start=7241 + _MODULESTATISTICS._serialized_end=7478 + _IMAGE._serialized_start=7480 + _IMAGE._serialized_end=7553 + _MASKTOLOAD._serialized_start=7555 + _MASKTOLOAD._serialized_end=7601 + _MEASUREMENTSTATISTICS._serialized_start=7604 + _MEASUREMENTSTATISTICS._serialized_end=8217 + _BROKERSTATUS._serialized_start=8220 + _BROKERSTATUS._serialized_end=8435 + _BROKERFULLSTATUS._serialized_start=8438 + _BROKERFULLSTATUS._serialized_end=8602 + _DETECTORLISTELEMENT._serialized_start=8604 + _DETECTORLISTELEMENT._serialized_end=8676 + _DETECTORLIST._serialized_start=8678 + _DETECTORLIST._serialized_end=8796 + _DETECTORSELECTION._serialized_start=8798 + _DETECTORSELECTION._serialized_end=8829 + _GRPC_JFJOCHRECEIVER._serialized_start=9305 + _GRPC_JFJOCHRECEIVER._serialized_end=10072 + _GRPC_JFJOCHWRITER._serialized_start=10075 + _GRPC_JFJOCHWRITER._serialized_end=10277 + _GRPC_JFJOCHDETECTOR._serialized_start=10280 + _GRPC_JFJOCHDETECTOR._serialized_end=10666 + _GRPC_JFJOCHBROKER._serialized_start=10669 + _GRPC_JFJOCHBROKER._serialized_end=12358 # @@protoc_insertion_point(module_scope) diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index 45d8dc96..abdac09d 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -375,7 +375,7 @@ JFJochProtoBuf::FPGAStatus AcquisitionDevice::GetStatus() const { ret.set_packets_sls(status.packets_sls); ret.set_error_eth(status.udp_err_eth); ret.set_error_packet_len(status.udp_err_len); - + ret.set_cancel_bit(full_status_register & (1<<2)); ret.set_host_writer_idle(full_status_register & (1<<4)); ret.set_frame_statistics_alignment_err(full_status_register & (1 << 24)); ret.set_frame_statistics_tlast_err(full_status_register & (1 << 25)); diff --git a/receiver/host/jfjoch_pcie_status.cpp b/receiver/host/jfjoch_pcie_status.cpp index 7bd3b821..aa99937d 100644 --- a/receiver/host/jfjoch_pcie_status.cpp +++ b/receiver/host/jfjoch_pcie_status.cpp @@ -35,6 +35,7 @@ int main(int argc, char **argv) { std::cout << "HBM temperature #1 " << status.hbm_temp_1_degc() << std::endl; std::cout << "Data collection idle " << status.fpga_idle() << std::endl; std::cout << "Host writer idle " << status.host_writer_idle() << std::endl; + std::cout << "Data collection cancel " << status.cancel_bit() << std::endl; std::cout << "Full status register " << std::bitset<32>(status.full_status_register()) << std::endl; From dff00157623e2ab94ded852bc404502d1e76b461 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 2 Jun 2023 07:52:08 +0200 Subject: [PATCH 036/224] PCIe driver: Minor fix --- receiver/pcie_driver/jfjoch_function.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/receiver/pcie_driver/jfjoch_function.c b/receiver/pcie_driver/jfjoch_function.c index 86475a8e..ef5ff03c 100644 --- a/receiver/pcie_driver/jfjoch_function.c +++ b/receiver/pcie_driver/jfjoch_function.c @@ -36,6 +36,8 @@ void jfjoch_start(struct jfjoch_drvdata *drvdata) { iowrite32(255-16, drvdata->bar0 + MAILBOX_OFFSET + ADDR_MAILBOX_SIT); iowrite32(15 , drvdata->bar0 + MAILBOX_OFFSET + ADDR_MAILBOX_RIT); + // Clear all registers + iowrite32(0x0, drvdata->bar0 + ACTION_CONFIG_OFFSET); // Write Start value to action config register iowrite32(0x1, drvdata->bar0 + ACTION_CONFIG_OFFSET); } From 1da3019190ef9d00534ae078c35c963e9e5e9b50 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 2 Jun 2023 16:52:34 +0200 Subject: [PATCH 037/224] FPGAAcquisitionDevice: Bug in ReadWorkCompletionThread - loop exit condition was wrong --- receiver/host/FPGAAcquisitionDevice.cpp | 19 +++++-------------- 1 file changed, 5 insertions(+), 14 deletions(-) diff --git a/receiver/host/FPGAAcquisitionDevice.cpp b/receiver/host/FPGAAcquisitionDevice.cpp index 840620c6..c5c9a0c6 100644 --- a/receiver/host/FPGAAcquisitionDevice.cpp +++ b/receiver/host/FPGAAcquisitionDevice.cpp @@ -26,27 +26,18 @@ void FPGAAcquisitionDevice::ReadWorkCompletionThread() { uint32_t values[12]; Completion c{}; + bool quit_loop = false; do { while (!HW_ReadMailbox(values)) std::this_thread::sleep_for(std::chrono::microseconds(10)); c = parse_hw_completion(values); - if (c.data_collection_id == data_collection_id) + if (c.data_collection_id == data_collection_id) { work_completion_queue.PutBlocking(c); - else if (logger) { - switch (c.type) { - case Completion::Type::Start: - logger->Info("Dropped start completion with data collection ID {:04x}", c.data_collection_id); - break; - case Completion::Type::End: - logger->Info("Dropped end completion with data collection ID {:04x}", c.data_collection_id); - break; - case Completion::Type::Image: - logger->Info("Dropped image completion with data collection ID {:04x} for frame number {}", c.data_collection_id, c.frame_number); - break; - } + if (c.type == Completion::Type::End) + quit_loop = true; } - } while (c.type != Completion::Type::End); + } while (!quit_loop); } void FPGAAcquisitionDevice::SendWorkRequestThread() { From 62ce464fb9b2baa6c9e1192c3843c743d4f0ab47 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 2 Jun 2023 16:55:25 +0200 Subject: [PATCH 038/224] PCIe driver: automatically cancel data collection when character device is released --- receiver/pcie_driver/jfjoch_function.c | 2 -- receiver/pcie_driver/jfjoch_miscdev.c | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/receiver/pcie_driver/jfjoch_function.c b/receiver/pcie_driver/jfjoch_function.c index ef5ff03c..86475a8e 100644 --- a/receiver/pcie_driver/jfjoch_function.c +++ b/receiver/pcie_driver/jfjoch_function.c @@ -36,8 +36,6 @@ void jfjoch_start(struct jfjoch_drvdata *drvdata) { iowrite32(255-16, drvdata->bar0 + MAILBOX_OFFSET + ADDR_MAILBOX_SIT); iowrite32(15 , drvdata->bar0 + MAILBOX_OFFSET + ADDR_MAILBOX_RIT); - // Clear all registers - iowrite32(0x0, drvdata->bar0 + ACTION_CONFIG_OFFSET); // Write Start value to action config register iowrite32(0x1, drvdata->bar0 + ACTION_CONFIG_OFFSET); } diff --git a/receiver/pcie_driver/jfjoch_miscdev.c b/receiver/pcie_driver/jfjoch_miscdev.c index d1840eb5..b3bcdb02 100644 --- a/receiver/pcie_driver/jfjoch_miscdev.c +++ b/receiver/pcie_driver/jfjoch_miscdev.c @@ -33,5 +33,7 @@ int jfjoch_cdev_open(struct inode *inode, struct file *file) { } int jfjoch_cdev_release(struct inode *inode, struct file *file) { + struct jfjoch_drvdata *drvdata = container_of(file->private_data, struct jfjoch_drvdata, miscdev); + jfjoch_cancel(drvdata); return 0; } From 9497d84f3c0ec35a793a33ae55cb5e91da98d5ac Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 2 Jun 2023 21:59:24 +0200 Subject: [PATCH 039/224] FPGA: Small rewrite of the internal_packet_generator --- receiver/hls/internal_packet_generator.cpp | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/receiver/hls/internal_packet_generator.cpp b/receiver/hls/internal_packet_generator.cpp index 13c5f4e6..65f0316b 100644 --- a/receiver/hls/internal_packet_generator.cpp +++ b/receiver/hls/internal_packet_generator.cpp @@ -57,10 +57,9 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, if (internal_packet_generator) { uint32_t frame_number = 1; uint8_t module_number = 0; - ap_uint<1> cancel = in_cancel; - generate_frames: - while (!cancel && (frame_number <= nframes)) { + generate_frames: + while (!in_cancel.read() && (frame_number <= nframes)) { for (uint32_t i = 0; i < RAW_MODULE_SIZE * 2 / 64; i++) { #pragma HLS PIPELINE II=1 uint32_t eth_packet = i / 128; @@ -79,7 +78,6 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, module_number = 0; } else module_number++; - cancel = in_cancel; } } From 7d88017d512520d08abec495f21e504405c34a13 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 3 Jun 2023 17:27:49 +0200 Subject: [PATCH 040/224] AcquisitionDevice: FPGA specific calibration initialization moved to FPGAAcqusitionDevice --- receiver/host/AcquisitionDevice.cpp | 45 +------------------------ receiver/host/FPGAAcquisitionDevice.cpp | 45 +++++++++++++++++++++++++ receiver/host/FPGAAcquisitionDevice.h | 2 ++ receiver/host/LinuxSocketDevice.cpp | 4 --- receiver/host/LinuxSocketDevice.h | 1 - receiver/host/MlxRawEthDevice.cpp | 4 --- receiver/host/MlxRawEthDevice.h | 1 - receiver/host/MockAcquisitionDevice.cpp | 1 - receiver/host/MockAcquisitionDevice.h | 1 - 9 files changed, 48 insertions(+), 56 deletions(-) diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index abdac09d..02cc3b93 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -261,50 +261,7 @@ int16_t *AcquisitionDevice::GetDeviceBuffer(size_t handle) { return (int16_t *) buffer_device.at(handle); } -void AcquisitionDevice::InitializeCalibration(const DiffractionExperiment &experiment, const JFCalibration &calib) { - auto offset = experiment.GetFirstModuleOfDataStream(data_stream); - - if (calib.GetModulesNum() != experiment.GetModulesNum()) - throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, - "Mismatch regarding module count in calibration and experiment description"); - - if (calib.GetStorageCellNum() != experiment.GetStorageCellNumber()) - throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, - "Mismatch regarding storage cell count in calibration and experiment description"); - - size_t modules = experiment.GetModulesNum(data_stream); - - if (1 + modules * (3 + 3 * experiment.GetStorageCellNumber()) > buffer_device.size()) - throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, - "Not enough host/FPGA buffers to load all calibration constants"); - - for (int m = 0; m < modules; m++) { - calib.GainCalibration(m).ExportG0(buffer_device[1 + m]); - calib.GainCalibration(m).ExportG1(buffer_device[1 + m + modules]); - calib.GainCalibration(m).ExportG2(buffer_device[1 + m + modules * 2]); - } - - for (int s = 0; s < experiment.GetStorageCellNumber(); s++) { - auto mask = calib.CalculateMask(experiment, s); - for (int m = 0; m < modules; m++) { - auto pedestal_g0 = calib.Pedestal(offset + m, 0, s).GetPedestal(); - auto pedestal_g1 = calib.Pedestal(offset + m, 1, s).GetPedestal(); - auto pedestal_g2 = calib.Pedestal(offset + m, 2, s).GetPedestal(); - for (int i = 0; i < RAW_MODULE_SIZE; i++) { - if (experiment.GetApplyPixelMaskInFPGA() && (mask[(offset + m) * RAW_MODULE_SIZE + i] != 0)) { - buffer_device[1 + m + (3 + 0 * 16 + s) * modules][i] = 16384; - buffer_device[1 + m + (3 + 1 * 16 + s) * modules][i] = 16384; - buffer_device[1 + m + (3 + 2 * 16 + s) * modules][i] = 16384; - } else { - buffer_device[1 + m + (3 + 0 * 16 + s) * modules][i] = pedestal_g0[i]; - buffer_device[1 + m + (3 + 1 * 16 + s) * modules][i] = pedestal_g1[i]; - buffer_device[1 + m + (3 + 2 * 16 + s) * modules][i] = pedestal_g2[i]; - } - } - - } - } -} +void AcquisitionDevice::InitializeCalibration(const DiffractionExperiment &experiment, const JFCalibration &calib) {} void AcquisitionDevice::MapBuffersStandard(size_t c2h_buffer_count, size_t h2c_buffer_count, int16_t numa_node) { try { diff --git a/receiver/host/FPGAAcquisitionDevice.cpp b/receiver/host/FPGAAcquisitionDevice.cpp index c5c9a0c6..4e7ae9ec 100644 --- a/receiver/host/FPGAAcquisitionDevice.cpp +++ b/receiver/host/FPGAAcquisitionDevice.cpp @@ -52,4 +52,49 @@ void FPGAAcquisitionDevice::SendWorkRequestThread() { std::this_thread::sleep_for(std::chrono::microseconds(10)); } } +} + +void FPGAAcquisitionDevice::InitializeCalibration(const DiffractionExperiment &experiment, const JFCalibration &calib) { + auto offset = experiment.GetFirstModuleOfDataStream(data_stream); + + if (calib.GetModulesNum() != experiment.GetModulesNum()) + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, + "Mismatch regarding module count in calibration and experiment description"); + + if (calib.GetStorageCellNum() != experiment.GetStorageCellNumber()) + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, + "Mismatch regarding storage cell count in calibration and experiment description"); + + size_t modules = experiment.GetModulesNum(data_stream); + + if (1 + modules * (3 + 3 * experiment.GetStorageCellNumber()) > buffer_device.size()) + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, + "Not enough host/FPGA buffers to load all calibration constants"); + + for (int m = 0; m < modules; m++) { + calib.GainCalibration(m).ExportG0(buffer_device[1 + m]); + calib.GainCalibration(m).ExportG1(buffer_device[1 + m + modules]); + calib.GainCalibration(m).ExportG2(buffer_device[1 + m + modules * 2]); + } + + for (int s = 0; s < experiment.GetStorageCellNumber(); s++) { + auto mask = calib.CalculateMask(experiment, s); + for (int m = 0; m < modules; m++) { + auto pedestal_g0 = calib.Pedestal(offset + m, 0, s).GetPedestal(); + auto pedestal_g1 = calib.Pedestal(offset + m, 1, s).GetPedestal(); + auto pedestal_g2 = calib.Pedestal(offset + m, 2, s).GetPedestal(); + for (int i = 0; i < RAW_MODULE_SIZE; i++) { + if (experiment.GetApplyPixelMaskInFPGA() && (mask[(offset + m) * RAW_MODULE_SIZE + i] != 0)) { + buffer_device[1 + m + (3 + 0 * 16 + s) * modules][i] = 16384; + buffer_device[1 + m + (3 + 1 * 16 + s) * modules][i] = 16384; + buffer_device[1 + m + (3 + 2 * 16 + s) * modules][i] = 16384; + } else { + buffer_device[1 + m + (3 + 0 * 16 + s) * modules][i] = pedestal_g0[i]; + buffer_device[1 + m + (3 + 1 * 16 + s) * modules][i] = pedestal_g1[i]; + buffer_device[1 + m + (3 + 2 * 16 + s) * modules][i] = pedestal_g2[i]; + } + } + + } + } } \ No newline at end of file diff --git a/receiver/host/FPGAAcquisitionDevice.h b/receiver/host/FPGAAcquisitionDevice.h index 831c032d..e42568f4 100644 --- a/receiver/host/FPGAAcquisitionDevice.h +++ b/receiver/host/FPGAAcquisitionDevice.h @@ -25,6 +25,8 @@ class FPGAAcquisitionDevice : public AcquisitionDevice { void StartSendingWorkRequests() override; protected: explicit FPGAAcquisitionDevice(uint16_t data_stream) : AcquisitionDevice(data_stream) {} +public: + void InitializeCalibration(const DiffractionExperiment &experiment, const JFCalibration &calib) override; }; diff --git a/receiver/host/LinuxSocketDevice.cpp b/receiver/host/LinuxSocketDevice.cpp index d13c9e71..bb6613d4 100644 --- a/receiver/host/LinuxSocketDevice.cpp +++ b/receiver/host/LinuxSocketDevice.cpp @@ -133,10 +133,6 @@ void LinuxSocketDevice::CopyInternalPacketGenFrameToDeviceBuffer() { // Do nothing } -void LinuxSocketDevice::InitializeCalibration(const DiffractionExperiment &experiment, const JFCalibration &calib) { - // Do nothing -} - int32_t LinuxSocketDevice::GetNUMANode() const { return numa_node; } diff --git a/receiver/host/LinuxSocketDevice.h b/receiver/host/LinuxSocketDevice.h index f56f7c77..b5da5ee3 100644 --- a/receiver/host/LinuxSocketDevice.h +++ b/receiver/host/LinuxSocketDevice.h @@ -40,7 +40,6 @@ public: int32_t rcv_buf_size = -1, int16_t in_numa_node = -1); ~LinuxSocketDevice() override = default; - void InitializeCalibration(const DiffractionExperiment &experiment, const JFCalibration &calib) override; int32_t GetNUMANode() const override; uint16_t GetUDPPort() const override; }; diff --git a/receiver/host/MlxRawEthDevice.cpp b/receiver/host/MlxRawEthDevice.cpp index 2ddd55e7..bec27014 100644 --- a/receiver/host/MlxRawEthDevice.cpp +++ b/receiver/host/MlxRawEthDevice.cpp @@ -21,10 +21,6 @@ MlxRawEthDevice::MlxRawEthDevice(uint16_t dev_id, uint16_t data_stream, size_t i mac_addr = (static_cast(dev_id) << 8*5) | 0x00DDCCBBAA06; } -void MlxRawEthDevice::InitializeCalibration(const DiffractionExperiment &experiment, const JFCalibration &calib) { - // Do nothing -} - int32_t MlxRawEthDevice::GetNUMANode() const { return numa_node; } diff --git a/receiver/host/MlxRawEthDevice.h b/receiver/host/MlxRawEthDevice.h index a3f126e1..e626ba0c 100644 --- a/receiver/host/MlxRawEthDevice.h +++ b/receiver/host/MlxRawEthDevice.h @@ -51,7 +51,6 @@ public: MlxRawEthDevice(uint16_t dev_id, uint16_t data_stream, size_t in_frame_buffer_size_modules, int16_t numa_node = -1); ~MlxRawEthDevice() override = default; - void InitializeCalibration(const DiffractionExperiment &experiment, const JFCalibration &calib) override; int32_t GetNUMANode() const override; void SetMACAddress(uint64_t mac_addr_network_order); void SetIPv4Address(uint32_t ipv4_addr_network_order); diff --git a/receiver/host/MockAcquisitionDevice.cpp b/receiver/host/MockAcquisitionDevice.cpp index d2a01b17..d15757a4 100644 --- a/receiver/host/MockAcquisitionDevice.cpp +++ b/receiver/host/MockAcquisitionDevice.cpp @@ -87,4 +87,3 @@ void MockAcquisitionDevice::HW_GetStatus(ActionStatus *status) const { } void MockAcquisitionDevice::CopyInternalPacketGenFrameToDeviceBuffer() {} -void MockAcquisitionDevice::InitializeCalibration(const DiffractionExperiment &experiment, const JFCalibration &calib) {} diff --git a/receiver/host/MockAcquisitionDevice.h b/receiver/host/MockAcquisitionDevice.h index d20b8dc1..61b10486 100644 --- a/receiver/host/MockAcquisitionDevice.h +++ b/receiver/host/MockAcquisitionDevice.h @@ -30,7 +30,6 @@ public: MockAcquisitionDevice(uint16_t data_stream, size_t in_frame_buffer_size_modules); void AddModule(uint64_t frame, uint16_t module_number, const uint16_t *data); void Terminate(); - void InitializeCalibration(const DiffractionExperiment &experiment, const JFCalibration &calib) override; }; #endif //JUNGFRAUJOCH_MOCKACQUISITIONDEVICE_H From e1e46f411f1f003288d07a986e30dce22648639c Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 3 Jun 2023 18:37:56 +0200 Subject: [PATCH 041/224] AcquisitionDevice: refactor to make it less FPGA dependent --- receiver/JFJochReceiverTest.cpp | 6 +- receiver/host/AcquisitionDevice.cpp | 169 +----------------------- receiver/host/AcquisitionDevice.h | 35 ++--- receiver/host/FPGAAcquisitionDevice.cpp | 166 ++++++++++++++++++++++- receiver/host/FPGAAcquisitionDevice.h | 23 +++- receiver/host/HLSSimulatedDevice.cpp | 9 +- receiver/host/HLSSimulatedDevice.h | 5 +- receiver/host/LinuxSocketDevice.cpp | 38 +----- receiver/host/LinuxSocketDevice.h | 14 +- receiver/host/MlxRawEthDevice.cpp | 39 ++---- receiver/host/MlxRawEthDevice.h | 13 +- receiver/host/MockAcquisitionDevice.cpp | 29 +--- receiver/host/MockAcquisitionDevice.h | 13 +- receiver/host/PCIExpressDevice.cpp | 8 +- receiver/host/PCIExpressDevice.h | 5 +- receiver/jfjoch_action_test.cpp | 15 +-- receiver/jfjoch_receiver.cpp | 16 +-- tests/FPGAIntegrationTest.cpp | 1 + 18 files changed, 260 insertions(+), 344 deletions(-) diff --git a/receiver/JFJochReceiverTest.cpp b/receiver/JFJochReceiverTest.cpp index 664bcb2e..39f44fa9 100644 --- a/receiver/JFJochReceiverTest.cpp +++ b/receiver/JFJochReceiverTest.cpp @@ -92,8 +92,10 @@ bool JFJochReceiverTest(JFJochProtoBuf::ReceiverOutput &output, Logger &logger, for (int i = 0; i < x.GetDataStreamsNum(); i++) { uint32_t module0 = x.GetFirstModuleOfDataStream(i); for (int m = 0; m < x.GetModulesNum(i); m++) { - memcpy(raw_expected_image.data() + (module0 + m) * RAW_MODULE_SIZE, - aq_devices[i]->GetInternalGeneratorFrame().data(), RAW_MODULE_SIZE * sizeof(uint16_t)); + auto int_gen_frame = aq_devices[i]->GetInternalGeneratorFrame(); + if (int_gen_frame.size() == RAW_MODULE_SIZE) + memcpy(raw_expected_image.data() + (module0 + m) * RAW_MODULE_SIZE, int_gen_frame.data(), + RAW_MODULE_SIZE * sizeof(uint16_t)); } } diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index 02cc3b93..9736a892 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -7,11 +7,9 @@ #include #include -#include #include #include #include -#include #include "../../common/JFJochException.h" #include "AcquisitionDevice.h" @@ -36,12 +34,9 @@ void *mmap_acquisition_buffer(size_t size, int16_t numa_node) { } AcquisitionDevice::AcquisitionDevice(uint16_t in_data_stream) : -buffer_err(RAW_MODULE_SIZE), internal_pkt_gen_frame(RAW_MODULE_SIZE) { +buffer_err(RAW_MODULE_SIZE) { logger = nullptr; data_stream = in_data_stream; - - for (int i = 0; i < RAW_MODULE_SIZE; i++) - internal_pkt_gen_frame[i] = i % 65536; } bool AcquisitionDevice::IsFullModuleCollected(size_t frame, uint8_t module_number) const { @@ -52,32 +47,7 @@ uint64_t AcquisitionDevice::GetBufferHandle(size_t frame, uint8_t module_number) return counters.GetBufferHandle(frame, module_number); } -void AcquisitionDevice::FillActionRegister(const DiffractionExperiment& x, ActionConfig &job) { - std::random_device rd; - std::uniform_int_distribution dist; - data_collection_id = dist(rd); - - job.nmodules = x.GetModulesNum(data_stream); - job.nframes = x.GetFrameNum(); - job.one_over_energy = std::lround((1<<20)/ x.GetPhotonEnergy_keV()); - job.nstorage_cells = x.GetStorageCellNumber() - 1; - job.mode = data_collection_id << 16; - - if (fpga_non_blocking_mode) - job.mode |= MODE_NONBLOCKING_ON_WR; - - if ((x.GetDetectorMode() == DetectorMode::Conversion) && x.GetConversionOnFPGA()) - job.mode |= MODE_CONV; - - if (x.IsUsingInternalPacketGen()) - job.mode |= MODE_INTERNAL_PACKET_GEN; -} - void AcquisitionDevice::PrepareAction(const DiffractionExperiment &experiment) { - if (!HW_IsIdle()) - throw(JFJochException(JFJochExceptionCategory::AcquisitionDeviceError, - "Hardware action running prior to start of data acquisition")); - if (experiment.GetModulesNum(data_stream) > max_modules) throw(JFJochException(JFJochExceptionCategory::InputParameterAboveMax, "Number of modules exceeds max possible for FPGA")); @@ -88,10 +58,6 @@ void AcquisitionDevice::PrepareAction(const DiffractionExperiment &experiment) { void AcquisitionDevice::StartAction(const DiffractionExperiment &experiment) { HW_SetCancelDataCollectionBit(); - if (!HW_IsIdle()) - throw(JFJochException(JFJochExceptionCategory::AcquisitionDeviceError, - "Hardware action running prior to start of data acquisition")); - if (experiment.GetModulesNum(data_stream) > max_modules) throw(JFJochException(JFJochExceptionCategory::InputParameterAboveMax, "Number of modules exceeds max possible for FPGA")); @@ -107,29 +73,10 @@ void AcquisitionDevice::StartAction(const DiffractionExperiment &experiment) { completion_vector.Reset(experiment, data_stream); expected_frames = experiment.GetFrameNum(); - ActionConfig cfg_in{}, cfg_out{}; - - FillActionRegister(experiment, cfg_in); - HW_WriteActionRegister(&cfg_in); - HW_ReadActionRegister(&cfg_out); - - if (experiment.IsUsingInternalPacketGen()) - CopyInternalPacketGenFrameToDeviceBuffer(); - - if (cfg_out.mode != cfg_in.mode) - throw JFJochException(JFJochExceptionCategory::AcquisitionDeviceError, - "Mismatch between expected and actual values of configuration registers (mode)"); - if (cfg_out.nframes != cfg_in.nframes) - throw JFJochException(JFJochExceptionCategory::AcquisitionDeviceError, - "Mismatch between expected and actual values of configuration registers (Frames per trigger)"); - if (cfg_out.nmodules != cfg_in.nmodules) - throw JFJochException(JFJochExceptionCategory::AcquisitionDeviceError, - "Mismatch between expected and actual values of configuration registers (#modules)"); - // Ensure internal WR queue is empty work_request_queue.Clear(); - HW_StartAction(); + HW_StartAction(experiment); for (uint32_t i = 0; i < buffer_device.size(); i++) SendWorkRequest(i); @@ -146,11 +93,6 @@ void AcquisitionDevice::StartAction(const DiffractionExperiment &experiment) { logger->Info("Started"); } -void AcquisitionDevice::CopyInternalPacketGenFrameToDeviceBuffer() { - memcpy(buffer_device[0], internal_pkt_gen_frame.data(), - RAW_MODULE_SIZE * sizeof(uint16_t)); -} - int64_t AcquisitionDevice::CalculateDelay(size_t curr_frame, uint16_t module_number) const { return counters.CalculateDelay(curr_frame, module_number); } @@ -159,18 +101,6 @@ void AcquisitionDevice::WaitForFrame(size_t curr_frame, uint16_t module_number) counters.WaitForFrame(curr_frame, module_number); } -void AcquisitionDevice::SetCustomInternalGeneratorFrame(const std::vector &v) { - if (v.size() != RAW_MODULE_SIZE) - throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, - "Error in size of custom internal generator frame"); - for (int i = 0; i < RAW_MODULE_SIZE; i++) - internal_pkt_gen_frame[i] = v[i]; -} - -const std::vector &AcquisitionDevice::GetInternalGeneratorFrame() const { - return internal_pkt_gen_frame; -} - void AcquisitionDevice::WaitForActionComplete() { auto c = work_completion_queue.GetBlocking(); @@ -200,8 +130,6 @@ void AcquisitionDevice::WaitForActionComplete() { end_time = std::chrono::system_clock::now(); HW_SetCancelDataCollectionBit(); HW_EndAction(); - while (!HW_IsIdle()) - std::this_thread::sleep_for(std::chrono::milliseconds(1)); } void AcquisitionDevice::SendWorkRequest(uint32_t handle) { @@ -288,95 +216,6 @@ void AcquisitionDevice::EnableLogging(Logger *in_logger) { logger = in_logger; } -inline JFJochProtoBuf::FPGAFIFOStatus FIFO_check(uint32_t fifo_register, uint16_t pos_empty, uint16_t pos_full) { - if (std::bitset<32>(fifo_register).test(pos_empty)) - return JFJochProtoBuf::FPGAFIFOStatus::EMPTY; - if (std::bitset<32>(fifo_register).test(pos_full)) - return JFJochProtoBuf::FPGAFIFOStatus::FULL; - return JFJochProtoBuf::FPGAFIFOStatus::PARTIAL; -} - -JFJochProtoBuf::FPGAStatus AcquisitionDevice::GetStatus() const { - ActionStatus status{}; - ActionEnvParams env{}; - - HW_GetStatus(&status); - HW_GetEnvParams(&env); - - JFJochProtoBuf::FPGAStatus ret; - auto full_status_register = status.ctrl_reg; - ret.set_full_status_register(full_status_register); - - ret.set_stalls_hbm(status.pipeline_stalls_hbm); - ret.set_stalls_host(status.pipeline_stalls_host); - - ret.set_max_modules(status.max_modules); - ret.set_git_sha1(status.git_sha1); - - (*ret.mutable_fifo_status())["Conversion input (data)"] = FIFO_check(status.fifo_status, 0, 1); - (*ret.mutable_fifo_status())["Conversion input (cmd)"] = FIFO_check(status.fifo_status, 2, 3); - (*ret.mutable_fifo_status())["UDP"] = FIFO_check(status.fifo_status, 6, 7); - (*ret.mutable_fifo_status())["Work Request"] = FIFO_check(status.fifo_status, 12, 13); - (*ret.mutable_fifo_status())["Work Completion"] = FIFO_check(status.fifo_status, 14, 15); - (*ret.mutable_fifo_status())["Host mem (data)"] = FIFO_check(status.fifo_status, 8, 9); - (*ret.mutable_fifo_status())["Host mem (cmd)"] = FIFO_check(status.fifo_status, 10, 11); - (*ret.mutable_fifo_status())["Data FIFO #8"] = FIFO_check(status.fifo_status, 16, 17); - (*ret.mutable_fifo_status())["Addr FIFO #3"] = FIFO_check(status.fifo_status, 18, 19); - - ret.set_fpga_idle(HW_IsIdle()); - - ret.set_packets_ether(status.packets_eth); - ret.set_packets_udp(status.packets_udp); - ret.set_packets_icmp(status.packets_icmp); - ret.set_packets_jfjoch(status.packets_processed); - ret.set_packets_sls(status.packets_sls); - ret.set_error_eth(status.udp_err_eth); - ret.set_error_packet_len(status.udp_err_len); - ret.set_cancel_bit(full_status_register & (1<<2)); - ret.set_host_writer_idle(full_status_register & (1<<4)); - ret.set_frame_statistics_alignment_err(full_status_register & (1 << 24)); - ret.set_frame_statistics_tlast_err(full_status_register & (1 << 25)); - ret.set_frame_statistics_work_req_err(full_status_register & (1 << 26)); - - ret.set_mailbox_status_reg(env.mailbox_status_reg); - ret.set_mailbox_err_reg(env.mailbox_err_reg); - - ret.set_fpga_temp_degc(env.fpga_temp_C); - - ret.set_current_edge_12v_a(static_cast(env.fpga_pcie_12V_I_mA) / 1000.0); - ret.set_voltage_edge_12v_v(static_cast(env.fpga_pcie_12V_V_mV) / 1000.0); - - ret.set_current_edge_3p3v_a(static_cast(env.fpga_pcie_3p3V_I_mA) / 1000.0); - ret.set_voltage_edge_3p3v_v(static_cast(env.fpga_pcie_3p3V_V_mV) / 1000.0); - - ret.set_pcie_c2h_beats(env.pcie_c2h_beats); - ret.set_pcie_h2c_beats(env.pcie_h2c_beats); - ret.set_pcie_c2h_descriptors(env.pcie_c2h_descriptors); - ret.set_pcie_h2c_descriptors(env.pcie_h2c_descriptors); - ret.set_pcie_c2h_status(env.pcie_c2h_status); - ret.set_pcie_h2c_status(env.pcie_h2c_status); - - ret.set_ethernet_rx_aligned(env.ethernet_aligned); - ret.set_hbm_temp_0_degc(env.hbm_0_temp_C); - ret.set_hbm_temp_1_degc(env.hbm_1_temp_C); - ret.set_slowest_head(GetSlowestHead()); - return ret; -} - -std::string AcquisitionDevice::GetMACAddress() const { - return MacAddressToStr(HW_GetMACAddress()); -} - -std::string AcquisitionDevice::GetIPv4Address() const { - return IPv4AddressToStr(HW_GetIPv4Address()); -} - -ActionConfig AcquisitionDevice::ReadActionRegister() { - ActionConfig cfg{}; - HW_ReadActionRegister(&cfg); - return cfg; -} - int32_t AcquisitionDevice::GetNUMANode() const { return -1; } @@ -400,7 +239,3 @@ uint32_t AcquisitionDevice::GetExptime(size_t curr_frame, uint16_t module_number uint64_t AcquisitionDevice::GetTimestamp(size_t curr_frame, uint16_t module_number) const { return counters.GetTimestamp(curr_frame, module_number); } - -void AcquisitionDevice::SetFPGANonBlockingMode(bool input) { - fpga_non_blocking_mode = input; -} \ No newline at end of file diff --git a/receiver/host/AcquisitionDevice.h b/receiver/host/AcquisitionDevice.h index 40b3e91d..6a1a244c 100644 --- a/receiver/host/AcquisitionDevice.h +++ b/receiver/host/AcquisitionDevice.h @@ -18,7 +18,6 @@ #include "../../common/ThreadSafeFIFO.h" #include "../../jungfrau/JFModuleGainCalibration.h" -#include "ActionConfig.h" #include "AcquisitionOnlineCounters.h" #include "Completion.h" #include "AcquisitionOfflineCounters.h" @@ -27,45 +26,29 @@ void *mmap_acquisition_buffer(size_t size, int16_t numa_node); class AcquisitionDevice { uint64_t bytes_received = 0; - bool fpga_non_blocking_mode = true; std::vector buffer_err; std::chrono::time_point start_time; std::chrono::time_point end_time; - void FillActionRegister(const DiffractionExperiment& x, ActionConfig& job); - int64_t expected_frames; AcquisitionOnlineCounters counters; AcquisitionOfflineCounters completion_vector; - virtual void HW_WriteActionRegister(const ActionConfig *job) = 0; - virtual void HW_ReadActionRegister(ActionConfig *job) = 0; - virtual void HW_StartAction() = 0; - - virtual bool HW_IsIdle() const = 0; + virtual void HW_StartAction(const DiffractionExperiment& experiment) = 0; virtual void HW_SetCancelDataCollectionBit() = 0; - virtual void HW_GetStatus(ActionStatus *status) const = 0; - virtual void HW_GetEnvParams(ActionEnvParams *status) const { - memset(status, 0, sizeof(ActionEnvParams)); - } - virtual uint32_t HW_GetIPv4Address() const = 0; - virtual uint64_t HW_GetMACAddress() const = 0; virtual void HW_EndAction() {}; // do clean-up after action is done - virtual void CopyInternalPacketGenFrameToDeviceBuffer(); virtual void StartSendingWorkRequests() {}; protected: ThreadSafeFIFO work_completion_queue; ThreadSafeFIFO work_request_queue; std::vector buffer_device; - std::vector internal_pkt_gen_frame; uint16_t data_stream; Logger *logger; uint32_t max_modules = 1; - uint16_t data_collection_id = 0; explicit AcquisitionDevice(uint16_t data_stream); @@ -89,11 +72,7 @@ public: uint64_t GetBytesReceived() const; void SaveStatistics(const DiffractionExperiment &experiment, JFJochProtoBuf::AcquisitionDeviceStatistics &statistics) const; - JFJochProtoBuf::FPGAStatus GetStatus() const; - - // Internal frame generator - void SetCustomInternalGeneratorFrame(const std::vector &v); - const std::vector &GetInternalGeneratorFrame() const; + virtual JFJochProtoBuf::FPGAStatus GetStatus() const { return JFJochProtoBuf::FPGAStatus(); }; const int16_t *GetFrameBuffer(size_t frame_number, uint16_t module_number) const; @@ -116,14 +95,16 @@ public: uint32_t GetExptime(size_t curr_frame, uint16_t module_number) const; bool IsFullModuleCollected(size_t frame, uint8_t module_number) const; - ActionConfig ReadActionRegister(); bool IsDone() const; - std::string GetIPv4Address() const; - std::string GetMACAddress() const; + virtual std::string GetIPv4Address() const = 0; + virtual std::string GetMACAddress() const = 0; virtual uint16_t GetUDPPort() const; virtual int32_t GetNUMANode() const; - void SetFPGANonBlockingMode(bool input); + + virtual const std::vector GetInternalGeneratorFrame() const { + return {}; + } }; diff --git a/receiver/host/FPGAAcquisitionDevice.cpp b/receiver/host/FPGAAcquisitionDevice.cpp index 4e7ae9ec..586335ce 100644 --- a/receiver/host/FPGAAcquisitionDevice.cpp +++ b/receiver/host/FPGAAcquisitionDevice.cpp @@ -2,11 +2,8 @@ // SPDX-License-Identifier: GPL-3.0-or-later #include "FPGAAcquisitionDevice.h" - -void FPGAAcquisitionDevice::HW_StartAction() { - FPGA_StartAction(); - read_work_completion_future = std::async(std::launch::async, &FPGAAcquisitionDevice::ReadWorkCompletionThread, this); -} +#include +#include void FPGAAcquisitionDevice::StartSendingWorkRequests() { stop_work_requests = false; @@ -20,6 +17,9 @@ void FPGAAcquisitionDevice::HW_EndAction() { send_work_request_future.get(); FPGA_EndAction(); + + while (!HW_IsIdle()) + std::this_thread::sleep_for(std::chrono::milliseconds(1)); } void FPGAAcquisitionDevice::ReadWorkCompletionThread() { @@ -97,4 +97,160 @@ void FPGAAcquisitionDevice::InitializeCalibration(const DiffractionExperiment &e } } +} + + +void FPGAAcquisitionDevice::FillActionRegister(const DiffractionExperiment& x, ActionConfig &job) { + std::random_device rd; + std::uniform_int_distribution dist; + data_collection_id = dist(rd); + + job.nmodules = x.GetModulesNum(data_stream); + job.nframes = x.GetFrameNum(); + job.one_over_energy = std::lround((1<<20)/ x.GetPhotonEnergy_keV()); + job.nstorage_cells = x.GetStorageCellNumber() - 1; + job.mode = data_collection_id << 16; + + if (fpga_non_blocking_mode) + job.mode |= MODE_NONBLOCKING_ON_WR; + + if ((x.GetDetectorMode() == DetectorMode::Conversion) && x.GetConversionOnFPGA()) + job.mode |= MODE_CONV; + + if (x.IsUsingInternalPacketGen()) + job.mode |= MODE_INTERNAL_PACKET_GEN; +} + + +void FPGAAcquisitionDevice::HW_StartAction(const DiffractionExperiment &experiment) { + if (!HW_IsIdle()) + throw(JFJochException(JFJochExceptionCategory::AcquisitionDeviceError, + "Hardware action running prior to start of data acquisition")); + ActionConfig cfg_in{}, cfg_out{}; + + FillActionRegister(experiment, cfg_in); + HW_WriteActionRegister(&cfg_in); + HW_ReadActionRegister(&cfg_out); + + if (experiment.IsUsingInternalPacketGen()) + memcpy(buffer_device[0], internal_pkt_gen_frame.data(), RAW_MODULE_SIZE * sizeof(uint16_t)); + + if (cfg_out.mode != cfg_in.mode) + throw JFJochException(JFJochExceptionCategory::AcquisitionDeviceError, + "Mismatch between expected and actual values of configuration registers (mode)"); + if (cfg_out.nframes != cfg_in.nframes) + throw JFJochException(JFJochExceptionCategory::AcquisitionDeviceError, + "Mismatch between expected and actual values of configuration registers (Frames per trigger)"); + if (cfg_out.nmodules != cfg_in.nmodules) + throw JFJochException(JFJochExceptionCategory::AcquisitionDeviceError, + "Mismatch between expected and actual values of configuration registers (#modules)"); + + FPGA_StartAction(); + + read_work_completion_future = std::async(std::launch::async, &FPGAAcquisitionDevice::ReadWorkCompletionThread, this); +} + +ActionConfig FPGAAcquisitionDevice::ReadActionRegister() { + ActionConfig cfg{}; + HW_ReadActionRegister(&cfg); + return cfg; +} + +inline JFJochProtoBuf::FPGAFIFOStatus FIFO_check(uint32_t fifo_register, uint16_t pos_empty, uint16_t pos_full) { + if (std::bitset<32>(fifo_register).test(pos_empty)) + return JFJochProtoBuf::FPGAFIFOStatus::EMPTY; + if (std::bitset<32>(fifo_register).test(pos_full)) + return JFJochProtoBuf::FPGAFIFOStatus::FULL; + return JFJochProtoBuf::FPGAFIFOStatus::PARTIAL; +} + +JFJochProtoBuf::FPGAStatus FPGAAcquisitionDevice::GetStatus() const { + + ActionStatus status{}; + ActionEnvParams env{}; + + HW_GetStatus(&status); + HW_GetEnvParams(&env); + + JFJochProtoBuf::FPGAStatus ret; + auto full_status_register = status.ctrl_reg; + ret.set_full_status_register(full_status_register); + + ret.set_stalls_hbm(status.pipeline_stalls_hbm); + ret.set_stalls_host(status.pipeline_stalls_host); + + ret.set_max_modules(status.max_modules); + ret.set_git_sha1(status.git_sha1); + + (*ret.mutable_fifo_status())["Conversion input (data)"] = FIFO_check(status.fifo_status, 0, 1); + (*ret.mutable_fifo_status())["Conversion input (cmd)"] = FIFO_check(status.fifo_status, 2, 3); + (*ret.mutable_fifo_status())["UDP"] = FIFO_check(status.fifo_status, 6, 7); + (*ret.mutable_fifo_status())["Work Request"] = FIFO_check(status.fifo_status, 12, 13); + (*ret.mutable_fifo_status())["Work Completion"] = FIFO_check(status.fifo_status, 14, 15); + (*ret.mutable_fifo_status())["Host mem (data)"] = FIFO_check(status.fifo_status, 8, 9); + (*ret.mutable_fifo_status())["Host mem (cmd)"] = FIFO_check(status.fifo_status, 10, 11); + (*ret.mutable_fifo_status())["Data FIFO #8"] = FIFO_check(status.fifo_status, 16, 17); + (*ret.mutable_fifo_status())["Addr FIFO #3"] = FIFO_check(status.fifo_status, 18, 19); + + ret.set_fpga_idle(HW_IsIdle()); + + ret.set_packets_ether(status.packets_eth); + ret.set_packets_udp(status.packets_udp); + ret.set_packets_icmp(status.packets_icmp); + ret.set_packets_jfjoch(status.packets_processed); + ret.set_packets_sls(status.packets_sls); + ret.set_error_eth(status.udp_err_eth); + ret.set_error_packet_len(status.udp_err_len); + ret.set_cancel_bit(full_status_register & (1<<2)); + ret.set_host_writer_idle(full_status_register & (1<<4)); + ret.set_frame_statistics_alignment_err(full_status_register & (1 << 24)); + ret.set_frame_statistics_tlast_err(full_status_register & (1 << 25)); + ret.set_frame_statistics_work_req_err(full_status_register & (1 << 26)); + + ret.set_mailbox_status_reg(env.mailbox_status_reg); + ret.set_mailbox_err_reg(env.mailbox_err_reg); + + ret.set_fpga_temp_degc(env.fpga_temp_C); + + ret.set_current_edge_12v_a(static_cast(env.fpga_pcie_12V_I_mA) / 1000.0); + ret.set_voltage_edge_12v_v(static_cast(env.fpga_pcie_12V_V_mV) / 1000.0); + + ret.set_current_edge_3p3v_a(static_cast(env.fpga_pcie_3p3V_I_mA) / 1000.0); + ret.set_voltage_edge_3p3v_v(static_cast(env.fpga_pcie_3p3V_V_mV) / 1000.0); + + ret.set_pcie_c2h_beats(env.pcie_c2h_beats); + ret.set_pcie_h2c_beats(env.pcie_h2c_beats); + ret.set_pcie_c2h_descriptors(env.pcie_c2h_descriptors); + ret.set_pcie_h2c_descriptors(env.pcie_h2c_descriptors); + ret.set_pcie_c2h_status(env.pcie_c2h_status); + ret.set_pcie_h2c_status(env.pcie_h2c_status); + + ret.set_ethernet_rx_aligned(env.ethernet_aligned); + ret.set_hbm_temp_0_degc(env.hbm_0_temp_C); + ret.set_hbm_temp_1_degc(env.hbm_1_temp_C); + ret.set_slowest_head(GetSlowestHead()); + return ret; +} + +void FPGAAcquisitionDevice::SetFPGANonBlockingMode(bool input) { + fpga_non_blocking_mode = input; +} + +void FPGAAcquisitionDevice::SetCustomInternalGeneratorFrame(const std::vector &v) { + if (v.size() != RAW_MODULE_SIZE) + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, + "Error in size of custom internal generator frame"); + for (int i = 0; i < RAW_MODULE_SIZE; i++) + internal_pkt_gen_frame[i] = v[i]; +} + +const std::vector FPGAAcquisitionDevice::GetInternalGeneratorFrame() const { + return internal_pkt_gen_frame; +} + +FPGAAcquisitionDevice::FPGAAcquisitionDevice(uint16_t data_stream) +: AcquisitionDevice(data_stream), +internal_pkt_gen_frame(RAW_MODULE_SIZE) { + for (int i = 0; i < RAW_MODULE_SIZE; i++) + internal_pkt_gen_frame[i] = i % 65536; } \ No newline at end of file diff --git a/receiver/host/FPGAAcquisitionDevice.h b/receiver/host/FPGAAcquisitionDevice.h index e42568f4..32a79951 100644 --- a/receiver/host/FPGAAcquisitionDevice.h +++ b/receiver/host/FPGAAcquisitionDevice.h @@ -5,12 +5,17 @@ #define JUNGFRAUJOCH_FPGAACQUISITIONDEVICE_H #include "AcquisitionDevice.h" +#include "ActionConfig.h" class FPGAAcquisitionDevice : public AcquisitionDevice { virtual void FPGA_StartAction() = 0; virtual void FPGA_EndAction() = 0; - void HW_StartAction() final; + virtual void HW_WriteActionRegister(const ActionConfig *job) = 0; + virtual void HW_ReadActionRegister(ActionConfig *job) = 0; + virtual bool HW_IsIdle() const = 0; + void FillActionRegister(const DiffractionExperiment& x, ActionConfig& job); + void HW_EndAction() final; std::future read_work_completion_future; @@ -23,10 +28,24 @@ class FPGAAcquisitionDevice : public AcquisitionDevice { virtual bool HW_ReadMailbox(uint32_t values[16]) = 0; virtual bool HW_SendWorkRequest(uint32_t handle) = 0; void StartSendingWorkRequests() override; + void HW_StartAction(const DiffractionExperiment &experiment) override; + uint16_t data_collection_id = 0; + bool fpga_non_blocking_mode = true; + std::vector internal_pkt_gen_frame; protected: - explicit FPGAAcquisitionDevice(uint16_t data_stream) : AcquisitionDevice(data_stream) {} + explicit FPGAAcquisitionDevice(uint16_t data_stream); + virtual void HW_GetStatus(ActionStatus *status) const = 0; + virtual void HW_GetEnvParams(ActionEnvParams *status) const { + memset(status, 0, sizeof(ActionEnvParams)); + } public: + ActionConfig ReadActionRegister(); + JFJochProtoBuf::FPGAStatus GetStatus() const override; void InitializeCalibration(const DiffractionExperiment &experiment, const JFCalibration &calib) override; + + void SetFPGANonBlockingMode(bool input); + void SetCustomInternalGeneratorFrame(const std::vector &v); + const std::vector GetInternalGeneratorFrame() const override; }; diff --git a/receiver/host/HLSSimulatedDevice.cpp b/receiver/host/HLSSimulatedDevice.cpp index 7c55861a..e3bae085 100644 --- a/receiver/host/HLSSimulatedDevice.cpp +++ b/receiver/host/HLSSimulatedDevice.cpp @@ -6,6 +6,7 @@ #include #include #include "datamover_model.h" +#include "../common/NetworkAddressConvert.h" uint16_t checksum(const uint16_t *addr, size_t count) { /* Compute Internet Checksum for "count" bytes @@ -359,12 +360,12 @@ void HLSSimulatedDevice::HLSMainThread() { idle = true; } -uint32_t HLSSimulatedDevice::HW_GetIPv4Address() const { - return fpga_ipv4_addr; +std::string HLSSimulatedDevice::GetIPv4Address() const { + return IPv4AddressToStr(fpga_ipv4_addr); } -uint64_t HLSSimulatedDevice::HW_GetMACAddress() const { - return fpga_mac_addr; +std::string HLSSimulatedDevice::GetMACAddress() const { + return MacAddressToStr(fpga_mac_addr); } void HLSSimulatedDevice::HW_GetStatus(ActionStatus *status) const { diff --git a/receiver/host/HLSSimulatedDevice.h b/receiver/host/HLSSimulatedDevice.h index 3ff19f3e..5d84ea4a 100644 --- a/receiver/host/HLSSimulatedDevice.h +++ b/receiver/host/HLSSimulatedDevice.h @@ -47,8 +47,6 @@ class HLSSimulatedDevice : public FPGAAcquisitionDevice { bool HW_ReadMailbox(uint32_t values[16]); void HW_SetCancelDataCollectionBit() override; bool HW_SendWorkRequest(uint32_t handle) override; - uint64_t HW_GetMACAddress() const override; - uint32_t HW_GetIPv4Address() const override; void HW_GetStatus(ActionStatus *status) const override; void HLSMainThread() ; public: @@ -63,6 +61,9 @@ public: uint8_t user = 0); void CreateFinalPacket(const DiffractionExperiment& experiment); AXI_STREAM &OutputStream(); + + std::string GetMACAddress() const override; + std::string GetIPv4Address() const override; }; diff --git a/receiver/host/LinuxSocketDevice.cpp b/receiver/host/LinuxSocketDevice.cpp index bb6613d4..bfac2a84 100644 --- a/receiver/host/LinuxSocketDevice.cpp +++ b/receiver/host/LinuxSocketDevice.cpp @@ -9,8 +9,7 @@ #include #include "../common/JFJochException.h" - -#define MAX_MODULES 16 +#include "../../common/NetworkAddressConvert.h" LinuxSocketDevice::LinuxSocketDevice(uint32_t in_ipv4_addr, uint16_t in_udp_port, uint16_t data_stream, size_t in_frame_buffer_size_modules, @@ -57,16 +56,8 @@ void LinuxSocketDevice::MeasureThread(int fd) { idle = true; } -void LinuxSocketDevice::HW_WriteActionRegister(const ActionConfig *job) { - memcpy(&cfg, job, sizeof(ActionConfig)); -} - -void LinuxSocketDevice::HW_ReadActionRegister(ActionConfig *job) { - memcpy(job, &cfg, sizeof(ActionConfig)); -} - -void LinuxSocketDevice::HW_StartAction() { - if (cfg.mode & MODE_CONV) +void LinuxSocketDevice::HW_StartAction(const DiffractionExperiment& experiment) { + if (experiment.GetConversionOnFPGA()) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Conversion on CPU flag has to be enabled for Raw Ethernet device"); @@ -101,27 +92,16 @@ void LinuxSocketDevice::HW_StartAction() { measure = std::async(std::launch::async, &LinuxSocketDevice::MeasureThread, this, fd); } -bool LinuxSocketDevice::HW_IsIdle() const { - return idle; -} - void LinuxSocketDevice::HW_SetCancelDataCollectionBit() { cancel = true; } -void LinuxSocketDevice::HW_GetStatus(ActionStatus *status) const { - memset(status, 0, sizeof(ActionStatus)); - - status->modules_internal_packet_generator = 1; - status->max_modules = max_modules; +std::string LinuxSocketDevice::GetMACAddress() const { + return MacAddressToStr(mac_addr); } -uint64_t LinuxSocketDevice::HW_GetMACAddress() const { - return mac_addr; -} - -uint32_t LinuxSocketDevice::HW_GetIPv4Address() const { - return ipv4_addr; +std::string LinuxSocketDevice::GetIPv4Address() const { + return IPv4AddressToStr(ipv4_addr); } void LinuxSocketDevice::HW_EndAction() { @@ -129,10 +109,6 @@ void LinuxSocketDevice::HW_EndAction() { measure.get(); } -void LinuxSocketDevice::CopyInternalPacketGenFrameToDeviceBuffer() { - // Do nothing -} - int32_t LinuxSocketDevice::GetNUMANode() const { return numa_node; } diff --git a/receiver/host/LinuxSocketDevice.h b/receiver/host/LinuxSocketDevice.h index b5da5ee3..37b35d3e 100644 --- a/receiver/host/LinuxSocketDevice.h +++ b/receiver/host/LinuxSocketDevice.h @@ -14,7 +14,6 @@ class LinuxSocketDevice : public AcquisitionDevice { uint64_t mac_addr; uint32_t ipv4_addr; uint16_t udp_port; - ActionConfig cfg; const int16_t numa_node; std::future measure; @@ -22,16 +21,11 @@ class LinuxSocketDevice : public AcquisitionDevice { volatile bool cancel = false; volatile bool idle = true; - void HW_WriteActionRegister(const ActionConfig *job) override; - void HW_ReadActionRegister(ActionConfig *job) override; - void HW_StartAction() override; - bool HW_IsIdle() const override; + void HW_StartAction(const DiffractionExperiment& experiment) override; + void HW_SetCancelDataCollectionBit() override; - void HW_GetStatus(ActionStatus *status) const override; - uint64_t HW_GetMACAddress() const override; - uint32_t HW_GetIPv4Address() const override; + void HW_EndAction() override; - void CopyInternalPacketGenFrameToDeviceBuffer() override; void MeasureThread(int fd); void FindMACAddress(); public: @@ -42,6 +36,8 @@ public: int32_t GetNUMANode() const override; uint16_t GetUDPPort() const override; + std::string GetMACAddress() const override; + std::string GetIPv4Address() const override; }; diff --git a/receiver/host/MlxRawEthDevice.cpp b/receiver/host/MlxRawEthDevice.cpp index bec27014..616429a2 100644 --- a/receiver/host/MlxRawEthDevice.cpp +++ b/receiver/host/MlxRawEthDevice.cpp @@ -3,6 +3,7 @@ #ifdef JFJOCH_USE_IBVERBS #include "MlxRawEthDevice.h" +#include "../../common/NetworkAddressConvert.h" #include @@ -25,14 +26,6 @@ int32_t MlxRawEthDevice::GetNUMANode() const { return numa_node; } -void MlxRawEthDevice::HW_WriteActionRegister(const ActionConfig *job) { - memcpy(&cfg, job, sizeof(ActionConfig)); -} - -void MlxRawEthDevice::HW_ReadActionRegister(ActionConfig *job) { - memcpy(job, &cfg, sizeof(ActionConfig)); -} - void MlxRawEthDevice::MeasureThread() { uint64_t packet_count = 0; @@ -46,7 +39,7 @@ void MlxRawEthDevice::MeasureThread() { IBCompletionQueue cq(context, BUFFER_COUNT+2); IBQueuePair qp(pd, cq, 16, BUFFER_COUNT); IBRegBuffer buffer(pd, BUFFER_COUNT, BUFFER_SIZE, numa_node); - ProcessJFPacket process(work_completion_queue, work_request_queue, cfg.nmodules); + ProcessJFPacket process(work_completion_queue, work_request_queue, max_modules); qp.Init(); qp.ReadyToReceive(); @@ -85,8 +78,8 @@ void MlxRawEthDevice::MeasureThread() { idle = true; } -void MlxRawEthDevice::HW_StartAction() { - if (cfg.mode & MODE_CONV) +void MlxRawEthDevice::HW_StartAction(const DiffractionExperiment& experiment) { + if (experiment.GetConversionOnFPGA()) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Conversion on CPU flag has to be enabled for Raw Ethernet device"); @@ -95,30 +88,15 @@ void MlxRawEthDevice::HW_StartAction() { measure = std::async(std::launch::async, &MlxRawEthDevice::MeasureThread, this); } -bool MlxRawEthDevice::HW_IsIdle() const { - return idle; -} - void MlxRawEthDevice::HW_SetCancelDataCollectionBit() { cancel = true; } -void MlxRawEthDevice::HW_GetStatus(ActionStatus *status) const { - memset(status, 0, sizeof(ActionStatus)); - - status->modules_internal_packet_generator = 1; - status->max_modules = max_modules; -} - void MlxRawEthDevice::HW_EndAction() { if (measure.valid()) measure.get(); } -void MlxRawEthDevice::CopyInternalPacketGenFrameToDeviceBuffer() { - // Do nothing -} - void MlxRawEthDevice::SetMACAddress(uint64_t mac_addr_network_order) { mac_addr = mac_addr_network_order; } @@ -127,12 +105,12 @@ void MlxRawEthDevice::SetIPv4Address(uint32_t ipv4_addr_network_order) { ipv4_addr = ipv4_addr_network_order; } -uint64_t MlxRawEthDevice::HW_GetMACAddress() const { - return mac_addr; +std::string MlxRawEthDevice::GetMACAddress() const { + return MacAddressToStr(mac_addr); } -uint32_t MlxRawEthDevice::HW_GetIPv4Address() const { - return ipv4_addr; +std::string MlxRawEthDevice::GetIPv4Address() const { + return IPv4AddressToStr(ipv4_addr); } uint64_t MlxRawEthDevice::PollCQ(IBRegBuffer &buffer, IBQueuePair &qp, IBCompletionQueue &cq, ProcessJFPacket &process) { @@ -210,4 +188,5 @@ void MlxRawEthDevice::SendARP(IBRegBuffer &buffer, IBQueuePair &qp) { } } + #endif //JFJOCH_USE_IBVERBS \ No newline at end of file diff --git a/receiver/host/MlxRawEthDevice.h b/receiver/host/MlxRawEthDevice.h index e626ba0c..b3eb79d4 100644 --- a/receiver/host/MlxRawEthDevice.h +++ b/receiver/host/MlxRawEthDevice.h @@ -21,7 +21,7 @@ class MlxRawEthDevice : public AcquisitionDevice { IBContext context; uint64_t mac_addr; uint32_t ipv4_addr; - ActionConfig cfg; + const int16_t numa_node; std::future measure; @@ -37,16 +37,9 @@ class MlxRawEthDevice : public AcquisitionDevice { ProcessJFPacket &process); void MeasureThread(); - void HW_WriteActionRegister(const ActionConfig *job) override; - void HW_ReadActionRegister(ActionConfig *job) override; - void HW_StartAction() override; - bool HW_IsIdle() const override; + void HW_StartAction(const DiffractionExperiment& experiment) override; void HW_SetCancelDataCollectionBit() override; - void HW_GetStatus(ActionStatus *status) const override; - uint64_t HW_GetMACAddress() const override; - uint32_t HW_GetIPv4Address() const override; void HW_EndAction() override; - void CopyInternalPacketGenFrameToDeviceBuffer() override; public: MlxRawEthDevice(uint16_t dev_id, uint16_t data_stream, size_t in_frame_buffer_size_modules, int16_t numa_node = -1); @@ -54,6 +47,8 @@ public: int32_t GetNUMANode() const override; void SetMACAddress(uint64_t mac_addr_network_order); void SetIPv4Address(uint32_t ipv4_addr_network_order); + std::string GetMACAddress() const override; + std::string GetIPv4Address() const override; }; #endif //JUNGFRAUJOCH_RAWETHDEVICE_H diff --git a/receiver/host/MockAcquisitionDevice.cpp b/receiver/host/MockAcquisitionDevice.cpp index d15757a4..09bc9483 100644 --- a/receiver/host/MockAcquisitionDevice.cpp +++ b/receiver/host/MockAcquisitionDevice.cpp @@ -5,15 +5,7 @@ #include "../../common/JFJochException.h" #include -void MockAcquisitionDevice::HW_ReadActionRegister(ActionConfig *job) { - memcpy(job, &cfg, sizeof(ActionConfig)); -} - -void MockAcquisitionDevice::HW_WriteActionRegister(const ActionConfig *job) { - memcpy(&cfg, job, sizeof(ActionConfig)); -} - -void MockAcquisitionDevice::HW_StartAction() { +void MockAcquisitionDevice::HW_StartAction(const DiffractionExperiment& experiment) { idle = false; } @@ -25,10 +17,6 @@ void MockAcquisitionDevice::HW_SetCancelDataCollectionBit() { } } -bool MockAcquisitionDevice::HW_IsIdle() const { - return true; -} - MockAcquisitionDevice::MockAcquisitionDevice(uint16_t data_stream, size_t in_frame_buffer_size_modules) : AcquisitionDevice(data_stream) { max_modules = 16; @@ -72,18 +60,11 @@ void MockAcquisitionDevice::Terminate() { idle = true; } -uint64_t MockAcquisitionDevice::HW_GetMACAddress() const { - return 0; // Doesn't matter +std::string MockAcquisitionDevice::GetMACAddress() const { + return "00:00:00:00:00:00"; } -uint32_t MockAcquisitionDevice::HW_GetIPv4Address() const { - return 0; +std::string MockAcquisitionDevice::GetIPv4Address() const { + return "127.0.0.1"; } -void MockAcquisitionDevice::HW_GetStatus(ActionStatus *status) const { - memset(status, 0, sizeof(ActionStatus)); - status->max_modules = max_modules; - status->modules_internal_packet_generator = 1; -} - -void MockAcquisitionDevice::CopyInternalPacketGenFrameToDeviceBuffer() {} diff --git a/receiver/host/MockAcquisitionDevice.h b/receiver/host/MockAcquisitionDevice.h index 61b10486..1274c78e 100644 --- a/receiver/host/MockAcquisitionDevice.h +++ b/receiver/host/MockAcquisitionDevice.h @@ -10,26 +10,19 @@ class MockAcquisitionDevice : public AcquisitionDevice { uint32_t current_handle = 0; uint32_t max_handle = 0; - ActionConfig cfg; bool idle = true; void SendCompletion(uint32_t handle, uint16_t module_number, uint64_t frame_number); - constexpr static const uint32_t frames_int_pkt_gen = 1; - void HW_ReadActionRegister(ActionConfig *job) override; - void HW_WriteActionRegister(const ActionConfig *job) override; - void HW_StartAction() override; + void HW_StartAction(const DiffractionExperiment& experiment) override; void HW_SetCancelDataCollectionBit() override; - bool HW_IsIdle() const override; - uint64_t HW_GetMACAddress() const override; - uint32_t HW_GetIPv4Address() const override; - void HW_GetStatus(ActionStatus *status) const override; - void CopyInternalPacketGenFrameToDeviceBuffer() override; public: MockAcquisitionDevice(uint16_t data_stream, size_t in_frame_buffer_size_modules); void AddModule(uint64_t frame, uint16_t module_number, const uint16_t *data); void Terminate(); + std::string GetMACAddress() const override; + std::string GetIPv4Address() const override; }; #endif //JUNGFRAUJOCH_MOCKACQUISITIONDEVICE_H diff --git a/receiver/host/PCIExpressDevice.cpp b/receiver/host/PCIExpressDevice.cpp index fd5c6249..1fb53d93 100644 --- a/receiver/host/PCIExpressDevice.cpp +++ b/receiver/host/PCIExpressDevice.cpp @@ -125,12 +125,12 @@ void PCIExpressDevice::HW_ReadActionRegister(ActionConfig *config) { "Failed reading config", errno); } -uint64_t PCIExpressDevice::HW_GetMACAddress() const { +std::string PCIExpressDevice::GetMACAddress() const { uint64_t tmp; if (ioctl(fd, IOCTL_JFJOCH_GET_MAC, &tmp) != 0) throw JFJochException(JFJochExceptionCategory::PCIeError, "Failed getting MAC address", errno); - return tmp; + return MacAddressToStr(tmp); } void PCIExpressDevice::SetMACAddress(uint64_t mac_addr_network_order) { @@ -195,10 +195,10 @@ void PCIExpressDevice::SetIPv4Address(uint32_t ipv4_addr_network_order) { "Failed setting IPv4 address", errno); } -uint32_t PCIExpressDevice::HW_GetIPv4Address() const { +std::string PCIExpressDevice::GetIPv4Address() const { uint32_t tmp; if (ioctl(fd, IOCTL_JFJOCH_GET_IPV4, &tmp) != 0) throw JFJochException(JFJochExceptionCategory::PCIeError, "Failed getting MAC address", errno); - return tmp; + return IPv4AddressToStr(tmp); } diff --git a/receiver/host/PCIExpressDevice.h b/receiver/host/PCIExpressDevice.h index 883241ea..3df37380 100644 --- a/receiver/host/PCIExpressDevice.h +++ b/receiver/host/PCIExpressDevice.h @@ -15,8 +15,6 @@ class PCIExpressDevice : public FPGAAcquisitionDevice { bool HW_IsIdle() const final; void HW_WriteActionRegister(const ActionConfig *job) override; void HW_ReadActionRegister(ActionConfig *job) override; - uint64_t HW_GetMACAddress() const override; - uint32_t HW_GetIPv4Address() const override; void FPGA_EndAction() override; void Reset(); @@ -40,6 +38,9 @@ public: void SetMACAddress(uint64_t mac_addr_network_order); void SetDefaultMAC() const; void SetIPv4Address(uint32_t ipv4_addr_network_order); + + std::string GetMACAddress() const override; + std::string GetIPv4Address() const override; }; diff --git a/receiver/jfjoch_action_test.cpp b/receiver/jfjoch_action_test.cpp index 9fe7c162..1a843298 100644 --- a/receiver/jfjoch_action_test.cpp +++ b/receiver/jfjoch_action_test.cpp @@ -55,7 +55,7 @@ int main(int argc, char **argv) { exit(EXIT_FAILURE); } - std::vector> oc_devices; + std::vector> pcie_devices; std::vector aq_devices; std::string image_path = std::string(argv[1]) + "/tests/test_data/mod5_raw0.bin"; @@ -63,17 +63,16 @@ int main(int argc, char **argv) { LoadBinaryFile(image_path, input.data(), RAW_MODULE_SIZE); for (int i = 0; i < nstreams; i++) { - oc_devices.push_back(std::make_unique(dev_name[i], i)); - oc_devices[i]->SetCustomInternalGeneratorFrame(input); - oc_devices[i]->EnableLogging(&logger); - oc_devices[i]->SetFPGANonBlockingMode(nonblocking_mode); - aq_devices.push_back(oc_devices[i].get()); + pcie_devices.push_back(std::make_unique(dev_name[i], i)); + pcie_devices[i]->SetCustomInternalGeneratorFrame(input); + pcie_devices[i]->EnableLogging(&logger); + pcie_devices[i]->SetFPGANonBlockingMode(nonblocking_mode); + aq_devices.push_back(pcie_devices[i].get()); } if (!nonblocking_mode) logger.Warning("FPGA uses blocking mode - in case data acquisition is aborted, it is necessary to cold reboot the machine"); - volatile bool done = false; JFJochProtoBuf::ReceiverOutput output; bool ret; @@ -90,7 +89,7 @@ int main(int argc, char **argv) { if (print_status_updates) { while (!done) { for (int i = 0; i < nstreams; i++) { - auto status = oc_devices[i]->GetStatus(); + auto status = pcie_devices[i]->GetStatus(); logger.Info("Device {}: Head packet: {:8d} Power: {:5.1f} W FPGA Temp: {:d} degC HBM Temp: {:d}/{:d} degC Stalls: {:15d}", i, status.slowest_head(), status.current_edge_12v_a() * status.voltage_edge_12v_v() + status.current_edge_3p3v_a() * status.voltage_edge_3p3v_v(), diff --git a/receiver/jfjoch_receiver.cpp b/receiver/jfjoch_receiver.cpp index d50c7a33..89ef352c 100644 --- a/receiver/jfjoch_receiver.cpp +++ b/receiver/jfjoch_receiver.cpp @@ -48,6 +48,14 @@ AcquisitionDevice *SetupAcquisitionDevice(const nlohmann::json &input, uint16_t pci_dev->SetMACAddress(MacAddressFromStr(input["mac_addr"].get())); else pci_dev->SetDefaultMAC(); + + if (input.contains("custom_test_frame")) { + std::vector tmp(RAW_MODULE_SIZE); + auto filename = input["custom_test_frame"].get(); + std::fstream file(filename.c_str(), std::fstream::in | std::fstream::binary); + file.read((char *) tmp.data(),RAW_MODULE_SIZE * sizeof(uint16_t)); + pci_dev->SetCustomInternalGeneratorFrame(tmp); + } ret = pci_dev; #ifdef JFJOCH_USE_IBVERBS } else if (input.contains("type") && (input["type"] == "mlx_raw_eth")) { @@ -59,14 +67,6 @@ AcquisitionDevice *SetupAcquisitionDevice(const nlohmann::json &input, uint16_t #endif else throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Unsupported device type"); - if (input.contains("custom_test_frame")) { - std::vector tmp(RAW_MODULE_SIZE); - auto filename = input["custom_test_frame"].get(); - std::fstream file(filename.c_str(), std::fstream::in | std::fstream::binary); - file.read((char *) tmp.data(),RAW_MODULE_SIZE * sizeof(uint16_t)); - ret->SetCustomInternalGeneratorFrame(tmp); - } - return ret; } diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index c7586726..99e3ee84 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -77,6 +77,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_custom_frame", "[FPGA][Ful HLSSimulatedDevice test(0, 64); test.SetCustomInternalGeneratorFrame(test_frame); + test.SetFPGANonBlockingMode(true); REQUIRE_NOTHROW(test.StartAction(x)); REQUIRE_NOTHROW(test.WaitForActionComplete()); From ab6f33be84bd7b1eeb8521329b777fb3a6874ba2 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 3 Jun 2023 18:54:05 +0200 Subject: [PATCH 042/224] AcquisitionDevice: further simplify --- receiver/JFJochReceiver.cpp | 6 ++-- receiver/host/AcquisitionDevice.cpp | 22 ++++++++----- receiver/host/AcquisitionDevice.h | 16 +++++---- receiver/host/AcquisitionOnlineCounters.h | 3 +- receiver/host/FPGAAcquisitionDevice.cpp | 6 ++-- receiver/host/FPGAAcquisitionDevice.h | 14 ++++---- receiver/host/HLSSimulatedDevice.cpp | 33 ++++++++----------- receiver/host/HLSSimulatedDevice.h | 7 +--- receiver/host/LinuxSocketDevice.cpp | 17 +++------- receiver/host/LinuxSocketDevice.h | 13 ++------ receiver/host/MlxRawEthDevice.cpp | 14 ++------ receiver/host/MlxRawEthDevice.h | 10 ++---- receiver/host/MockAcquisitionDevice.cpp | 4 +-- receiver/host/MockAcquisitionDevice.h | 5 ++- receiver/host/PCIExpressDevice.cpp | 2 +- receiver/host/PCIExpressDevice.h | 2 +- .../jfjoch_pcie_cancel_data_collection.cpp | 2 +- tests/FPGAIntegrationTest.cpp | 4 +-- 18 files changed, 74 insertions(+), 106 deletions(-) diff --git a/receiver/JFJochReceiver.cpp b/receiver/JFJochReceiver.cpp index e6b29941..4cc0fd50 100644 --- a/receiver/JFJochReceiver.cpp +++ b/receiver/JFJochReceiver.cpp @@ -565,7 +565,7 @@ void JFJochReceiver::Cancel() { cancelled = true; for (int d = 0; d < ndatastreams; d++) - acquisition_device[d]->ActionAbort(); + acquisition_device[d]->Cancel(); } void JFJochReceiver::Cancel(const JFJochException &e) { @@ -575,7 +575,7 @@ void JFJochReceiver::Cancel(const JFJochException &e) { cancelled = true; for (int d = 0; d < ndatastreams; d++) - acquisition_device[d]->ActionAbort(); + acquisition_device[d]->Cancel(); } float JFJochReceiver::GetIndexingRate() const { @@ -628,7 +628,7 @@ void JFJochReceiver::FinalizeMeasurement() { preview_publisher_indexed->Stop(experiment); for (int d = 0; d < ndatastreams; d++) - acquisition_device[d]->ActionAbort(); + acquisition_device[d]->Cancel(); end_time = std::chrono::system_clock::now(); diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index 9736a892..24b0c378 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -56,7 +56,7 @@ void AcquisitionDevice::PrepareAction(const DiffractionExperiment &experiment) { } void AcquisitionDevice::StartAction(const DiffractionExperiment &experiment) { - HW_SetCancelDataCollectionBit(); + Cancel(); if (experiment.GetModulesNum(data_stream) > max_modules) throw(JFJochException(JFJochExceptionCategory::InputParameterAboveMax, @@ -76,7 +76,7 @@ void AcquisitionDevice::StartAction(const DiffractionExperiment &experiment) { // Ensure internal WR queue is empty work_request_queue.Clear(); - HW_StartAction(experiment); + Start(experiment); for (uint32_t i = 0; i < buffer_device.size(); i++) SendWorkRequest(i); @@ -106,7 +106,7 @@ void AcquisitionDevice::WaitForActionComplete() { while (c.type != Completion::Type::End) { if (c.frame_number >= expected_frames) { - HW_SetCancelDataCollectionBit(); + Cancel(); // this frame is not of any interest, therefore its location can be immediately released SendWorkRequest(c.handle); } else { @@ -128,8 +128,8 @@ void AcquisitionDevice::WaitForActionComplete() { counters.SetAcquisitionFinished(); end_time = std::chrono::system_clock::now(); - HW_SetCancelDataCollectionBit(); - HW_EndAction(); + Cancel(); + Finalize(); } void AcquisitionDevice::SendWorkRequest(uint32_t handle) { @@ -166,10 +166,6 @@ bool AcquisitionDevice::IsDone() const { return counters.IsAcquisitionFinished(); } -void AcquisitionDevice::ActionAbort() { - HW_SetCancelDataCollectionBit(); -} - const int16_t *AcquisitionDevice::GetFrameBuffer(size_t frame_number, uint16_t module_number) const { auto handle = GetBufferHandle(frame_number, module_number); if (handle != HandleNotValid) @@ -239,3 +235,11 @@ uint32_t AcquisitionDevice::GetExptime(size_t curr_frame, uint16_t module_number uint64_t AcquisitionDevice::GetTimestamp(size_t curr_frame, uint16_t module_number) const { return counters.GetTimestamp(curr_frame, module_number); } + +std::string AcquisitionDevice::GetIPv4Address() const { + return IPv4AddressToStr(ipv4_addr); +} + +std::string AcquisitionDevice::GetMACAddress() const { + return MacAddressToStr(mac_addr); +} diff --git a/receiver/host/AcquisitionDevice.h b/receiver/host/AcquisitionDevice.h index 6a1a244c..037e759a 100644 --- a/receiver/host/AcquisitionDevice.h +++ b/receiver/host/AcquisitionDevice.h @@ -36,9 +36,8 @@ class AcquisitionDevice { AcquisitionOnlineCounters counters; AcquisitionOfflineCounters completion_vector; - virtual void HW_StartAction(const DiffractionExperiment& experiment) = 0; - virtual void HW_SetCancelDataCollectionBit() = 0; - virtual void HW_EndAction() {}; // do clean-up after action is done + virtual void Start(const DiffractionExperiment& experiment) = 0; + virtual void Finalize() {}; // do clean-up after action is done virtual void StartSendingWorkRequests() {}; protected: ThreadSafeFIFO work_completion_queue; @@ -50,6 +49,9 @@ protected: Logger *logger; uint32_t max_modules = 1; + uint64_t mac_addr; + uint32_t ipv4_addr; + explicit AcquisitionDevice(uint16_t data_stream); void UnmapBuffers(); @@ -63,7 +65,7 @@ public: void PrepareAction(const DiffractionExperiment &experiment); void WaitForActionComplete(); - void ActionAbort(); + virtual void Cancel() = 0; void SendWorkRequest(uint32_t handle); void EnableLogging(Logger *logger); @@ -97,12 +99,12 @@ public: bool IsFullModuleCollected(size_t frame, uint8_t module_number) const; bool IsDone() const; - virtual std::string GetIPv4Address() const = 0; - virtual std::string GetMACAddress() const = 0; + virtual std::string GetIPv4Address() const; + virtual std::string GetMACAddress() const; virtual uint16_t GetUDPPort() const; virtual int32_t GetNUMANode() const; - virtual const std::vector GetInternalGeneratorFrame() const { + virtual std::vector GetInternalGeneratorFrame() const { return {}; } }; diff --git a/receiver/host/AcquisitionOnlineCounters.h b/receiver/host/AcquisitionOnlineCounters.h index fd8ac11c..3c2f5374 100644 --- a/receiver/host/AcquisitionOnlineCounters.h +++ b/receiver/host/AcquisitionOnlineCounters.h @@ -43,13 +43,14 @@ public: void UpdateCounters(const Completion *c); void SetAcquisitionFinished(); + uint64_t GetBufferHandleAndClear(size_t frame, uint16_t module_number); + uint64_t GetHead(uint16_t module_number) const; uint64_t GetSlowestHead() const; void WaitForFrame(size_t curr_frame, uint16_t module_number = UINT16_MAX) const; int64_t CalculateDelay(size_t curr_frame, uint16_t module_number = UINT16_MAX) const; // mutex acquired indirectly uint64_t GetBufferHandle(size_t frame, uint16_t module_number) const; - uint64_t GetBufferHandleAndClear(size_t frame, uint16_t module_number); bool IsFullModuleCollected(size_t frame, uint16_t module_number) const; bool IsAcquisitionFinished() const; diff --git a/receiver/host/FPGAAcquisitionDevice.cpp b/receiver/host/FPGAAcquisitionDevice.cpp index 586335ce..fd586df1 100644 --- a/receiver/host/FPGAAcquisitionDevice.cpp +++ b/receiver/host/FPGAAcquisitionDevice.cpp @@ -10,7 +10,7 @@ void FPGAAcquisitionDevice::StartSendingWorkRequests() { send_work_request_future = std::async(std::launch::async, &FPGAAcquisitionDevice::SendWorkRequestThread, this); } -void FPGAAcquisitionDevice::HW_EndAction() { +void FPGAAcquisitionDevice::Finalize() { read_work_completion_future.get(); stop_work_requests = true; @@ -122,7 +122,7 @@ void FPGAAcquisitionDevice::FillActionRegister(const DiffractionExperiment& x, A } -void FPGAAcquisitionDevice::HW_StartAction(const DiffractionExperiment &experiment) { +void FPGAAcquisitionDevice::Start(const DiffractionExperiment &experiment) { if (!HW_IsIdle()) throw(JFJochException(JFJochExceptionCategory::AcquisitionDeviceError, "Hardware action running prior to start of data acquisition")); @@ -244,7 +244,7 @@ void FPGAAcquisitionDevice::SetCustomInternalGeneratorFrame(const std::vector FPGAAcquisitionDevice::GetInternalGeneratorFrame() const { +std::vector FPGAAcquisitionDevice::GetInternalGeneratorFrame() const { return internal_pkt_gen_frame; } diff --git a/receiver/host/FPGAAcquisitionDevice.h b/receiver/host/FPGAAcquisitionDevice.h index 32a79951..928626a5 100644 --- a/receiver/host/FPGAAcquisitionDevice.h +++ b/receiver/host/FPGAAcquisitionDevice.h @@ -8,6 +8,10 @@ #include "ActionConfig.h" class FPGAAcquisitionDevice : public AcquisitionDevice { + uint16_t data_collection_id = 0; + bool fpga_non_blocking_mode = true; + std::vector internal_pkt_gen_frame; + virtual void FPGA_StartAction() = 0; virtual void FPGA_EndAction() = 0; @@ -16,7 +20,7 @@ class FPGAAcquisitionDevice : public AcquisitionDevice { virtual bool HW_IsIdle() const = 0; void FillActionRegister(const DiffractionExperiment& x, ActionConfig& job); - void HW_EndAction() final; + void Finalize() final; std::future read_work_completion_future; void ReadWorkCompletionThread(); @@ -28,10 +32,7 @@ class FPGAAcquisitionDevice : public AcquisitionDevice { virtual bool HW_ReadMailbox(uint32_t values[16]) = 0; virtual bool HW_SendWorkRequest(uint32_t handle) = 0; void StartSendingWorkRequests() override; - void HW_StartAction(const DiffractionExperiment &experiment) override; - uint16_t data_collection_id = 0; - bool fpga_non_blocking_mode = true; - std::vector internal_pkt_gen_frame; + void Start(const DiffractionExperiment &experiment) override; protected: explicit FPGAAcquisitionDevice(uint16_t data_stream); virtual void HW_GetStatus(ActionStatus *status) const = 0; @@ -45,8 +46,7 @@ public: void SetFPGANonBlockingMode(bool input); void SetCustomInternalGeneratorFrame(const std::vector &v); - const std::vector GetInternalGeneratorFrame() const override; + std::vector GetInternalGeneratorFrame() const override; }; - #endif //JUNGFRAUJOCH_FPGAACQUISITIONDEVICE_H diff --git a/receiver/host/HLSSimulatedDevice.cpp b/receiver/host/HLSSimulatedDevice.cpp index e3bae085..53e2bdc1 100644 --- a/receiver/host/HLSSimulatedDevice.cpp +++ b/receiver/host/HLSSimulatedDevice.cpp @@ -6,7 +6,6 @@ #include #include #include "datamover_model.h" -#include "../common/NetworkAddressConvert.h" uint16_t checksum(const uint16_t *addr, size_t count) { /* Compute Internet Checksum for "count" bytes @@ -33,6 +32,8 @@ HLSSimulatedDevice::HLSSimulatedDevice(uint16_t data_stream, size_t in_frame_buf datamover_in(Direction::Input), datamover_out(Direction::Output, nullptr, 256), idle(true) { + mac_addr = 0xCCAA11223344; + ipv4_addr = 0x0132010A; max_modules = MAX_MODULES_FPGA; @@ -80,7 +81,7 @@ void HLSSimulatedDevice::CreatePacketJF(const DiffractionExperiment& experiment, packet->ether_type = htons(0x0800); packet->sour_mac[0] = 0x00; // module 0 - uint64_t tmp_mac = fpga_mac_addr; + uint64_t tmp_mac = mac_addr; for (int i = 0; i < 6; i++) packet->dest_mac[i] = (tmp_mac >> (8*i)) % 256; @@ -88,7 +89,7 @@ void HLSSimulatedDevice::CreatePacketJF(const DiffractionExperiment& experiment, packet->ipv4_header_h = htons(0x4500); // Big endian in IP header! packet->ipv4_header_total_length = htons(8268); // Big endian in IP header! - packet->ipv4_header_dest_ip = fpga_ipv4_addr; + packet->ipv4_header_dest_ip = ipv4_addr; packet->ipv4_header_sour_ip = experiment.GetSrcIPv4Address(data_stream, half_module); packet->ipv4_header_ttl_protocol = htons(0x0011); @@ -166,7 +167,7 @@ bool HLSSimulatedDevice::HW_ReadMailbox(uint32_t values[16]) { return true; } -void HLSSimulatedDevice::HW_SetCancelDataCollectionBit() { +void HLSSimulatedDevice::Cancel() { cancel_data_collection = 1; } @@ -229,30 +230,30 @@ void HLSSimulatedDevice::HLSMainThread() { std::vector> d_uram_p1(MAX_MODULES_FPGA * RAW_MODULE_SIZE / 32); while(!din_eth.empty()) - ethernet(din_eth, ip1, arp1, fpga_mac_addr, eth_packets, clear_counters); + ethernet(din_eth, ip1, arp1, mac_addr, eth_packets, clear_counters); while(!ip1.empty()) - ipv4(ip1, udp1, icmp1, fpga_ipv4_addr); + ipv4(ip1, udp1, icmp1, ipv4_addr); arp(arp1, dout_eth, - fpga_mac_addr, - fpga_ipv4_addr, + mac_addr, + ipv4_addr, 1, run_data_collection); while (!arp1.empty()) { arp(arp1, dout_eth, - fpga_mac_addr, - fpga_ipv4_addr, + mac_addr, + ipv4_addr, 1, run_data_collection); } // reset static counter arp(arp1, dout_eth, - fpga_mac_addr, - fpga_ipv4_addr, + mac_addr, + ipv4_addr, 0, run_data_collection); while(!icmp1.empty()) @@ -360,14 +361,6 @@ void HLSSimulatedDevice::HLSMainThread() { idle = true; } -std::string HLSSimulatedDevice::GetIPv4Address() const { - return IPv4AddressToStr(fpga_ipv4_addr); -} - -std::string HLSSimulatedDevice::GetMACAddress() const { - return MacAddressToStr(fpga_mac_addr); -} - void HLSSimulatedDevice::HW_GetStatus(ActionStatus *status) const { memset(status, 0, sizeof(ActionStatus)); diff --git a/receiver/host/HLSSimulatedDevice.h b/receiver/host/HLSSimulatedDevice.h index 5d84ea4a..d44b8ac7 100644 --- a/receiver/host/HLSSimulatedDevice.h +++ b/receiver/host/HLSSimulatedDevice.h @@ -35,8 +35,6 @@ class HLSSimulatedDevice : public FPGAAcquisitionDevice { volatile ap_uint<1> host_writer_idle; uint64_t in_mem_location[LOAD_CALIBRATION_BRAM_SIZE]; - static const uint64_t fpga_mac_addr = 0xCCAA11223344; - static const uint32_t fpga_ipv4_addr = 0x0132010A; void HW_ReadActionRegister(ActionConfig *job) override; void HW_WriteActionRegister(const ActionConfig *job) override; @@ -45,7 +43,6 @@ class HLSSimulatedDevice : public FPGAAcquisitionDevice { void FPGA_EndAction() override; bool HW_IsIdle() const override; bool HW_ReadMailbox(uint32_t values[16]); - void HW_SetCancelDataCollectionBit() override; bool HW_SendWorkRequest(uint32_t handle) override; void HW_GetStatus(ActionStatus *status) const override; void HLSMainThread() ; @@ -61,9 +58,7 @@ public: uint8_t user = 0); void CreateFinalPacket(const DiffractionExperiment& experiment); AXI_STREAM &OutputStream(); - - std::string GetMACAddress() const override; - std::string GetIPv4Address() const override; + void Cancel() override; }; diff --git a/receiver/host/LinuxSocketDevice.cpp b/receiver/host/LinuxSocketDevice.cpp index bfac2a84..db9dbfb6 100644 --- a/receiver/host/LinuxSocketDevice.cpp +++ b/receiver/host/LinuxSocketDevice.cpp @@ -14,8 +14,9 @@ LinuxSocketDevice::LinuxSocketDevice(uint32_t in_ipv4_addr, uint16_t in_udp_port, uint16_t data_stream, size_t in_frame_buffer_size_modules, int32_t in_rcv_buf_size, int16_t in_numa_node) : - AcquisitionDevice(data_stream), ipv4_addr(in_ipv4_addr), udp_port(in_udp_port), + AcquisitionDevice(data_stream), udp_port(in_udp_port), numa_node(in_numa_node), rcv_buf_size(in_rcv_buf_size) { + ipv4_addr = in_ipv4_addr; max_modules = 16; MapBuffersStandard(in_frame_buffer_size_modules, 1, numa_node); mac_addr = 0; @@ -56,7 +57,7 @@ void LinuxSocketDevice::MeasureThread(int fd) { idle = true; } -void LinuxSocketDevice::HW_StartAction(const DiffractionExperiment& experiment) { +void LinuxSocketDevice::Start(const DiffractionExperiment& experiment) { if (experiment.GetConversionOnFPGA()) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Conversion on CPU flag has to be enabled for Raw Ethernet device"); @@ -92,19 +93,11 @@ void LinuxSocketDevice::HW_StartAction(const DiffractionExperiment& experiment) measure = std::async(std::launch::async, &LinuxSocketDevice::MeasureThread, this, fd); } -void LinuxSocketDevice::HW_SetCancelDataCollectionBit() { +void LinuxSocketDevice::Cancel() { cancel = true; } -std::string LinuxSocketDevice::GetMACAddress() const { - return MacAddressToStr(mac_addr); -} - -std::string LinuxSocketDevice::GetIPv4Address() const { - return IPv4AddressToStr(ipv4_addr); -} - -void LinuxSocketDevice::HW_EndAction() { +void LinuxSocketDevice::Finalize() { if (measure.valid()) measure.get(); } diff --git a/receiver/host/LinuxSocketDevice.h b/receiver/host/LinuxSocketDevice.h index 37b35d3e..5a356944 100644 --- a/receiver/host/LinuxSocketDevice.h +++ b/receiver/host/LinuxSocketDevice.h @@ -10,9 +10,6 @@ class LinuxSocketDevice : public AcquisitionDevice { int32_t rcv_buf_size; - - uint64_t mac_addr; - uint32_t ipv4_addr; uint16_t udp_port; const int16_t numa_node; @@ -21,11 +18,9 @@ class LinuxSocketDevice : public AcquisitionDevice { volatile bool cancel = false; volatile bool idle = true; - void HW_StartAction(const DiffractionExperiment& experiment) override; + void Start(const DiffractionExperiment& experiment) override; - void HW_SetCancelDataCollectionBit() override; - - void HW_EndAction() override; + void Finalize() override; void MeasureThread(int fd); void FindMACAddress(); public: @@ -36,9 +31,7 @@ public: int32_t GetNUMANode() const override; uint16_t GetUDPPort() const override; - std::string GetMACAddress() const override; - std::string GetIPv4Address() const override; + void Cancel() override; }; - #endif //JUNGFRAUJOCH_LINUXSOCKETDEVICE_H diff --git a/receiver/host/MlxRawEthDevice.cpp b/receiver/host/MlxRawEthDevice.cpp index 616429a2..8984fced 100644 --- a/receiver/host/MlxRawEthDevice.cpp +++ b/receiver/host/MlxRawEthDevice.cpp @@ -78,7 +78,7 @@ void MlxRawEthDevice::MeasureThread() { idle = true; } -void MlxRawEthDevice::HW_StartAction(const DiffractionExperiment& experiment) { +void MlxRawEthDevice::Start(const DiffractionExperiment& experiment) { if (experiment.GetConversionOnFPGA()) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Conversion on CPU flag has to be enabled for Raw Ethernet device"); @@ -88,11 +88,11 @@ void MlxRawEthDevice::HW_StartAction(const DiffractionExperiment& experiment) { measure = std::async(std::launch::async, &MlxRawEthDevice::MeasureThread, this); } -void MlxRawEthDevice::HW_SetCancelDataCollectionBit() { +void MlxRawEthDevice::Cancel() { cancel = true; } -void MlxRawEthDevice::HW_EndAction() { +void MlxRawEthDevice::Finalize() { if (measure.valid()) measure.get(); } @@ -105,14 +105,6 @@ void MlxRawEthDevice::SetIPv4Address(uint32_t ipv4_addr_network_order) { ipv4_addr = ipv4_addr_network_order; } -std::string MlxRawEthDevice::GetMACAddress() const { - return MacAddressToStr(mac_addr); -} - -std::string MlxRawEthDevice::GetIPv4Address() const { - return IPv4AddressToStr(ipv4_addr); -} - uint64_t MlxRawEthDevice::PollCQ(IBRegBuffer &buffer, IBQueuePair &qp, IBCompletionQueue &cq, ProcessJFPacket &process) { #ifdef JFJOCH_USE_NUMA if (numa_available() != -1) diff --git a/receiver/host/MlxRawEthDevice.h b/receiver/host/MlxRawEthDevice.h index b3eb79d4..3376ce5d 100644 --- a/receiver/host/MlxRawEthDevice.h +++ b/receiver/host/MlxRawEthDevice.h @@ -19,8 +19,6 @@ class MlxRawEthDevice : public AcquisitionDevice { std::mutex m; IBContext context; - uint64_t mac_addr; - uint32_t ipv4_addr; const int16_t numa_node; @@ -37,9 +35,8 @@ class MlxRawEthDevice : public AcquisitionDevice { ProcessJFPacket &process); void MeasureThread(); - void HW_StartAction(const DiffractionExperiment& experiment) override; - void HW_SetCancelDataCollectionBit() override; - void HW_EndAction() override; + void Start(const DiffractionExperiment& experiment) override; + void Finalize() override; public: MlxRawEthDevice(uint16_t dev_id, uint16_t data_stream, size_t in_frame_buffer_size_modules, int16_t numa_node = -1); @@ -47,8 +44,7 @@ public: int32_t GetNUMANode() const override; void SetMACAddress(uint64_t mac_addr_network_order); void SetIPv4Address(uint32_t ipv4_addr_network_order); - std::string GetMACAddress() const override; - std::string GetIPv4Address() const override; + void Cancel() override; }; #endif //JUNGFRAUJOCH_RAWETHDEVICE_H diff --git a/receiver/host/MockAcquisitionDevice.cpp b/receiver/host/MockAcquisitionDevice.cpp index 09bc9483..6017838a 100644 --- a/receiver/host/MockAcquisitionDevice.cpp +++ b/receiver/host/MockAcquisitionDevice.cpp @@ -5,11 +5,11 @@ #include "../../common/JFJochException.h" #include -void MockAcquisitionDevice::HW_StartAction(const DiffractionExperiment& experiment) { +void MockAcquisitionDevice::Start(const DiffractionExperiment& experiment) { idle = false; } -void MockAcquisitionDevice::HW_SetCancelDataCollectionBit() { +void MockAcquisitionDevice::Cancel() { if (!idle) { if (logger) logger->Info("MockAcquisitionDevice cancelling " + std::to_string(data_stream)); diff --git a/receiver/host/MockAcquisitionDevice.h b/receiver/host/MockAcquisitionDevice.h index 1274c78e..821b5e7c 100644 --- a/receiver/host/MockAcquisitionDevice.h +++ b/receiver/host/MockAcquisitionDevice.h @@ -14,15 +14,14 @@ class MockAcquisitionDevice : public AcquisitionDevice { bool idle = true; void SendCompletion(uint32_t handle, uint16_t module_number, uint64_t frame_number); - void HW_StartAction(const DiffractionExperiment& experiment) override; - - void HW_SetCancelDataCollectionBit() override; + void Start(const DiffractionExperiment& experiment) override; public: MockAcquisitionDevice(uint16_t data_stream, size_t in_frame_buffer_size_modules); void AddModule(uint64_t frame, uint16_t module_number, const uint16_t *data); void Terminate(); std::string GetMACAddress() const override; std::string GetIPv4Address() const override; + void Cancel() override; }; #endif //JUNGFRAUJOCH_MOCKACQUISITIONDEVICE_H diff --git a/receiver/host/PCIExpressDevice.cpp b/receiver/host/PCIExpressDevice.cpp index 1fb53d93..8c77924a 100644 --- a/receiver/host/PCIExpressDevice.cpp +++ b/receiver/host/PCIExpressDevice.cpp @@ -76,7 +76,7 @@ bool PCIExpressDevice::HW_ReadMailbox(uint32_t *values) { } -void PCIExpressDevice::HW_SetCancelDataCollectionBit() { +void PCIExpressDevice::Cancel() { if (ioctl(fd, IOCTL_JFJOCH_CANCEL) != 0) throw JFJochException(JFJochExceptionCategory::PCIeError, "Failed setting cancel bit", errno); diff --git a/receiver/host/PCIExpressDevice.h b/receiver/host/PCIExpressDevice.h index 3df37380..42a1386f 100644 --- a/receiver/host/PCIExpressDevice.h +++ b/receiver/host/PCIExpressDevice.h @@ -27,7 +27,7 @@ public: PCIExpressDevice(const std::string &device_name, uint16_t data_stream); ~PCIExpressDevice() override; - void HW_SetCancelDataCollectionBit() override; + void Cancel() override; void HW_GetStatus(ActionStatus *status) const override; void HW_GetEnvParams(ActionEnvParams *status) const override; uint32_t GetNumKernelBuffers() const; diff --git a/receiver/host/jfjoch_pcie_cancel_data_collection.cpp b/receiver/host/jfjoch_pcie_cancel_data_collection.cpp index 555994b4..3d2e1a3c 100644 --- a/receiver/host/jfjoch_pcie_cancel_data_collection.cpp +++ b/receiver/host/jfjoch_pcie_cancel_data_collection.cpp @@ -18,7 +18,7 @@ int main(int argc, char **argv) { std::cout << std::endl; try { PCIExpressDevice test(argv[1], 0); - test.HW_SetCancelDataCollectionBit(); + test.Cancel(); logger.Info("Done"); } catch (const JFJochException &e) { logger.ErrorException(e); diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index 99e3ee84..03ab39f9 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -158,7 +158,7 @@ TEST_CASE("HLS_C_Simulation_check_cancel", "[FPGA][Full]") { HLSSimulatedDevice test(0, 64); REQUIRE_NOTHROW(test.StartAction(x)); - test.ActionAbort(); + test.Cancel(); REQUIRE_NOTHROW(test.WaitForActionComplete()); @@ -183,7 +183,7 @@ TEST_CASE("HLS_C_Simulation_check_cancel_conversion", "[FPGA][Full]") { HLSSimulatedDevice test(0, 64); REQUIRE_NOTHROW(test.StartAction(x)); - test.ActionAbort(); + test.Cancel(); REQUIRE_NOTHROW(test.WaitForActionComplete()); From 459b84d7c6de7f7d9569def523297b050ac82138 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 3 Jun 2023 19:41:42 +0200 Subject: [PATCH 043/224] AcquisitionCounters: Simplify --- receiver/JFJochReceiver.cpp | 38 ++++---- ...neCounters.cpp => AcquisitionCounters.cpp} | 93 ++++++++----------- ...OnlineCounters.h => AcquisitionCounters.h} | 34 ++++--- receiver/host/AcquisitionDevice.cpp | 70 +++++--------- receiver/host/AcquisitionDevice.h | 26 ++---- receiver/host/AcquisitionOfflineCounters.cpp | 72 -------------- receiver/host/AcquisitionOfflineCounters.h | 28 ------ receiver/host/CMakeLists.txt | 5 +- receiver/host/FPGAAcquisitionDevice.cpp | 2 +- tests/AcquisitionCountersTest.cpp | 50 ++++++++-- tests/FPGAIntegrationTest.cpp | 40 ++++---- 11 files changed, 169 insertions(+), 289 deletions(-) rename receiver/host/{AcquisitionOnlineCounters.cpp => AcquisitionCounters.cpp} (60%) rename receiver/host/{AcquisitionOnlineCounters.h => AcquisitionCounters.h} (65%) delete mode 100644 receiver/host/AcquisitionOfflineCounters.cpp delete mode 100644 receiver/host/AcquisitionOfflineCounters.h diff --git a/receiver/JFJochReceiver.cpp b/receiver/JFJochReceiver.cpp index 4cc0fd50..61e4d33e 100644 --- a/receiver/JFJochReceiver.cpp +++ b/receiver/JFJochReceiver.cpp @@ -240,19 +240,19 @@ void JFJochReceiver::MeasurePedestalThread(uint16_t data_stream, uint16_t module try { for (size_t frame = staring_frame; frame < experiment.GetFrameNum(); frame += frame_stride) { // Frame will be processed only if one already collects frame+2 - acquisition_device[data_stream]->WaitForFrame(frame + 2, module_number); + acquisition_device[data_stream]->Counters().WaitForFrame(frame + 2, module_number); if (!storage_cell_G1G2 || (frame % 2 == 1)) { // Partial packets will bring more problems, than benefit - if (acquisition_device[data_stream]->IsFullModuleCollected(frame, module_number)) { + if (acquisition_device[data_stream]->Counters().IsFullModuleCollected(frame, module_number)) { pedestal_calc.AnalyzeImage((uint16_t *) acquisition_device[data_stream]->GetFrameBuffer(frame, module_number)); } - auto tmp = acquisition_device[data_stream]->GetJFInfo(frame, module_number); + auto tmp = acquisition_device[data_stream]->Counters().GetCompletion(frame, module_number).debug; storage_cell_header = (tmp >> 8) & 0xF; } acquisition_device[data_stream]->FrameBufferRelease(frame, module_number); - UpdateMaxDelay(acquisition_device[data_stream]->CalculateDelay(frame, module_number)); + UpdateMaxDelay(acquisition_device[data_stream]->Counters().CalculateDelay(frame, module_number)); UpdateMaxImage(frame); } @@ -271,20 +271,21 @@ void JFJochReceiver::MiniSummationThread(int d, int m, size_t image_number, bool FrameTransformation &transformation, DataMessage &message) { for (int j = 0; j < experiment.GetSummation(); j++) { size_t frame_number = image_number * experiment.GetSummation() + j; - acquisition_device[d]->WaitForFrame(frame_number + 2); + acquisition_device[d]->Counters().WaitForFrame(frame_number + 2); const int16_t *src; - if (acquisition_device[d]->IsFullModuleCollected(frame_number, m)) { + if (acquisition_device[d]->Counters().IsFullModuleCollected(frame_number, m)) { src = acquisition_device[d]->GetFrameBuffer(frame_number, m); if (!send_image) { + Completion c = acquisition_device[d]->Counters().GetCompletion(frame_number, m); // the information is for first module/frame that was collected in full - message.bunch_id = acquisition_device[d]->GetBunchID(frame_number, m); - message.jf_info = acquisition_device[d]->GetJFInfo(frame_number, m); + message.bunch_id = c.bunchid; + message.jf_info = c.debug; message.storage_cell = (message.jf_info >> 8) & 0xF; - message.timestamp = acquisition_device[d]->GetTimestamp(frame_number, m); - message.exptime = acquisition_device[d]->GetExptime(frame_number, m); + message.timestamp = c.timestamp; + message.exptime = c.exptime; } send_image = true; } else @@ -297,7 +298,7 @@ void JFJochReceiver::MiniSummationThread(int d, int m, size_t image_number, bool transformation.ProcessModule(src, m, d); acquisition_device[d]->FrameBufferRelease(frame_number, m); - UpdateMaxDelay(acquisition_device[d]->CalculateDelay(frame_number, m)); + UpdateMaxDelay(acquisition_device[d]->Counters().CalculateDelay(frame_number, m)); } } @@ -375,21 +376,22 @@ void JFJochReceiver::FrameTransformationThread() { size_t frame_number = image_number * experiment.GetSummation() + j; for (int d = 0; d < ndatastreams; d++) { - acquisition_device[d]->WaitForFrame(frame_number + 2); + acquisition_device[d]->Counters().WaitForFrame(frame_number + 2); for (int m = 0; m < experiment.GetModulesNum(d); m++) { const int16_t *src; - if (acquisition_device[d]->IsFullModuleCollected(frame_number, m)) { + if (acquisition_device[d]->Counters().IsFullModuleCollected(frame_number, m)) { src = acquisition_device[d]->GetFrameBuffer(frame_number, m); if (!send_image) { + Completion c = acquisition_device[d]->Counters().GetCompletion(frame_number, m); // the information is for first module/frame that was collected in full - message.bunch_id = acquisition_device[d]->GetBunchID(frame_number, m); - message.jf_info = acquisition_device[d]->GetJFInfo(frame_number, m); - message.timestamp = acquisition_device[d]->GetTimestamp(frame_number, m); - message.exptime = acquisition_device[d]->GetExptime(frame_number, m); + message.bunch_id = c.bunchid; + message.jf_info = c.debug; message.storage_cell = (message.jf_info >> 8) & 0xF; + message.timestamp = c.timestamp; + message.exptime = c.exptime; } send_image = true; } else @@ -403,7 +405,7 @@ void JFJochReceiver::FrameTransformationThread() { acquisition_device[d]->FrameBufferRelease(frame_number, m); } - auto delay = acquisition_device[d]->CalculateDelay(frame_number); + auto delay = acquisition_device[d]->Counters().CalculateDelay(frame_number); UpdateMaxDelay(delay); if (delay > message.receiver_aq_dev_delay) message.receiver_aq_dev_delay = delay; diff --git a/receiver/host/AcquisitionOnlineCounters.cpp b/receiver/host/AcquisitionCounters.cpp similarity index 60% rename from receiver/host/AcquisitionOnlineCounters.cpp rename to receiver/host/AcquisitionCounters.cpp index fc3edcbe..9cb4f797 100644 --- a/receiver/host/AcquisitionOnlineCounters.cpp +++ b/receiver/host/AcquisitionCounters.cpp @@ -3,13 +3,13 @@ #include -#include "AcquisitionOnlineCounters.h" +#include "AcquisitionCounters.h" #include "../../common/JFJochException.h" -AcquisitionOnlineCounters::AcquisitionOnlineCounters() -: head(max_modules, 0), slowest_head(0) {} +AcquisitionCounters::AcquisitionCounters() + : head(max_modules, 0), slowest_head(0), total_packets(0), expected_frames(0), acquisition_finished(false) {} -void AcquisitionOnlineCounters::Reset(const DiffractionExperiment &experiment, uint16_t data_stream) { +void AcquisitionCounters::Reset(const DiffractionExperiment &experiment, uint16_t data_stream) { std::unique_lock ul(m); acquisition_finished = false; @@ -30,13 +30,12 @@ void AcquisitionOnlineCounters::Reset(const DiffractionExperiment &experiment, u handle_for_frame = std::vector((expected_frames+1) * nmodules, HandleNotFound); full_module_collected = std::vector(expected_frames * nmodules); - bunch_id = std::vector(expected_frames * nmodules); - jf_info = std::vector(expected_frames * nmodules); - timestamp = std::vector(expected_frames * nmodules); - exptime = std::vector(expected_frames * nmodules); + saved_completions = std::vector(expected_frames * nmodules); + packets_per_module = std::vector(nmodules); + total_packets = 0; } -void AcquisitionOnlineCounters::UpdateCounters(const Completion *c) { +void AcquisitionCounters::UpdateCounters(const Completion *c) { std::unique_lock ul(m); if (c->module_number >= nmodules) @@ -44,7 +43,7 @@ void AcquisitionOnlineCounters::UpdateCounters(const Completion *c) { "UpdateCounters wrong module number: " + std::to_string(c->module_number) + " for frame " + std::to_string(c->frame_number)); if (c->frame_number >= expected_frames) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, - "UpdateCounters frame number is out of bounds"); + "UpdateCounters frame number is out of bounds"); else { if (head.at(c->module_number) < c->frame_number) head.at(c->module_number) = c->frame_number; @@ -58,22 +57,22 @@ void AcquisitionOnlineCounters::UpdateCounters(const Completion *c) { full_module_collected.at(c->frame_number * nmodules + c->module_number) = (c->packet_count == expected_packets_per_module); handle_for_frame.at(c->frame_number * nmodules + c->module_number) = c->handle; - bunch_id.at(c->frame_number * nmodules + c->module_number) = c->bunchid; - jf_info.at(c->frame_number * nmodules + c->module_number) = c->debug; - timestamp.at(c->frame_number * nmodules + c->module_number) = c->timestamp; - exptime.at(c->frame_number * nmodules + c->module_number) = c->exptime; + saved_completions.at(c->frame_number * nmodules + c->module_number) = *c; + + total_packets += c->packet_count; + packets_per_module[c->module_number] += c->packet_count; } data_updated.notify_all(); } -void AcquisitionOnlineCounters::SetAcquisitionFinished() { +void AcquisitionCounters::SetAcquisitionFinished() { std::unique_lock ul(m); acquisition_finished = true; data_updated.notify_all(); } -uint64_t AcquisitionOnlineCounters::GetBufferHandle(size_t frame, uint16_t module_number) const { +uint64_t AcquisitionCounters::GetBufferHandle(size_t frame, uint16_t module_number) const { if (frame >= expected_frames) throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, "GetBufferHandle Wrong frame number: " + std::to_string(frame)); @@ -84,7 +83,7 @@ uint64_t AcquisitionOnlineCounters::GetBufferHandle(size_t frame, uint16_t modul return handle_for_frame.at(frame * nmodules + module_number); } -uint64_t AcquisitionOnlineCounters::GetBufferHandleAndClear(size_t frame, uint16_t module_number) { +uint64_t AcquisitionCounters::GetBufferHandleAndClear(size_t frame, uint16_t module_number) { std::unique_lock ul(m); if (frame >= expected_frames) throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, @@ -92,24 +91,24 @@ uint64_t AcquisitionOnlineCounters::GetBufferHandleAndClear(size_t frame, uint16 if (module_number >= nmodules) throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, "GetBufferHandleAndClear Wrong module number: " + std::to_string(module_number) - + " for frame " + std::to_string(frame)); + + " for frame " + std::to_string(frame)); uint64_t ret_val = handle_for_frame.at(frame * nmodules + module_number); handle_for_frame.at(frame * nmodules + module_number) = HandleNotFound; return ret_val; } -uint64_t AcquisitionOnlineCounters::GetHead(uint16_t module_number) const { +uint64_t AcquisitionCounters::GetHead(uint16_t module_number) const { if (module_number >= max_modules) throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, "GetHead Wrong module number: " + std::to_string(module_number)); return head[module_number]; } -uint64_t AcquisitionOnlineCounters::GetSlowestHead() const { +uint64_t AcquisitionCounters::GetSlowestHead() const { return slowest_head; } -void AcquisitionOnlineCounters::WaitForFrame(size_t curr_frame, uint16_t module_number) const { +void AcquisitionCounters::WaitForFrame(size_t curr_frame, uint16_t module_number) const { uint64_t slowest_head_tmp = (module_number == UINT16_MAX) ? GetSlowestHead() : GetHead(module_number); while (!acquisition_finished && (slowest_head_tmp < curr_frame)) { std::this_thread::sleep_for(std::chrono::microseconds(100)); @@ -117,7 +116,7 @@ void AcquisitionOnlineCounters::WaitForFrame(size_t curr_frame, uint16_t module_ } } -int64_t AcquisitionOnlineCounters::CalculateDelay(size_t curr_frame, uint16_t module_number) const { +int64_t AcquisitionCounters::CalculateDelay(size_t curr_frame, uint16_t module_number) const { uint64_t slowest_head_tmp; if (module_number == UINT16_MAX) @@ -128,11 +127,11 @@ int64_t AcquisitionOnlineCounters::CalculateDelay(size_t curr_frame, uint16_t mo return slowest_head_tmp - curr_frame; } -bool AcquisitionOnlineCounters::IsAcquisitionFinished() const { +bool AcquisitionCounters::IsAcquisitionFinished() const { return acquisition_finished; } -bool AcquisitionOnlineCounters::IsFullModuleCollected(size_t frame, uint16_t module_number) const { +bool AcquisitionCounters::IsFullModuleCollected(size_t frame, uint16_t module_number) const { if (frame >= expected_frames) throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, "IsFullModuleCollected Wrong frame number: " + std::to_string(frame)); @@ -145,7 +144,7 @@ bool AcquisitionOnlineCounters::IsFullModuleCollected(size_t frame, uint16_t mod return full_module_collected[frame * nmodules + module_number]; } -uint64_t AcquisitionOnlineCounters::GetBunchID(size_t frame, uint16_t module_number) const { +Completion AcquisitionCounters::GetCompletion(size_t frame, uint16_t module_number) const { if (frame >= expected_frames) throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, "GetBunchID Wrong frame number: " + std::to_string(frame)); @@ -155,41 +154,27 @@ uint64_t AcquisitionOnlineCounters::GetBunchID(size_t frame, uint16_t module_num "GetBunchID Wrong module number: " + std::to_string(module_number) + " for frame " + std::to_string(frame)); - return bunch_id[frame * nmodules + module_number]; + return saved_completions[frame * nmodules + module_number]; } -uint32_t AcquisitionOnlineCounters::GetExptime(size_t frame, uint16_t module_number) const { - if (frame >= expected_frames) - throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, - "GetExptime Wrong frame number: " + std::to_string(frame)); +uint64_t AcquisitionCounters::GetTotalPackets() const { + return total_packets; +} + +uint64_t AcquisitionCounters::GetTotalPackets(uint16_t module_number) const { + std::unique_lock ul(m); if (module_number >= nmodules) throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, - "GetExptime Wrong module number: " + std::to_string(module_number) - + " for frame " + std::to_string(frame)); + "GetTotalPackets Wrong module number: " + std::to_string(module_number));\ - return exptime[frame * nmodules + module_number]; -} -uint32_t AcquisitionOnlineCounters::GetJFInfo(size_t frame, uint16_t module_number) const { - if (frame >= expected_frames) - throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, - "GetJFInfo Wrong frame number: " + std::to_string(frame)); - - if (module_number >= nmodules) - throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, - "GetJFInfo Wrong module number: " + std::to_string(module_number) - + " for frame " + std::to_string(frame)); - return jf_info[frame * nmodules + module_number]; + return packets_per_module[module_number]; } -uint64_t AcquisitionOnlineCounters::GetTimestamp(size_t frame, uint16_t module_number) const { - if (frame >= expected_frames) - throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, - "GetTimestamp Wrong frame number: " + std::to_string(frame)); - - if (module_number >= nmodules) - throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, - "GetTimestamp Wrong module number: " + std::to_string(module_number) - + " for frame " + std::to_string(frame)); - return timestamp[frame * nmodules + module_number]; +uint64_t AcquisitionCounters::GetExpectedPackets() const { + return GetExpectedPacketsPerModule() * nmodules; +} + +uint64_t AcquisitionCounters::GetExpectedPacketsPerModule() const { + return expected_frames * expected_packets_per_module; } diff --git a/receiver/host/AcquisitionOnlineCounters.h b/receiver/host/AcquisitionCounters.h similarity index 65% rename from receiver/host/AcquisitionOnlineCounters.h rename to receiver/host/AcquisitionCounters.h index 3c2f5374..d0a78a3c 100644 --- a/receiver/host/AcquisitionOnlineCounters.h +++ b/receiver/host/AcquisitionCounters.h @@ -1,8 +1,8 @@ // Copyright (2019-2022) Paul Scherrer Institute // SPDX-License-Identifier: GPL-3.0-or-later -#ifndef JUNGFRAUJOCH_ACQUISITIONONLINECOUNTERS_H -#define JUNGFRAUJOCH_ACQUISITIONONLINECOUNTERS_H +#ifndef JUNGFRAUJOCH_ACQUISITIONCOUNTERS_H +#define JUNGFRAUJOCH_ACQUISITIONCOUNTERS_H #include #include @@ -12,10 +12,10 @@ #include "../../common/Definitions.h" #include "Completion.h" -// AcquisitionOnlineCounters are used for information that needs to be accessed during data collection, -// so has more stringent mutex requirements than AcquisitionOfflineCounters +// AcquisitionCounters are used for information that needs to be accessed during data collection, +// so uses mutex to ensure consistency -class AcquisitionOnlineCounters { +class AcquisitionCounters { constexpr static const uint16_t expected_packets_per_module = 128; constexpr static const uint64_t max_modules = 32; @@ -25,19 +25,20 @@ class AcquisitionOnlineCounters { std::vector handle_for_frame; std::vector full_module_collected; // vector of bool might have weird concurrency behavior - std::vector bunch_id; - std::vector jf_info; - std::vector timestamp; - std::vector exptime; + std::vector saved_completions; + + uint64_t total_packets; + std::vector packets_per_module; uint64_t slowest_head; std::vector head; bool acquisition_finished; uint64_t expected_frames; uint64_t nmodules = max_modules; + public: static constexpr const uint64_t HandleNotFound = UINT64_MAX; - AcquisitionOnlineCounters(); + AcquisitionCounters(); void Reset(const DiffractionExperiment &experiment, uint16_t data_stream); void UpdateCounters(const Completion *c); @@ -54,11 +55,14 @@ public: bool IsFullModuleCollected(size_t frame, uint16_t module_number) const; bool IsAcquisitionFinished() const; - uint64_t GetBunchID(size_t curr_frame, uint16_t module_number) const; - uint32_t GetJFInfo(size_t curr_frame, uint16_t module_number) const; - uint64_t GetTimestamp(size_t curr_frame, uint16_t module_number) const; - uint32_t GetExptime(size_t curr_frame, uint16_t module_number) const; + Completion GetCompletion(size_t curr_frame, uint16_t module_number) const; + + uint64_t GetTotalPackets() const; + uint64_t GetTotalPackets(uint16_t module_number) const; + + uint64_t GetExpectedPackets() const; + uint64_t GetExpectedPacketsPerModule() const; }; -#endif //JUNGFRAUJOCH_ACQUISITIONONLINECOUNTERS_H +#endif //JUNGFRAUJOCH_ACQUISITIONCOUNTERS_H diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index 24b0c378..8343374b 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -39,14 +39,6 @@ buffer_err(RAW_MODULE_SIZE) { data_stream = in_data_stream; } -bool AcquisitionDevice::IsFullModuleCollected(size_t frame, uint8_t module_number) const { - return counters.IsFullModuleCollected(frame, module_number); -} - -uint64_t AcquisitionDevice::GetBufferHandle(size_t frame, uint8_t module_number) const { - return counters.GetBufferHandle(frame, module_number); -} - void AcquisitionDevice::PrepareAction(const DiffractionExperiment &experiment) { if (experiment.GetModulesNum(data_stream) > max_modules) throw(JFJochException(JFJochExceptionCategory::InputParameterAboveMax, @@ -70,7 +62,6 @@ void AcquisitionDevice::StartAction(const DiffractionExperiment &experiment) { } counters.Reset(experiment, data_stream); - completion_vector.Reset(experiment, data_stream); expected_frames = experiment.GetFrameNum(); // Ensure internal WR queue is empty @@ -93,14 +84,6 @@ void AcquisitionDevice::StartAction(const DiffractionExperiment &experiment) { logger->Info("Started"); } -int64_t AcquisitionDevice::CalculateDelay(size_t curr_frame, uint16_t module_number) const { - return counters.CalculateDelay(curr_frame, module_number); -} - -void AcquisitionDevice::WaitForFrame(size_t curr_frame, uint16_t module_number) const { - counters.WaitForFrame(curr_frame, module_number); -} - void AcquisitionDevice::WaitForActionComplete() { auto c = work_completion_queue.GetBlocking(); @@ -109,10 +92,8 @@ void AcquisitionDevice::WaitForActionComplete() { Cancel(); // this frame is not of any interest, therefore its location can be immediately released SendWorkRequest(c.handle); - } else { + } else counters.UpdateCounters(&c); - completion_vector.Add(c); - } if (logger != nullptr) logger->Debug("Data stream " + std::to_string(data_stream) @@ -150,24 +131,27 @@ void AcquisitionDevice::SaveStatistics(const DiffractionExperiment &experiment, statistics.set_start_timestamp(start_time.time_since_epoch().count()); statistics.set_end_timestamp(end_time.time_since_epoch().count()); - completion_vector.FillStatistics(experiment, data_stream, statistics); + auto nmodules = experiment.GetModulesNum(data_stream); + auto expected_packets = counters.GetExpectedPackets(); + auto total_packets = counters.GetTotalPackets(); + + statistics.set_nmodules(nmodules); + statistics.set_packets_expected(expected_packets); + statistics.set_good_packets(total_packets); + + for (int i = 0; i < nmodules; i++) + statistics.add_packets_received_per_module(counters.GetTotalPackets(i)); + + if ((expected_packets == 0) || (total_packets == expected_packets)) + statistics.set_efficiency(1.0); + else + statistics.set_efficiency(static_cast(total_packets) / static_cast(expected_packets)); + *statistics.mutable_fpga_status() = GetStatus(); } -uint64_t AcquisitionDevice::GetHead(uint8_t module_number) const { - return counters.GetHead(module_number); -} - -uint64_t AcquisitionDevice::GetSlowestHead() const { - return counters.GetSlowestHead(); -} - -bool AcquisitionDevice::IsDone() const { - return counters.IsAcquisitionFinished(); -} - const int16_t *AcquisitionDevice::GetFrameBuffer(size_t frame_number, uint16_t module_number) const { - auto handle = GetBufferHandle(frame_number, module_number); + auto handle = counters.GetBufferHandle(frame_number, module_number); if (handle != HandleNotValid) return (int16_t *) buffer_device.at(handle); else @@ -204,7 +188,7 @@ void AcquisitionDevice::UnmapBuffers() { void AcquisitionDevice::FrameBufferRelease(size_t frame_number, uint16_t module_number) { auto handle = counters.GetBufferHandleAndClear(frame_number, module_number); - if (handle != AcquisitionOnlineCounters::HandleNotFound) + if (handle != AcquisitionCounters::HandleNotFound) SendWorkRequest(handle); } @@ -220,20 +204,8 @@ uint16_t AcquisitionDevice::GetUDPPort() const { return 1234; } -uint64_t AcquisitionDevice::GetBunchID(size_t curr_frame, uint16_t module_number) const { - return counters.GetBunchID(curr_frame, module_number); -} - -uint32_t AcquisitionDevice::GetJFInfo(size_t curr_frame, uint16_t module_number) const { - return counters.GetJFInfo(curr_frame, module_number); -} - -uint32_t AcquisitionDevice::GetExptime(size_t curr_frame, uint16_t module_number) const { - return counters.GetExptime(curr_frame, module_number); -} - -uint64_t AcquisitionDevice::GetTimestamp(size_t curr_frame, uint16_t module_number) const { - return counters.GetTimestamp(curr_frame, module_number); +const AcquisitionCounters &AcquisitionDevice::Counters() const { + return counters; } std::string AcquisitionDevice::GetIPv4Address() const { diff --git a/receiver/host/AcquisitionDevice.h b/receiver/host/AcquisitionDevice.h index 037e759a..d64ffd70 100644 --- a/receiver/host/AcquisitionDevice.h +++ b/receiver/host/AcquisitionDevice.h @@ -18,11 +18,8 @@ #include "../../common/ThreadSafeFIFO.h" #include "../../jungfrau/JFModuleGainCalibration.h" -#include "AcquisitionOnlineCounters.h" +#include "AcquisitionCounters.h" #include "Completion.h" -#include "AcquisitionOfflineCounters.h" - -void *mmap_acquisition_buffer(size_t size, int16_t numa_node); class AcquisitionDevice { uint64_t bytes_received = 0; @@ -33,13 +30,14 @@ class AcquisitionDevice { std::chrono::time_point end_time; int64_t expected_frames; - AcquisitionOnlineCounters counters; - AcquisitionOfflineCounters completion_vector; virtual void Start(const DiffractionExperiment& experiment) = 0; virtual void Finalize() {}; // do clean-up after action is done virtual void StartSendingWorkRequests() {}; + void SendWorkRequest(uint32_t handle); protected: + AcquisitionCounters counters; + ThreadSafeFIFO work_completion_queue; ThreadSafeFIFO work_request_queue; @@ -67,14 +65,13 @@ public: void WaitForActionComplete(); virtual void Cancel() = 0; - void SendWorkRequest(uint32_t handle); void EnableLogging(Logger *logger); // Post measurement statistics - only guaranteed valid after WaitForActionComplete ends uint64_t GetBytesReceived() const; void SaveStatistics(const DiffractionExperiment &experiment, JFJochProtoBuf::AcquisitionDeviceStatistics &statistics) const; - virtual JFJochProtoBuf::FPGAStatus GetStatus() const { return JFJochProtoBuf::FPGAStatus(); }; + virtual JFJochProtoBuf::FPGAStatus GetStatus() const { return {}; }; const int16_t *GetFrameBuffer(size_t frame_number, uint16_t module_number) const; @@ -86,18 +83,7 @@ public: // Calibration virtual void InitializeCalibration(const DiffractionExperiment &experiment, const JFCalibration &calib); - uint64_t GetHead(uint8_t module_number) const; - uint64_t GetSlowestHead() const; - void WaitForFrame(size_t curr_frame, uint16_t module_number = UINT16_MAX) const; - int64_t CalculateDelay(size_t curr_frame, uint16_t module_number = UINT16_MAX) const; // mutex acquired indirectly - uint64_t GetBufferHandle(size_t frame, uint8_t module_number) const; - uint64_t GetBunchID(size_t curr_frame, uint16_t module_number) const; - uint32_t GetJFInfo(size_t curr_frame, uint16_t module_number) const; - uint64_t GetTimestamp(size_t curr_frame, uint16_t module_number) const; - uint32_t GetExptime(size_t curr_frame, uint16_t module_number) const; - - bool IsFullModuleCollected(size_t frame, uint8_t module_number) const; - bool IsDone() const; + const AcquisitionCounters& Counters() const; virtual std::string GetIPv4Address() const; virtual std::string GetMACAddress() const; diff --git a/receiver/host/AcquisitionOfflineCounters.cpp b/receiver/host/AcquisitionOfflineCounters.cpp deleted file mode 100644 index 402cf8b9..00000000 --- a/receiver/host/AcquisitionOfflineCounters.cpp +++ /dev/null @@ -1,72 +0,0 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later - -#include "AcquisitionOfflineCounters.h" -#include - -void AcquisitionOfflineCounters::Reset(const DiffractionExperiment &x, uint16_t data_stream) { - std::unique_lock ul(m); - - auto max_entries = x.GetFrameNum() * x.GetModulesNum(data_stream); - completion.clear(); - completion.reserve(max_entries); -} - -void AcquisitionOfflineCounters::Add(Completion c) { - std::unique_lock ul(m); - completion.push_back(c); -} - -void AcquisitionOfflineCounters::FillStatistics(const DiffractionExperiment &x, uint16_t data_stream, - JFJochProtoBuf::AcquisitionDeviceStatistics& statistics) const { - std::unique_lock ul(m); - - if (x.GetFrameNum() == 0) - return; - - auto nmodules = x.GetModulesNum(data_stream); - auto max_entries = x.GetFrameNum() * x.GetModulesNum(data_stream); - - const int masks_per_module = 2; - const int64_t expected_packets_per_module = 128; - - std::vector timestamp(max_entries, UINT32_MAX); - std::vector debug(max_entries, UINT32_MAX); - std::vector bunchid(max_entries, UINT64_MAX); - std::vector packet_mask(masks_per_module * max_entries, 0); - std::vector packet_count(max_entries, 0); - std::vector packets_received_per_module(x.GetModulesNum(data_stream)); - uint64_t total_packets = 0; - - for (const auto &c: completion) { - size_t i = c.frame_number * nmodules + c.module_number; - timestamp[i] = c.timestamp; - debug[i] = c.debug; - bunchid[i] = c.bunchid; - packet_count[i] = c.packet_count; - total_packets += packet_count[i]; - packets_received_per_module[c.module_number] += packet_count[i]; - - for (int j = 0; j < masks_per_module; j++) - packet_mask[i * masks_per_module + j] = c.packet_mask[j]; - } - - size_t expected_images = x.GetImageNum(); - if ((x.GetDetectorMode() == DetectorMode::PedestalG0) || - (x.GetDetectorMode() == DetectorMode::PedestalG1) || - (x.GetDetectorMode() == DetectorMode::PedestalG2)) - expected_images = x.GetFrameNum(); - - uint32_t expected_packets = max_entries * expected_packets_per_module; - statistics.set_nmodules(x.GetModulesNum(data_stream)); - statistics.set_packets_expected(expected_packets); - - if ((expected_images == 0) || (total_packets == expected_packets)) - statistics.set_efficiency(1.0); - else - statistics.set_efficiency(static_cast(total_packets) / static_cast(expected_packets)); - - *statistics.mutable_packets_received_per_module() = {packets_received_per_module.begin(), - packets_received_per_module.end()}; - statistics.set_good_packets(total_packets); -} diff --git a/receiver/host/AcquisitionOfflineCounters.h b/receiver/host/AcquisitionOfflineCounters.h deleted file mode 100644 index b4d812bb..00000000 --- a/receiver/host/AcquisitionOfflineCounters.h +++ /dev/null @@ -1,28 +0,0 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later - -#ifndef JUNGFRAUJOCH_ACQUISITIONOFFLINECOUNTERS_H -#define JUNGFRAUJOCH_ACQUISITIONOFFLINECOUNTERS_H - -#include -#include - -#include - -#include "Completion.h" -#include "../../common/DiffractionExperiment.h" - - -// AcquisitionOfflineCounters is used to store information that will be used AFTER data collection -class AcquisitionOfflineCounters { - std::vector completion; - mutable std::mutex m; -public: - void Reset(const DiffractionExperiment &x, uint16_t data_stream); - void Add(Completion c); - void FillStatistics(const DiffractionExperiment &x, uint16_t data_stream, - JFJochProtoBuf::AcquisitionDeviceStatistics& statistics) const; -}; - - -#endif //JUNGFRAUJOCH_ACQUISITIONOFFLINECOUNTERS_H diff --git a/receiver/host/CMakeLists.txt b/receiver/host/CMakeLists.txt index 125ff1ee..84ab4a32 100644 --- a/receiver/host/CMakeLists.txt +++ b/receiver/host/CMakeLists.txt @@ -1,11 +1,10 @@ ADD_LIBRARY(JungfraujochHost STATIC AcquisitionDevice.cpp AcquisitionDevice.h - AcquisitionOnlineCounters.cpp AcquisitionOnlineCounters.h + AcquisitionCounters.cpp AcquisitionCounters.h MockAcquisitionDevice.cpp MockAcquisitionDevice.h HLSSimulatedDevice.cpp HLSSimulatedDevice.h Completion.cpp Completion.h ActionConfig.h PCIExpressDevice.cpp PCIExpressDevice.h - AcquisitionOfflineCounters.cpp AcquisitionOfflineCounters.h IBWrappers.cpp IBWrappers.h MlxRawEthDevice.cpp MlxRawEthDevice.h ../../jungfrau/jf_packet.h LinuxSocketDevice.cpp LinuxSocketDevice.h FPGAAcquisitionDevice.cpp FPGAAcquisitionDevice.h) @@ -51,4 +50,4 @@ INSTALL(TARGETS jfjoch_pcie_cancel_data_collection RUNTIME) ADD_EXECUTABLE(jfjoch_pcie_clear_net_counters jfjoch_pcie_clear_net_counters.cpp) TARGET_LINK_LIBRARIES(jfjoch_pcie_clear_net_counters JungfraujochHost) -INSTALL(TARGETS jfjoch_pcie_clear_net_counters RUNTIME) \ No newline at end of file +INSTALL(TARGETS jfjoch_pcie_clear_net_counters RUNTIME) diff --git a/receiver/host/FPGAAcquisitionDevice.cpp b/receiver/host/FPGAAcquisitionDevice.cpp index fd586df1..8c744f8e 100644 --- a/receiver/host/FPGAAcquisitionDevice.cpp +++ b/receiver/host/FPGAAcquisitionDevice.cpp @@ -228,7 +228,7 @@ JFJochProtoBuf::FPGAStatus FPGAAcquisitionDevice::GetStatus() const { ret.set_ethernet_rx_aligned(env.ethernet_aligned); ret.set_hbm_temp_0_degc(env.hbm_0_temp_C); ret.set_hbm_temp_1_degc(env.hbm_1_temp_C); - ret.set_slowest_head(GetSlowestHead()); + ret.set_slowest_head(counters.GetSlowestHead()); return ret; } diff --git a/tests/AcquisitionCountersTest.cpp b/tests/AcquisitionCountersTest.cpp index 90cd09e5..66c629e8 100644 --- a/tests/AcquisitionCountersTest.cpp +++ b/tests/AcquisitionCountersTest.cpp @@ -2,13 +2,13 @@ // SPDX-License-Identifier: GPL-3.0-or-later #include -#include "../receiver/host/AcquisitionOnlineCounters.h" +#include "../receiver/host/AcquisitionCounters.h" -TEST_CASE("AcquisitionDeviceCountersTest","[AcquisitionDeviceCounters]") { +TEST_CASE("AcquisitionCountersTest","[AcquisitionDeviceCounters]") { DiffractionExperiment x(DetectorGeometry(2)); x.NumTriggers(1).ImagesPerTrigger(50); - AcquisitionOnlineCounters counters; + AcquisitionCounters counters; counters.Reset(x, 0); REQUIRE(counters.GetSlowestHead() == 0); REQUIRE(counters.GetHead(0) == 0); @@ -34,10 +34,10 @@ TEST_CASE("AcquisitionDeviceCountersTest","[AcquisitionDeviceCounters]") { REQUIRE(counters.CalculateDelay(31, 1) == 1); REQUIRE(counters.CalculateDelay(33, 1) == -1); REQUIRE(counters.GetBufferHandle(32, 1) == 17); - REQUIRE(counters.GetBufferHandle(32, 0) == AcquisitionOnlineCounters::HandleNotFound); - REQUIRE(counters.GetBunchID(32, 1) == c.bunchid); - REQUIRE(counters.GetJFInfo(32, 1) == c.debug); - REQUIRE(counters.GetTimestamp(32, 1) == c.timestamp); + REQUIRE(counters.GetBufferHandle(32, 0) == AcquisitionCounters::HandleNotFound); + REQUIRE(counters.GetCompletion(32, 1).bunchid == c.bunchid); + REQUIRE(counters.GetCompletion(32, 1).debug == c.debug); + REQUIRE(counters.GetCompletion(32, 1).timestamp == c.timestamp); c.frame_number = 15; c.module_number = 0; @@ -65,11 +65,11 @@ TEST_CASE("AcquisitionDeviceCountersTest","[AcquisitionDeviceCounters]") { REQUIRE(counters.CalculateDelay(50) == 15-50); } -TEST_CASE("AcquisitionDeviceCountersTest_OutOfBounds","[AcquisitionDeviceCounters]") { +TEST_CASE("AcquisitionCountersTest_OutOfBounds","[AcquisitionDeviceCounters]") { DiffractionExperiment x(DetectorGeometry(2)); x.NumTriggers(1).ImagesPerTrigger(50); - AcquisitionOnlineCounters counters; + AcquisitionCounters counters; counters.Reset(x, 0); Completion c{}; @@ -82,4 +82,36 @@ TEST_CASE("AcquisitionDeviceCountersTest_OutOfBounds","[AcquisitionDeviceCounter c.frame_number = 20; c.module_number = 2; REQUIRE_THROWS(counters.UpdateCounters(&c)); +} + +TEST_CASE("AcquisitionCountersTest_PacketCount","[AcquisitionDeviceCounters]") { + DiffractionExperiment x(DetectorGeometry(2)); + x.NumTriggers(1).ImagesPerTrigger(25).Summation(2); + + AcquisitionCounters counters; + counters.Reset(x, 0); + REQUIRE(counters.GetTotalPackets() == 0); + + Completion c{}; + c.frame_number = 32; + c.module_number = 1; + c.handle = 17; + c.packet_count = 86; + counters.UpdateCounters(&c); + + REQUIRE(counters.GetTotalPackets() == 86); + REQUIRE(counters.GetTotalPackets(0) == 0); + REQUIRE(counters.GetTotalPackets(1) == 86); + + c.frame_number = 15; + c.module_number = 0; + c.packet_count = 128; + counters.UpdateCounters(&c); + + REQUIRE(counters.GetTotalPackets() == 86 + 128); + REQUIRE(counters.GetTotalPackets(0) == 128); + REQUIRE(counters.GetTotalPackets(1) == 86); + + REQUIRE(counters.GetExpectedPackets() == 50 * 2 * 128); + REQUIRE(counters.GetExpectedPacketsPerModule() == 50 * 128); } \ No newline at end of file diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index 03ab39f9..cc660b78 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -88,9 +88,9 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_custom_frame", "[FPGA][Ful for (int image = 0; image < 4; image++) { for (int m = 0; m < nmodules; m++) { - REQUIRE(test.GetTimestamp(image, m) == INT_PKT_GEN_TIMESTAMP); - REQUIRE(test.GetBunchID(image,m) == INT_PKT_GEN_BUNCHID); - REQUIRE(test.GetExptime(image, m) == INT_PKT_GEN_EXPTTIME); + REQUIRE(test.Counters().GetCompletion(image, m).timestamp == INT_PKT_GEN_TIMESTAMP); + REQUIRE(test.Counters().GetCompletion(image, m).bunchid == INT_PKT_GEN_BUNCHID); + REQUIRE(test.Counters().GetCompletion(image, m).exptime == INT_PKT_GEN_EXPTTIME); auto imageBuf = (uint16_t *) test.GetFrameBuffer(image, m); for (int i = 0; i < RAW_MODULE_SIZE; i++) { @@ -123,7 +123,7 @@ TEST_CASE("HLS_C_Simulation_check_raw", "[FPGA][Full]") { REQUIRE_NOTHROW(test.StartAction(x)); REQUIRE_NOTHROW(test.WaitForActionComplete()); - REQUIRE(test.GetSlowestHead() == 0); + REQUIRE(test.Counters().GetSlowestHead() == 0); REQUIRE_NOTHROW(test.OutputStream().read()); REQUIRE(test.OutputStream().size() == 0); @@ -162,7 +162,7 @@ TEST_CASE("HLS_C_Simulation_check_cancel", "[FPGA][Full]") { REQUIRE_NOTHROW(test.WaitForActionComplete()); - REQUIRE(test.GetSlowestHead() == 0); + REQUIRE(test.Counters().GetSlowestHead() == 0); REQUIRE_NOTHROW(test.OutputStream().read()); REQUIRE(test.OutputStream().size() == 0); @@ -187,7 +187,7 @@ TEST_CASE("HLS_C_Simulation_check_cancel_conversion", "[FPGA][Full]") { REQUIRE_NOTHROW(test.WaitForActionComplete()); - REQUIRE(test.GetSlowestHead() == 0); + REQUIRE(test.Counters().GetSlowestHead() == 0); REQUIRE_NOTHROW(test.OutputStream().read()); REQUIRE(test.OutputStream().size() == 0); @@ -229,12 +229,12 @@ TEST_CASE("HLS_C_Simulation_check_delay", "[FPGA][Full]") { REQUIRE_NOTHROW(test.WaitForActionComplete()); - REQUIRE(test.CalculateDelay(0) == 2); - REQUIRE(test.CalculateDelay(0, 0) == 2); - REQUIRE(test.CalculateDelay(1) == 1); - REQUIRE(test.CalculateDelay(1, 0) == 1); - REQUIRE(test.CalculateDelay(2) == 0); - REQUIRE(test.CalculateDelay(2, 0) == 0); + REQUIRE(test.Counters().CalculateDelay(0) == 2); + REQUIRE(test.Counters().CalculateDelay(0, 0) == 2); + REQUIRE(test.Counters().CalculateDelay(1) == 1); + REQUIRE(test.Counters().CalculateDelay(1, 0) == 1); + REQUIRE(test.Counters().CalculateDelay(2) == 0); + REQUIRE(test.Counters().CalculateDelay(2, 0) == 0); } TEST_CASE("HLS_C_Simulation_check_lost_frame_raw", "[FPGA][Full]") { @@ -560,17 +560,17 @@ TEST_CASE("HLS_C_Simulation_check_2_trigger_convert", "[FPGA][Full]") { REQUIRE_NOTHROW(test.StartAction(x)); - REQUIRE(!test.IsDone()); + REQUIRE(!test.Counters().IsAcquisitionFinished()); test.WaitForActionComplete(); - REQUIRE(test.IsDone()); + REQUIRE(test.Counters().IsAcquisitionFinished()); // address properly aligned REQUIRE((uint64_t) test.GetFrameBuffer(0, 0) % 128 == 0); - REQUIRE(test.GetSlowestHead() == 0); - REQUIRE(test.GetHead(0) == 9); + REQUIRE(test.Counters().GetSlowestHead() == 0); + REQUIRE(test.Counters().GetHead(0) == 9); REQUIRE_NOTHROW(test.OutputStream().read()); REQUIRE(test.OutputStream().size() == 0); @@ -611,11 +611,11 @@ TEST_CASE("HLS_C_Simulation_check_detect_last_frame", "[FPGA][Full]") { test.CreatePacketJF(x, 15, 0, 0, data, true); REQUIRE_NOTHROW(test.StartAction(x)); - REQUIRE(!test.IsDone()); + REQUIRE(!test.Counters().IsAcquisitionFinished()); test.WaitForActionComplete(); - REQUIRE(test.IsDone()); + REQUIRE(test.Counters().IsAcquisitionFinished()); REQUIRE_NOTHROW(test.OutputStream().read()); REQUIRE(test.OutputStream().size() == 0); @@ -653,11 +653,11 @@ TEST_CASE("HLS_C_Simulation_check_wrong_packet_size", "[FPGA][Full]") { REQUIRE_NOTHROW(test.StartAction(x)); - REQUIRE(!test.IsDone()); + REQUIRE(!test.Counters().IsAcquisitionFinished()); test.WaitForActionComplete(); - REQUIRE(test.IsDone()); + REQUIRE(test.Counters().IsAcquisitionFinished()); REQUIRE(test.GetBytesReceived() == 6 * JUNGFRAU_PACKET_SIZE_BYTES); } From 3d645c7169d66225356a028d237cf248d5788b90 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 3 Jun 2023 19:53:48 +0200 Subject: [PATCH 044/224] AcquisitionDevice: Always use AcquisitionCounters to find how many packets/bytes were downloaded --- receiver/host/AcquisitionDevice.cpp | 4 +--- receiver/host/AcquisitionDevice.h | 11 ++++------- receiver/host/LinuxSocketDevice.cpp | 10 +--------- receiver/host/LinuxSocketDevice.h | 1 - receiver/host/MlxRawEthDevice.cpp | 17 +++-------------- receiver/host/MlxRawEthDevice.h | 6 ++---- receiver/host/MockAcquisitionDevice.cpp | 3 +-- receiver/host/PCIExpressDevice.cpp | 3 +-- receiver/host/PCIExpressDevice.h | 3 +-- tests/FPGAIntegrationTest.cpp | 6 +++--- 10 files changed, 17 insertions(+), 47 deletions(-) diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/host/AcquisitionDevice.cpp index 8343374b..70abbe02 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/host/AcquisitionDevice.cpp @@ -104,8 +104,6 @@ void AcquisitionDevice::WaitForActionComplete() { c = work_completion_queue.GetBlocking(); } - bytes_received = c.frame_number * 8192LU; - counters.SetAcquisitionFinished(); end_time = std::chrono::system_clock::now(); @@ -121,7 +119,7 @@ void AcquisitionDevice::SendWorkRequest(uint32_t handle) { } uint64_t AcquisitionDevice::GetBytesReceived() const { - return bytes_received; + return counters.GetTotalPackets() * 8192LU; } void AcquisitionDevice::SaveStatistics(const DiffractionExperiment &experiment, diff --git a/receiver/host/AcquisitionDevice.h b/receiver/host/AcquisitionDevice.h index d64ffd70..6fae8f0e 100644 --- a/receiver/host/AcquisitionDevice.h +++ b/receiver/host/AcquisitionDevice.h @@ -14,17 +14,15 @@ #include "../../common/Definitions.h" #include "../../common/DiffractionExperiment.h" #include "../../common/Logger.h" -#include "../../jungfrau/JFCalibration.h" + #include "../../common/ThreadSafeFIFO.h" -#include "../../jungfrau/JFModuleGainCalibration.h" +#include "../../jungfrau/JFCalibration.h" #include "AcquisitionCounters.h" #include "Completion.h" class AcquisitionDevice { - uint64_t bytes_received = 0; - - std::vector buffer_err; + std::vector buffer_err; std::chrono::time_point start_time; std::chrono::time_point end_time; @@ -42,11 +40,10 @@ protected: ThreadSafeFIFO work_request_queue; std::vector buffer_device; + Logger *logger; uint16_t data_stream; - Logger *logger; uint32_t max_modules = 1; - uint64_t mac_addr; uint32_t ipv4_addr; diff --git a/receiver/host/LinuxSocketDevice.cpp b/receiver/host/LinuxSocketDevice.cpp index db9dbfb6..4a9e5ef3 100644 --- a/receiver/host/LinuxSocketDevice.cpp +++ b/receiver/host/LinuxSocketDevice.cpp @@ -8,7 +8,6 @@ #include #include -#include "../common/JFJochException.h" #include "../../common/NetworkAddressConvert.h" LinuxSocketDevice::LinuxSocketDevice(uint32_t in_ipv4_addr, uint16_t in_udp_port, @@ -26,8 +25,6 @@ LinuxSocketDevice::LinuxSocketDevice(uint32_t in_ipv4_addr, uint16_t in_udp_port void LinuxSocketDevice::MeasureThread(int fd) { jf_udp_payload jf{}; - uint64_t packet_count = 0; - work_completion_queue.Put(Completion{ .type = Completion::Type::Start }); @@ -37,10 +34,8 @@ void LinuxSocketDevice::MeasureThread(int fd) { while (!cancel) { auto count = recv(fd, &jf, sizeof(jf_udp_payload), 0); - if (count == sizeof(jf_udp_payload)) { process.ProcessPacket(&jf); - packet_count++; } else if ((count == -1) && (errno != EAGAIN) && (errno != EWOULDBLOCK)) throw JFJochException(JFJochExceptionCategory::UDPError, "Error in UDP receiving"); } @@ -50,11 +45,9 @@ void LinuxSocketDevice::MeasureThread(int fd) { } // End message should be sent always work_completion_queue.Put(Completion{ - .type = Completion::Type::End, - .frame_number = packet_count + .type = Completion::Type::End }); close(fd); - idle = true; } void LinuxSocketDevice::Start(const DiffractionExperiment& experiment) { @@ -88,7 +81,6 @@ void LinuxSocketDevice::Start(const DiffractionExperiment& experiment) { throw JFJochException(JFJochExceptionCategory::UDPError, "Cannot bind to UDP port"); cancel = false; - idle = false; measure = std::async(std::launch::async, &LinuxSocketDevice::MeasureThread, this, fd); } diff --git a/receiver/host/LinuxSocketDevice.h b/receiver/host/LinuxSocketDevice.h index 5a356944..722d47a3 100644 --- a/receiver/host/LinuxSocketDevice.h +++ b/receiver/host/LinuxSocketDevice.h @@ -16,7 +16,6 @@ class LinuxSocketDevice : public AcquisitionDevice { std::future measure; volatile bool cancel = false; - volatile bool idle = true; void Start(const DiffractionExperiment& experiment) override; diff --git a/receiver/host/MlxRawEthDevice.cpp b/receiver/host/MlxRawEthDevice.cpp index 8984fced..782ff909 100644 --- a/receiver/host/MlxRawEthDevice.cpp +++ b/receiver/host/MlxRawEthDevice.cpp @@ -27,9 +27,6 @@ int32_t MlxRawEthDevice::GetNUMANode() const { } void MlxRawEthDevice::MeasureThread() { - - uint64_t packet_count = 0; - work_completion_queue.Put(Completion{ .type = Completion::Type::Start }); @@ -62,7 +59,7 @@ void MlxRawEthDevice::MeasureThread() { std::ref(buffer), std::ref(qp)); - packet_count = cq_poll_future.get(); + cq_poll_future.get(); arp_future.get(); } catch (const JFJochException &e) { @@ -72,10 +69,8 @@ void MlxRawEthDevice::MeasureThread() { } work_completion_queue.Put(Completion{ - .type = Completion::Type::End, - .frame_number = packet_count + .type = Completion::Type::End }); - idle = true; } void MlxRawEthDevice::Start(const DiffractionExperiment& experiment) { @@ -84,7 +79,6 @@ void MlxRawEthDevice::Start(const DiffractionExperiment& experiment) { "Conversion on CPU flag has to be enabled for Raw Ethernet device"); cancel = false; - idle = false; measure = std::async(std::launch::async, &MlxRawEthDevice::MeasureThread, this); } @@ -105,14 +99,12 @@ void MlxRawEthDevice::SetIPv4Address(uint32_t ipv4_addr_network_order) { ipv4_addr = ipv4_addr_network_order; } -uint64_t MlxRawEthDevice::PollCQ(IBRegBuffer &buffer, IBQueuePair &qp, IBCompletionQueue &cq, ProcessJFPacket &process) { +void MlxRawEthDevice::PollCQ(IBRegBuffer &buffer, IBQueuePair &qp, IBCompletionQueue &cq, ProcessJFPacket &process) { #ifdef JFJOCH_USE_NUMA if (numa_available() != -1) numa_run_on_node(numa_node); #endif - uint64_t packet_counter = 0; - while (!cancel) { int64_t i; size_t size; @@ -121,13 +113,10 @@ uint64_t MlxRawEthDevice::PollCQ(IBRegBuffer &buffer, IBQueuePair &qp, IBComplet auto ptr = (jf_raw_packet *) buffer.GetLocation(i); process.ProcessPacket(&ptr->jf); qp.PostReceiveWR(*buffer.GetMemoryRegion(), i, buffer.GetLocation(i), BUFFER_SIZE); - packet_counter++; } } else std::this_thread::sleep_for(std::chrono::microseconds(10)); } - - return packet_counter; } // ARP packet - from if_arp.h diff --git a/receiver/host/MlxRawEthDevice.h b/receiver/host/MlxRawEthDevice.h index 3376ce5d..7e662cde 100644 --- a/receiver/host/MlxRawEthDevice.h +++ b/receiver/host/MlxRawEthDevice.h @@ -21,15 +21,13 @@ class MlxRawEthDevice : public AcquisitionDevice { IBContext context; const int16_t numa_node; + volatile bool cancel = false; std::future measure; - volatile bool cancel = false; - volatile bool idle = true; - void SendARP(IBRegBuffer &buffer, IBQueuePair &qp); - uint64_t PollCQ(IBRegBuffer &buffer, + void PollCQ(IBRegBuffer &buffer, IBQueuePair &qp, IBCompletionQueue &cq, ProcessJFPacket &process); diff --git a/receiver/host/MockAcquisitionDevice.cpp b/receiver/host/MockAcquisitionDevice.cpp index 6017838a..99dd3859 100644 --- a/receiver/host/MockAcquisitionDevice.cpp +++ b/receiver/host/MockAcquisitionDevice.cpp @@ -54,8 +54,7 @@ void MockAcquisitionDevice::AddModule(uint64_t frame_number, uint16_t module_num void MockAcquisitionDevice::Terminate() { work_completion_queue.Put(Completion{ - .type = Completion::Type::End, - .frame_number = current_handle * 128 + .type = Completion::Type::End }); idle = true; } diff --git a/receiver/host/PCIExpressDevice.cpp b/receiver/host/PCIExpressDevice.cpp index 8c77924a..a6fdd761 100644 --- a/receiver/host/PCIExpressDevice.cpp +++ b/receiver/host/PCIExpressDevice.cpp @@ -4,11 +4,10 @@ #include #include #include +#include #include "PCIExpressDevice.h" -#include "../../common/JFJochException.h" #include "../pcie_driver/jfjoch_ioctl.h" -#include #include "../../common/NetworkAddressConvert.h" PCIExpressDevice::PCIExpressDevice(uint16_t data_stream, uint16_t pci_slot) : diff --git a/receiver/host/PCIExpressDevice.h b/receiver/host/PCIExpressDevice.h index 42a1386f..c87e40d1 100644 --- a/receiver/host/PCIExpressDevice.h +++ b/receiver/host/PCIExpressDevice.h @@ -9,7 +9,7 @@ class PCIExpressDevice : public FPGAAcquisitionDevice { int fd; - bool HW_ReadMailbox(uint32_t values[16]); + bool HW_ReadMailbox(uint32_t values[16]) override; bool HW_SendWorkRequest(uint32_t handle) override; void FPGA_StartAction() override; bool HW_IsIdle() const final; @@ -43,5 +43,4 @@ public: std::string GetIPv4Address() const override; }; - #endif //JUNGFRAUJOCH_PCIEXPRESSDEVICE_H diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index cc660b78..7c3f5ed8 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -343,12 +343,12 @@ TEST_CASE("HLS_C_Simulation_check_single_packet", "[FPGA][Full]") { REQUIRE_NOTHROW(test.OutputStream().read()); REQUIRE(test.OutputStream().size() == 0); - REQUIRE(test.GetBytesReceived() == 16 * JUNGFRAU_PACKET_SIZE_BYTES); + REQUIRE(test.GetBytesReceived() == 15 * JUNGFRAU_PACKET_SIZE_BYTES); JFJochProtoBuf::AcquisitionDeviceStatistics device_statistics; REQUIRE_NOTHROW(test.SaveStatistics(x, device_statistics)); - REQUIRE(device_statistics.good_packets() == 15); - REQUIRE(device_statistics.bytes_received() == 16 * JUNGFRAU_PACKET_SIZE_BYTES); + REQUIRE(device_statistics.good_packets() == 15); + REQUIRE(device_statistics.bytes_received() == 15 * JUNGFRAU_PACKET_SIZE_BYTES); } TEST_CASE("HLS_C_Simulation_check_convert_full_range", "[FPGA][Full]") { From d6d827fd9dd80797d2e0f1b180af03da04a436b6 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 3 Jun 2023 19:54:08 +0200 Subject: [PATCH 045/224] FPGA: host_writer is not sending packet count back --- receiver/hls/host_writer.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/receiver/hls/host_writer.cpp b/receiver/hls/host_writer.cpp index 4e80d27e..83ebf926 100644 --- a/receiver/hls/host_writer.cpp +++ b/receiver/hls/host_writer.cpp @@ -234,7 +234,8 @@ void host_writer(STREAM_512 &data_in, if (out_frame_addr % 128 != 0) internal_err_reg[0] = 1; if (curr_offset[id] == 0) internal_err_reg[3] = 1; - packets_processed = ++total_counter; + total_counter++; + packets_processed = total_counter; setup_datamover(datamover_out_cmd, out_frame_addr, PACKET_SIZE); } else { for (int i = 0; i < 128; i++) @@ -263,6 +264,6 @@ void host_writer(STREAM_512 &data_in, data_in >> packet_in; - write_completion(m_axis_completion, HANDLE_END, 0, total_counter, 0, 0, 0, 0, 0, 0, data_collection_id); + write_completion(m_axis_completion, HANDLE_END, 0, 0, 0, 0, 0, 0, 0, 0, data_collection_id); idle = 1; } From 38b59de0458affaa6d9748d8ac84f07fe2a65d0b Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 3 Jun 2023 20:49:43 +0200 Subject: [PATCH 046/224] ProcessJFPacket: Enable conversion (no storage cells at the moment) --- jungfrau/ProcessJFPacket.cpp | 30 +++++++++++++++++++++++++-- jungfrau/ProcessJFPacket.h | 4 ++++ tests/ProcessRawPacketTest.cpp | 38 ++++++++++++++++++++++++++++++++++ 3 files changed, 70 insertions(+), 2 deletions(-) diff --git a/jungfrau/ProcessJFPacket.cpp b/jungfrau/ProcessJFPacket.cpp index 20e18b74..fb9e6769 100644 --- a/jungfrau/ProcessJFPacket.cpp +++ b/jungfrau/ProcessJFPacket.cpp @@ -6,13 +6,15 @@ #include "ProcessJFPacket.h" #include "jf_packet.h" #include "../common/JFJochException.h" +#include "JFConversionFixedPoint.h" ProcessJFPacket::ProcessJFPacket(ThreadSafeFIFO &in_c, ThreadSafeFIFO &in_wr, uint32_t nmodules) : m(2 * nmodules), c_fifo(in_c), wr_fifo(in_wr), - module_info(2 * nmodules) + module_info(2 * nmodules), + conv(nmodules) { for (auto &i: module_info) i.c.frame_number = UINT64_MAX; @@ -65,7 +67,11 @@ void ProcessJFPacket::ProcessPacket(jf_udp_payload *datagram) { module_info[module_info_location].c.packet_count++; module_info[module_info_location].c.packet_mask[packetnum >= 64 ? 1 : 0] |= (1LU << (packetnum % 64)); - memcpy(module_info[module_info_location].ptr + 4096 * packetnum, datagram->data, 4096 * sizeof(uint16_t)); + uint16_t* dst = module_info[module_info_location].ptr + 4096 * packetnum; + if (conv[module_number]) + conv[module_number]->ConvertPacket((int16_t *) dst, datagram->data, packetnum); + else + memcpy(dst, datagram->data, 4096 * sizeof(uint16_t)); } packet_counter++; } @@ -73,3 +79,23 @@ void ProcessJFPacket::ProcessPacket(jf_udp_payload *datagram) { uint64_t ProcessJFPacket::GetCounter() { return packet_counter; } + +void ProcessJFPacket::RegisterConversion(const DiffractionExperiment &experiment, + const JFCalibration &calib, + uint16_t data_stream) { + if (data_stream >= experiment.GetDataStreamsNum()) + throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, "Data stream not found"); + + if (conv.size() != experiment.GetModulesNum(data_stream)) + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Wrong module count"); + + auto module0 = experiment.GetFirstModuleOfDataStream(data_stream); + for (int i = 0; i < experiment.GetModulesNum(data_stream); i++) { + conv[i] = std::make_unique(); + conv[i]->Setup(calib.GainCalibration(module0 + i), + calib.Pedestal(module0 + i, 0, 0), + calib.Pedestal(module0 + i, 1, 0), + calib.Pedestal(module0 + i, 2, 0), + experiment.GetPhotonEnergy_keV()); + } +} diff --git a/jungfrau/ProcessJFPacket.h b/jungfrau/ProcessJFPacket.h index a6e72f66..7f428f23 100644 --- a/jungfrau/ProcessJFPacket.h +++ b/jungfrau/ProcessJFPacket.h @@ -5,8 +5,10 @@ #define JUNGFRAUJOCH_PROCESSJFPACKET_H #include "../common/ThreadSafeFIFO.h" +#include "../common/DiffractionExperiment.h" #include "../receiver/host/Completion.h" #include "JFConversion.h" +#include "JFCalibration.h" #include "jf_packet.h" #include @@ -22,9 +24,11 @@ class ProcessJFPacket { ThreadSafeFIFO &wr_fifo; std::vector module_info; std::atomic packet_counter = 0; + std::vector > conv; public: ProcessJFPacket(ThreadSafeFIFO &c, ThreadSafeFIFO &wr, uint32_t nmodules); ~ProcessJFPacket(); + void RegisterConversion(const DiffractionExperiment& experiment, const JFCalibration& calib, uint16_t data_stream); void ProcessPacket(jf_udp_payload *datagram); uint64_t GetCounter(); }; diff --git a/tests/ProcessRawPacketTest.cpp b/tests/ProcessRawPacketTest.cpp index e2b6dc21..e23593aa 100644 --- a/tests/ProcessRawPacketTest.cpp +++ b/tests/ProcessRawPacketTest.cpp @@ -91,4 +91,42 @@ TEST_CASE("ProcessRawPacketTest") { CHECK(array_0[4096*36] == 6789); CHECK(array_1[4096*(36+64)] == 6345); CHECK(array_2[4096*(16+64)] == 6346); +} + +TEST_CASE("ProcessRawPacketTest_Conversion") { + ThreadSafeFIFO c_fifo; + ThreadSafeFIFO wr_fifo; + + std::vector array_0(RAW_MODULE_SIZE); + + wr_fifo.Put(WorkRequest{.ptr = array_0.data(), .handle = 0}); + + DiffractionExperiment experiment(DetectorGeometry(8)); + experiment.DataStreams(2).PhotonEnergy_keV(2); + JFCalibration calibration(experiment); + calibration.Pedestal(6, 0, 0).GetPedestal()[4096*36] = 300; + calibration.Pedestal(6, 1, 0).GetPedestal()[4096*36+1] = 15000; + calibration.Pedestal(6, 2, 0).GetPedestal()[4096*36+2] = 14000; + + { + ProcessJFPacket process(c_fifo, wr_fifo, 4); + REQUIRE_NOTHROW(process.RegisterConversion(experiment, calibration, 1)); + jf_udp_payload datagram; + + datagram.packetnum = 36; + datagram.framenum = 2; + datagram.bunchid = 84; + datagram.data[0] = 600; + datagram.data[1] = 16384 | 4000; + datagram.data[2] = 32768 | 16384 | 9000; + + datagram.xCoord = 4; + process.ProcessPacket(&datagram); + + REQUIRE(process.GetCounter() == 1); + } + + CHECK(array_0[4096*36] == std::round((600 - 300) / (DEFAULT_G0_FACTOR*2))); + CHECK(array_0[4096*36+1] == std::round((4000 - 15000) / (DEFAULT_G1_FACTOR*2))); + CHECK(array_0[4096*36+2] == std::round((9000 - 14000) / (DEFAULT_G2_FACTOR*2))); } \ No newline at end of file From 5513b468339788f9918afbd774d90daa26b0cb9a Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 3 Jun 2023 21:02:21 +0200 Subject: [PATCH 047/224] JFCalibrationPerfTest: measure performance of conversion with packet processing --- tools/JFCalibrationPerfTest.cpp | 63 +++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/tools/JFCalibrationPerfTest.cpp b/tools/JFCalibrationPerfTest.cpp index 6f31e96b..96aca8b8 100644 --- a/tools/JFCalibrationPerfTest.cpp +++ b/tools/JFCalibrationPerfTest.cpp @@ -198,6 +198,65 @@ void test_packet_processing(Logger &logger) { ntries * nframes * nmodules * RAW_MODULE_SIZE * sizeof(uint16_t) * 1000 * 1000/ ((double) elapsed.count() * 1024 * 1024 * 1024)); } +void test_packet_processing_with_conversion(Logger &logger) { + size_t nframes = 128; + int64_t nmodules = 8; + int64_t ntries = 8; + + std::vector packets(nframes * nmodules * 128); + std::vector output(nframes * nmodules * CONVERTED_MODULE_SIZE); + + std::vector input(RAW_MODULE_SIZE); + std::string image_path = "../../tests/test_data/mod5_raw0.bin"; + LoadBinaryFile(image_path, input.data(), RAW_MODULE_SIZE); + + for (int frame = 0; frame < nframes; frame++) { + for (int m = 0; m < nmodules; m++) { + for (int p = 0; p < 128; p++) { + packets.at((frame * 128 + p) * nmodules + m).jf.xCoord = (m * 2); + packets.at((frame * 128 + p) * nmodules + m).jf.packetnum = p; + packets.at((frame * 128 + p) * nmodules + m).jf.framenum = frame + 1; + memcpy(packets.at((frame * 128 + p) * nmodules + m).jf.data, input.data() + 4096 * p, 4096 * sizeof(uint16_t)); + } + } + } + + DiffractionExperiment experiment((DetectorGeometry(nmodules))); + JFCalibration calib(experiment); + experiment.PhotonEnergy_keV(12.4).DataStreams(1); + + for (int m = 0; m < nmodules; m++) { + calib.GainCalibration(m) = GainCalibrationFromTestFile(); + + for (int i = 0; i < RAW_MODULE_SIZE; i++) { + calib.Pedestal(m, 0, 0).GetPedestal()[i] = 3000 + i % 50 + m * 135; + calib.Pedestal(m, 1, 0).GetPedestal()[i] = 15000 + i % 50 - m * 135; + calib.Pedestal(m, 2, 0).GetPedestal()[i] = 14000 + i % 50 - m * 135; + } + } + + auto start_time = std::chrono::system_clock::now(); + for (int z = 0; z < ntries; z++) { + ThreadSafeFIFO c; + ThreadSafeFIFO wr; + ProcessJFPacket process(c, wr, nmodules); + process.RegisterConversion(experiment, calib, 0); + + for (uint32_t i = 0; i < nmodules * nframes; i++) + wr.Put(WorkRequest{ + .ptr = output.data() + i * RAW_MODULE_SIZE, + .handle = i + }); + for (auto &packet: packets) + process.ProcessPacket(&packet.jf); + } + auto end_time = std::chrono::system_clock::now(); + auto elapsed = std::chrono::duration_cast(end_time - start_time); + + logger.Info("Packet analysis with conversion performance: {:5d} us/module {:5.2f} GB/s", std::lround(elapsed.count() / ((double) (ntries * nframes * nmodules))), + ntries * nframes * nmodules * RAW_MODULE_SIZE * sizeof(uint16_t) * 1000 * 1000/ ((double) elapsed.count() * 1024 * 1024 * 1024)); +} + int main () { Logger logger("JFCalibrationPerfTest"); test_pedestal(logger); @@ -213,4 +272,8 @@ int main () { logger.Info("Packet processing without conversion"); test_packet_processing(logger); + + + logger.Info("Packet processing with conversion"); + test_packet_processing_with_conversion(logger); } From 1930bd2c6eb645259fd05d0e796bdbf049735789 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 3 Jun 2023 22:49:30 +0200 Subject: [PATCH 048/224] JFConversionFixedPoint: Minor performance improvement --- jungfrau/JFConversionFixedPoint.cpp | 25 +++++++++++-------------- 1 file changed, 11 insertions(+), 14 deletions(-) diff --git a/jungfrau/JFConversionFixedPoint.cpp b/jungfrau/JFConversionFixedPoint.cpp index 4da70ce1..0f77194a 100644 --- a/jungfrau/JFConversionFixedPoint.cpp +++ b/jungfrau/JFConversionFixedPoint.cpp @@ -69,38 +69,35 @@ void JFConversionFixedPoint::ConvertLine(int16_t *dest, const uint16_t *source, for (int i = 0; i < RAW_MODULE_COLS; i++) { uint16_t gainbits = source[i] & 0xc000; int32_t adc = source[i] & 0x3fff; - int32_t val = 0; - - bool overflow = false; - bool wrong = false; - - if ((source[i] == 0x4000) || (source[i] == 0xffff)) wrong = true; - else if (source[i] == 0xc000) overflow = true; + int32_t val = INT32_MIN; switch (gainbits) { case 0: [[likely]] - val = jf_round((adc - pedestal_g0_aligned[i + line * RAW_MODULE_COLS]) * gain_g0_aligned[i + line * RAW_MODULE_COLS]); + val = (adc - pedestal_g0_aligned[i + line * RAW_MODULE_COLS]) * gain_g0_aligned[i + line * RAW_MODULE_COLS]; break; case 0x4000: - val = jf_round((adc - pedestal_g1_aligned[i + line * RAW_MODULE_COLS]) * gain_g1_aligned[i + line * RAW_MODULE_COLS]); + if (source[i] != 0x4000) + val = (adc - pedestal_g1_aligned[i + line * RAW_MODULE_COLS]) * gain_g1_aligned[i + line * RAW_MODULE_COLS]; break; case 0xc000: - val = jf_round((adc - pedestal_g2_aligned[i + line * RAW_MODULE_COLS]) * gain_g2_aligned[i + line * RAW_MODULE_COLS]); + if (source[i] == 0xc000) + val = INT32_MAX; + else if (source[i] != 0xffff) + val = (adc - pedestal_g2_aligned[i + line * RAW_MODULE_COLS]) * gain_g2_aligned[i + line * RAW_MODULE_COLS]; break; default: - wrong = true; break; } - if (wrong || (val <= INT16_MIN * (1L << FIXED_PRECISION))) + if (val <= INT16_MIN * (1L << FIXED_PRECISION)) [[unlikely]] dest[i] = INT16_MIN; - else if (overflow || (val >= INT16_MAX * (1L << FIXED_PRECISION))) + else if (val >= INT16_MAX * (1L << FIXED_PRECISION)) [[unlikely]] dest[i] = INT16_MAX; else - dest[i] = static_cast(val / (1L << FIXED_PRECISION)); + dest[i] = static_cast(jf_round(val)/ (1L << FIXED_PRECISION)); } } From 64a4b7323c388d7eb5c1d93d233e8eda94523981 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 3 Jun 2023 23:01:40 +0200 Subject: [PATCH 049/224] ZMQWrappers: remove include --- common/ZMQWrappers.h | 1 - 1 file changed, 1 deletion(-) diff --git a/common/ZMQWrappers.h b/common/ZMQWrappers.h index 6cc68927..74877fdb 100644 --- a/common/ZMQWrappers.h +++ b/common/ZMQWrappers.h @@ -9,7 +9,6 @@ #include #include #include -#include #include "JFJochException.h" #include "ZeroCopyReturnValue.h" From 6d4717e1e505e237742c77d386229ba34062440d Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sun, 4 Jun 2023 09:18:54 +0200 Subject: [PATCH 050/224] JFConversionFixedPoint: Minor speed-up --- jungfrau/JFConversionFixedPoint.cpp | 43 +++++++++++++++++++++++++++-- 1 file changed, 40 insertions(+), 3 deletions(-) diff --git a/jungfrau/JFConversionFixedPoint.cpp b/jungfrau/JFConversionFixedPoint.cpp index 0f77194a..4b3afb9d 100644 --- a/jungfrau/JFConversionFixedPoint.cpp +++ b/jungfrau/JFConversionFixedPoint.cpp @@ -58,7 +58,6 @@ inline int32_t jf_round(int32_t in) { } void JFConversionFixedPoint::ConvertLine(int16_t *dest, const uint16_t *source, int line) { - auto gain_g0_aligned = std::assume_aligned<64>(gain_g0); auto gain_g1_aligned = std::assume_aligned<64>(gain_g1); auto gain_g2_aligned = std::assume_aligned<64>(gain_g2); @@ -102,8 +101,46 @@ void JFConversionFixedPoint::ConvertLine(int16_t *dest, const uint16_t *source, } void JFConversionFixedPoint::ConvertPacket(int16_t *dest, const uint16_t *source, uint16_t packet_number) { - for (int i = 0; i < 4; i++) - ConvertLine(dest + i * RAW_MODULE_COLS, source + i * RAW_MODULE_COLS, 4 * packet_number + i); + auto gain_g0_aligned = std::assume_aligned<64>(gain_g0); + auto gain_g1_aligned = std::assume_aligned<64>(gain_g1); + auto gain_g2_aligned = std::assume_aligned<64>(gain_g2); + auto pedestal_g0_aligned = std::assume_aligned<64>(pedestal_g0); + auto pedestal_g1_aligned = std::assume_aligned<64>(pedestal_g1); + auto pedestal_g2_aligned = std::assume_aligned<64>(pedestal_g2); + + for (int i = 0; i < 4 * RAW_MODULE_COLS; i++) { + uint16_t gainbits = source[i] & 0xc000; + int32_t adc = source[i] & 0x3fff; + int32_t val = INT32_MIN; + + switch (gainbits) { + case 0: + [[likely]] + val = (adc - pedestal_g0_aligned[i + 4 * packet_number * RAW_MODULE_COLS]) * gain_g0_aligned[i + 4 * packet_number * RAW_MODULE_COLS]; + break; + case 0x4000: + if (source[i] != 0x4000) + val = (adc - pedestal_g1_aligned[i + 4 * packet_number * RAW_MODULE_COLS]) * gain_g1_aligned[i + 4 * packet_number * RAW_MODULE_COLS]; + break; + case 0xc000: + if (source[i] == 0xc000) + val = INT32_MAX; + else if (source[i] != 0xffff) + val = (adc - pedestal_g2_aligned[i + 4 * packet_number * RAW_MODULE_COLS]) * gain_g2_aligned[i + 4 * packet_number * RAW_MODULE_COLS]; + break; + default: + break; + } + + if (val <= INT16_MIN * (1L << FIXED_PRECISION)) + [[unlikely]] + dest[i] = INT16_MIN; + else if (val >= INT16_MAX * (1L << FIXED_PRECISION)) + [[unlikely]] + dest[i] = INT16_MAX; + else + dest[i] = static_cast(jf_round(val)/ (1L << FIXED_PRECISION)); + } } void JFConversionFixedPoint::ConvertAdjustGeom(int16_t *dest, const uint16_t *source, int64_t slow_dir_step, From b74513ef49c450f56b5e610181620946cc83ba0d Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 6 Jun 2023 18:53:10 +0200 Subject: [PATCH 051/224] ProcessJFPacket: Support up to 32 modules --- jungfrau/ProcessJFPacket.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/jungfrau/ProcessJFPacket.cpp b/jungfrau/ProcessJFPacket.cpp index fb9e6769..16c24d49 100644 --- a/jungfrau/ProcessJFPacket.cpp +++ b/jungfrau/ProcessJFPacket.cpp @@ -33,7 +33,7 @@ void ProcessJFPacket::ProcessPacket(jf_udp_payload *datagram) { uint64_t frame_number = datagram->framenum - 1; - uint32_t module_number = (datagram->xCoord % 32) / 2; + uint32_t module_number = (datagram->xCoord % 64) / 2; bool second_half_module = (datagram->xCoord % 2 == 1); uint32_t packetnum = datagram->packetnum | (second_half_module ? 64 : 0); uint64_t module_info_location = (module_number * 2) | (frame_number % 2); From 190068d8fa1b444a62f6c070695954a428b2ce44 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 6 Jun 2023 18:53:42 +0200 Subject: [PATCH 052/224] JFCalibrationPerfTest: Add parallel conversion test (up to 32 threads) --- tools/JFCalibrationPerfTest.cpp | 139 ++++++++++++++++++-------------- 1 file changed, 80 insertions(+), 59 deletions(-) diff --git a/tools/JFCalibrationPerfTest.cpp b/tools/JFCalibrationPerfTest.cpp index 96aca8b8..09614f06 100644 --- a/tools/JFCalibrationPerfTest.cpp +++ b/tools/JFCalibrationPerfTest.cpp @@ -99,61 +99,6 @@ template void test_conversion(Logger &logger) { ntries * nframes * nmodules * RAW_MODULE_SIZE * sizeof(uint16_t) * 1000 * 1000/ ((double) elapsed.count() * 1024 * 1024 * 1024)); } - -template void test_conversion_with_geom(Logger &logger) { - size_t nframes = 128; - int64_t nmodules = 8; - int64_t ntries = 8; - - DiffractionExperiment x(DetectorGeometry(nmodules, 1, 0, 0, false)); - - std::vector input(nframes * nmodules * RAW_MODULE_SIZE); - std::vector output(nframes * nmodules * CONVERTED_MODULE_SIZE); - - for (int i = 0; i < nmodules * nframes; i++) { - std::string image_path = "../../tests/test_data/mod5_raw" + std::to_string(i % 20) + ".bin"; - LoadBinaryFile(image_path, input.data() + i * RAW_MODULE_SIZE, RAW_MODULE_SIZE); - } - - std::vector v(nmodules); - - JFModuleGainCalibration gain_calib = GainCalibrationFromTestFile(); - - for (int m = 0; m < nmodules; m++) { - JFModulePedestal pedestal_g0; - JFModulePedestal pedestal_g1; - JFModulePedestal pedestal_g2; - - for (int i = 0; i < RAW_MODULE_SIZE; i++) { - pedestal_g0.GetPedestal()[i] = 3000 + i % 50 + m * 135; - pedestal_g1.GetPedestal()[i] = 15000 + i % 50 - m * 135; - pedestal_g2.GetPedestal()[i] = 14000 + i % 50 - m * 135; - } - v[m].Setup(gain_calib, pedestal_g0, pedestal_g1, pedestal_g2, 12.4); - } - - x.Mode(DetectorMode::Conversion); - - logger.Info("JF FP conversion input prepared"); - auto start_time = std::chrono::system_clock::now(); - for (int z = 0; z < ntries; z++) { - for (int i = 0; i < nframes; i++) { - for (int m = 0; m < nmodules; m++) { - v[m].ConvertAdjustGeom(output.data() + (i * nmodules + m) * CONVERTED_MODULE_SIZE, - input.data() + (i * nmodules + m) * RAW_MODULE_SIZE, - x.GetModuleSlowDirectionStep(m), - x.GetModuleFastDirectionStep(m), - 0); - } - } - } - auto end_time = std::chrono::system_clock::now(); - auto elapsed = std::chrono::duration_cast(end_time - start_time); - - logger.Info("Conversion performance: {:5d} us/module {:5.2f} GB/s", std::lround(elapsed.count() / ((double) (ntries * nframes * nmodules))), - ntries * nframes * nmodules * RAW_MODULE_SIZE * sizeof(uint16_t) * 1000 * 1000/ ((double) elapsed.count() * 1024 * 1024 * 1024)); -} - void test_packet_processing(Logger &logger) { size_t nframes = 128; int64_t nmodules = 8; @@ -257,6 +202,74 @@ void test_packet_processing_with_conversion(Logger &logger) { ntries * nframes * nmodules * RAW_MODULE_SIZE * sizeof(uint16_t) * 1000 * 1000/ ((double) elapsed.count() * 1024 * 1024 * 1024)); } +void test_packet_processing_with_conversion_parallel(Logger &logger, int64_t nmodules) { + size_t nframes = 128; + int64_t ntries = 8; + + std::vector packets(nframes * nmodules * 128); + std::vector output(nframes * nmodules * CONVERTED_MODULE_SIZE); + + std::vector input(RAW_MODULE_SIZE); + std::string image_path = "../../tests/test_data/mod5_raw0.bin"; + LoadBinaryFile(image_path, input.data(), RAW_MODULE_SIZE); + + for (int frame = 0; frame < nframes; frame++) { + for (int m = 0; m < nmodules; m++) { + for (int p = 0; p < 128; p++) { + packets.at((frame * 128 + p) * nmodules + m).jf.xCoord = (m * 2); + packets.at((frame * 128 + p) * nmodules + m).jf.packetnum = p; + packets.at((frame * 128 + p) * nmodules + m).jf.framenum = frame + 1; + memcpy(packets.at((frame * 128 + p) * nmodules + m).jf.data, input.data() + 4096 * p, 4096 * sizeof(uint16_t)); + } + } + } + + DiffractionExperiment experiment((DetectorGeometry(nmodules))); + JFCalibration calib(experiment); + experiment.PhotonEnergy_keV(12.4).DataStreams(1); + + for (int m = 0; m < nmodules; m++) { + calib.GainCalibration(m) = GainCalibrationFromTestFile(); + + for (int i = 0; i < RAW_MODULE_SIZE; i++) { + calib.Pedestal(m, 0, 0).GetPedestal()[i] = 3000 + i % 50 + m * 135; + calib.Pedestal(m, 1, 0).GetPedestal()[i] = 15000 + i % 50 - m * 135; + calib.Pedestal(m, 2, 0).GetPedestal()[i] = 14000 + i % 50 - m * 135; + } + } + + auto start_time = std::chrono::system_clock::now(); + for (int z = 0; z < ntries; z++) { + ThreadSafeFIFO c; + ThreadSafeFIFO wr; + ProcessJFPacket process(c, wr, nmodules); + process.RegisterConversion(experiment, calib, 0); + + for (uint32_t i = 0; i < nmodules * nframes; i++) + wr.Put(WorkRequest{ + .ptr = output.data() + i * RAW_MODULE_SIZE, + .handle = i + }); + + std::vector> f; + for (int m = 0; m < nmodules; m++) { + f.emplace_back(std::async(std::launch::async, [&] (int x) { + for (int frame = 0; frame < nframes; frame++) { + for (int i = 0; i < 128; i++) + process.ProcessPacket(&packets[(frame * 128 + i) * nmodules + x].jf); + } + }, m)); + } + for (auto &i: f) + i.get(); + } + auto end_time = std::chrono::system_clock::now(); + auto elapsed = std::chrono::duration_cast(end_time - start_time); + + logger.Info("Packet analysis with conversion performance: {:5d} us/module {:5.2f} GB/s", std::lround(elapsed.count() / ((double) (ntries * nframes * nmodules))), + ntries * nframes * nmodules * RAW_MODULE_SIZE * sizeof(uint16_t) * 1000 * 1000/ ((double) elapsed.count() * 1024 * 1024 * 1024)); +} + int main () { Logger logger("JFCalibrationPerfTest"); test_pedestal(logger); @@ -267,13 +280,21 @@ int main () { logger.Info("Fixed point conversion"); test_conversion(logger); - logger.Info("Fixed point conversion (with geom)"); - test_conversion_with_geom(logger); - logger.Info("Packet processing without conversion"); test_packet_processing(logger); - logger.Info("Packet processing with conversion"); test_packet_processing_with_conversion(logger); + + logger.Info("Packet processing with conversion (4 threads)"); + test_packet_processing_with_conversion_parallel(logger, 4); + + logger.Info("Packet processing with conversion (8 threads)"); + test_packet_processing_with_conversion_parallel(logger, 8); + + logger.Info("Packet processing with conversion (16 threads)"); + test_packet_processing_with_conversion_parallel(logger, 16); + + logger.Info("Packet processing with conversion (32 threads)"); + test_packet_processing_with_conversion_parallel(logger, 32); } From 6a5009280020715ab0f018fe8de6a2051255e045 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 7 Jun 2023 10:13:19 +0200 Subject: [PATCH 053/224] JFConversion: Remove function to do conversion + geometry correction in one go (it makes code complex) --- common/FrameTransformation.cpp | 16 ++++++++++------ common/FrameTransformation.h | 1 + jungfrau/JFConversion.h | 3 --- jungfrau/JFConversionFixedPoint.cpp | 18 ------------------ jungfrau/JFConversionFixedPoint.h | 2 -- jungfrau/JFConversionFloatingPoint.cpp | 20 -------------------- jungfrau/JFConversionFloatingPoint.h | 2 -- 7 files changed, 11 insertions(+), 51 deletions(-) diff --git a/common/FrameTransformation.cpp b/common/FrameTransformation.cpp index 924a29a2..ea24c2a4 100644 --- a/common/FrameTransformation.cpp +++ b/common/FrameTransformation.cpp @@ -12,7 +12,7 @@ FrameTransformation::FrameTransformation(const DiffractionExperiment &in_experiment) : experiment(in_experiment), summation(experiment.GetSummation()), pixel_depth(experiment.GetPixelDepth()), compressor(in_experiment.GetCompressionAlgorithmEnum()), - binning_2x2(experiment.GetBinning2x2()) { + binning_2x2(experiment.GetBinning2x2()), conversion_buffer(RAW_MODULE_SIZE) { if ((experiment.GetDetectorMode() == DetectorMode::Conversion) && (summation > 1)) { for (int i = 0; i < experiment.GetModulesNum(); i++) @@ -163,11 +163,15 @@ void FrameTransformation::ProcessModule(JFConversion &conv, const int16_t *input if (experiment.GetDetectorMode() != DetectorMode::Conversion) memcpy(output + RAW_MODULE_SIZE * module_number_abs, input, RAW_MODULE_SIZE * experiment.GetPixelDepth()); - else - conv.ConvertAdjustGeom((int16_t *) output, (uint16_t *) input, - experiment.GetModuleSlowDirectionStep(module_number_abs), - experiment.GetModuleFastDirectionStep(module_number_abs), - experiment.GetPixel0OfModule(module_number_abs)); + else { + conv.Convert(conversion_buffer.data(), (uint16_t *) input); + TransferModuleAdjustMultipixels(output, conversion_buffer.data(), + experiment.GetModuleSlowDirectionStep(module_number_abs), + static_cast(INT16_MIN), + static_cast(INT16_MAX), + experiment.GetModuleFastDirectionStep(module_number_abs), + experiment.GetPixel0OfModule(module_number_abs)); + } } else { throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Summation with CPU conversion not supported at the moment"); diff --git a/common/FrameTransformation.h b/common/FrameTransformation.h index 13442a2d..99ace14f 100644 --- a/common/FrameTransformation.h +++ b/common/FrameTransformation.h @@ -14,6 +14,7 @@ class FrameTransformation { std::vector > summation_buffer; std::vector precompression_buffer; + std::vector conversion_buffer; std::vector image16bit; const size_t summation; diff --git a/jungfrau/JFConversion.h b/jungfrau/JFConversion.h index ccccb057..c92ee854 100644 --- a/jungfrau/JFConversion.h +++ b/jungfrau/JFConversion.h @@ -21,9 +21,6 @@ public: for (int i = 0; i < 128; i++) ConvertPacket(dest + i * 4 * RAW_MODULE_COLS, source + i * 4 * RAW_MODULE_COLS, i); } - - virtual void ConvertAdjustGeom(int16_t* dest, const uint16_t* source, int64_t slow_dir_step, - int64_t fast_dir_step, int64_t offset) = 0; }; #endif //JUNGFRAUJOCH_JFCONVERSION_H diff --git a/jungfrau/JFConversionFixedPoint.cpp b/jungfrau/JFConversionFixedPoint.cpp index 4b3afb9d..2078aed4 100644 --- a/jungfrau/JFConversionFixedPoint.cpp +++ b/jungfrau/JFConversionFixedPoint.cpp @@ -143,24 +143,6 @@ void JFConversionFixedPoint::ConvertPacket(int16_t *dest, const uint16_t *source } } -void JFConversionFixedPoint::ConvertAdjustGeom(int16_t *dest, const uint16_t *source, int64_t slow_dir_step, - int64_t fast_dir_step, int64_t offset) { - for (int line = 0; line < RAW_MODULE_LINES; line++) { - int16_t tmp[RAW_MODULE_COLS]; - ConvertLine(tmp, source + line * RAW_MODULE_COLS, line); - - if ((line != 255) && (line != 256)) { - LineCopyAndAdjustMultipixel(dest + slow_dir_step * (line + ((line > 255) ? 2 : 0)), - tmp, INT16_MIN, INT16_MAX, fast_dir_step, offset); - } else { - LineCopyAndAdjustMultipixelMidRow(dest + slow_dir_step * (line + 1), - tmp, INT16_MIN, INT16_MAX, fast_dir_step, offset); - LineCopyAndAdjustMultipixelMidRow(dest + slow_dir_step * (line + ((line > 255) ? 2 : 0)), - tmp, INT16_MIN, INT16_MAX, fast_dir_step, offset); - } - } -} - JFConversionFixedPoint::JFConversionFixedPoint(JFConversionFixedPoint &&other) noexcept { gain_g0 = other.gain_g0; other.gain_g0 = nullptr; diff --git a/jungfrau/JFConversionFixedPoint.h b/jungfrau/JFConversionFixedPoint.h index c268e9a4..2a8cb713 100644 --- a/jungfrau/JFConversionFixedPoint.h +++ b/jungfrau/JFConversionFixedPoint.h @@ -27,8 +27,6 @@ public: const JFModulePedestal &pedestal_g2, double energy) override; void ConvertPacket(int16_t* dest, const uint16_t* source, uint16_t packet_number) override; - void ConvertAdjustGeom(int16_t *dest, const uint16_t *source, int64_t slow_dir_step, - int64_t fast_dir_step, int64_t offset) override; }; diff --git a/jungfrau/JFConversionFloatingPoint.cpp b/jungfrau/JFConversionFloatingPoint.cpp index ced82014..f3d14868 100644 --- a/jungfrau/JFConversionFloatingPoint.cpp +++ b/jungfrau/JFConversionFloatingPoint.cpp @@ -76,26 +76,6 @@ void JFConversionFloatingPoint::ConvertFP(float *dest, const uint16_t *source) { } } -void JFConversionFloatingPoint::ConvertAdjustGeom(int16_t *dest, const uint16_t *source, int64_t slow_dir_step, - int64_t fast_dir_step, int64_t offset) { - for (int line = 0; line < RAW_MODULE_LINES; line++) { - int16_t tmp[RAW_MODULE_COLS]; - ConvertLine(tmp, source + line * RAW_MODULE_COLS, line); - - if ((line != 255) && (line != 256)) { - LineCopyAndAdjustMultipixel(dest + slow_dir_step * (line + ((line > 255) ? 2 : 0)), - tmp, INT16_MIN, INT16_MAX, fast_dir_step, offset); - } else { - LineCopyAndAdjustMultipixelMidRow(dest + slow_dir_step * (line + 1), tmp, - INT16_MIN, INT16_MAX, - fast_dir_step, offset); - LineCopyAndAdjustMultipixelMidRow(dest + slow_dir_step * ((line > 255) ? 2 : 0), tmp, - INT16_MIN, INT16_MAX, - fast_dir_step, offset); - } - } -} - void JFConversionFloatingPoint::ConvertLine(int16_t *dest, const uint16_t *source, int line) { for (size_t i = 0; i < RAW_MODULE_COLS; i++) { uint16_t gainbits = source[i] & 0xc000; diff --git a/jungfrau/JFConversionFloatingPoint.h b/jungfrau/JFConversionFloatingPoint.h index d74795be..e515591d 100644 --- a/jungfrau/JFConversionFloatingPoint.h +++ b/jungfrau/JFConversionFloatingPoint.h @@ -25,8 +25,6 @@ public: double energy) override; void ConvertPacket(int16_t* dest, const uint16_t* source, uint16_t packet_number) override; void ConvertFP(float *dest, const uint16_t *source); - void ConvertAdjustGeom(int16_t *dest, const uint16_t *source, int64_t slow_dir_step, - int64_t fast_dir_step, int64_t offset) override; }; From b5d0b34fc83ab8627b828eb035861fa8d9294b70 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 7 Jun 2023 20:49:35 +0200 Subject: [PATCH 054/224] JFConversion: Simplify (processing per module, not per packet) + add GPU conversion procedure - currently only synchronous --- common/FrameTransformation.cpp | 2 +- jungfrau/CMakeLists.txt | 14 ++- jungfrau/JFConversion.h | 7 +- jungfrau/JFConversionFixedPoint.cpp | 10 +- jungfrau/JFConversionFixedPoint.h | 2 +- jungfrau/JFConversionFloatingPoint.cpp | 85 +++++++------ jungfrau/JFConversionFloatingPoint.h | 3 +- jungfrau/JFConversionGPU.cu | 136 +++++++++++++++++++++ jungfrau/JFConversionGPU.h | 49 ++++++++ jungfrau/JFConversionGPU_Alt.cpp | 23 ++++ jungfrau/ProcessJFPacket.cpp | 28 +---- jungfrau/ProcessJFPacket.h | 2 - tests/JFConversionTest.cpp | 129 ++++++++++++++++++-- tests/ProcessRawPacketTest.cpp | 38 ------ tools/JFCalibrationPerfTest.cpp | 157 ++----------------------- 15 files changed, 404 insertions(+), 281 deletions(-) create mode 100644 jungfrau/JFConversionGPU.cu create mode 100644 jungfrau/JFConversionGPU.h create mode 100644 jungfrau/JFConversionGPU_Alt.cpp diff --git a/common/FrameTransformation.cpp b/common/FrameTransformation.cpp index ea24c2a4..14db8989 100644 --- a/common/FrameTransformation.cpp +++ b/common/FrameTransformation.cpp @@ -164,7 +164,7 @@ void FrameTransformation::ProcessModule(JFConversion &conv, const int16_t *input if (experiment.GetDetectorMode() != DetectorMode::Conversion) memcpy(output + RAW_MODULE_SIZE * module_number_abs, input, RAW_MODULE_SIZE * experiment.GetPixelDepth()); else { - conv.Convert(conversion_buffer.data(), (uint16_t *) input); + conv.ConvertModule(conversion_buffer.data(), (uint16_t *) input); TransferModuleAdjustMultipixels(output, conversion_buffer.data(), experiment.GetModuleSlowDirectionStep(module_number_abs), static_cast(INT16_MIN), diff --git a/jungfrau/CMakeLists.txt b/jungfrau/CMakeLists.txt index 10e032ac..ee02541a 100644 --- a/jungfrau/CMakeLists.txt +++ b/jungfrau/CMakeLists.txt @@ -6,8 +6,18 @@ ADD_LIBRARY(JFCalibration STATIC JFModulePedestal.cpp JFModulePedestal.h JFModuleGainCalibration.cpp JFModuleGainCalibration.h JFPedestalCalc.cpp JFPedestalCalc.h - ProcessJFPacket.cpp ProcessJFPacket.h) + ProcessJFPacket.cpp ProcessJFPacket.h + JFConversionGPU.h JFConversionGPU_Alt.cpp) SET_SOURCE_FILES_PROPERTIES(JFPedestalCalc.cpp JFConversionFloatingPoint.cpp JFConversionFixedPoint.cpp PROPERTIES COMPILE_FLAGS -Ofast) -TARGET_LINK_LIBRARIES(JFCalibration JFJochProtoBuf Compression) \ No newline at end of file +TARGET_LINK_LIBRARIES(JFCalibration JFJochProtoBuf Compression) + +IF (CMAKE_CUDA_COMPILER) + TARGET_SOURCES(JFCalibration PRIVATE JFConversionGPU.cu ) + + TARGET_COMPILE_DEFINITIONS(JFCalibration PUBLIC -DJFJOCH_USE_CUDA) + + FIND_LIBRARY(CUDART_LIBRARY cudart_static PATHS ${CMAKE_CUDA_IMPLICIT_LINK_DIRECTORIES} REQUIRED) + TARGET_LINK_LIBRARIES(JFCalibration ${CUDART_LIBRARY} ${CMAKE_DL_LIBS} rt) +ENDIF() diff --git a/jungfrau/JFConversion.h b/jungfrau/JFConversion.h index c92ee854..65ced286 100644 --- a/jungfrau/JFConversion.h +++ b/jungfrau/JFConversion.h @@ -16,11 +16,8 @@ public: const JFModulePedestal &pedestal_g2, double energy) = 0; - virtual void ConvertPacket(int16_t* dest, const uint16_t* source, uint16_t packet_number) = 0; - void Convert(int16_t* dest, const uint16_t* source) { - for (int i = 0; i < 128; i++) - ConvertPacket(dest + i * 4 * RAW_MODULE_COLS, source + i * 4 * RAW_MODULE_COLS, i); - } + virtual void ConvertModule(int16_t* dest, const uint16_t* source) = 0; + virtual void Sync() {}; }; #endif //JUNGFRAUJOCH_JFCONVERSION_H diff --git a/jungfrau/JFConversionFixedPoint.cpp b/jungfrau/JFConversionFixedPoint.cpp index 2078aed4..a81c59c9 100644 --- a/jungfrau/JFConversionFixedPoint.cpp +++ b/jungfrau/JFConversionFixedPoint.cpp @@ -100,7 +100,7 @@ void JFConversionFixedPoint::ConvertLine(int16_t *dest, const uint16_t *source, } } -void JFConversionFixedPoint::ConvertPacket(int16_t *dest, const uint16_t *source, uint16_t packet_number) { +void JFConversionFixedPoint::ConvertModule(int16_t *dest, const uint16_t *source) { auto gain_g0_aligned = std::assume_aligned<64>(gain_g0); auto gain_g1_aligned = std::assume_aligned<64>(gain_g1); auto gain_g2_aligned = std::assume_aligned<64>(gain_g2); @@ -108,7 +108,7 @@ void JFConversionFixedPoint::ConvertPacket(int16_t *dest, const uint16_t *source auto pedestal_g1_aligned = std::assume_aligned<64>(pedestal_g1); auto pedestal_g2_aligned = std::assume_aligned<64>(pedestal_g2); - for (int i = 0; i < 4 * RAW_MODULE_COLS; i++) { + for (int i = 0; i < RAW_MODULE_SIZE; i++) { uint16_t gainbits = source[i] & 0xc000; int32_t adc = source[i] & 0x3fff; int32_t val = INT32_MIN; @@ -116,17 +116,17 @@ void JFConversionFixedPoint::ConvertPacket(int16_t *dest, const uint16_t *source switch (gainbits) { case 0: [[likely]] - val = (adc - pedestal_g0_aligned[i + 4 * packet_number * RAW_MODULE_COLS]) * gain_g0_aligned[i + 4 * packet_number * RAW_MODULE_COLS]; + val = (adc - pedestal_g0_aligned[i]) * gain_g0_aligned[i]; break; case 0x4000: if (source[i] != 0x4000) - val = (adc - pedestal_g1_aligned[i + 4 * packet_number * RAW_MODULE_COLS]) * gain_g1_aligned[i + 4 * packet_number * RAW_MODULE_COLS]; + val = (adc - pedestal_g1_aligned[i]) * gain_g1_aligned[i]; break; case 0xc000: if (source[i] == 0xc000) val = INT32_MAX; else if (source[i] != 0xffff) - val = (adc - pedestal_g2_aligned[i + 4 * packet_number * RAW_MODULE_COLS]) * gain_g2_aligned[i + 4 * packet_number * RAW_MODULE_COLS]; + val = (adc - pedestal_g2_aligned[i]) * gain_g2_aligned[i]; break; default: break; diff --git a/jungfrau/JFConversionFixedPoint.h b/jungfrau/JFConversionFixedPoint.h index 2a8cb713..b0cff7bf 100644 --- a/jungfrau/JFConversionFixedPoint.h +++ b/jungfrau/JFConversionFixedPoint.h @@ -26,7 +26,7 @@ public: const JFModulePedestal &pedestal_g1, const JFModulePedestal &pedestal_g2, double energy) override; - void ConvertPacket(int16_t* dest, const uint16_t* source, uint16_t packet_number) override; + void ConvertModule(int16_t *dest, const uint16_t *source) override; }; diff --git a/jungfrau/JFConversionFloatingPoint.cpp b/jungfrau/JFConversionFloatingPoint.cpp index f3d14868..af68c1dd 100644 --- a/jungfrau/JFConversionFloatingPoint.cpp +++ b/jungfrau/JFConversionFloatingPoint.cpp @@ -33,9 +33,46 @@ void JFConversionFloatingPoint::Setup(const JFModuleGainCalibration &gain_calibr } } -void JFConversionFloatingPoint::ConvertPacket(int16_t* dest, const uint16_t* source, uint16_t packet_number) { - for (int i = 0; i < 4; i++) - ConvertLine(dest + i * RAW_MODULE_COLS, source + i * RAW_MODULE_COLS, 4 * packet_number + i); +void JFConversionFloatingPoint::ConvertModule(int16_t *dest, const uint16_t *source) { + for (size_t i = 0; i < RAW_MODULE_SIZE; i++) { + uint16_t gainbits = source[i] & 0xc000; + uint16_t adc = source[i] & 0x3fff; + int16_t pedestal_subtracted_adu; + + float expected = PIXEL_OUT_LOST; + + switch (gainbits) { + case 0: + [[likely]] + pedestal_subtracted_adu = adc - pedestal_g0[i]; + expected = static_cast(pedestal_subtracted_adu) * gain_g0[i]; + break; + case 0x4000: + pedestal_subtracted_adu = adc - pedestal_g1[i]; + expected = static_cast(pedestal_subtracted_adu) * gain_g1[i]; + if (adc == 0) [[unlikely]] expected = PIXEL_OUT_G1_SATURATION; + break; + case 0xc000: + pedestal_subtracted_adu = adc - pedestal_g2[i]; + expected = static_cast(pedestal_subtracted_adu) * gain_g2[i]; + if (adc == 0) [[unlikely]] expected = PIXEL_OUT_SATURATION; + else if (adc == 0x3fff) [[unlikely]] expected = PIXEL_OUT_0xFFFF; + break; + default: + expected = PIXEL_OUT_GAINBIT_2; + break; + } + + if (std::isinf(expected) || (expected == INT16_MIN)) + dest[i] = PIXEL_OUT_LOST; + else if (expected > INT16_MAX) + dest[i] = INT16_MAX; + else if (expected >= 0.0) + [[likely]] + dest[i] = static_cast(expected + 0.5f); + else + dest[i] = static_cast(expected - 0.5f); + } } void JFConversionFloatingPoint::ConvertFP(float *dest, const uint16_t *source) { @@ -75,45 +112,3 @@ void JFConversionFloatingPoint::ConvertFP(float *dest, const uint16_t *source) { dest[i] = expected; } } - -void JFConversionFloatingPoint::ConvertLine(int16_t *dest, const uint16_t *source, int line) { - for (size_t i = 0; i < RAW_MODULE_COLS; i++) { - uint16_t gainbits = source[i] & 0xc000; - uint16_t adc = source[i] & 0x3fff; - int16_t pedestal_subtracted_adu; - - float expected = PIXEL_OUT_LOST; - - switch (gainbits) { - case 0: - [[likely]] - pedestal_subtracted_adu = adc - pedestal_g0[i + line * RAW_MODULE_COLS]; - expected = static_cast(pedestal_subtracted_adu) * gain_g0[i + line * RAW_MODULE_COLS]; - break; - case 0x4000: - pedestal_subtracted_adu = adc - pedestal_g1[i + line * RAW_MODULE_COLS]; - expected = static_cast(pedestal_subtracted_adu) * gain_g1[i + line * RAW_MODULE_COLS]; - if (adc == 0) [[unlikely]] expected = PIXEL_OUT_G1_SATURATION; - break; - case 0xc000: - pedestal_subtracted_adu = adc - pedestal_g2[i + line * RAW_MODULE_COLS]; - expected = static_cast(pedestal_subtracted_adu) * gain_g2[i + line * RAW_MODULE_COLS]; - if (adc == 0) [[unlikely]] expected = PIXEL_OUT_SATURATION; - else if (adc == 0x3fff) [[unlikely]] expected = PIXEL_OUT_0xFFFF; - break; - default: - expected = PIXEL_OUT_GAINBIT_2; - break; - } - - if (std::isinf(expected) || (expected == INT16_MIN)) - dest[i] = PIXEL_OUT_LOST; - else if (expected > INT16_MAX) - dest[i] = INT16_MAX; - else if (expected >= 0.0) - [[likely]] - dest[i] = static_cast(expected + 0.5f); - else - dest[i] = static_cast(expected - 0.5f); - } -} \ No newline at end of file diff --git a/jungfrau/JFConversionFloatingPoint.h b/jungfrau/JFConversionFloatingPoint.h index e515591d..6f798919 100644 --- a/jungfrau/JFConversionFloatingPoint.h +++ b/jungfrau/JFConversionFloatingPoint.h @@ -14,7 +14,6 @@ class JFConversionFloatingPoint : public JFConversion { std::vector gain_g0; std::vector gain_g1; std::vector gain_g2; - void ConvertLine(int16_t *dest, const uint16_t *source, int line); public: JFConversionFloatingPoint(); @@ -23,7 +22,7 @@ public: const JFModulePedestal &pedestal_g1, const JFModulePedestal &pedestal_g2, double energy) override; - void ConvertPacket(int16_t* dest, const uint16_t* source, uint16_t packet_number) override; + void ConvertModule(int16_t *dest, const uint16_t *source) override; void ConvertFP(float *dest, const uint16_t *source); }; diff --git a/jungfrau/JFConversionGPU.cu b/jungfrau/JFConversionGPU.cu new file mode 100644 index 00000000..c8980fb9 --- /dev/null +++ b/jungfrau/JFConversionGPU.cu @@ -0,0 +1,136 @@ +// Copyright (2019-2023) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#include "JFConversionGPU.h" +#include "../common/JFJochException.h" + +inline void cuda_err(cudaError_t val) { + if (val != cudaSuccess) + throw JFJochException(JFJochExceptionCategory::GPUCUDAError, cudaGetErrorString(val)); +} + +struct CudaStreamWrapper { + cudaStream_t v; +}; + +inline float one_over_gain_energy(double gain_factor, double energy) { + double tmp = gain_factor * energy; + if (!std::isfinite(tmp) || (tmp == 0.0)) + return std::numeric_limits::infinity(); + else + return static_cast(1.0 / (gain_factor * energy)); +} + +__global__ void gpu_jf_convert(int16_t *output, const uint16_t* input, + const uint16_t *pedestal_g0, + const uint16_t *pedestal_g1, + const uint16_t *pedestal_g2, + const float *gain_g0, + const float *gain_g1, + const float *gain_g2) { + uint32_t idx = blockDim.x*blockIdx.x + threadIdx.x; + + uint16_t gainbits = input[idx] & 0xc000; + uint16_t adc = input[idx] & 0x3fff; + int16_t pedestal_subtracted_adu; + + float expected = PIXEL_OUT_LOST; + + switch (gainbits) { + case 0: + pedestal_subtracted_adu = adc - pedestal_g0[idx]; + expected = static_cast(pedestal_subtracted_adu) * gain_g0[idx]; + break; + case 0x4000: + pedestal_subtracted_adu = adc - pedestal_g1[idx]; + expected = static_cast(pedestal_subtracted_adu) * gain_g1[idx]; + if (adc == 0) [[unlikely]] expected = PIXEL_OUT_G1_SATURATION; + break; + case 0xc000: + pedestal_subtracted_adu = adc - pedestal_g2[idx]; + expected = static_cast(pedestal_subtracted_adu) * gain_g2[idx]; + if (adc == 0) [[unlikely]] expected = PIXEL_OUT_SATURATION; + else if (adc == 0x3fff) [[unlikely]] expected = PIXEL_OUT_0xFFFF; + break; + default: + expected = PIXEL_OUT_GAINBIT_2; + break; + } + + output[idx] = std::round(expected); + + if (expected <= INT16_MIN) + output[idx] = PIXEL_OUT_LOST; + else if (expected >= INT16_MAX) + output[idx] = INT16_MAX; +} + +JFConversionGPU::JFConversionGPU() { + cudastream = new(CudaStreamWrapper); + + cuda_err(cudaStreamCreate(&cudastream->v)); + cuda_err(cudaMalloc(&gpu_pedestal_g0, RAW_MODULE_SIZE * sizeof(uint16_t))); + cuda_err(cudaMalloc(&gpu_pedestal_g1, RAW_MODULE_SIZE * sizeof(uint16_t))); + cuda_err(cudaMalloc(&gpu_pedestal_g2, RAW_MODULE_SIZE * sizeof(uint16_t))); + + cuda_err(cudaMalloc(&gpu_gain_g0, RAW_MODULE_SIZE * sizeof(float))); + cuda_err(cudaMalloc(&gpu_gain_g1, RAW_MODULE_SIZE * sizeof(float))); + cuda_err(cudaMalloc(&gpu_gain_g2, RAW_MODULE_SIZE * sizeof(float))); + + cuda_err(cudaMallocHost(&host_gain_g0, RAW_MODULE_SIZE * sizeof(float))); + cuda_err(cudaMallocHost(&host_gain_g1, RAW_MODULE_SIZE * sizeof(float))); + cuda_err(cudaMallocHost(&host_gain_g2, RAW_MODULE_SIZE * sizeof(float))); + + cuda_err(cudaMalloc(&gpu_input, RAW_MODULE_SIZE * sizeof(uint16_t))); + cuda_err(cudaMalloc(&gpu_output, RAW_MODULE_SIZE * sizeof(int16_t))); +} + +JFConversionGPU::~JFConversionGPU() { + cudaStreamSynchronize(cudastream->v); + cudaStreamDestroy(cudastream->v); + delete cudastream; + + cudaFree(gpu_pedestal_g0); + cudaFree(gpu_pedestal_g1); + cudaFree(gpu_pedestal_g2); + + cudaFree(gpu_gain_g0); + cudaFree(gpu_gain_g1); + cudaFree(gpu_gain_g2); + + cudaFreeHost(host_gain_g0); + cudaFreeHost(host_gain_g1); + cudaFreeHost(host_gain_g2); + + cudaFree(gpu_input); + cudaFree(gpu_output); +} + +void JFConversionGPU::Setup(const JFModuleGainCalibration &gain_calibration, const JFModulePedestal &pedestal_g0, + const JFModulePedestal &pedestal_g1, const JFModulePedestal &pedestal_g2, double energy) { + auto &gain_arr = gain_calibration.GetGainCalibration(); + + for (int i = 0; i < RAW_MODULE_SIZE; i++) { + host_gain_g0[i] = one_over_gain_energy(gain_arr[i], energy); + host_gain_g1[i] = one_over_gain_energy(gain_arr[i + RAW_MODULE_SIZE], energy); + host_gain_g2[i] = one_over_gain_energy(gain_arr[i + 2 * RAW_MODULE_SIZE], energy); + } + cudaMemcpy(gpu_pedestal_g0, pedestal_g0.GetPedestal(), RAW_MODULE_SIZE * sizeof(uint16_t), cudaMemcpyHostToDevice); + cudaMemcpy(gpu_pedestal_g1, pedestal_g1.GetPedestal(), RAW_MODULE_SIZE * sizeof(uint16_t), cudaMemcpyHostToDevice); + cudaMemcpy(gpu_pedestal_g2, pedestal_g2.GetPedestal(), RAW_MODULE_SIZE * sizeof(uint16_t), cudaMemcpyHostToDevice); + cudaMemcpy(gpu_gain_g0, host_gain_g0, RAW_MODULE_SIZE * sizeof(float), cudaMemcpyHostToDevice); + cudaMemcpy(gpu_gain_g1, host_gain_g1, RAW_MODULE_SIZE * sizeof(float), cudaMemcpyHostToDevice); + cudaMemcpy(gpu_gain_g2, host_gain_g2, RAW_MODULE_SIZE * sizeof(float), cudaMemcpyHostToDevice); +} + +void JFConversionGPU::ConvertModule(int16_t *dest, const uint16_t *source) { + cudaMemcpy(gpu_input, source, RAW_MODULE_SIZE * sizeof(uint16_t), cudaMemcpyHostToDevice); + gpu_jf_convert<<>>(gpu_output, gpu_input, + gpu_pedestal_g0, gpu_pedestal_g1, gpu_pedestal_g2, + gpu_gain_g0, gpu_gain_g1, gpu_gain_g2); + cudaMemcpy(dest, gpu_output, RAW_MODULE_SIZE * sizeof(uint16_t), cudaMemcpyDeviceToHost); +} + +void JFConversionGPU::Sync() { + cudaStreamSynchronize(cudastream->v); +} \ No newline at end of file diff --git a/jungfrau/JFConversionGPU.h b/jungfrau/JFConversionGPU.h new file mode 100644 index 00000000..9e5d4eb1 --- /dev/null +++ b/jungfrau/JFConversionGPU.h @@ -0,0 +1,49 @@ +// Copyright (2019-2023) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#ifndef JUNGFRAUJOCH_JFCONVERSIONGPU_CUH +#define JUNGFRAUJOCH_JFCONVERSIONGPU_CUH + +#include "JFConversion.h" +#include "JFConversionFixedPoint.h" + +struct CudaStreamWrapper; + +class JFConversionGPU : public JFConversion { +#ifdef JFJOCH_USE_CUDA + CudaStreamWrapper *cudastream = nullptr; + + uint16_t *gpu_pedestal_g0 = nullptr; + uint16_t *gpu_pedestal_g1 = nullptr; + uint16_t *gpu_pedestal_g2 = nullptr; + float *gpu_gain_g0 = nullptr; + float *gpu_gain_g1 = nullptr; + float *gpu_gain_g2 = nullptr; + + float *host_gain_g0 = nullptr; + float *host_gain_g1 = nullptr; + float *host_gain_g2 = nullptr; + + + uint16_t *gpu_input = nullptr; + int16_t *gpu_output = nullptr; +#else + JFConversionFixedPoint alt_conv; +#endif +public: + JFConversionGPU(); + JFConversionGPU(JFConversionGPU& other) = delete; + JFConversionGPU& operator=(JFConversionGPU& other) = delete; + ~JFConversionGPU(); + void Setup(const JFModuleGainCalibration &gain_calibration, + const JFModulePedestal &pedestal_g0, + const JFModulePedestal &pedestal_g1, + const JFModulePedestal &pedestal_g2, + double energy) override; + + void ConvertModule(int16_t *dest, const uint16_t *source) override; + void Sync() override; +}; + + +#endif //JUNGFRAUJOCH_JFCONVERSIONGPU_CUH diff --git a/jungfrau/JFConversionGPU_Alt.cpp b/jungfrau/JFConversionGPU_Alt.cpp new file mode 100644 index 00000000..0a0af1bb --- /dev/null +++ b/jungfrau/JFConversionGPU_Alt.cpp @@ -0,0 +1,23 @@ +// Copyright (2019-2023) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#include "JFConversionGPU.h" + +#ifndef JFJOCH_USE_CUDA + +JFConversionGPU::JFConversionGPU() {} + +JFConversionGPU::~JFConversionGPU() {} + +void JFConversionGPU::Setup(const JFModuleGainCalibration &gain_calibration, const JFModulePedestal &pedestal_g0, + const JFModulePedestal &pedestal_g1, const JFModulePedestal &pedestal_g2, double energy) { + alt_conv.Setup(gain_calibration, pedestal_g0, pedestal_g1, pedestal_g2, energy); +} + +void JFConversionGPU::ConvertPacket(int16_t *dest, const uint16_t *source, uint16_t packet_number) { + alt_conv.ConvertPacket(dest, source, packet_number); +} + +JFConversionGPU::Sync() {} + +#endif diff --git a/jungfrau/ProcessJFPacket.cpp b/jungfrau/ProcessJFPacket.cpp index 16c24d49..21655801 100644 --- a/jungfrau/ProcessJFPacket.cpp +++ b/jungfrau/ProcessJFPacket.cpp @@ -13,8 +13,7 @@ ProcessJFPacket::ProcessJFPacket(ThreadSafeFIFO &in_c, ThreadSafeFIF : m(2 * nmodules), c_fifo(in_c), wr_fifo(in_wr), - module_info(2 * nmodules), - conv(nmodules) + module_info(2 * nmodules) { for (auto &i: module_info) i.c.frame_number = UINT64_MAX; @@ -68,10 +67,7 @@ void ProcessJFPacket::ProcessPacket(jf_udp_payload *datagram) { module_info[module_info_location].c.packet_mask[packetnum >= 64 ? 1 : 0] |= (1LU << (packetnum % 64)); uint16_t* dst = module_info[module_info_location].ptr + 4096 * packetnum; - if (conv[module_number]) - conv[module_number]->ConvertPacket((int16_t *) dst, datagram->data, packetnum); - else - memcpy(dst, datagram->data, 4096 * sizeof(uint16_t)); + memcpy(dst, datagram->data, 4096 * sizeof(uint16_t)); } packet_counter++; } @@ -79,23 +75,3 @@ void ProcessJFPacket::ProcessPacket(jf_udp_payload *datagram) { uint64_t ProcessJFPacket::GetCounter() { return packet_counter; } - -void ProcessJFPacket::RegisterConversion(const DiffractionExperiment &experiment, - const JFCalibration &calib, - uint16_t data_stream) { - if (data_stream >= experiment.GetDataStreamsNum()) - throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, "Data stream not found"); - - if (conv.size() != experiment.GetModulesNum(data_stream)) - throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Wrong module count"); - - auto module0 = experiment.GetFirstModuleOfDataStream(data_stream); - for (int i = 0; i < experiment.GetModulesNum(data_stream); i++) { - conv[i] = std::make_unique(); - conv[i]->Setup(calib.GainCalibration(module0 + i), - calib.Pedestal(module0 + i, 0, 0), - calib.Pedestal(module0 + i, 1, 0), - calib.Pedestal(module0 + i, 2, 0), - experiment.GetPhotonEnergy_keV()); - } -} diff --git a/jungfrau/ProcessJFPacket.h b/jungfrau/ProcessJFPacket.h index 7f428f23..8d4021d7 100644 --- a/jungfrau/ProcessJFPacket.h +++ b/jungfrau/ProcessJFPacket.h @@ -24,11 +24,9 @@ class ProcessJFPacket { ThreadSafeFIFO &wr_fifo; std::vector module_info; std::atomic packet_counter = 0; - std::vector > conv; public: ProcessJFPacket(ThreadSafeFIFO &c, ThreadSafeFIFO &wr, uint32_t nmodules); ~ProcessJFPacket(); - void RegisterConversion(const DiffractionExperiment& experiment, const JFCalibration& calib, uint16_t data_stream); void ProcessPacket(jf_udp_payload *datagram); uint64_t GetCounter(); }; diff --git a/tests/JFConversionTest.cpp b/tests/JFConversionTest.cpp index 72da2ab1..6b448578 100644 --- a/tests/JFConversionTest.cpp +++ b/tests/JFConversionTest.cpp @@ -5,6 +5,7 @@ #include "../tests/FPGAUnitTest.h" #include "../jungfrau/JFConversionFloatingPoint.h" +#include "../jungfrau/JFConversionGPU.h" #include "../jungfrau/JFConversionFixedPoint.h" void SetupPedestal( JFModulePedestal &pedestal_g0, JFModulePedestal &pedestal_g1, JFModulePedestal &pedestal_g2) { @@ -41,7 +42,7 @@ TEST_CASE("JFConversionFloatingPoint_G0","[JFConversion]") { input[i] = i % 16384; for (int i = 0; i < 128; i++) - conv.Convert(output_16bit.data(), input.data()); + conv.ConvertModule(output_16bit.data(), input.data()); conv.ConvertFP(output_fp.data(), input.data()); auto err = Compare(output_16bit.data(), output_fp, RAW_MODULE_SIZE); @@ -76,7 +77,7 @@ TEST_CASE("JFConversionFixedPoint_G0","[JFConversion]") { for (int i = 0; i < RAW_MODULE_SIZE; i++) input[i] = i % 16384; - conv.Convert(output_16bit.data(), input.data()); + conv.ConvertModule(output_16bit.data(), input.data()); conv_fp.ConvertFP(output_fp.data(), input.data()); auto err = Compare(output_16bit.data(), output_fp, RAW_MODULE_SIZE); @@ -88,6 +89,42 @@ TEST_CASE("JFConversionFixedPoint_G0","[JFConversion]") { } } +TEST_CASE("JFConversionGPU_G0","[JFConversion]") { + JFConversionGPU conv; + JFConversionFloatingPoint conv_fp; + + JFModulePedestal pedestal_g0; + JFModulePedestal pedestal_g1; + JFModulePedestal pedestal_g2; + + SetupPedestal(pedestal_g0, pedestal_g1, pedestal_g2); + + JFModuleGainCalibration gain; + + std::vector energy{4.0, 6.0, 12.4, 25.0}; + for (auto &e: energy) { + conv.Setup(gain, pedestal_g0, pedestal_g1, pedestal_g2, e); + conv_fp.Setup(gain, pedestal_g0, pedestal_g1, pedestal_g2, e); + + std::vector input(RAW_MODULE_SIZE); + std::vector output_fp(RAW_MODULE_SIZE); + std::vector output_16bit(RAW_MODULE_SIZE); + + for (int i = 0; i < RAW_MODULE_SIZE; i++) + input[i] = i % 16384; + + conv.ConvertModule(output_16bit.data(), input.data()); + conv_fp.ConvertFP(output_fp.data(), input.data()); + conv.Sync(); + + auto err = Compare(output_16bit.data(), output_fp, RAW_MODULE_SIZE); + auto max_err = MaxErrorOnConversion(output_16bit.data(), output_fp, RAW_MODULE_SIZE); + std::cout << "Error on conversion " << err << " max error " << max_err << std::endl; + REQUIRE(err < 0.5); + REQUIRE(max_err <= 1.0); + } +} + TEST_CASE("JFConversionFixedPoint_G0_TestFile","[JFConversion]") { JFConversionFixedPoint conv; JFConversionFloatingPoint conv_fp; @@ -112,7 +149,7 @@ TEST_CASE("JFConversionFixedPoint_G0_TestFile","[JFConversion]") { for (int i = 0; i < RAW_MODULE_SIZE; i++) input[i] = i % 16384; - conv.Convert(output_16bit.data(), input.data()); + conv.ConvertModule(output_16bit.data(), input.data()); conv_fp.ConvertFP(output_fp.data(), input.data()); auto err = Compare(output_16bit.data(), output_fp, RAW_MODULE_SIZE); @@ -144,7 +181,7 @@ TEST_CASE("JFConversionFloatingPoint_G1","[JFConversion]") { for (int i = 0; i < RAW_MODULE_SIZE; i++) input[i] = (i % 16384) | 0x4000; - conv.Convert(output_16bit.data(), input.data()); + conv.ConvertModule(output_16bit.data(), input.data()); conv.ConvertFP(output_fp.data(), input.data()); auto err = Compare(output_16bit.data(), output_fp, RAW_MODULE_SIZE); @@ -179,7 +216,7 @@ TEST_CASE("JFConversionFixedPoint_G1","[JFConversion]") { for (int i = 0; i < RAW_MODULE_SIZE; i++) input[i] = (i % 16384) | 0x4000; - conv.Convert(output_16bit.data(), input.data()); + conv.ConvertModule(output_16bit.data(), input.data()); conv_fp.ConvertFP(output_fp.data(), input.data()); auto err = Compare(output_16bit.data(), output_fp, RAW_MODULE_SIZE); @@ -191,6 +228,43 @@ TEST_CASE("JFConversionFixedPoint_G1","[JFConversion]") { } } +TEST_CASE("JFConversionGPU_G1","[JFConversion]") { + JFConversionGPU conv; + JFConversionFloatingPoint conv_fp; + + JFModulePedestal pedestal_g0; + JFModulePedestal pedestal_g1; + JFModulePedestal pedestal_g2; + + SetupPedestal(pedestal_g0, pedestal_g1, pedestal_g2); + + JFModuleGainCalibration gain; + + std::vector energy{4.0, 6.0, 12.4, 25.0}; + for (auto &e: energy) { + conv.Setup(gain, pedestal_g0, pedestal_g1, pedestal_g2, e); + conv_fp.Setup(gain, pedestal_g0, pedestal_g1, pedestal_g2, e); + + std::vector input(RAW_MODULE_SIZE); + std::vector output_fp(RAW_MODULE_SIZE); + std::vector output_16bit(RAW_MODULE_SIZE); + + for (int i = 0; i < RAW_MODULE_SIZE; i++) + input[i] = (i % 16384) | 0x4000; + + conv.ConvertModule(output_16bit.data(), input.data()); + conv_fp.ConvertFP(output_fp.data(), input.data()); + conv.Sync(); + + auto err = Compare(output_16bit.data(), output_fp, RAW_MODULE_SIZE); + auto max_err = MaxErrorOnConversion(output_16bit.data(), output_fp, RAW_MODULE_SIZE); + + std::cout << "Error on conversion " << err << " max error " << max_err << std::endl; + REQUIRE(err < 0.5); + REQUIRE(max_err <= 1.0); + } +} + TEST_CASE("JFConversionFloatingPoint_G2","[JFConversion]") { JFConversionFloatingPoint conv; @@ -211,7 +285,7 @@ TEST_CASE("JFConversionFloatingPoint_G2","[JFConversion]") { for (int i = 0; i < RAW_MODULE_SIZE; i++) input[i] = (i % 16384) | 0xC000; - conv.Convert(output_16bit.data(), input.data()); + conv.ConvertModule(output_16bit.data(), input.data()); conv.ConvertFP(output_fp.data(), input.data()); auto err = Compare(output_16bit.data(), output_fp, RAW_MODULE_SIZE); @@ -246,7 +320,7 @@ TEST_CASE("JFConversionFixedPoint_G2","[JFConversion]") { for (int i = 0; i < RAW_MODULE_SIZE; i++) input[i] = (i % 16384) | 0xC000; - conv.Convert(output_16bit.data(), input.data()); + conv.ConvertModule(output_16bit.data(), input.data()); conv_fp.ConvertFP(output_fp.data(), input.data()); auto err = Compare(output_16bit.data(), output_fp, RAW_MODULE_SIZE); @@ -258,6 +332,43 @@ TEST_CASE("JFConversionFixedPoint_G2","[JFConversion]") { } } +TEST_CASE("JFConversionGPU_G2","[JFConversion]") { + JFConversionGPU conv; + JFConversionFloatingPoint conv_fp; + + JFModulePedestal pedestal_g0; + JFModulePedestal pedestal_g1; + JFModulePedestal pedestal_g2; + + SetupPedestal(pedestal_g0, pedestal_g1, pedestal_g2); + + JFModuleGainCalibration gain; + + std::vector energy{4.0, 6.0, 12.4, 25.0}; + for (auto &e: energy) { + conv.Setup(gain, pedestal_g0, pedestal_g1, pedestal_g2, e); + conv_fp.Setup(gain, pedestal_g0, pedestal_g1, pedestal_g2, e); + + std::vector input(RAW_MODULE_SIZE); + std::vector output_fp(RAW_MODULE_SIZE); + std::vector output_16bit(RAW_MODULE_SIZE); + + for (int i = 0; i < RAW_MODULE_SIZE; i++) + input[i] = (i % 16384) | 0xC000; + + conv.ConvertModule(output_16bit.data(), input.data()); + conv_fp.ConvertFP(output_fp.data(), input.data()); + conv.Sync(); + + auto err = Compare(output_16bit.data(), output_fp, RAW_MODULE_SIZE); + auto max_err = MaxErrorOnConversion(output_16bit.data(), output_fp, RAW_MODULE_SIZE); + + std::cout << "Error on conversion " << err << " max error " << max_err << std::endl; + REQUIRE(err < 0.5); + REQUIRE(max_err <= 1.0); + } +} + TEST_CASE("JFConversionFixedPoint_G1_TestFile","[JFConversion]") { JFConversionFixedPoint conv; JFConversionFloatingPoint conv_fp; @@ -282,7 +393,7 @@ TEST_CASE("JFConversionFixedPoint_G1_TestFile","[JFConversion]") { for (int i = 0; i < RAW_MODULE_SIZE; i++) input[i] = (i % 16384) | 0x4000; - conv.Convert(output_16bit.data(), input.data()); + conv.ConvertModule(output_16bit.data(), input.data()); conv_fp.ConvertFP(output_fp.data(), input.data()); auto err = Compare(output_16bit.data(), output_fp, RAW_MODULE_SIZE); @@ -318,7 +429,7 @@ TEST_CASE("JFConversionFixedPoint_G2_TestFile","[JFConversion]") { for (int i = 0; i < RAW_MODULE_SIZE; i++) input[i] = (i % 16384) | 0xC000; - conv.Convert(output_16bit.data(), input.data()); + conv.ConvertModule(output_16bit.data(), input.data()); conv_fp.ConvertFP(output_fp.data(), input.data()); auto err = Compare(output_16bit.data(), output_fp, RAW_MODULE_SIZE); diff --git a/tests/ProcessRawPacketTest.cpp b/tests/ProcessRawPacketTest.cpp index e23593aa..16f415c2 100644 --- a/tests/ProcessRawPacketTest.cpp +++ b/tests/ProcessRawPacketTest.cpp @@ -92,41 +92,3 @@ TEST_CASE("ProcessRawPacketTest") { CHECK(array_1[4096*(36+64)] == 6345); CHECK(array_2[4096*(16+64)] == 6346); } - -TEST_CASE("ProcessRawPacketTest_Conversion") { - ThreadSafeFIFO c_fifo; - ThreadSafeFIFO wr_fifo; - - std::vector array_0(RAW_MODULE_SIZE); - - wr_fifo.Put(WorkRequest{.ptr = array_0.data(), .handle = 0}); - - DiffractionExperiment experiment(DetectorGeometry(8)); - experiment.DataStreams(2).PhotonEnergy_keV(2); - JFCalibration calibration(experiment); - calibration.Pedestal(6, 0, 0).GetPedestal()[4096*36] = 300; - calibration.Pedestal(6, 1, 0).GetPedestal()[4096*36+1] = 15000; - calibration.Pedestal(6, 2, 0).GetPedestal()[4096*36+2] = 14000; - - { - ProcessJFPacket process(c_fifo, wr_fifo, 4); - REQUIRE_NOTHROW(process.RegisterConversion(experiment, calibration, 1)); - jf_udp_payload datagram; - - datagram.packetnum = 36; - datagram.framenum = 2; - datagram.bunchid = 84; - datagram.data[0] = 600; - datagram.data[1] = 16384 | 4000; - datagram.data[2] = 32768 | 16384 | 9000; - - datagram.xCoord = 4; - process.ProcessPacket(&datagram); - - REQUIRE(process.GetCounter() == 1); - } - - CHECK(array_0[4096*36] == std::round((600 - 300) / (DEFAULT_G0_FACTOR*2))); - CHECK(array_0[4096*36+1] == std::round((4000 - 15000) / (DEFAULT_G1_FACTOR*2))); - CHECK(array_0[4096*36+2] == std::round((9000 - 14000) / (DEFAULT_G2_FACTOR*2))); -} \ No newline at end of file diff --git a/tools/JFCalibrationPerfTest.cpp b/tools/JFCalibrationPerfTest.cpp index 09614f06..6ea3fe7c 100644 --- a/tools/JFCalibrationPerfTest.cpp +++ b/tools/JFCalibrationPerfTest.cpp @@ -6,11 +6,14 @@ #include #include +#include + #include "../jungfrau/JFPedestalCalc.h" #include "../common/Logger.h" #include "../jungfrau/JFCalibration.h" #include "../jungfrau/JFConversionFloatingPoint.h" #include "../jungfrau/JFConversionFixedPoint.h" +#include "../jungfrau/JFConversionGPU.h" #include "../tests/FPGAUnitTest.h" #include "../jungfrau/jf_packet.h" #include "../jungfrau/ProcessJFPacket.h" @@ -82,16 +85,19 @@ template void test_conversion(Logger &logger) { x.Mode(DetectorMode::Conversion); - logger.Info("JF FP conversion input prepared"); auto start_time = std::chrono::system_clock::now(); for (int z = 0; z < ntries; z++) { for (int i = 0; i < nframes; i++) { for (int m = 0; m < nmodules; m++) { - v[m].Convert(output.data() + (i * nmodules + m) * RAW_MODULE_SIZE, + v[m].ConvertModule(output.data() + (i * nmodules + m) * RAW_MODULE_SIZE, input.data() + (i * nmodules + m) * RAW_MODULE_SIZE); } } } + + for (int m = 0; m < nmodules; m++) + v[m].Sync(); + auto end_time = std::chrono::system_clock::now(); auto elapsed = std::chrono::duration_cast(end_time - start_time); @@ -143,133 +149,6 @@ void test_packet_processing(Logger &logger) { ntries * nframes * nmodules * RAW_MODULE_SIZE * sizeof(uint16_t) * 1000 * 1000/ ((double) elapsed.count() * 1024 * 1024 * 1024)); } -void test_packet_processing_with_conversion(Logger &logger) { - size_t nframes = 128; - int64_t nmodules = 8; - int64_t ntries = 8; - - std::vector packets(nframes * nmodules * 128); - std::vector output(nframes * nmodules * CONVERTED_MODULE_SIZE); - - std::vector input(RAW_MODULE_SIZE); - std::string image_path = "../../tests/test_data/mod5_raw0.bin"; - LoadBinaryFile(image_path, input.data(), RAW_MODULE_SIZE); - - for (int frame = 0; frame < nframes; frame++) { - for (int m = 0; m < nmodules; m++) { - for (int p = 0; p < 128; p++) { - packets.at((frame * 128 + p) * nmodules + m).jf.xCoord = (m * 2); - packets.at((frame * 128 + p) * nmodules + m).jf.packetnum = p; - packets.at((frame * 128 + p) * nmodules + m).jf.framenum = frame + 1; - memcpy(packets.at((frame * 128 + p) * nmodules + m).jf.data, input.data() + 4096 * p, 4096 * sizeof(uint16_t)); - } - } - } - - DiffractionExperiment experiment((DetectorGeometry(nmodules))); - JFCalibration calib(experiment); - experiment.PhotonEnergy_keV(12.4).DataStreams(1); - - for (int m = 0; m < nmodules; m++) { - calib.GainCalibration(m) = GainCalibrationFromTestFile(); - - for (int i = 0; i < RAW_MODULE_SIZE; i++) { - calib.Pedestal(m, 0, 0).GetPedestal()[i] = 3000 + i % 50 + m * 135; - calib.Pedestal(m, 1, 0).GetPedestal()[i] = 15000 + i % 50 - m * 135; - calib.Pedestal(m, 2, 0).GetPedestal()[i] = 14000 + i % 50 - m * 135; - } - } - - auto start_time = std::chrono::system_clock::now(); - for (int z = 0; z < ntries; z++) { - ThreadSafeFIFO c; - ThreadSafeFIFO wr; - ProcessJFPacket process(c, wr, nmodules); - process.RegisterConversion(experiment, calib, 0); - - for (uint32_t i = 0; i < nmodules * nframes; i++) - wr.Put(WorkRequest{ - .ptr = output.data() + i * RAW_MODULE_SIZE, - .handle = i - }); - for (auto &packet: packets) - process.ProcessPacket(&packet.jf); - } - auto end_time = std::chrono::system_clock::now(); - auto elapsed = std::chrono::duration_cast(end_time - start_time); - - logger.Info("Packet analysis with conversion performance: {:5d} us/module {:5.2f} GB/s", std::lround(elapsed.count() / ((double) (ntries * nframes * nmodules))), - ntries * nframes * nmodules * RAW_MODULE_SIZE * sizeof(uint16_t) * 1000 * 1000/ ((double) elapsed.count() * 1024 * 1024 * 1024)); -} - -void test_packet_processing_with_conversion_parallel(Logger &logger, int64_t nmodules) { - size_t nframes = 128; - int64_t ntries = 8; - - std::vector packets(nframes * nmodules * 128); - std::vector output(nframes * nmodules * CONVERTED_MODULE_SIZE); - - std::vector input(RAW_MODULE_SIZE); - std::string image_path = "../../tests/test_data/mod5_raw0.bin"; - LoadBinaryFile(image_path, input.data(), RAW_MODULE_SIZE); - - for (int frame = 0; frame < nframes; frame++) { - for (int m = 0; m < nmodules; m++) { - for (int p = 0; p < 128; p++) { - packets.at((frame * 128 + p) * nmodules + m).jf.xCoord = (m * 2); - packets.at((frame * 128 + p) * nmodules + m).jf.packetnum = p; - packets.at((frame * 128 + p) * nmodules + m).jf.framenum = frame + 1; - memcpy(packets.at((frame * 128 + p) * nmodules + m).jf.data, input.data() + 4096 * p, 4096 * sizeof(uint16_t)); - } - } - } - - DiffractionExperiment experiment((DetectorGeometry(nmodules))); - JFCalibration calib(experiment); - experiment.PhotonEnergy_keV(12.4).DataStreams(1); - - for (int m = 0; m < nmodules; m++) { - calib.GainCalibration(m) = GainCalibrationFromTestFile(); - - for (int i = 0; i < RAW_MODULE_SIZE; i++) { - calib.Pedestal(m, 0, 0).GetPedestal()[i] = 3000 + i % 50 + m * 135; - calib.Pedestal(m, 1, 0).GetPedestal()[i] = 15000 + i % 50 - m * 135; - calib.Pedestal(m, 2, 0).GetPedestal()[i] = 14000 + i % 50 - m * 135; - } - } - - auto start_time = std::chrono::system_clock::now(); - for (int z = 0; z < ntries; z++) { - ThreadSafeFIFO c; - ThreadSafeFIFO wr; - ProcessJFPacket process(c, wr, nmodules); - process.RegisterConversion(experiment, calib, 0); - - for (uint32_t i = 0; i < nmodules * nframes; i++) - wr.Put(WorkRequest{ - .ptr = output.data() + i * RAW_MODULE_SIZE, - .handle = i - }); - - std::vector> f; - for (int m = 0; m < nmodules; m++) { - f.emplace_back(std::async(std::launch::async, [&] (int x) { - for (int frame = 0; frame < nframes; frame++) { - for (int i = 0; i < 128; i++) - process.ProcessPacket(&packets[(frame * 128 + i) * nmodules + x].jf); - } - }, m)); - } - for (auto &i: f) - i.get(); - } - auto end_time = std::chrono::system_clock::now(); - auto elapsed = std::chrono::duration_cast(end_time - start_time); - - logger.Info("Packet analysis with conversion performance: {:5d} us/module {:5.2f} GB/s", std::lround(elapsed.count() / ((double) (ntries * nframes * nmodules))), - ntries * nframes * nmodules * RAW_MODULE_SIZE * sizeof(uint16_t) * 1000 * 1000/ ((double) elapsed.count() * 1024 * 1024 * 1024)); -} - int main () { Logger logger("JFCalibrationPerfTest"); test_pedestal(logger); @@ -280,21 +159,9 @@ int main () { logger.Info("Fixed point conversion"); test_conversion(logger); - logger.Info("Packet processing without conversion"); + logger.Info("Floating point conversion (GPU)"); + test_conversion(logger); + + logger.Info("Packet processing"); test_packet_processing(logger); - - logger.Info("Packet processing with conversion"); - test_packet_processing_with_conversion(logger); - - logger.Info("Packet processing with conversion (4 threads)"); - test_packet_processing_with_conversion_parallel(logger, 4); - - logger.Info("Packet processing with conversion (8 threads)"); - test_packet_processing_with_conversion_parallel(logger, 8); - - logger.Info("Packet processing with conversion (16 threads)"); - test_packet_processing_with_conversion_parallel(logger, 16); - - logger.Info("Packet processing with conversion (32 threads)"); - test_packet_processing_with_conversion_parallel(logger, 32); } From 0b1bae7e8e8b68f5831a96bf318dfb7027e61a8a Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 7 Jun 2023 21:01:04 +0200 Subject: [PATCH 055/224] CMake: Minor fix to handle missing IBVERBS --- receiver/host/CMakeLists.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/receiver/host/CMakeLists.txt b/receiver/host/CMakeLists.txt index 84ab4a32..61898b19 100644 --- a/receiver/host/CMakeLists.txt +++ b/receiver/host/CMakeLists.txt @@ -9,11 +9,12 @@ ADD_LIBRARY(JungfraujochHost STATIC MlxRawEthDevice.cpp MlxRawEthDevice.h ../../jungfrau/jf_packet.h LinuxSocketDevice.cpp LinuxSocketDevice.h FPGAAcquisitionDevice.cpp FPGAAcquisitionDevice.h) -TARGET_LINK_LIBRARIES(JungfraujochHost CommonFunctions HLSSimulation ${IBVERBS} JFCalibration) +TARGET_LINK_LIBRARIES(JungfraujochHost CommonFunctions HLSSimulation JFCalibration) TARGET_INCLUDE_DIRECTORIES(JungfraujochHost PUBLIC ../../include) FIND_LIBRARY(IBVERBS NAMES ibverbs DOC "Infiniband verbs") + IF(IBVERBS) TARGET_COMPILE_DEFINITIONS(JungfraujochHost PUBLIC -DJFJOCH_USE_IBVERBS) TARGET_LINK_LIBRARIES(JungfraujochHost ${IBVERBS}) From 7a98766304ae8119a0ddc1e60a179befaaff5094 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 7 Jun 2023 21:18:53 +0200 Subject: [PATCH 056/224] FPGA: Split receiver and FPGA design directories --- .gitlab-ci.yml | 22 +++++++------- CMakeLists.txt | 1 + fpga/CMakeLists.txt | 30 +++++++++++++++++++ {receiver => fpga}/README.md | 6 ++-- {receiver => fpga}/hdl/action_config.v | 0 {receiver => fpga}/hdl/action_wrapper.v | 0 .../hdl/check_datamover_error.v | 0 {receiver => fpga}/hdl/check_eth_busy.v | 0 {receiver => fpga}/hdl/gen_xdma_descriptor.v | 0 {receiver => fpga}/hdl/refclk300to100.v | 0 {receiver => fpga}/hdl/resetn_sync.v | 0 {receiver => fpga}/hls/CMakeLists.txt | 0 {receiver => fpga}/hls/arp.cpp | 0 .../hls/data_collection_fsm.cpp | 0 .../include => fpga/hls}/datamover_model.h | 3 +- {receiver => fpga}/hls/ethernet.cpp | 0 {receiver => fpga}/hls/hls_jfjoch.h | 2 +- {receiver => fpga}/hls/host_writer.cpp | 0 {receiver => fpga}/hls/icmp.cpp | 0 .../hls/internal_packet_generator.cpp | 0 {receiver => fpga}/hls/ip_header_checksum.h | 0 {receiver => fpga}/hls/ipv4.cpp | 0 {receiver => fpga}/hls/jf_conversion.cpp | 0 {receiver => fpga}/hls/load_calibration.cpp | 0 .../include => fpga/hls}/parallel_stream.h | 0 {receiver => fpga}/hls/sls_detector.cpp | 0 {receiver => fpga}/hls/timer.cpp | 0 {receiver => fpga}/hls/udp.cpp | 0 .../include/LICENSE.HLS_Headers | 0 {receiver => fpga}/include/ap_common.h | 0 {receiver => fpga}/include/ap_decl.h | 0 {receiver => fpga}/include/ap_fixed.h | 0 {receiver => fpga}/include/ap_fixed_base.h | 0 {receiver => fpga}/include/ap_fixed_ref.h | 0 {receiver => fpga}/include/ap_fixed_special.h | 0 {receiver => fpga}/include/ap_int.h | 0 {receiver => fpga}/include/ap_int_base.h | 0 {receiver => fpga}/include/ap_int_ref.h | 0 {receiver => fpga}/include/ap_int_special.h | 0 {receiver => fpga}/include/ap_shift_reg.h | 0 {receiver => fpga}/include/etc/ap_private.h | 0 {receiver => fpga}/include/hls_burst_maxi.h | 0 .../host => fpga/pcie_driver}/ActionConfig.h | 0 {receiver => fpga}/pcie_driver/CMakeLists.txt | 0 {receiver => fpga}/pcie_driver/Makefile | 0 {receiver => fpga}/pcie_driver/jfjoch_drv.c | 0 {receiver => fpga}/pcie_driver/jfjoch_drv.h | 0 .../pcie_driver/jfjoch_function.c | 0 {receiver => fpga}/pcie_driver/jfjoch_ioctl.c | 0 {receiver => fpga}/pcie_driver/jfjoch_ioctl.h | 2 +- .../pcie_driver/jfjoch_memory.c | 0 .../pcie_driver/jfjoch_miscdev.c | 0 .../pcie_driver/jfjoch_pcie_setup.c | 0 {receiver => fpga}/scripts/bd_pcie.tcl | 0 .../scripts/build_pcie_design.tcl | 0 {receiver => fpga}/scripts/check_hls.sh | 0 {receiver => fpga}/scripts/hbm_u55c.tcl | 0 {receiver => fpga}/scripts/jfjoch.tcl | 0 {receiver => fpga}/scripts/mac_100g_pcie.tcl | 0 {receiver => fpga}/scripts/network_stack.tcl | 0 {receiver => fpga}/scripts/pcie_dma.tcl | 0 {receiver => fpga}/scripts/setup_action.sh | 0 {receiver => fpga}/scripts/snap_env.sh | 0 {receiver => fpga}/scripts/synth_and_impl.tcl | 0 .../scripts/synth_hls_function.tcl | 0 {receiver => fpga}/xdc/pcie_timing.xdc | 0 {receiver => fpga}/xdc/pcie_u55c.xdc | 0 receiver/CMakeLists.txt | 30 ------------------- receiver/host/CMakeLists.txt | 2 +- receiver/host/FPGAAcquisitionDevice.h | 2 +- receiver/host/HLSSimulatedDevice.cpp | 3 +- receiver/host/HLSSimulatedDevice.h | 5 ++-- tests/ActionConfigTest.cpp | 2 +- 73 files changed, 57 insertions(+), 53 deletions(-) create mode 100644 fpga/CMakeLists.txt rename {receiver => fpga}/README.md (99%) rename {receiver => fpga}/hdl/action_config.v (100%) rename {receiver => fpga}/hdl/action_wrapper.v (100%) rename {receiver => fpga}/hdl/check_datamover_error.v (100%) rename {receiver => fpga}/hdl/check_eth_busy.v (100%) rename {receiver => fpga}/hdl/gen_xdma_descriptor.v (100%) rename {receiver => fpga}/hdl/refclk300to100.v (100%) rename {receiver => fpga}/hdl/resetn_sync.v (100%) rename {receiver => fpga}/hls/CMakeLists.txt (100%) rename {receiver => fpga}/hls/arp.cpp (100%) rename {receiver => fpga}/hls/data_collection_fsm.cpp (100%) rename {receiver/include => fpga/hls}/datamover_model.h (99%) rename {receiver => fpga}/hls/ethernet.cpp (100%) rename {receiver => fpga}/hls/hls_jfjoch.h (99%) rename {receiver => fpga}/hls/host_writer.cpp (100%) rename {receiver => fpga}/hls/icmp.cpp (100%) rename {receiver => fpga}/hls/internal_packet_generator.cpp (100%) rename {receiver => fpga}/hls/ip_header_checksum.h (100%) rename {receiver => fpga}/hls/ipv4.cpp (100%) rename {receiver => fpga}/hls/jf_conversion.cpp (100%) rename {receiver => fpga}/hls/load_calibration.cpp (100%) rename {receiver/include => fpga/hls}/parallel_stream.h (100%) rename {receiver => fpga}/hls/sls_detector.cpp (100%) rename {receiver => fpga}/hls/timer.cpp (100%) rename {receiver => fpga}/hls/udp.cpp (100%) rename {receiver => fpga}/include/LICENSE.HLS_Headers (100%) rename {receiver => fpga}/include/ap_common.h (100%) rename {receiver => fpga}/include/ap_decl.h (100%) rename {receiver => fpga}/include/ap_fixed.h (100%) rename {receiver => fpga}/include/ap_fixed_base.h (100%) rename {receiver => fpga}/include/ap_fixed_ref.h (100%) rename {receiver => fpga}/include/ap_fixed_special.h (100%) rename {receiver => fpga}/include/ap_int.h (100%) rename {receiver => fpga}/include/ap_int_base.h (100%) rename {receiver => fpga}/include/ap_int_ref.h (100%) rename {receiver => fpga}/include/ap_int_special.h (100%) rename {receiver => fpga}/include/ap_shift_reg.h (100%) rename {receiver => fpga}/include/etc/ap_private.h (100%) rename {receiver => fpga}/include/hls_burst_maxi.h (100%) rename {receiver/host => fpga/pcie_driver}/ActionConfig.h (100%) rename {receiver => fpga}/pcie_driver/CMakeLists.txt (100%) rename {receiver => fpga}/pcie_driver/Makefile (100%) rename {receiver => fpga}/pcie_driver/jfjoch_drv.c (100%) rename {receiver => fpga}/pcie_driver/jfjoch_drv.h (100%) rename {receiver => fpga}/pcie_driver/jfjoch_function.c (100%) rename {receiver => fpga}/pcie_driver/jfjoch_ioctl.c (100%) rename {receiver => fpga}/pcie_driver/jfjoch_ioctl.h (98%) rename {receiver => fpga}/pcie_driver/jfjoch_memory.c (100%) rename {receiver => fpga}/pcie_driver/jfjoch_miscdev.c (100%) rename {receiver => fpga}/pcie_driver/jfjoch_pcie_setup.c (100%) rename {receiver => fpga}/scripts/bd_pcie.tcl (100%) rename {receiver => fpga}/scripts/build_pcie_design.tcl (100%) rename {receiver => fpga}/scripts/check_hls.sh (100%) rename {receiver => fpga}/scripts/hbm_u55c.tcl (100%) rename {receiver => fpga}/scripts/jfjoch.tcl (100%) rename {receiver => fpga}/scripts/mac_100g_pcie.tcl (100%) rename {receiver => fpga}/scripts/network_stack.tcl (100%) rename {receiver => fpga}/scripts/pcie_dma.tcl (100%) rename {receiver => fpga}/scripts/setup_action.sh (100%) rename {receiver => fpga}/scripts/snap_env.sh (100%) rename {receiver => fpga}/scripts/synth_and_impl.tcl (100%) rename {receiver => fpga}/scripts/synth_hls_function.tcl (100%) rename {receiver => fpga}/xdc/pcie_timing.xdc (100%) rename {receiver => fpga}/xdc/pcie_u55c.xdc (100%) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 8fbfdfc0..1654014a 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -65,11 +65,11 @@ build:x86:vitis_hls: rules: - if: '$CI_PIPELINE_SOURCE == "push"' changes: - - receiver/hls/* - - receiver/hdl/* - - receiver/scripts/* - - receiver/xdc/* - - receiver/microblaze/* + - fpga/hls/* + - fpga/hdl/* + - fpga/scripts/* + - fpga/xdc/* + - fpga/microblaze/* - common/Definitions.h script: - source /opt/Xilinx/Vitis_HLS/2022.1/settings64.sh @@ -196,17 +196,17 @@ synthesis:vivado_pcie: rules: - if: '$CI_PIPELINE_SOURCE == "push"' changes: - - receiver/hls/* - - receiver/hdl/* - - receiver/scripts/* - - receiver/xdc/* + - fpga/hls/* + - fpga/hdl/* + - fpga/scripts/* + - fpga/xdc/* - common/Definitions.h tags: - vivado artifacts: paths: - - build/receiver/*.mcs - - build/receiver/*.bit + - build/fpga/*.mcs + - build/fpga/*.bit expire_in: 1 week script: - source /opt/grpc/grpc.sh diff --git a/CMakeLists.txt b/CMakeLists.txt index 70480655..54aca17c 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -47,6 +47,7 @@ ADD_SUBDIRECTORY(etc) SET(jfjoch_executables jfjoch_broker) IF (JFJOCH_COMPILE_TESTS OR JFJOCH_COMPILE_RECEIVER) + ADD_SUBDIRECTORY(fpga) ADD_SUBDIRECTORY(receiver) ADD_SUBDIRECTORY(image_analysis) LIST(APPEND jfjoch_executables jfjoch_receiver) diff --git a/fpga/CMakeLists.txt b/fpga/CMakeLists.txt new file mode 100644 index 00000000..5befc498 --- /dev/null +++ b/fpga/CMakeLists.txt @@ -0,0 +1,30 @@ +FIND_PROGRAM(VIVADO vivado DOC "Xilinx Vivado") +IF (VIVADO) + MESSAGE(STATUS "Xilinx Vivado found: ${VIVADO}") +ELSE() + MESSAGE(STATUS "Xilinx Vivado not found") +ENDIF() + +FIND_PROGRAM(VIVADO_HLS NAMES vitis_hls DOC "Xilinx HLS") +IF (VIVADO_HLS) + MESSAGE(STATUS "Xilinx HLS compiler found: ${VIVADO_HLS}") +ELSE() + MESSAGE(STATUS "Xilinx HLS compiler not found") +ENDIF() + +INCLUDE_DIRECTORIES(include) + +ADD_SUBDIRECTORY(hls) +ADD_SUBDIRECTORY(pcie_driver) + +IF(VIVADO_HLS AND VIVADO) + ADD_CUSTOM_COMMAND(OUTPUT action/hw/hdl/action_config.v + COMMAND ${CMAKE_COMMAND} -E env SRC_DIR=${CMAKE_CURRENT_SOURCE_DIR} HLS_IP_DIR=${CMAKE_CURRENT_BINARY_DIR}/action/ip/hls bash ${CMAKE_CURRENT_SOURCE_DIR}/scripts/setup_action.sh + DEPENDS hls hdl/action_config.v hdl/check_datamover_error.v hdl/check_eth_busy.v hdl/gen_xdma_descriptor.v hdl/refclk300to100.v hdl/action_wrapper.v hdl/resetn_sync.v scripts/bd_pcie.tcl scripts/jfjoch.tcl scripts/network_stack.tcl scripts/hbm_u55c.tcl scripts/mac_100g_pcie.tcl scripts/pcie_dma.tcl scripts/setup_action.sh + ) + + ADD_CUSTOM_TARGET(action_pcie DEPENDS action/hw/hdl/action_config.v hls + COMMAND ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_SOURCE_DIR}/scripts/build_pcie_design.tcl + COMMAND ${CMAKE_COMMAND} -E env FLOW=pcie VIV_PROJECT_PATH=${CMAKE_CURRENT_BINARY_DIR}/vivado/jfjoch_pcie.xpr ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_BINARY_DIR}/action/scripts/synth_and_impl.tcl + ) +ENDIF() diff --git a/receiver/README.md b/fpga/README.md similarity index 99% rename from receiver/README.md rename to fpga/README.md index b565c035..907b46e6 100644 --- a/receiver/README.md +++ b/fpga/README.md @@ -1,10 +1,12 @@ -# Image receiver +# FPGA Smart Network Interface Card + +## Hardware +Currently supported FPGA is only Xilinx Alveo U55C ## Content of directories CPU Part: -* `host` Host side API to access the acquisition device, implements high level operations * `pcie_driver` Linux kernel driver for PCIe version of the FPGA board FPGA part: diff --git a/receiver/hdl/action_config.v b/fpga/hdl/action_config.v similarity index 100% rename from receiver/hdl/action_config.v rename to fpga/hdl/action_config.v diff --git a/receiver/hdl/action_wrapper.v b/fpga/hdl/action_wrapper.v similarity index 100% rename from receiver/hdl/action_wrapper.v rename to fpga/hdl/action_wrapper.v diff --git a/receiver/hdl/check_datamover_error.v b/fpga/hdl/check_datamover_error.v similarity index 100% rename from receiver/hdl/check_datamover_error.v rename to fpga/hdl/check_datamover_error.v diff --git a/receiver/hdl/check_eth_busy.v b/fpga/hdl/check_eth_busy.v similarity index 100% rename from receiver/hdl/check_eth_busy.v rename to fpga/hdl/check_eth_busy.v diff --git a/receiver/hdl/gen_xdma_descriptor.v b/fpga/hdl/gen_xdma_descriptor.v similarity index 100% rename from receiver/hdl/gen_xdma_descriptor.v rename to fpga/hdl/gen_xdma_descriptor.v diff --git a/receiver/hdl/refclk300to100.v b/fpga/hdl/refclk300to100.v similarity index 100% rename from receiver/hdl/refclk300to100.v rename to fpga/hdl/refclk300to100.v diff --git a/receiver/hdl/resetn_sync.v b/fpga/hdl/resetn_sync.v similarity index 100% rename from receiver/hdl/resetn_sync.v rename to fpga/hdl/resetn_sync.v diff --git a/receiver/hls/CMakeLists.txt b/fpga/hls/CMakeLists.txt similarity index 100% rename from receiver/hls/CMakeLists.txt rename to fpga/hls/CMakeLists.txt diff --git a/receiver/hls/arp.cpp b/fpga/hls/arp.cpp similarity index 100% rename from receiver/hls/arp.cpp rename to fpga/hls/arp.cpp diff --git a/receiver/hls/data_collection_fsm.cpp b/fpga/hls/data_collection_fsm.cpp similarity index 100% rename from receiver/hls/data_collection_fsm.cpp rename to fpga/hls/data_collection_fsm.cpp diff --git a/receiver/include/datamover_model.h b/fpga/hls/datamover_model.h similarity index 99% rename from receiver/include/datamover_model.h rename to fpga/hls/datamover_model.h index 603eabff..bf16f985 100644 --- a/receiver/include/datamover_model.h +++ b/fpga/hls/datamover_model.h @@ -4,8 +4,8 @@ #ifndef JUNGFRAUJOCH_DATAMOVER_MODEL_H #define JUNGFRAUJOCH_DATAMOVER_MODEL_H -#include "../hls/hls_jfjoch.h" #include +#include "hls_jfjoch.h" enum class Direction {Input, Output}; @@ -84,4 +84,5 @@ public: hls::stream >& GetDataStream() { return data; } ~Datamover() { Stop(); } }; + #endif //JUNGFRAUJOCH_DATAMOVER_MODEL_H diff --git a/receiver/hls/ethernet.cpp b/fpga/hls/ethernet.cpp similarity index 100% rename from receiver/hls/ethernet.cpp rename to fpga/hls/ethernet.cpp diff --git a/receiver/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h similarity index 99% rename from receiver/hls/hls_jfjoch.h rename to fpga/hls/hls_jfjoch.h index c1d5a271..887a25f2 100644 --- a/receiver/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -14,7 +14,7 @@ #include #else #include "../include/hls_burst_maxi.h" -#include +#include "parallel_stream.h" #endif #include "../../common/Definitions.h" diff --git a/receiver/hls/host_writer.cpp b/fpga/hls/host_writer.cpp similarity index 100% rename from receiver/hls/host_writer.cpp rename to fpga/hls/host_writer.cpp diff --git a/receiver/hls/icmp.cpp b/fpga/hls/icmp.cpp similarity index 100% rename from receiver/hls/icmp.cpp rename to fpga/hls/icmp.cpp diff --git a/receiver/hls/internal_packet_generator.cpp b/fpga/hls/internal_packet_generator.cpp similarity index 100% rename from receiver/hls/internal_packet_generator.cpp rename to fpga/hls/internal_packet_generator.cpp diff --git a/receiver/hls/ip_header_checksum.h b/fpga/hls/ip_header_checksum.h similarity index 100% rename from receiver/hls/ip_header_checksum.h rename to fpga/hls/ip_header_checksum.h diff --git a/receiver/hls/ipv4.cpp b/fpga/hls/ipv4.cpp similarity index 100% rename from receiver/hls/ipv4.cpp rename to fpga/hls/ipv4.cpp diff --git a/receiver/hls/jf_conversion.cpp b/fpga/hls/jf_conversion.cpp similarity index 100% rename from receiver/hls/jf_conversion.cpp rename to fpga/hls/jf_conversion.cpp diff --git a/receiver/hls/load_calibration.cpp b/fpga/hls/load_calibration.cpp similarity index 100% rename from receiver/hls/load_calibration.cpp rename to fpga/hls/load_calibration.cpp diff --git a/receiver/include/parallel_stream.h b/fpga/hls/parallel_stream.h similarity index 100% rename from receiver/include/parallel_stream.h rename to fpga/hls/parallel_stream.h diff --git a/receiver/hls/sls_detector.cpp b/fpga/hls/sls_detector.cpp similarity index 100% rename from receiver/hls/sls_detector.cpp rename to fpga/hls/sls_detector.cpp diff --git a/receiver/hls/timer.cpp b/fpga/hls/timer.cpp similarity index 100% rename from receiver/hls/timer.cpp rename to fpga/hls/timer.cpp diff --git a/receiver/hls/udp.cpp b/fpga/hls/udp.cpp similarity index 100% rename from receiver/hls/udp.cpp rename to fpga/hls/udp.cpp diff --git a/receiver/include/LICENSE.HLS_Headers b/fpga/include/LICENSE.HLS_Headers similarity index 100% rename from receiver/include/LICENSE.HLS_Headers rename to fpga/include/LICENSE.HLS_Headers diff --git a/receiver/include/ap_common.h b/fpga/include/ap_common.h similarity index 100% rename from receiver/include/ap_common.h rename to fpga/include/ap_common.h diff --git a/receiver/include/ap_decl.h b/fpga/include/ap_decl.h similarity index 100% rename from receiver/include/ap_decl.h rename to fpga/include/ap_decl.h diff --git a/receiver/include/ap_fixed.h b/fpga/include/ap_fixed.h similarity index 100% rename from receiver/include/ap_fixed.h rename to fpga/include/ap_fixed.h diff --git a/receiver/include/ap_fixed_base.h b/fpga/include/ap_fixed_base.h similarity index 100% rename from receiver/include/ap_fixed_base.h rename to fpga/include/ap_fixed_base.h diff --git a/receiver/include/ap_fixed_ref.h b/fpga/include/ap_fixed_ref.h similarity index 100% rename from receiver/include/ap_fixed_ref.h rename to fpga/include/ap_fixed_ref.h diff --git a/receiver/include/ap_fixed_special.h b/fpga/include/ap_fixed_special.h similarity index 100% rename from receiver/include/ap_fixed_special.h rename to fpga/include/ap_fixed_special.h diff --git a/receiver/include/ap_int.h b/fpga/include/ap_int.h similarity index 100% rename from receiver/include/ap_int.h rename to fpga/include/ap_int.h diff --git a/receiver/include/ap_int_base.h b/fpga/include/ap_int_base.h similarity index 100% rename from receiver/include/ap_int_base.h rename to fpga/include/ap_int_base.h diff --git a/receiver/include/ap_int_ref.h b/fpga/include/ap_int_ref.h similarity index 100% rename from receiver/include/ap_int_ref.h rename to fpga/include/ap_int_ref.h diff --git a/receiver/include/ap_int_special.h b/fpga/include/ap_int_special.h similarity index 100% rename from receiver/include/ap_int_special.h rename to fpga/include/ap_int_special.h diff --git a/receiver/include/ap_shift_reg.h b/fpga/include/ap_shift_reg.h similarity index 100% rename from receiver/include/ap_shift_reg.h rename to fpga/include/ap_shift_reg.h diff --git a/receiver/include/etc/ap_private.h b/fpga/include/etc/ap_private.h similarity index 100% rename from receiver/include/etc/ap_private.h rename to fpga/include/etc/ap_private.h diff --git a/receiver/include/hls_burst_maxi.h b/fpga/include/hls_burst_maxi.h similarity index 100% rename from receiver/include/hls_burst_maxi.h rename to fpga/include/hls_burst_maxi.h diff --git a/receiver/host/ActionConfig.h b/fpga/pcie_driver/ActionConfig.h similarity index 100% rename from receiver/host/ActionConfig.h rename to fpga/pcie_driver/ActionConfig.h diff --git a/receiver/pcie_driver/CMakeLists.txt b/fpga/pcie_driver/CMakeLists.txt similarity index 100% rename from receiver/pcie_driver/CMakeLists.txt rename to fpga/pcie_driver/CMakeLists.txt diff --git a/receiver/pcie_driver/Makefile b/fpga/pcie_driver/Makefile similarity index 100% rename from receiver/pcie_driver/Makefile rename to fpga/pcie_driver/Makefile diff --git a/receiver/pcie_driver/jfjoch_drv.c b/fpga/pcie_driver/jfjoch_drv.c similarity index 100% rename from receiver/pcie_driver/jfjoch_drv.c rename to fpga/pcie_driver/jfjoch_drv.c diff --git a/receiver/pcie_driver/jfjoch_drv.h b/fpga/pcie_driver/jfjoch_drv.h similarity index 100% rename from receiver/pcie_driver/jfjoch_drv.h rename to fpga/pcie_driver/jfjoch_drv.h diff --git a/receiver/pcie_driver/jfjoch_function.c b/fpga/pcie_driver/jfjoch_function.c similarity index 100% rename from receiver/pcie_driver/jfjoch_function.c rename to fpga/pcie_driver/jfjoch_function.c diff --git a/receiver/pcie_driver/jfjoch_ioctl.c b/fpga/pcie_driver/jfjoch_ioctl.c similarity index 100% rename from receiver/pcie_driver/jfjoch_ioctl.c rename to fpga/pcie_driver/jfjoch_ioctl.c diff --git a/receiver/pcie_driver/jfjoch_ioctl.h b/fpga/pcie_driver/jfjoch_ioctl.h similarity index 98% rename from receiver/pcie_driver/jfjoch_ioctl.h rename to fpga/pcie_driver/jfjoch_ioctl.h index 3667db83..1fcdef6a 100644 --- a/receiver/pcie_driver/jfjoch_ioctl.h +++ b/fpga/pcie_driver/jfjoch_ioctl.h @@ -4,7 +4,7 @@ #ifndef JUNGFRAUJOCH_JFJOCH_IOCTL_H #define JUNGFRAUJOCH_JFJOCH_IOCTL_H -#include "../host/ActionConfig.h" +#include "ActionConfig.h" #ifdef __KERNEL__ #include diff --git a/receiver/pcie_driver/jfjoch_memory.c b/fpga/pcie_driver/jfjoch_memory.c similarity index 100% rename from receiver/pcie_driver/jfjoch_memory.c rename to fpga/pcie_driver/jfjoch_memory.c diff --git a/receiver/pcie_driver/jfjoch_miscdev.c b/fpga/pcie_driver/jfjoch_miscdev.c similarity index 100% rename from receiver/pcie_driver/jfjoch_miscdev.c rename to fpga/pcie_driver/jfjoch_miscdev.c diff --git a/receiver/pcie_driver/jfjoch_pcie_setup.c b/fpga/pcie_driver/jfjoch_pcie_setup.c similarity index 100% rename from receiver/pcie_driver/jfjoch_pcie_setup.c rename to fpga/pcie_driver/jfjoch_pcie_setup.c diff --git a/receiver/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl similarity index 100% rename from receiver/scripts/bd_pcie.tcl rename to fpga/scripts/bd_pcie.tcl diff --git a/receiver/scripts/build_pcie_design.tcl b/fpga/scripts/build_pcie_design.tcl similarity index 100% rename from receiver/scripts/build_pcie_design.tcl rename to fpga/scripts/build_pcie_design.tcl diff --git a/receiver/scripts/check_hls.sh b/fpga/scripts/check_hls.sh similarity index 100% rename from receiver/scripts/check_hls.sh rename to fpga/scripts/check_hls.sh diff --git a/receiver/scripts/hbm_u55c.tcl b/fpga/scripts/hbm_u55c.tcl similarity index 100% rename from receiver/scripts/hbm_u55c.tcl rename to fpga/scripts/hbm_u55c.tcl diff --git a/receiver/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl similarity index 100% rename from receiver/scripts/jfjoch.tcl rename to fpga/scripts/jfjoch.tcl diff --git a/receiver/scripts/mac_100g_pcie.tcl b/fpga/scripts/mac_100g_pcie.tcl similarity index 100% rename from receiver/scripts/mac_100g_pcie.tcl rename to fpga/scripts/mac_100g_pcie.tcl diff --git a/receiver/scripts/network_stack.tcl b/fpga/scripts/network_stack.tcl similarity index 100% rename from receiver/scripts/network_stack.tcl rename to fpga/scripts/network_stack.tcl diff --git a/receiver/scripts/pcie_dma.tcl b/fpga/scripts/pcie_dma.tcl similarity index 100% rename from receiver/scripts/pcie_dma.tcl rename to fpga/scripts/pcie_dma.tcl diff --git a/receiver/scripts/setup_action.sh b/fpga/scripts/setup_action.sh similarity index 100% rename from receiver/scripts/setup_action.sh rename to fpga/scripts/setup_action.sh diff --git a/receiver/scripts/snap_env.sh b/fpga/scripts/snap_env.sh similarity index 100% rename from receiver/scripts/snap_env.sh rename to fpga/scripts/snap_env.sh diff --git a/receiver/scripts/synth_and_impl.tcl b/fpga/scripts/synth_and_impl.tcl similarity index 100% rename from receiver/scripts/synth_and_impl.tcl rename to fpga/scripts/synth_and_impl.tcl diff --git a/receiver/scripts/synth_hls_function.tcl b/fpga/scripts/synth_hls_function.tcl similarity index 100% rename from receiver/scripts/synth_hls_function.tcl rename to fpga/scripts/synth_hls_function.tcl diff --git a/receiver/xdc/pcie_timing.xdc b/fpga/xdc/pcie_timing.xdc similarity index 100% rename from receiver/xdc/pcie_timing.xdc rename to fpga/xdc/pcie_timing.xdc diff --git a/receiver/xdc/pcie_u55c.xdc b/fpga/xdc/pcie_u55c.xdc similarity index 100% rename from receiver/xdc/pcie_u55c.xdc rename to fpga/xdc/pcie_u55c.xdc diff --git a/receiver/CMakeLists.txt b/receiver/CMakeLists.txt index 3a619260..daecc3bf 100644 --- a/receiver/CMakeLists.txt +++ b/receiver/CMakeLists.txt @@ -1,34 +1,4 @@ -FIND_PROGRAM(VIVADO vivado DOC "Xilinx Vivado") -IF (VIVADO) - MESSAGE(STATUS "Xilinx Vivado found: ${VIVADO}") -ELSE() - MESSAGE(STATUS "Xilinx Vivado not found") -ENDIF() - -FIND_PROGRAM(VIVADO_HLS NAMES vitis_hls DOC "Xilinx HLS") -IF (VIVADO_HLS) - MESSAGE(STATUS "Xilinx HLS compiler found: ${VIVADO_HLS}") -ELSE() - MESSAGE(STATUS "Xilinx HLS compiler not found") -ENDIF() - -INCLUDE_DIRECTORIES(include) - -ADD_SUBDIRECTORY(hls) ADD_SUBDIRECTORY(host) -ADD_SUBDIRECTORY(pcie_driver) - -IF(VIVADO_HLS AND VIVADO) - ADD_CUSTOM_COMMAND(OUTPUT action/hw/hdl/action_config.v - COMMAND ${CMAKE_COMMAND} -E env SRC_DIR=${CMAKE_CURRENT_SOURCE_DIR} HLS_IP_DIR=${CMAKE_CURRENT_BINARY_DIR}/action/ip/hls bash ${CMAKE_CURRENT_SOURCE_DIR}/scripts/setup_action.sh - DEPENDS hls hdl/action_config.v hdl/check_datamover_error.v hdl/check_eth_busy.v hdl/gen_xdma_descriptor.v hdl/refclk300to100.v hdl/action_wrapper.v hdl/resetn_sync.v scripts/bd_pcie.tcl scripts/jfjoch.tcl scripts/network_stack.tcl scripts/hbm_u55c.tcl scripts/mac_100g_pcie.tcl scripts/pcie_dma.tcl scripts/setup_action.sh - ) - - ADD_CUSTOM_TARGET(action_pcie DEPENDS action/hw/hdl/action_config.v hls - COMMAND ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_SOURCE_DIR}/scripts/build_pcie_design.tcl - COMMAND ${CMAKE_COMMAND} -E env FLOW=pcie VIV_PROJECT_PATH=${CMAKE_CURRENT_BINARY_DIR}/vivado/jfjoch_pcie.xpr ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_BINARY_DIR}/action/scripts/synth_and_impl.tcl - ) -ENDIF() ADD_LIBRARY(JFJochReceiver STATIC JFJochReceiverService.cpp JFJochReceiverService.h diff --git a/receiver/host/CMakeLists.txt b/receiver/host/CMakeLists.txt index 61898b19..ebdff51f 100644 --- a/receiver/host/CMakeLists.txt +++ b/receiver/host/CMakeLists.txt @@ -3,7 +3,7 @@ ADD_LIBRARY(JungfraujochHost STATIC AcquisitionCounters.cpp AcquisitionCounters.h MockAcquisitionDevice.cpp MockAcquisitionDevice.h HLSSimulatedDevice.cpp HLSSimulatedDevice.h - Completion.cpp Completion.h ActionConfig.h + Completion.cpp Completion.h ../../fpga/pcie_driver/ActionConfig.h PCIExpressDevice.cpp PCIExpressDevice.h IBWrappers.cpp IBWrappers.h MlxRawEthDevice.cpp MlxRawEthDevice.h diff --git a/receiver/host/FPGAAcquisitionDevice.h b/receiver/host/FPGAAcquisitionDevice.h index 928626a5..aac404a0 100644 --- a/receiver/host/FPGAAcquisitionDevice.h +++ b/receiver/host/FPGAAcquisitionDevice.h @@ -5,7 +5,7 @@ #define JUNGFRAUJOCH_FPGAACQUISITIONDEVICE_H #include "AcquisitionDevice.h" -#include "ActionConfig.h" +#include "../../fpga/pcie_driver/ActionConfig.h" class FPGAAcquisitionDevice : public AcquisitionDevice { uint16_t data_collection_id = 0; diff --git a/receiver/host/HLSSimulatedDevice.cpp b/receiver/host/HLSSimulatedDevice.cpp index 53e2bdc1..f151bd05 100644 --- a/receiver/host/HLSSimulatedDevice.cpp +++ b/receiver/host/HLSSimulatedDevice.cpp @@ -5,7 +5,8 @@ #include #include -#include "datamover_model.h" +#include "../../fpga/hls/datamover_model.h" +#include "../../fpga/hls/hls_jfjoch.h" uint16_t checksum(const uint16_t *addr, size_t count) { /* Compute Internet Checksum for "count" bytes diff --git a/receiver/host/HLSSimulatedDevice.h b/receiver/host/HLSSimulatedDevice.h index d44b8ac7..208d1ba9 100644 --- a/receiver/host/HLSSimulatedDevice.h +++ b/receiver/host/HLSSimulatedDevice.h @@ -6,13 +6,12 @@ #include -#include "datamover_model.h" +#include "../../fpga/hls/hls_jfjoch.h" +#include "../../fpga/hls/datamover_model.h" #include "../../common/DiffractionExperiment.h" #include "FPGAAcquisitionDevice.h" #include "../../jungfrau/jf_packet.h" - - uint16_t checksum(const uint16_t *addr, size_t count); class HLSSimulatedDevice : public FPGAAcquisitionDevice { diff --git a/tests/ActionConfigTest.cpp b/tests/ActionConfigTest.cpp index 47430f90..12532120 100644 --- a/tests/ActionConfigTest.cpp +++ b/tests/ActionConfigTest.cpp @@ -3,7 +3,7 @@ #include #include "../common/Definitions.h" -#include "../receiver/host/ActionConfig.h" +#include "../fpga/pcie_driver/ActionConfig.h" TEST_CASE("ActionStatus") { ActionStatus status{}; From a12fc941d564ddf8d94c3bf65cb277eb141a0dcd Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 7 Jun 2023 21:28:22 +0200 Subject: [PATCH 057/224] JFJochReceiver: Remove host subdirectory --- jungfrau/ProcessJFPacket.h | 2 +- receiver/{host => }/AcquisitionCounters.cpp | 2 +- receiver/{host => }/AcquisitionCounters.h | 4 +- receiver/{host => }/AcquisitionDevice.cpp | 4 +- receiver/{host => }/AcquisitionDevice.h | 12 ++-- receiver/CMakeLists.txt | 55 ++++++++++++++++++- receiver/{host => }/Completion.cpp | 4 +- receiver/{host => }/Completion.h | 0 receiver/{host => }/FPGAAcquisitionDevice.cpp | 0 receiver/{host => }/FPGAAcquisitionDevice.h | 2 +- receiver/{host => }/HLSSimulatedDevice.cpp | 4 +- receiver/{host => }/HLSSimulatedDevice.h | 8 +-- receiver/{host => }/IBWrappers.cpp | 2 +- receiver/{host => }/IBWrappers.h | 0 receiver/JFJochReceiver.h | 2 +- receiver/{host => }/LinuxSocketDevice.cpp | 2 +- receiver/{host => }/LinuxSocketDevice.h | 2 +- receiver/{host => }/MlxRawEthDevice.cpp | 2 +- receiver/{host => }/MlxRawEthDevice.h | 2 +- receiver/{host => }/MockAcquisitionDevice.cpp | 2 +- receiver/{host => }/MockAcquisitionDevice.h | 2 +- receiver/{host => }/PCIExpressDevice.cpp | 4 +- receiver/{host => }/PCIExpressDevice.h | 0 receiver/host/CMakeLists.txt | 54 ------------------ receiver/jfjoch_action_test.cpp | 2 +- receiver/{host => }/jfjoch_lxsocket_test.cpp | 0 receiver/{host => }/jfjoch_mlx_test.cpp | 0 .../jfjoch_pcie_cancel_data_collection.cpp | 0 .../jfjoch_pcie_clear_net_counters.cpp | 0 .../{host => }/jfjoch_pcie_set_network.cpp | 6 +- receiver/{host => }/jfjoch_pcie_status.cpp | 0 receiver/jfjoch_receiver.cpp | 8 +-- tests/AcquisitionCountersTest.cpp | 2 +- tests/FPGAIntegrationTest.cpp | 2 +- tests/FPGANetworkTest.cpp | 2 +- tests/JFJochFullIntegrationTest.cpp | 2 +- tests/JFJochReceiverIntegrationTest.cpp | 2 +- tests/MockAcquisitionDeviceTest.cpp | 2 +- tests/StreamWriterTest.cpp | 2 +- tests/gRPCServerTest.cpp | 2 +- 40 files changed, 101 insertions(+), 102 deletions(-) rename receiver/{host => }/AcquisitionCounters.cpp (99%) rename receiver/{host => }/AcquisitionCounters.h (96%) rename receiver/{host => }/AcquisitionDevice.cpp (98%) rename receiver/{host => }/AcquisitionDevice.h (92%) rename receiver/{host => }/Completion.cpp (95%) rename receiver/{host => }/Completion.h (100%) rename receiver/{host => }/FPGAAcquisitionDevice.cpp (100%) rename receiver/{host => }/FPGAAcquisitionDevice.h (97%) rename receiver/{host => }/HLSSimulatedDevice.cpp (99%) rename receiver/{host => }/HLSSimulatedDevice.h (92%) rename receiver/{host => }/IBWrappers.cpp (99%) rename receiver/{host => }/IBWrappers.h (100%) rename receiver/{host => }/LinuxSocketDevice.cpp (98%) rename receiver/{host => }/LinuxSocketDevice.h (95%) rename receiver/{host => }/MlxRawEthDevice.cpp (99%) rename receiver/{host => }/MlxRawEthDevice.h (96%) rename receiver/{host => }/MockAcquisitionDevice.cpp (98%) rename receiver/{host => }/MockAcquisitionDevice.h (95%) rename receiver/{host => }/PCIExpressDevice.cpp (98%) rename receiver/{host => }/PCIExpressDevice.h (100%) delete mode 100644 receiver/host/CMakeLists.txt rename receiver/{host => }/jfjoch_lxsocket_test.cpp (100%) rename receiver/{host => }/jfjoch_mlx_test.cpp (100%) rename receiver/{host => }/jfjoch_pcie_cancel_data_collection.cpp (100%) rename receiver/{host => }/jfjoch_pcie_clear_net_counters.cpp (100%) rename receiver/{host => }/jfjoch_pcie_set_network.cpp (84%) rename receiver/{host => }/jfjoch_pcie_status.cpp (100%) diff --git a/jungfrau/ProcessJFPacket.h b/jungfrau/ProcessJFPacket.h index 8d4021d7..cfb77a67 100644 --- a/jungfrau/ProcessJFPacket.h +++ b/jungfrau/ProcessJFPacket.h @@ -6,7 +6,7 @@ #include "../common/ThreadSafeFIFO.h" #include "../common/DiffractionExperiment.h" -#include "../receiver/host/Completion.h" +#include "../receiver/Completion.h" #include "JFConversion.h" #include "JFCalibration.h" #include "jf_packet.h" diff --git a/receiver/host/AcquisitionCounters.cpp b/receiver/AcquisitionCounters.cpp similarity index 99% rename from receiver/host/AcquisitionCounters.cpp rename to receiver/AcquisitionCounters.cpp index 9cb4f797..1ad29e56 100644 --- a/receiver/host/AcquisitionCounters.cpp +++ b/receiver/AcquisitionCounters.cpp @@ -4,7 +4,7 @@ #include #include "AcquisitionCounters.h" -#include "../../common/JFJochException.h" +#include "../common/JFJochException.h" AcquisitionCounters::AcquisitionCounters() : head(max_modules, 0), slowest_head(0), total_packets(0), expected_frames(0), acquisition_finished(false) {} diff --git a/receiver/host/AcquisitionCounters.h b/receiver/AcquisitionCounters.h similarity index 96% rename from receiver/host/AcquisitionCounters.h rename to receiver/AcquisitionCounters.h index d0a78a3c..18fca3b8 100644 --- a/receiver/host/AcquisitionCounters.h +++ b/receiver/AcquisitionCounters.h @@ -8,8 +8,8 @@ #include #include -#include "../../common/DiffractionExperiment.h" -#include "../../common/Definitions.h" +#include "../common/DiffractionExperiment.h" +#include "../common/Definitions.h" #include "Completion.h" // AcquisitionCounters are used for information that needs to be accessed during data collection, diff --git a/receiver/host/AcquisitionDevice.cpp b/receiver/AcquisitionDevice.cpp similarity index 98% rename from receiver/host/AcquisitionDevice.cpp rename to receiver/AcquisitionDevice.cpp index 70abbe02..dcab83fe 100644 --- a/receiver/host/AcquisitionDevice.cpp +++ b/receiver/AcquisitionDevice.cpp @@ -11,9 +11,9 @@ #include #include -#include "../../common/JFJochException.h" +#include "../common/JFJochException.h" #include "AcquisitionDevice.h" -#include "../../common/NetworkAddressConvert.h" +#include "../common/NetworkAddressConvert.h" void *mmap_acquisition_buffer(size_t size, int16_t numa_node) { void *ret = mmap(nullptr, size, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); diff --git a/receiver/host/AcquisitionDevice.h b/receiver/AcquisitionDevice.h similarity index 92% rename from receiver/host/AcquisitionDevice.h rename to receiver/AcquisitionDevice.h index 6fae8f0e..e77f4b3f 100644 --- a/receiver/host/AcquisitionDevice.h +++ b/receiver/AcquisitionDevice.h @@ -9,14 +9,14 @@ #include #include -#include +#include "jfjoch.pb.h" -#include "../../common/Definitions.h" -#include "../../common/DiffractionExperiment.h" -#include "../../common/Logger.h" +#include "../common/Definitions.h" +#include "../common/DiffractionExperiment.h" +#include "../common/Logger.h" -#include "../../common/ThreadSafeFIFO.h" -#include "../../jungfrau/JFCalibration.h" +#include "../common/ThreadSafeFIFO.h" +#include "../jungfrau/JFCalibration.h" #include "AcquisitionCounters.h" #include "Completion.h" diff --git a/receiver/CMakeLists.txt b/receiver/CMakeLists.txt index daecc3bf..1a1712b6 100644 --- a/receiver/CMakeLists.txt +++ b/receiver/CMakeLists.txt @@ -1,4 +1,57 @@ -ADD_SUBDIRECTORY(host) +ADD_LIBRARY(JungfraujochHost STATIC + AcquisitionDevice.cpp AcquisitionDevice.h + AcquisitionCounters.cpp AcquisitionCounters.h + MockAcquisitionDevice.cpp MockAcquisitionDevice.h + HLSSimulatedDevice.cpp HLSSimulatedDevice.h + Completion.cpp Completion.h ../fpga/pcie_driver/ActionConfig.h + PCIExpressDevice.cpp PCIExpressDevice.h + IBWrappers.cpp IBWrappers.h + MlxRawEthDevice.cpp MlxRawEthDevice.h + ../jungfrau/jf_packet.h + LinuxSocketDevice.cpp LinuxSocketDevice.h + FPGAAcquisitionDevice.cpp FPGAAcquisitionDevice.h) + +TARGET_LINK_LIBRARIES(JungfraujochHost CommonFunctions HLSSimulation JFCalibration) + +FIND_LIBRARY(IBVERBS NAMES ibverbs DOC "Infiniband verbs") + +IF(IBVERBS) + TARGET_COMPILE_DEFINITIONS(JungfraujochHost PUBLIC -DJFJOCH_USE_IBVERBS) + TARGET_LINK_LIBRARIES(JungfraujochHost ${IBVERBS}) + MESSAGE(STATUS "JFJochReceiver compiled with IBVerbs support") + + ADD_EXECUTABLE(jfjoch_mlx_test jfjoch_mlx_test.cpp) + TARGET_LINK_LIBRARIES(jfjoch_mlx_test JungfraujochHost) + INSTALL(TARGETS jfjoch_mlx_test RUNTIME) +ENDIF() + +ADD_EXECUTABLE(jfjoch_lxsocket_test jfjoch_lxsocket_test.cpp) +TARGET_LINK_LIBRARIES(jfjoch_lxsocket_test JungfraujochHost) +INSTALL(TARGETS jfjoch_lxsocket_test RUNTIME) + +IF(HAS_NUMAIF AND HAS_NUMA_H AND NUMA_LIBRARY) + TARGET_COMPILE_DEFINITIONS(JungfraujochHost PUBLIC -DJFJOCH_USE_NUMA) + TARGET_LINK_LIBRARIES(JungfraujochHost ${NUMA_LIBRARY}) + MESSAGE(STATUS "NUMA memory/CPU pinning enabled") +ELSE() + MESSAGE(WARNING "NUMA memory/CPU pinning disabled") +ENDIF() + +ADD_EXECUTABLE(jfjoch_pcie_status jfjoch_pcie_status.cpp) +TARGET_LINK_LIBRARIES(jfjoch_pcie_status JungfraujochHost) +INSTALL(TARGETS jfjoch_pcie_status RUNTIME) + +ADD_EXECUTABLE(jfjoch_pcie_set_network jfjoch_pcie_set_network.cpp) +TARGET_LINK_LIBRARIES(jfjoch_pcie_set_network JungfraujochHost) +INSTALL(TARGETS jfjoch_pcie_set_network RUNTIME) + +ADD_EXECUTABLE(jfjoch_pcie_cancel_data_collection jfjoch_pcie_cancel_data_collection.cpp) +TARGET_LINK_LIBRARIES(jfjoch_pcie_cancel_data_collection JungfraujochHost) +INSTALL(TARGETS jfjoch_pcie_cancel_data_collection RUNTIME) + +ADD_EXECUTABLE(jfjoch_pcie_clear_net_counters jfjoch_pcie_clear_net_counters.cpp) +TARGET_LINK_LIBRARIES(jfjoch_pcie_clear_net_counters JungfraujochHost) +INSTALL(TARGETS jfjoch_pcie_clear_net_counters RUNTIME) ADD_LIBRARY(JFJochReceiver STATIC JFJochReceiverService.cpp JFJochReceiverService.h diff --git a/receiver/host/Completion.cpp b/receiver/Completion.cpp similarity index 95% rename from receiver/host/Completion.cpp rename to receiver/Completion.cpp index 505a5ee9..c9455aa4 100644 --- a/receiver/host/Completion.cpp +++ b/receiver/Completion.cpp @@ -4,8 +4,8 @@ #include #include "Completion.h" -#include "../../common/JFJochException.h" -#include "../../common/Definitions.h" +#include "../common/JFJochException.h" +#include "../common/Definitions.h" inline uint64_t bit_concat(uint32_t high, uint32_t low) { return (uint64_t(high) << 32) | low; diff --git a/receiver/host/Completion.h b/receiver/Completion.h similarity index 100% rename from receiver/host/Completion.h rename to receiver/Completion.h diff --git a/receiver/host/FPGAAcquisitionDevice.cpp b/receiver/FPGAAcquisitionDevice.cpp similarity index 100% rename from receiver/host/FPGAAcquisitionDevice.cpp rename to receiver/FPGAAcquisitionDevice.cpp diff --git a/receiver/host/FPGAAcquisitionDevice.h b/receiver/FPGAAcquisitionDevice.h similarity index 97% rename from receiver/host/FPGAAcquisitionDevice.h rename to receiver/FPGAAcquisitionDevice.h index aac404a0..dafbac36 100644 --- a/receiver/host/FPGAAcquisitionDevice.h +++ b/receiver/FPGAAcquisitionDevice.h @@ -5,7 +5,7 @@ #define JUNGFRAUJOCH_FPGAACQUISITIONDEVICE_H #include "AcquisitionDevice.h" -#include "../../fpga/pcie_driver/ActionConfig.h" +#include "../fpga/pcie_driver/ActionConfig.h" class FPGAAcquisitionDevice : public AcquisitionDevice { uint16_t data_collection_id = 0; diff --git a/receiver/host/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp similarity index 99% rename from receiver/host/HLSSimulatedDevice.cpp rename to receiver/HLSSimulatedDevice.cpp index f151bd05..15a66f10 100644 --- a/receiver/host/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -5,8 +5,8 @@ #include #include -#include "../../fpga/hls/datamover_model.h" -#include "../../fpga/hls/hls_jfjoch.h" +#include "../fpga/hls/datamover_model.h" +#include "../fpga/hls/hls_jfjoch.h" uint16_t checksum(const uint16_t *addr, size_t count) { /* Compute Internet Checksum for "count" bytes diff --git a/receiver/host/HLSSimulatedDevice.h b/receiver/HLSSimulatedDevice.h similarity index 92% rename from receiver/host/HLSSimulatedDevice.h rename to receiver/HLSSimulatedDevice.h index 208d1ba9..770fda6c 100644 --- a/receiver/host/HLSSimulatedDevice.h +++ b/receiver/HLSSimulatedDevice.h @@ -6,11 +6,11 @@ #include -#include "../../fpga/hls/hls_jfjoch.h" -#include "../../fpga/hls/datamover_model.h" -#include "../../common/DiffractionExperiment.h" +#include "../fpga/hls/hls_jfjoch.h" +#include "../fpga/hls/datamover_model.h" +#include "../common/DiffractionExperiment.h" #include "FPGAAcquisitionDevice.h" -#include "../../jungfrau/jf_packet.h" +#include "../jungfrau/jf_packet.h" uint16_t checksum(const uint16_t *addr, size_t count); diff --git a/receiver/host/IBWrappers.cpp b/receiver/IBWrappers.cpp similarity index 99% rename from receiver/host/IBWrappers.cpp rename to receiver/IBWrappers.cpp index b09e35a6..07b55a7c 100644 --- a/receiver/host/IBWrappers.cpp +++ b/receiver/IBWrappers.cpp @@ -13,7 +13,7 @@ #endif #include "IBWrappers.h" -#include "../../common/JFJochException.h" +#include "../common/JFJochException.h" IBContext::IBContext(const std::string &dev_name) { struct ibv_device **dev_list; diff --git a/receiver/host/IBWrappers.h b/receiver/IBWrappers.h similarity index 100% rename from receiver/host/IBWrappers.h rename to receiver/IBWrappers.h diff --git a/receiver/JFJochReceiver.h b/receiver/JFJochReceiver.h index 5b71608e..8ff2849f 100644 --- a/receiver/JFJochReceiver.h +++ b/receiver/JFJochReceiver.h @@ -18,7 +18,7 @@ #include "../jungfrau/JFCalibration.h" #include "../common/ImagePusher.h" -#include "host/AcquisitionDevice.h" +#include "AcquisitionDevice.h" #include "../common/Logger.h" #include "../common/ThreadSafeFIFO.h" #include "../common/ZMQPreviewPublisher.h" diff --git a/receiver/host/LinuxSocketDevice.cpp b/receiver/LinuxSocketDevice.cpp similarity index 98% rename from receiver/host/LinuxSocketDevice.cpp rename to receiver/LinuxSocketDevice.cpp index 4a9e5ef3..75de133c 100644 --- a/receiver/host/LinuxSocketDevice.cpp +++ b/receiver/LinuxSocketDevice.cpp @@ -8,7 +8,7 @@ #include #include -#include "../../common/NetworkAddressConvert.h" +#include "../common/NetworkAddressConvert.h" LinuxSocketDevice::LinuxSocketDevice(uint32_t in_ipv4_addr, uint16_t in_udp_port, uint16_t data_stream, size_t in_frame_buffer_size_modules, diff --git a/receiver/host/LinuxSocketDevice.h b/receiver/LinuxSocketDevice.h similarity index 95% rename from receiver/host/LinuxSocketDevice.h rename to receiver/LinuxSocketDevice.h index 722d47a3..c8f7efbf 100644 --- a/receiver/host/LinuxSocketDevice.h +++ b/receiver/LinuxSocketDevice.h @@ -5,7 +5,7 @@ #define JUNGFRAUJOCH_LINUXSOCKETDEVICE_H #include -#include "../../jungfrau/ProcessJFPacket.h" +#include "../jungfrau/ProcessJFPacket.h" #include "AcquisitionDevice.h" class LinuxSocketDevice : public AcquisitionDevice { diff --git a/receiver/host/MlxRawEthDevice.cpp b/receiver/MlxRawEthDevice.cpp similarity index 99% rename from receiver/host/MlxRawEthDevice.cpp rename to receiver/MlxRawEthDevice.cpp index 782ff909..c729d285 100644 --- a/receiver/host/MlxRawEthDevice.cpp +++ b/receiver/MlxRawEthDevice.cpp @@ -3,7 +3,7 @@ #ifdef JFJOCH_USE_IBVERBS #include "MlxRawEthDevice.h" -#include "../../common/NetworkAddressConvert.h" +#include "../common/NetworkAddressConvert.h" #include diff --git a/receiver/host/MlxRawEthDevice.h b/receiver/MlxRawEthDevice.h similarity index 96% rename from receiver/host/MlxRawEthDevice.h rename to receiver/MlxRawEthDevice.h index 7e662cde..0c0a8e69 100644 --- a/receiver/host/MlxRawEthDevice.h +++ b/receiver/MlxRawEthDevice.h @@ -10,7 +10,7 @@ #include "AcquisitionDevice.h" #include "IBWrappers.h" -#include "../../jungfrau/ProcessJFPacket.h" +#include "../jungfrau/ProcessJFPacket.h" class MlxRawEthDevice : public AcquisitionDevice { diff --git a/receiver/host/MockAcquisitionDevice.cpp b/receiver/MockAcquisitionDevice.cpp similarity index 98% rename from receiver/host/MockAcquisitionDevice.cpp rename to receiver/MockAcquisitionDevice.cpp index 99dd3859..fbe30770 100644 --- a/receiver/host/MockAcquisitionDevice.cpp +++ b/receiver/MockAcquisitionDevice.cpp @@ -2,7 +2,7 @@ // SPDX-License-Identifier: GPL-3.0-or-later #include "MockAcquisitionDevice.h" -#include "../../common/JFJochException.h" +#include "../common/JFJochException.h" #include void MockAcquisitionDevice::Start(const DiffractionExperiment& experiment) { diff --git a/receiver/host/MockAcquisitionDevice.h b/receiver/MockAcquisitionDevice.h similarity index 95% rename from receiver/host/MockAcquisitionDevice.h rename to receiver/MockAcquisitionDevice.h index 821b5e7c..0a3cddd4 100644 --- a/receiver/host/MockAcquisitionDevice.h +++ b/receiver/MockAcquisitionDevice.h @@ -5,7 +5,7 @@ #define JUNGFRAUJOCH_MOCKACQUISITIONDEVICE_H #include "AcquisitionDevice.h" -#include "../../common/ThreadSafeFIFO.h" +#include "../common/ThreadSafeFIFO.h" class MockAcquisitionDevice : public AcquisitionDevice { uint32_t current_handle = 0; diff --git a/receiver/host/PCIExpressDevice.cpp b/receiver/PCIExpressDevice.cpp similarity index 98% rename from receiver/host/PCIExpressDevice.cpp rename to receiver/PCIExpressDevice.cpp index a6fdd761..aa96416e 100644 --- a/receiver/host/PCIExpressDevice.cpp +++ b/receiver/PCIExpressDevice.cpp @@ -7,8 +7,8 @@ #include #include "PCIExpressDevice.h" -#include "../pcie_driver/jfjoch_ioctl.h" -#include "../../common/NetworkAddressConvert.h" +#include "../fpga/pcie_driver/jfjoch_ioctl.h" +#include "../common/NetworkAddressConvert.h" PCIExpressDevice::PCIExpressDevice(uint16_t data_stream, uint16_t pci_slot) : PCIExpressDevice("/dev/jfjoch" + std::to_string(pci_slot), data_stream) { diff --git a/receiver/host/PCIExpressDevice.h b/receiver/PCIExpressDevice.h similarity index 100% rename from receiver/host/PCIExpressDevice.h rename to receiver/PCIExpressDevice.h diff --git a/receiver/host/CMakeLists.txt b/receiver/host/CMakeLists.txt deleted file mode 100644 index ebdff51f..00000000 --- a/receiver/host/CMakeLists.txt +++ /dev/null @@ -1,54 +0,0 @@ -ADD_LIBRARY(JungfraujochHost STATIC - AcquisitionDevice.cpp AcquisitionDevice.h - AcquisitionCounters.cpp AcquisitionCounters.h - MockAcquisitionDevice.cpp MockAcquisitionDevice.h - HLSSimulatedDevice.cpp HLSSimulatedDevice.h - Completion.cpp Completion.h ../../fpga/pcie_driver/ActionConfig.h - PCIExpressDevice.cpp PCIExpressDevice.h - IBWrappers.cpp IBWrappers.h - MlxRawEthDevice.cpp MlxRawEthDevice.h - ../../jungfrau/jf_packet.h LinuxSocketDevice.cpp LinuxSocketDevice.h FPGAAcquisitionDevice.cpp FPGAAcquisitionDevice.h) - -TARGET_LINK_LIBRARIES(JungfraujochHost CommonFunctions HLSSimulation JFCalibration) - -TARGET_INCLUDE_DIRECTORIES(JungfraujochHost PUBLIC ../../include) - -FIND_LIBRARY(IBVERBS NAMES ibverbs DOC "Infiniband verbs") - -IF(IBVERBS) - TARGET_COMPILE_DEFINITIONS(JungfraujochHost PUBLIC -DJFJOCH_USE_IBVERBS) - TARGET_LINK_LIBRARIES(JungfraujochHost ${IBVERBS}) - MESSAGE(STATUS "JFJochReceiver compiled with IBVerbs support") - - ADD_EXECUTABLE(jfjoch_mlx_test jfjoch_mlx_test.cpp) - TARGET_LINK_LIBRARIES(jfjoch_mlx_test JungfraujochHost) - INSTALL(TARGETS jfjoch_mlx_test RUNTIME) -ENDIF() - -ADD_EXECUTABLE(jfjoch_lxsocket_test jfjoch_lxsocket_test.cpp) -TARGET_LINK_LIBRARIES(jfjoch_lxsocket_test JungfraujochHost) -INSTALL(TARGETS jfjoch_lxsocket_test RUNTIME) - -IF(HAS_NUMAIF AND HAS_NUMA_H AND NUMA_LIBRARY) - TARGET_COMPILE_DEFINITIONS(JungfraujochHost PUBLIC -DJFJOCH_USE_NUMA) - TARGET_LINK_LIBRARIES(JungfraujochHost ${NUMA_LIBRARY}) - MESSAGE(STATUS "NUMA memory/CPU pinning enabled") -ELSE() - MESSAGE(WARNING "NUMA memory/CPU pinning disabled") -ENDIF() - -ADD_EXECUTABLE(jfjoch_pcie_status jfjoch_pcie_status.cpp) -TARGET_LINK_LIBRARIES(jfjoch_pcie_status JungfraujochHost) -INSTALL(TARGETS jfjoch_pcie_status RUNTIME) - -ADD_EXECUTABLE(jfjoch_pcie_set_network jfjoch_pcie_set_network.cpp) -TARGET_LINK_LIBRARIES(jfjoch_pcie_set_network JungfraujochHost) -INSTALL(TARGETS jfjoch_pcie_set_network RUNTIME) - -ADD_EXECUTABLE(jfjoch_pcie_cancel_data_collection jfjoch_pcie_cancel_data_collection.cpp) -TARGET_LINK_LIBRARIES(jfjoch_pcie_cancel_data_collection JungfraujochHost) -INSTALL(TARGETS jfjoch_pcie_cancel_data_collection RUNTIME) - -ADD_EXECUTABLE(jfjoch_pcie_clear_net_counters jfjoch_pcie_clear_net_counters.cpp) -TARGET_LINK_LIBRARIES(jfjoch_pcie_clear_net_counters JungfraujochHost) -INSTALL(TARGETS jfjoch_pcie_clear_net_counters RUNTIME) diff --git a/receiver/jfjoch_action_test.cpp b/receiver/jfjoch_action_test.cpp index 1a843298..89febe48 100644 --- a/receiver/jfjoch_action_test.cpp +++ b/receiver/jfjoch_action_test.cpp @@ -3,7 +3,7 @@ #include -#include "host/PCIExpressDevice.h" +#include "PCIExpressDevice.h" #include "JFJochReceiverTest.h" #include "../tests/FPGAUnitTest.h" diff --git a/receiver/host/jfjoch_lxsocket_test.cpp b/receiver/jfjoch_lxsocket_test.cpp similarity index 100% rename from receiver/host/jfjoch_lxsocket_test.cpp rename to receiver/jfjoch_lxsocket_test.cpp diff --git a/receiver/host/jfjoch_mlx_test.cpp b/receiver/jfjoch_mlx_test.cpp similarity index 100% rename from receiver/host/jfjoch_mlx_test.cpp rename to receiver/jfjoch_mlx_test.cpp diff --git a/receiver/host/jfjoch_pcie_cancel_data_collection.cpp b/receiver/jfjoch_pcie_cancel_data_collection.cpp similarity index 100% rename from receiver/host/jfjoch_pcie_cancel_data_collection.cpp rename to receiver/jfjoch_pcie_cancel_data_collection.cpp diff --git a/receiver/host/jfjoch_pcie_clear_net_counters.cpp b/receiver/jfjoch_pcie_clear_net_counters.cpp similarity index 100% rename from receiver/host/jfjoch_pcie_clear_net_counters.cpp rename to receiver/jfjoch_pcie_clear_net_counters.cpp diff --git a/receiver/host/jfjoch_pcie_set_network.cpp b/receiver/jfjoch_pcie_set_network.cpp similarity index 84% rename from receiver/host/jfjoch_pcie_set_network.cpp rename to receiver/jfjoch_pcie_set_network.cpp index 2534b95e..98427d57 100644 --- a/receiver/host/jfjoch_pcie_set_network.cpp +++ b/receiver/jfjoch_pcie_set_network.cpp @@ -1,10 +1,10 @@ // Copyright (2019-2022) Paul Scherrer Institute // SPDX-License-Identifier: GPL-3.0-or-later -#include "../../common/Logger.h" -#include "../../common/JFJochException.h" +#include "../common/Logger.h" +#include "../common/JFJochException.h" #include "PCIExpressDevice.h" -#include "../../common/NetworkAddressConvert.h" +#include "../common/NetworkAddressConvert.h" int main(int argc, char **argv) { Logger logger("jfjoch_pcie_set_network"); diff --git a/receiver/host/jfjoch_pcie_status.cpp b/receiver/jfjoch_pcie_status.cpp similarity index 100% rename from receiver/host/jfjoch_pcie_status.cpp rename to receiver/jfjoch_pcie_status.cpp diff --git a/receiver/jfjoch_receiver.cpp b/receiver/jfjoch_receiver.cpp index 89ef352c..adf82fae 100644 --- a/receiver/jfjoch_receiver.cpp +++ b/receiver/jfjoch_receiver.cpp @@ -6,12 +6,12 @@ #include "../grpc/gRPCServer_Template.h" #include "../common/ZMQImagePusher.h" -#include "host/PCIExpressDevice.h" -#include "host/MlxRawEthDevice.h" -#include "host/LinuxSocketDevice.h" +#include "PCIExpressDevice.h" +#include "MlxRawEthDevice.h" +#include "LinuxSocketDevice.h" #include "JFJochReceiverService.h" -#include "host/HLSSimulatedDevice.h" +#include "HLSSimulatedDevice.h" #include "../common/NetworkAddressConvert.h" AcquisitionDevice *SetupAcquisitionDevice(const nlohmann::json &input, uint16_t data_stream) { diff --git a/tests/AcquisitionCountersTest.cpp b/tests/AcquisitionCountersTest.cpp index 66c629e8..ce23faca 100644 --- a/tests/AcquisitionCountersTest.cpp +++ b/tests/AcquisitionCountersTest.cpp @@ -2,7 +2,7 @@ // SPDX-License-Identifier: GPL-3.0-or-later #include -#include "../receiver/host/AcquisitionCounters.h" +#include "../receiver/AcquisitionCounters.h" TEST_CASE("AcquisitionCountersTest","[AcquisitionDeviceCounters]") { DiffractionExperiment x(DetectorGeometry(2)); diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index 7c3f5ed8..d20d3666 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -6,7 +6,7 @@ #include #include "../jungfrau/JFPedestalCalc.h" -#include "../receiver/host/HLSSimulatedDevice.h" +#include "../receiver/HLSSimulatedDevice.h" #include "FPGAUnitTest.h" using namespace std::literals::chrono_literals; diff --git a/tests/FPGANetworkTest.cpp b/tests/FPGANetworkTest.cpp index 8fad2465..65575f9e 100644 --- a/tests/FPGANetworkTest.cpp +++ b/tests/FPGANetworkTest.cpp @@ -6,7 +6,7 @@ #include #include -#include "../receiver/host/HLSSimulatedDevice.h" +#include "../receiver/HLSSimulatedDevice.h" // ARP packet - from if_arp.h #pragma pack(push) diff --git a/tests/JFJochFullIntegrationTest.cpp b/tests/JFJochFullIntegrationTest.cpp index 1bdf5037..d84ba047 100644 --- a/tests/JFJochFullIntegrationTest.cpp +++ b/tests/JFJochFullIntegrationTest.cpp @@ -9,7 +9,7 @@ #include "../writer/HDF5Objects.h" #include "../receiver/JFJochReceiverService.h" #include "FPGAUnitTest.h" -#include "../receiver/host/MockAcquisitionDevice.h" +#include "../receiver/MockAcquisitionDevice.h" #include "../common/ZMQImagePusher.h" #include "../common/jsonToGrpc.h" diff --git a/tests/JFJochReceiverIntegrationTest.cpp b/tests/JFJochReceiverIntegrationTest.cpp index 72213ffe..1d86bf77 100644 --- a/tests/JFJochReceiverIntegrationTest.cpp +++ b/tests/JFJochReceiverIntegrationTest.cpp @@ -4,7 +4,7 @@ #include #include "../receiver/JFJochReceiverTest.h" -#include "../receiver/host/HLSSimulatedDevice.h" +#include "../receiver/HLSSimulatedDevice.h" #include "../jungfrau/JFPedestalCalc.h" #include "../common/TestImagePusher.h" diff --git a/tests/MockAcquisitionDeviceTest.cpp b/tests/MockAcquisitionDeviceTest.cpp index e54b8cfe..30a72155 100644 --- a/tests/MockAcquisitionDeviceTest.cpp +++ b/tests/MockAcquisitionDeviceTest.cpp @@ -2,7 +2,7 @@ // SPDX-License-Identifier: GPL-3.0-or-later #include -#include "../receiver/host/MockAcquisitionDevice.h" +#include "../receiver/MockAcquisitionDevice.h" TEST_CASE("MockAcquisitionDevice") { std::vector module_data(RAW_MODULE_SIZE, 765); diff --git a/tests/StreamWriterTest.cpp b/tests/StreamWriterTest.cpp index 492e7a3e..76189913 100644 --- a/tests/StreamWriterTest.cpp +++ b/tests/StreamWriterTest.cpp @@ -9,7 +9,7 @@ #include "../writer/HDF5Objects.h" #include "../common/ZMQImagePusher.h" #include "../receiver/JFJochReceiverService.h" -#include "../receiver/host/HLSSimulatedDevice.h" +#include "../receiver/HLSSimulatedDevice.h" TEST_CASE("StreamWriterTest_ZMQ","[JFJochWriter]") { RegisterHDF5Filter(); diff --git a/tests/gRPCServerTest.cpp b/tests/gRPCServerTest.cpp index 0c0b3b05..3a1b664a 100644 --- a/tests/gRPCServerTest.cpp +++ b/tests/gRPCServerTest.cpp @@ -8,7 +8,7 @@ #include "../common/Logger.h" #include "../receiver/JFJochReceiverService.h" #include "../grpc/JFJochReceiverClient.h" -#include "../receiver/host/HLSSimulatedDevice.h" +#include "../receiver/HLSSimulatedDevice.h" #include #include "../../common/ZMQImagePusher.h" From 17040d4ee57dee078b7f38f393f49624e53b6eac Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 9 Jun 2023 15:17:00 +0200 Subject: [PATCH 058/224] JFConversionFixedPoint: More SIMD friendly --- jungfrau/JFConversionFixedPoint.cpp | 107 +++++++++------------------- jungfrau/JFConversionFixedPoint.h | 1 - 2 files changed, 35 insertions(+), 73 deletions(-) diff --git a/jungfrau/JFConversionFixedPoint.cpp b/jungfrau/JFConversionFixedPoint.cpp index a81c59c9..50b7067e 100644 --- a/jungfrau/JFConversionFixedPoint.cpp +++ b/jungfrau/JFConversionFixedPoint.cpp @@ -57,49 +57,6 @@ inline int32_t jf_round(int32_t in) { return in - half; } -void JFConversionFixedPoint::ConvertLine(int16_t *dest, const uint16_t *source, int line) { - auto gain_g0_aligned = std::assume_aligned<64>(gain_g0); - auto gain_g1_aligned = std::assume_aligned<64>(gain_g1); - auto gain_g2_aligned = std::assume_aligned<64>(gain_g2); - auto pedestal_g0_aligned = std::assume_aligned<64>(pedestal_g0); - auto pedestal_g1_aligned = std::assume_aligned<64>(pedestal_g1); - auto pedestal_g2_aligned = std::assume_aligned<64>(pedestal_g2); - - for (int i = 0; i < RAW_MODULE_COLS; i++) { - uint16_t gainbits = source[i] & 0xc000; - int32_t adc = source[i] & 0x3fff; - int32_t val = INT32_MIN; - - switch (gainbits) { - case 0: - [[likely]] - val = (adc - pedestal_g0_aligned[i + line * RAW_MODULE_COLS]) * gain_g0_aligned[i + line * RAW_MODULE_COLS]; - break; - case 0x4000: - if (source[i] != 0x4000) - val = (adc - pedestal_g1_aligned[i + line * RAW_MODULE_COLS]) * gain_g1_aligned[i + line * RAW_MODULE_COLS]; - break; - case 0xc000: - if (source[i] == 0xc000) - val = INT32_MAX; - else if (source[i] != 0xffff) - val = (adc - pedestal_g2_aligned[i + line * RAW_MODULE_COLS]) * gain_g2_aligned[i + line * RAW_MODULE_COLS]; - break; - default: - break; - } - - if (val <= INT16_MIN * (1L << FIXED_PRECISION)) - [[unlikely]] - dest[i] = INT16_MIN; - else if (val >= INT16_MAX * (1L << FIXED_PRECISION)) - [[unlikely]] - dest[i] = INT16_MAX; - else - dest[i] = static_cast(jf_round(val)/ (1L << FIXED_PRECISION)); - } -} - void JFConversionFixedPoint::ConvertModule(int16_t *dest, const uint16_t *source) { auto gain_g0_aligned = std::assume_aligned<64>(gain_g0); auto gain_g1_aligned = std::assume_aligned<64>(gain_g1); @@ -108,38 +65,44 @@ void JFConversionFixedPoint::ConvertModule(int16_t *dest, const uint16_t *source auto pedestal_g1_aligned = std::assume_aligned<64>(pedestal_g1); auto pedestal_g2_aligned = std::assume_aligned<64>(pedestal_g2); - for (int i = 0; i < RAW_MODULE_SIZE; i++) { - uint16_t gainbits = source[i] & 0xc000; - int32_t adc = source[i] & 0x3fff; - int32_t val = INT32_MIN; - switch (gainbits) { - case 0: - [[likely]] - val = (adc - pedestal_g0_aligned[i]) * gain_g0_aligned[i]; - break; - case 0x4000: - if (source[i] != 0x4000) - val = (adc - pedestal_g1_aligned[i]) * gain_g1_aligned[i]; - break; - case 0xc000: - if (source[i] == 0xc000) - val = INT32_MAX; - else if (source[i] != 0xffff) - val = (adc - pedestal_g2_aligned[i]) * gain_g2_aligned[i]; - break; - default: - break; + for (int line = 0; line < RAW_MODULE_LINES; line++) { + for (int col = 0; col < RAW_MODULE_COLS; col++) { + int i = col + line * RAW_MODULE_COLS; + int32_t adc = source[i] & 0x3fff; + int32_t val = (adc - pedestal_g0_aligned[i]) * gain_g0_aligned[i]; + dest[i] = static_cast(jf_round(val) / (1L << FIXED_PRECISION)); } - if (val <= INT16_MIN * (1L << FIXED_PRECISION)) - [[unlikely]] - dest[i] = INT16_MIN; - else if (val >= INT16_MAX * (1L << FIXED_PRECISION)) - [[unlikely]] - dest[i] = INT16_MAX; - else - dest[i] = static_cast(jf_round(val)/ (1L << FIXED_PRECISION)); + for (int col = 0; col < RAW_MODULE_COLS; col++) { + int i = col + line * RAW_MODULE_COLS; + uint16_t gainbits = source[i] & 0xc000; + int32_t adc = source[i] & 0x3fff; + + int32_t val = (adc - pedestal_g1_aligned[i]) * gain_g1_aligned[i]; + if (gainbits == 0x4000) + dest[i] = static_cast(jf_round(val) / (1L << FIXED_PRECISION)); + } + + for (int col = 0; col < RAW_MODULE_COLS; col++) { + int i = col + line * RAW_MODULE_COLS; + uint16_t gainbits = source[i] & 0xc000; + int32_t adc = source[i] & 0x3fff; + + int32_t val = (adc - pedestal_g2_aligned[i]) * gain_g2_aligned[i]; + + if (gainbits == 0xc000) + dest[i] = static_cast(jf_round(val) / (1L << FIXED_PRECISION)); + } + +#pragma ivdep + for (int col = 0; col < RAW_MODULE_COLS; col++) { + int i = col + line * RAW_MODULE_COLS; + if (source[i] == 0xc000) + dest[i] = INT16_MAX; + if (source[i] == 0xffff) + dest[i] = INT16_MIN; + } } } diff --git a/jungfrau/JFConversionFixedPoint.h b/jungfrau/JFConversionFixedPoint.h index b0cff7bf..779924d3 100644 --- a/jungfrau/JFConversionFixedPoint.h +++ b/jungfrau/JFConversionFixedPoint.h @@ -13,7 +13,6 @@ class JFConversionFixedPoint : public JFConversion { int32_t *gain_g0; int32_t *gain_g1; int32_t *gain_g2; - void ConvertLine(int16_t *dest, const uint16_t *source, int line); public: JFConversionFixedPoint(); ~JFConversionFixedPoint(); From b51c8b91d2952869a780665b480db886f6907792 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 9 Jun 2023 15:55:48 +0200 Subject: [PATCH 059/224] JFConversionFixedPoint: More SIMD improvement (but Intel only!) --- jungfrau/JFConversionFixedPoint.cpp | 68 +++++++++++++---------------- 1 file changed, 30 insertions(+), 38 deletions(-) diff --git a/jungfrau/JFConversionFixedPoint.cpp b/jungfrau/JFConversionFixedPoint.cpp index 50b7067e..09b3d7b3 100644 --- a/jungfrau/JFConversionFixedPoint.cpp +++ b/jungfrau/JFConversionFixedPoint.cpp @@ -51,7 +51,9 @@ void JFConversionFixedPoint::Setup(const JFModuleGainCalibration &gain_calibrati inline int32_t jf_round(int32_t in) { const int32_t half = (1L << (FIXED_PRECISION-1)); - if (in > 0) + if (in > INT16_MAX * (1L << FIXED_PRECISION)) + return INT16_MAX * (1L << FIXED_PRECISION); + else if (in > 0) return in + half; else return in - half; @@ -65,44 +67,34 @@ void JFConversionFixedPoint::ConvertModule(int16_t *dest, const uint16_t *source auto pedestal_g1_aligned = std::assume_aligned<64>(pedestal_g1); auto pedestal_g2_aligned = std::assume_aligned<64>(pedestal_g2); - - for (int line = 0; line < RAW_MODULE_LINES; line++) { - for (int col = 0; col < RAW_MODULE_COLS; col++) { - int i = col + line * RAW_MODULE_COLS; - int32_t adc = source[i] & 0x3fff; - int32_t val = (adc - pedestal_g0_aligned[i]) * gain_g0_aligned[i]; - dest[i] = static_cast(jf_round(val) / (1L << FIXED_PRECISION)); - } - - for (int col = 0; col < RAW_MODULE_COLS; col++) { - int i = col + line * RAW_MODULE_COLS; - uint16_t gainbits = source[i] & 0xc000; - int32_t adc = source[i] & 0x3fff; - - int32_t val = (adc - pedestal_g1_aligned[i]) * gain_g1_aligned[i]; - if (gainbits == 0x4000) - dest[i] = static_cast(jf_round(val) / (1L << FIXED_PRECISION)); - } - - for (int col = 0; col < RAW_MODULE_COLS; col++) { - int i = col + line * RAW_MODULE_COLS; - uint16_t gainbits = source[i] & 0xc000; - int32_t adc = source[i] & 0x3fff; - - int32_t val = (adc - pedestal_g2_aligned[i]) * gain_g2_aligned[i]; - - if (gainbits == 0xc000) - dest[i] = static_cast(jf_round(val) / (1L << FIXED_PRECISION)); - } - #pragma ivdep - for (int col = 0; col < RAW_MODULE_COLS; col++) { - int i = col + line * RAW_MODULE_COLS; - if (source[i] == 0xc000) - dest[i] = INT16_MAX; - if (source[i] == 0xffff) - dest[i] = INT16_MIN; - } + for (int64_t i = 0; i < RAW_MODULE_SIZE; i++) { + int32_t adc = source[i] & 0x3fff; + uint16_t gainbits = source[i] & 0xc000; + + int32_t val = (adc - pedestal_g0_aligned[i]) * gain_g0_aligned[i]; + int32_t val_g1 = (adc - pedestal_g1_aligned[i]) * gain_g1_aligned[i]; + int32_t val_g2 = (adc - pedestal_g2_aligned[i]) * gain_g2_aligned[i]; + + dest[i] = static_cast(jf_round(val) / (1L << FIXED_PRECISION)); + + if (gainbits == 0x4000) + dest[i] = static_cast(jf_round(val_g1) / (1L << FIXED_PRECISION)); + + if (gainbits == 0xc000) + dest[i] = static_cast(jf_round(val_g2) / (1L << FIXED_PRECISION)); + + if (source[i] == 0x4000) + dest[i] = INT16_MIN; + + if (source[i] == 0x8000) + dest[i] = INT16_MIN; + + if (source[i] == 0xc000) + dest[i] = INT16_MAX; + + if (source[i] == 0xffff) + dest[i] = INT16_MIN; } } From 5b11a6f842865e13005ebfd7c4cff38c8670f852 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 9 Jun 2023 18:17:14 +0200 Subject: [PATCH 060/224] Revert "JFConversionFixedPoint: More SIMD improvement (but Intel only!)" This reverts commit b51c8b91d2952869a780665b480db886f6907792. --- jungfrau/JFConversionFixedPoint.cpp | 68 ++++++++++++++++------------- 1 file changed, 38 insertions(+), 30 deletions(-) diff --git a/jungfrau/JFConversionFixedPoint.cpp b/jungfrau/JFConversionFixedPoint.cpp index 09b3d7b3..50b7067e 100644 --- a/jungfrau/JFConversionFixedPoint.cpp +++ b/jungfrau/JFConversionFixedPoint.cpp @@ -51,9 +51,7 @@ void JFConversionFixedPoint::Setup(const JFModuleGainCalibration &gain_calibrati inline int32_t jf_round(int32_t in) { const int32_t half = (1L << (FIXED_PRECISION-1)); - if (in > INT16_MAX * (1L << FIXED_PRECISION)) - return INT16_MAX * (1L << FIXED_PRECISION); - else if (in > 0) + if (in > 0) return in + half; else return in - half; @@ -67,34 +65,44 @@ void JFConversionFixedPoint::ConvertModule(int16_t *dest, const uint16_t *source auto pedestal_g1_aligned = std::assume_aligned<64>(pedestal_g1); auto pedestal_g2_aligned = std::assume_aligned<64>(pedestal_g2); + + for (int line = 0; line < RAW_MODULE_LINES; line++) { + for (int col = 0; col < RAW_MODULE_COLS; col++) { + int i = col + line * RAW_MODULE_COLS; + int32_t adc = source[i] & 0x3fff; + int32_t val = (adc - pedestal_g0_aligned[i]) * gain_g0_aligned[i]; + dest[i] = static_cast(jf_round(val) / (1L << FIXED_PRECISION)); + } + + for (int col = 0; col < RAW_MODULE_COLS; col++) { + int i = col + line * RAW_MODULE_COLS; + uint16_t gainbits = source[i] & 0xc000; + int32_t adc = source[i] & 0x3fff; + + int32_t val = (adc - pedestal_g1_aligned[i]) * gain_g1_aligned[i]; + if (gainbits == 0x4000) + dest[i] = static_cast(jf_round(val) / (1L << FIXED_PRECISION)); + } + + for (int col = 0; col < RAW_MODULE_COLS; col++) { + int i = col + line * RAW_MODULE_COLS; + uint16_t gainbits = source[i] & 0xc000; + int32_t adc = source[i] & 0x3fff; + + int32_t val = (adc - pedestal_g2_aligned[i]) * gain_g2_aligned[i]; + + if (gainbits == 0xc000) + dest[i] = static_cast(jf_round(val) / (1L << FIXED_PRECISION)); + } + #pragma ivdep - for (int64_t i = 0; i < RAW_MODULE_SIZE; i++) { - int32_t adc = source[i] & 0x3fff; - uint16_t gainbits = source[i] & 0xc000; - - int32_t val = (adc - pedestal_g0_aligned[i]) * gain_g0_aligned[i]; - int32_t val_g1 = (adc - pedestal_g1_aligned[i]) * gain_g1_aligned[i]; - int32_t val_g2 = (adc - pedestal_g2_aligned[i]) * gain_g2_aligned[i]; - - dest[i] = static_cast(jf_round(val) / (1L << FIXED_PRECISION)); - - if (gainbits == 0x4000) - dest[i] = static_cast(jf_round(val_g1) / (1L << FIXED_PRECISION)); - - if (gainbits == 0xc000) - dest[i] = static_cast(jf_round(val_g2) / (1L << FIXED_PRECISION)); - - if (source[i] == 0x4000) - dest[i] = INT16_MIN; - - if (source[i] == 0x8000) - dest[i] = INT16_MIN; - - if (source[i] == 0xc000) - dest[i] = INT16_MAX; - - if (source[i] == 0xffff) - dest[i] = INT16_MIN; + for (int col = 0; col < RAW_MODULE_COLS; col++) { + int i = col + line * RAW_MODULE_COLS; + if (source[i] == 0xc000) + dest[i] = INT16_MAX; + if (source[i] == 0xffff) + dest[i] = INT16_MIN; + } } } From cadcc03d320e1a3ef5305536e5f326eb34789f33 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 9 Jun 2023 18:17:14 +0200 Subject: [PATCH 061/224] Revert "JFConversionFixedPoint: More SIMD friendly" This reverts commit 17040d4ee57dee078b7f38f393f49624e53b6eac. --- jungfrau/JFConversionFixedPoint.cpp | 107 +++++++++++++++++++--------- jungfrau/JFConversionFixedPoint.h | 1 + 2 files changed, 73 insertions(+), 35 deletions(-) diff --git a/jungfrau/JFConversionFixedPoint.cpp b/jungfrau/JFConversionFixedPoint.cpp index 50b7067e..a81c59c9 100644 --- a/jungfrau/JFConversionFixedPoint.cpp +++ b/jungfrau/JFConversionFixedPoint.cpp @@ -57,6 +57,49 @@ inline int32_t jf_round(int32_t in) { return in - half; } +void JFConversionFixedPoint::ConvertLine(int16_t *dest, const uint16_t *source, int line) { + auto gain_g0_aligned = std::assume_aligned<64>(gain_g0); + auto gain_g1_aligned = std::assume_aligned<64>(gain_g1); + auto gain_g2_aligned = std::assume_aligned<64>(gain_g2); + auto pedestal_g0_aligned = std::assume_aligned<64>(pedestal_g0); + auto pedestal_g1_aligned = std::assume_aligned<64>(pedestal_g1); + auto pedestal_g2_aligned = std::assume_aligned<64>(pedestal_g2); + + for (int i = 0; i < RAW_MODULE_COLS; i++) { + uint16_t gainbits = source[i] & 0xc000; + int32_t adc = source[i] & 0x3fff; + int32_t val = INT32_MIN; + + switch (gainbits) { + case 0: + [[likely]] + val = (adc - pedestal_g0_aligned[i + line * RAW_MODULE_COLS]) * gain_g0_aligned[i + line * RAW_MODULE_COLS]; + break; + case 0x4000: + if (source[i] != 0x4000) + val = (adc - pedestal_g1_aligned[i + line * RAW_MODULE_COLS]) * gain_g1_aligned[i + line * RAW_MODULE_COLS]; + break; + case 0xc000: + if (source[i] == 0xc000) + val = INT32_MAX; + else if (source[i] != 0xffff) + val = (adc - pedestal_g2_aligned[i + line * RAW_MODULE_COLS]) * gain_g2_aligned[i + line * RAW_MODULE_COLS]; + break; + default: + break; + } + + if (val <= INT16_MIN * (1L << FIXED_PRECISION)) + [[unlikely]] + dest[i] = INT16_MIN; + else if (val >= INT16_MAX * (1L << FIXED_PRECISION)) + [[unlikely]] + dest[i] = INT16_MAX; + else + dest[i] = static_cast(jf_round(val)/ (1L << FIXED_PRECISION)); + } +} + void JFConversionFixedPoint::ConvertModule(int16_t *dest, const uint16_t *source) { auto gain_g0_aligned = std::assume_aligned<64>(gain_g0); auto gain_g1_aligned = std::assume_aligned<64>(gain_g1); @@ -65,44 +108,38 @@ void JFConversionFixedPoint::ConvertModule(int16_t *dest, const uint16_t *source auto pedestal_g1_aligned = std::assume_aligned<64>(pedestal_g1); auto pedestal_g2_aligned = std::assume_aligned<64>(pedestal_g2); + for (int i = 0; i < RAW_MODULE_SIZE; i++) { + uint16_t gainbits = source[i] & 0xc000; + int32_t adc = source[i] & 0x3fff; + int32_t val = INT32_MIN; - for (int line = 0; line < RAW_MODULE_LINES; line++) { - for (int col = 0; col < RAW_MODULE_COLS; col++) { - int i = col + line * RAW_MODULE_COLS; - int32_t adc = source[i] & 0x3fff; - int32_t val = (adc - pedestal_g0_aligned[i]) * gain_g0_aligned[i]; - dest[i] = static_cast(jf_round(val) / (1L << FIXED_PRECISION)); + switch (gainbits) { + case 0: + [[likely]] + val = (adc - pedestal_g0_aligned[i]) * gain_g0_aligned[i]; + break; + case 0x4000: + if (source[i] != 0x4000) + val = (adc - pedestal_g1_aligned[i]) * gain_g1_aligned[i]; + break; + case 0xc000: + if (source[i] == 0xc000) + val = INT32_MAX; + else if (source[i] != 0xffff) + val = (adc - pedestal_g2_aligned[i]) * gain_g2_aligned[i]; + break; + default: + break; } - for (int col = 0; col < RAW_MODULE_COLS; col++) { - int i = col + line * RAW_MODULE_COLS; - uint16_t gainbits = source[i] & 0xc000; - int32_t adc = source[i] & 0x3fff; - - int32_t val = (adc - pedestal_g1_aligned[i]) * gain_g1_aligned[i]; - if (gainbits == 0x4000) - dest[i] = static_cast(jf_round(val) / (1L << FIXED_PRECISION)); - } - - for (int col = 0; col < RAW_MODULE_COLS; col++) { - int i = col + line * RAW_MODULE_COLS; - uint16_t gainbits = source[i] & 0xc000; - int32_t adc = source[i] & 0x3fff; - - int32_t val = (adc - pedestal_g2_aligned[i]) * gain_g2_aligned[i]; - - if (gainbits == 0xc000) - dest[i] = static_cast(jf_round(val) / (1L << FIXED_PRECISION)); - } - -#pragma ivdep - for (int col = 0; col < RAW_MODULE_COLS; col++) { - int i = col + line * RAW_MODULE_COLS; - if (source[i] == 0xc000) - dest[i] = INT16_MAX; - if (source[i] == 0xffff) - dest[i] = INT16_MIN; - } + if (val <= INT16_MIN * (1L << FIXED_PRECISION)) + [[unlikely]] + dest[i] = INT16_MIN; + else if (val >= INT16_MAX * (1L << FIXED_PRECISION)) + [[unlikely]] + dest[i] = INT16_MAX; + else + dest[i] = static_cast(jf_round(val)/ (1L << FIXED_PRECISION)); } } diff --git a/jungfrau/JFConversionFixedPoint.h b/jungfrau/JFConversionFixedPoint.h index 779924d3..b0cff7bf 100644 --- a/jungfrau/JFConversionFixedPoint.h +++ b/jungfrau/JFConversionFixedPoint.h @@ -13,6 +13,7 @@ class JFConversionFixedPoint : public JFConversion { int32_t *gain_g0; int32_t *gain_g1; int32_t *gain_g2; + void ConvertLine(int16_t *dest, const uint16_t *source, int line); public: JFConversionFixedPoint(); ~JFConversionFixedPoint(); From 7799571a352992b6887eed617a28210c693f76eb Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 13 Jun 2023 20:22:22 +0200 Subject: [PATCH 062/224] JFConversionFixedPoint: Remove ConvertLine --- jungfrau/JFConversionFixedPoint.cpp | 43 ----------------------------- jungfrau/JFConversionFixedPoint.h | 1 - 2 files changed, 44 deletions(-) diff --git a/jungfrau/JFConversionFixedPoint.cpp b/jungfrau/JFConversionFixedPoint.cpp index a81c59c9..98197a61 100644 --- a/jungfrau/JFConversionFixedPoint.cpp +++ b/jungfrau/JFConversionFixedPoint.cpp @@ -57,49 +57,6 @@ inline int32_t jf_round(int32_t in) { return in - half; } -void JFConversionFixedPoint::ConvertLine(int16_t *dest, const uint16_t *source, int line) { - auto gain_g0_aligned = std::assume_aligned<64>(gain_g0); - auto gain_g1_aligned = std::assume_aligned<64>(gain_g1); - auto gain_g2_aligned = std::assume_aligned<64>(gain_g2); - auto pedestal_g0_aligned = std::assume_aligned<64>(pedestal_g0); - auto pedestal_g1_aligned = std::assume_aligned<64>(pedestal_g1); - auto pedestal_g2_aligned = std::assume_aligned<64>(pedestal_g2); - - for (int i = 0; i < RAW_MODULE_COLS; i++) { - uint16_t gainbits = source[i] & 0xc000; - int32_t adc = source[i] & 0x3fff; - int32_t val = INT32_MIN; - - switch (gainbits) { - case 0: - [[likely]] - val = (adc - pedestal_g0_aligned[i + line * RAW_MODULE_COLS]) * gain_g0_aligned[i + line * RAW_MODULE_COLS]; - break; - case 0x4000: - if (source[i] != 0x4000) - val = (adc - pedestal_g1_aligned[i + line * RAW_MODULE_COLS]) * gain_g1_aligned[i + line * RAW_MODULE_COLS]; - break; - case 0xc000: - if (source[i] == 0xc000) - val = INT32_MAX; - else if (source[i] != 0xffff) - val = (adc - pedestal_g2_aligned[i + line * RAW_MODULE_COLS]) * gain_g2_aligned[i + line * RAW_MODULE_COLS]; - break; - default: - break; - } - - if (val <= INT16_MIN * (1L << FIXED_PRECISION)) - [[unlikely]] - dest[i] = INT16_MIN; - else if (val >= INT16_MAX * (1L << FIXED_PRECISION)) - [[unlikely]] - dest[i] = INT16_MAX; - else - dest[i] = static_cast(jf_round(val)/ (1L << FIXED_PRECISION)); - } -} - void JFConversionFixedPoint::ConvertModule(int16_t *dest, const uint16_t *source) { auto gain_g0_aligned = std::assume_aligned<64>(gain_g0); auto gain_g1_aligned = std::assume_aligned<64>(gain_g1); diff --git a/jungfrau/JFConversionFixedPoint.h b/jungfrau/JFConversionFixedPoint.h index b0cff7bf..779924d3 100644 --- a/jungfrau/JFConversionFixedPoint.h +++ b/jungfrau/JFConversionFixedPoint.h @@ -13,7 +13,6 @@ class JFConversionFixedPoint : public JFConversion { int32_t *gain_g0; int32_t *gain_g1; int32_t *gain_g2; - void ConvertLine(int16_t *dest, const uint16_t *source, int line); public: JFConversionFixedPoint(); ~JFConversionFixedPoint(); From cf9a65b1c3ac41732ec87144b978f19b1afa4aae Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 13 Jun 2023 20:22:56 +0200 Subject: [PATCH 063/224] JFConversionGPU: Fix alternative function --- jungfrau/JFConversionGPU_Alt.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/jungfrau/JFConversionGPU_Alt.cpp b/jungfrau/JFConversionGPU_Alt.cpp index 0a0af1bb..e0169861 100644 --- a/jungfrau/JFConversionGPU_Alt.cpp +++ b/jungfrau/JFConversionGPU_Alt.cpp @@ -18,6 +18,6 @@ void JFConversionGPU::ConvertPacket(int16_t *dest, const uint16_t *source, uint1 alt_conv.ConvertPacket(dest, source, packet_number); } -JFConversionGPU::Sync() {} +void JFConversionGPU::Sync() {} #endif From ee4eb6e0675aba3941c6cef4b0d07b3dc203dc1d Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 13 Jun 2023 20:23:39 +0200 Subject: [PATCH 064/224] Remove _Alt from non-GPU .cpp files --- image_analysis/CMakeLists.txt | 2 +- .../{GPUImageAnalysis_Alt.cpp => GPUImageAnalysis.cpp} | 0 jungfrau/CMakeLists.txt | 2 +- jungfrau/{JFConversionGPU_Alt.cpp => JFConversionGPU.cpp} | 0 4 files changed, 2 insertions(+), 2 deletions(-) rename image_analysis/{GPUImageAnalysis_Alt.cpp => GPUImageAnalysis.cpp} (100%) rename jungfrau/{JFConversionGPU_Alt.cpp => JFConversionGPU.cpp} (100%) diff --git a/image_analysis/CMakeLists.txt b/image_analysis/CMakeLists.txt index e51c0b95..6b927ae9 100644 --- a/image_analysis/CMakeLists.txt +++ b/image_analysis/CMakeLists.txt @@ -4,7 +4,7 @@ ADD_LIBRARY(ImageAnalysis STATIC GPUImageAnalysis.h RadialIntegration.cpp RadialIntegration.h RadialIntegrationMapping.cpp RadialIntegrationMapping.h - StrongPixelSet.cpp StrongPixelSet.h GPUImageAnalysis_Alt.cpp RadialIntegrationProfile.cpp RadialIntegrationProfile.h) + StrongPixelSet.cpp StrongPixelSet.h GPUImageAnalysis.cpp RadialIntegrationProfile.cpp RadialIntegrationProfile.h) TARGET_LINK_LIBRARIES(ImageAnalysis CommonFunctions) diff --git a/image_analysis/GPUImageAnalysis_Alt.cpp b/image_analysis/GPUImageAnalysis.cpp similarity index 100% rename from image_analysis/GPUImageAnalysis_Alt.cpp rename to image_analysis/GPUImageAnalysis.cpp diff --git a/jungfrau/CMakeLists.txt b/jungfrau/CMakeLists.txt index ee02541a..e99bc537 100644 --- a/jungfrau/CMakeLists.txt +++ b/jungfrau/CMakeLists.txt @@ -7,7 +7,7 @@ ADD_LIBRARY(JFCalibration STATIC JFModuleGainCalibration.cpp JFModuleGainCalibration.h JFPedestalCalc.cpp JFPedestalCalc.h ProcessJFPacket.cpp ProcessJFPacket.h - JFConversionGPU.h JFConversionGPU_Alt.cpp) + JFConversionGPU.h JFConversionGPU.cpp) SET_SOURCE_FILES_PROPERTIES(JFPedestalCalc.cpp JFConversionFloatingPoint.cpp JFConversionFixedPoint.cpp PROPERTIES COMPILE_FLAGS -Ofast) diff --git a/jungfrau/JFConversionGPU_Alt.cpp b/jungfrau/JFConversionGPU.cpp similarity index 100% rename from jungfrau/JFConversionGPU_Alt.cpp rename to jungfrau/JFConversionGPU.cpp From 697e727a167ce9f7fa441b41da9a8f9a8a85a8a0 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 13 Jun 2023 20:58:35 +0200 Subject: [PATCH 065/224] JFConversionFixedPoint: vectorization, try again --- jungfrau/JFConversionFixedPoint.cpp | 60 +++++++++++++++-------------- 1 file changed, 32 insertions(+), 28 deletions(-) diff --git a/jungfrau/JFConversionFixedPoint.cpp b/jungfrau/JFConversionFixedPoint.cpp index 98197a61..e9eb83e1 100644 --- a/jungfrau/JFConversionFixedPoint.cpp +++ b/jungfrau/JFConversionFixedPoint.cpp @@ -51,7 +51,12 @@ void JFConversionFixedPoint::Setup(const JFModuleGainCalibration &gain_calibrati inline int32_t jf_round(int32_t in) { const int32_t half = (1L << (FIXED_PRECISION-1)); - if (in > 0) + + if (in <= INT16_MIN * (1L << FIXED_PRECISION)) + return INT16_MIN * (1L << FIXED_PRECISION); + else if (in >= INT16_MAX * (1L << FIXED_PRECISION)) + return INT16_MAX * (1L << FIXED_PRECISION); + else if (in > 0) return in + half; else return in - half; @@ -65,38 +70,37 @@ void JFConversionFixedPoint::ConvertModule(int16_t *dest, const uint16_t *source auto pedestal_g1_aligned = std::assume_aligned<64>(pedestal_g1); auto pedestal_g2_aligned = std::assume_aligned<64>(pedestal_g2); +#pragma ivdep for (int i = 0; i < RAW_MODULE_SIZE; i++) { uint16_t gainbits = source[i] & 0xc000; int32_t adc = source[i] & 0x3fff; - int32_t val = INT32_MIN; - switch (gainbits) { - case 0: - [[likely]] - val = (adc - pedestal_g0_aligned[i]) * gain_g0_aligned[i]; - break; - case 0x4000: - if (source[i] != 0x4000) - val = (adc - pedestal_g1_aligned[i]) * gain_g1_aligned[i]; - break; - case 0xc000: - if (source[i] == 0xc000) - val = INT32_MAX; - else if (source[i] != 0xffff) - val = (adc - pedestal_g2_aligned[i]) * gain_g2_aligned[i]; - break; - default: - break; - } + dest[i] = static_cast(jf_round((adc - pedestal_g0_aligned[i]) * gain_g0_aligned[i]) + / (1L << FIXED_PRECISION)); - if (val <= INT16_MIN * (1L << FIXED_PRECISION)) - [[unlikely]] - dest[i] = INT16_MIN; - else if (val >= INT16_MAX * (1L << FIXED_PRECISION)) - [[unlikely]] - dest[i] = INT16_MAX; - else - dest[i] = static_cast(jf_round(val)/ (1L << FIXED_PRECISION)); + int16_t val_1 = jf_round((adc - pedestal_g1_aligned[i]) * gain_g1_aligned[i]) + / (1L << FIXED_PRECISION); + + int16_t val_2 = jf_round((adc - pedestal_g2_aligned[i]) * gain_g2_aligned[i]) + / (1L << FIXED_PRECISION); + + if (gainbits == 0x4000) + dest[i] = val_1; + + if (gainbits == 0xc000) + dest[i] = val_2; + + if (gainbits == 0x8000) + dest[i] = INT16_MIN; + + if (source[i] == 0xffff) + dest[i] = INT16_MIN; + + if (source[i] == 0x4000) + dest[i] = INT16_MIN; + + if (source[i] == 0xc000) + dest[i] = INT16_MAX; } } From d30c3eb055585d44e0f58cdbda81b062d0e92b26 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 13 Jun 2023 22:16:22 +0200 Subject: [PATCH 066/224] FPGAAcquisitionDevice: Serious seg-fault! --- receiver/FPGAAcquisitionDevice.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/receiver/FPGAAcquisitionDevice.cpp b/receiver/FPGAAcquisitionDevice.cpp index 8c744f8e..b05abb72 100644 --- a/receiver/FPGAAcquisitionDevice.cpp +++ b/receiver/FPGAAcquisitionDevice.cpp @@ -23,7 +23,7 @@ void FPGAAcquisitionDevice::Finalize() { } void FPGAAcquisitionDevice::ReadWorkCompletionThread() { - uint32_t values[12]; + uint32_t values[16]; Completion c{}; bool quit_loop = false; From b92f345dea8474dd5b21860d32b2266511f88080 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 13 Jun 2023 22:22:14 +0200 Subject: [PATCH 067/224] CoordTest: Fix handling of imprecision --- tests/CoordTest.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/CoordTest.cpp b/tests/CoordTest.cpp index 99efb958..38514727 100644 --- a/tests/CoordTest.cpp +++ b/tests/CoordTest.cpp @@ -103,8 +103,8 @@ TEST_CASE("Coord_operator_bracket","[LinearAlgebra][Coord]") { TEST_CASE("Coord_normalize","[LinearAlgebra][Coord]") { Coord a{4,0,0}; REQUIRE(a.Length() == 4.0); - REQUIRE(a.Normalize().Length() == 1.0); - REQUIRE(a.Normalize().x == 1.0); + REQUIRE(a.Normalize().Length() == Approx(1.0)); + REQUIRE(a.Normalize().x == Approx(1.0)); REQUIRE(a.Normalize().y == 0.0); REQUIRE(a.Normalize().z == 0.0); From cc07979fca009a907515f18c030aa8beef8fbd81 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 14 Jun 2023 10:04:47 +0200 Subject: [PATCH 068/224] JFCalibrationPerfTest: Don't use random numbers to generate pedestal frames (too slow with Intel Compiler) --- tools/JFCalibrationPerfTest.cpp | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-) diff --git a/tools/JFCalibrationPerfTest.cpp b/tools/JFCalibrationPerfTest.cpp index 6ea3fe7c..6793441d 100644 --- a/tools/JFCalibrationPerfTest.cpp +++ b/tools/JFCalibrationPerfTest.cpp @@ -21,23 +21,12 @@ void test_pedestal(Logger &logger) { size_t nframes = 5000; DiffractionExperiment x(DetectorGeometry(1)); + x.Mode(DetectorMode::Conversion); std::vector data(nframes * RAW_MODULE_SIZE); - x.Mode(DetectorMode::Conversion); - double mean = 1000.0; - double stddev = 50.0; - - // Predictable random number generator - std::mt19937 g1(5423); - std::normal_distribution distribution(mean, stddev); - - for (size_t i = 0; i < nframes * RAW_MODULE_SIZE; i++) { - double number = distribution(g1); - if (number < 20) number = 20; - if (number > 16300) number = 16300; - data[i] = number; - } + for (size_t i = 0; i < nframes * RAW_MODULE_SIZE; i++) + data[i] = 3000 + (i % 881) + (i % 557); JFPedestalCalc calc_cpu(x); auto start_time = std::chrono::system_clock::now(); From cd76e97766665ae5f8ec6306d95da3e72a2ef2b3 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 14 Jun 2023 11:34:49 +0200 Subject: [PATCH 069/224] IndexerWrapper: Fix for Intel Compiler (probably returning stack reference?) --- image_analysis/IndexerWrapper.cpp | 25 +++++++------------------ image_analysis/IndexerWrapper.h | 2 +- 2 files changed, 8 insertions(+), 19 deletions(-) diff --git a/image_analysis/IndexerWrapper.cpp b/image_analysis/IndexerWrapper.cpp index ec11922e..1c548781 100644 --- a/image_analysis/IndexerWrapper.cpp +++ b/image_analysis/IndexerWrapper.cpp @@ -9,22 +9,6 @@ void IndexerWrapper::Setup(const UnitCell &cell) { #endif } -// Select spots that belong to indexing solution -// - cell cell in real space -// - spots spots in reciprocal space -// - threshold radius around approximated miller indices -template -inline auto select_indexed_spots(const Eigen::MatrixBase& cell, - const Eigen::MatrixBase& spots, - float_type threshold=.02f) -{ - using M3x = Eigen::MatrixX3; - M3x resid = spots * cell.transpose(); - const M3x miller = round(resid.array()); - resid -= miller; - return resid.rowwise().norm().array() < threshold; -} - std::vector IndexerWrapper::Run(const std::vector &coord) { #ifdef JFJOCH_USE_CUDA std::vector ret; @@ -46,10 +30,15 @@ std::vector IndexerWrapper::Run(const std::vector &coord) // Get best cell auto id = fast_feedback::refine::best_cell(indexer.oScoreV()); - // Get indexed spots - auto arr = select_indexed_spots(indexer.oCell(id), indexer.Spots(), threshold); + // get indexed spots + using M3x = Eigen::MatrixX3; + M3x resid = indexer.Spots() * indexer.oCell(id).transpose(); + const M3x miller = round(resid.array()); + resid -= miller; + auto arr = resid.rowwise().norm().array() < threshold; auto indexed_spot_count = arr.count(); + // Check if result is viable if (indexed_spot_count > min_spots) { IndexingResult result; diff --git a/image_analysis/IndexerWrapper.h b/image_analysis/IndexerWrapper.h index e2afb100..e73a9e49 100644 --- a/image_analysis/IndexerWrapper.h +++ b/image_analysis/IndexerWrapper.h @@ -18,7 +18,7 @@ struct IndexingResult { CrystalLattice l; - std::vector indexed_spots; + std::vector indexed_spots; uint64_t indexed_spots_count; }; From 0aa3d7fbfd3a4fe13c78588498069a8100f45901 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 14 Jun 2023 12:02:05 +0200 Subject: [PATCH 070/224] JFConversionFloatingPoint: Don't rely on infinity for FP math --- jungfrau/JFConversionFloatingPoint.cpp | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/jungfrau/JFConversionFloatingPoint.cpp b/jungfrau/JFConversionFloatingPoint.cpp index af68c1dd..0aca9882 100644 --- a/jungfrau/JFConversionFloatingPoint.cpp +++ b/jungfrau/JFConversionFloatingPoint.cpp @@ -11,7 +11,7 @@ pedestal_g0(RAW_MODULE_SIZE), pedestal_g1(RAW_MODULE_SIZE), pedestal_g2(RAW_MODU inline float one_over_gain_energy(double gain_factor, double energy) { double tmp = gain_factor * energy; if (!std::isfinite(tmp) || (tmp == 0.0)) - return std::numeric_limits::infinity(); + return 0.0; else return static_cast(1.0 / (gain_factor * energy)); } @@ -46,24 +46,30 @@ void JFConversionFloatingPoint::ConvertModule(int16_t *dest, const uint16_t *sou [[likely]] pedestal_subtracted_adu = adc - pedestal_g0[i]; expected = static_cast(pedestal_subtracted_adu) * gain_g0[i]; + if (gain_g0[i] == 0.0) + expected = INT16_MIN; break; case 0x4000: pedestal_subtracted_adu = adc - pedestal_g1[i]; expected = static_cast(pedestal_subtracted_adu) * gain_g1[i]; if (adc == 0) [[unlikely]] expected = PIXEL_OUT_G1_SATURATION; + if (gain_g1[i] == 0.0) + expected = INT16_MIN; break; case 0xc000: pedestal_subtracted_adu = adc - pedestal_g2[i]; expected = static_cast(pedestal_subtracted_adu) * gain_g2[i]; if (adc == 0) [[unlikely]] expected = PIXEL_OUT_SATURATION; else if (adc == 0x3fff) [[unlikely]] expected = PIXEL_OUT_0xFFFF; + if (gain_g0[i] == 0.0) + expected = INT16_MIN; break; default: expected = PIXEL_OUT_GAINBIT_2; break; } - if (std::isinf(expected) || (expected == INT16_MIN)) + if (expected == INT16_MIN) dest[i] = PIXEL_OUT_LOST; else if (expected > INT16_MAX) dest[i] = INT16_MAX; @@ -88,26 +94,30 @@ void JFConversionFloatingPoint::ConvertFP(float *dest, const uint16_t *source) { case 0: pedestal_subtracted_adu = adc - pedestal_g0[i]; expected = static_cast(pedestal_subtracted_adu) * gain_g0[i]; + if (gain_g0[i] == 0.0) + expected = INT16_MIN, special_val = true; break; case 0x4000: pedestal_subtracted_adu = adc - pedestal_g1[i]; expected = static_cast(pedestal_subtracted_adu) * gain_g1[i]; if (adc == 0) expected = PIXEL_OUT_G1_SATURATION, special_val = true; + if (gain_g1[i] == 0.0) + expected = INT16_MIN, special_val = true; break; case 0xc000: pedestal_subtracted_adu = adc - pedestal_g2[i]; expected = static_cast(pedestal_subtracted_adu) * gain_g2[i]; if (adc == 0) expected = PIXEL_OUT_SATURATION, special_val = true; else if (adc == 0x3fff) expected = PIXEL_OUT_0xFFFF, special_val = true; + if (gain_g2[i] == 0.0) + expected = INT16_MIN, special_val = true; break; default: expected = PIXEL_OUT_GAINBIT_2, special_val = true;; break; } - if (std::isinf(expected)) - expected = PIXEL_OUT_LOST; - else if ((expected > PIXEL_OUT_SATURATION) && !special_val) + if ((expected > PIXEL_OUT_SATURATION) && !special_val) expected = PIXEL_OUT_SATURATION; dest[i] = expected; } From bcf1d634f8c7c4f20e3370b1656708ac74b1f860 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sun, 18 Jun 2023 20:51:55 +0200 Subject: [PATCH 071/224] DiffractionGeometry: Dedicated file + option to project reciprocal space nodes on the detector + more calculations (phi, cos 2theta, solid angle) --- common/CMakeLists.txt | 2 +- common/DiffractionExperiment.cpp | 32 ------ common/DiffractionExperiment.h | 3 - common/DiffractionGeometry.h | 76 ++++++++++++++ common/DiffractionSpot.cpp | 13 ++- common/DiffractionSpot.h | 6 +- image_analysis/RadialIntegrationMapping.cpp | 5 +- tests/CMakeLists.txt | 2 +- tests/DiffractionExperimentTest.cpp | 21 ---- tests/DiffractionGeometryTest.cpp | 106 ++++++++++++++++++++ 10 files changed, 196 insertions(+), 70 deletions(-) create mode 100644 common/DiffractionGeometry.h create mode 100644 tests/DiffractionGeometryTest.cpp diff --git a/common/CMakeLists.txt b/common/CMakeLists.txt index df35a7f9..a60406f2 100644 --- a/common/CMakeLists.txt +++ b/common/CMakeLists.txt @@ -43,7 +43,7 @@ ADD_LIBRARY( CommonFunctions STATIC grpcToJson.h jsonToGrpc.h to_fixed.h DetectorGeometry.cpp DetectorGeometry.h DetectorModuleGeometry.cpp DetectorModuleGeometry.h - DetectorSetup.h DetectorSetup.cpp ZeroCopyReturnValue.h Histogram.h) + DetectorSetup.h DetectorSetup.cpp ZeroCopyReturnValue.h Histogram.h DiffractionGeometry.h) TARGET_LINK_LIBRARIES(CommonFunctions Compression FrameSerialize libzmq JFCalibration JFJochProtoBuf -lrt) diff --git a/common/DiffractionExperiment.cpp b/common/DiffractionExperiment.cpp index ad38a9f7..6575be30 100644 --- a/common/DiffractionExperiment.cpp +++ b/common/DiffractionExperiment.cpp @@ -1,7 +1,6 @@ // Copyright (2019-2022) Paul Scherrer Institute // SPDX-License-Identifier: GPL-3.0-or-later -#include #include #include "NetworkAddressConvert.h" @@ -773,23 +772,6 @@ bool DiffractionExperiment::HasUnitCell() const { return dataset.has_unit_cell(); } -float DiffractionExperiment::ResToPxl(float resolution) const { - if (resolution == 0) - return INFINITY; - - float sin_theta = GetWavelength_A() / (2 * resolution); - float theta = asinf(sin_theta); - float tan_2theta = tanf(2 * theta); - return tan_2theta * GetDetectorDistance_mm() / GetPixelSize_mm(); -} - -float DiffractionExperiment::CalcRadIntSolidAngleCorr(float q) const { - float sin_theta = q * GetWavelength_A() / (4 * static_cast(M_PI)); - float cos_two_theta = 1.0f - 2.0f * sin_theta * sin_theta; // cos(2*alpha) = 1 - 2 * sin(alpha)^2 - float cos_two_theta_3 = cos_two_theta * cos_two_theta * cos_two_theta; - return cos_two_theta_3; -} - Coord DiffractionExperiment::LabCoord(float detector_x, float detector_y) const { // Assumes planar detector, 90 deg towards beam return {(detector_x - GetBeamX_pxl()) * GetPixelSize_mm() , @@ -797,20 +779,6 @@ Coord DiffractionExperiment::LabCoord(float detector_x, float detector_y) const GetDetectorDistance_mm()}; } -float DiffractionExperiment::PxlToRes(float detector_x, float detector_y) const { - auto lab = LabCoord(detector_x, detector_y); - - float beam_path = lab.Length(); - if (beam_path == GetDetectorDistance_mm()) return std::numeric_limits::infinity(); - - float cos_2theta = GetDetectorDistance_mm() / beam_path; - // cos(2theta) = cos(theta)^2 - sin(theta)^2 - // cos(2theta) = 1 - 2*sin(theta)^2 - // Technically two solutions for two theta, but it makes sense only to take positive one in this case - float sin_theta = sqrtf((1-cos_2theta)/2); - return GetWavelength_A() / (2 * sin_theta); -} - int64_t DiffractionExperiment::GetSpaceGroupNumber() const { return dataset.space_group_number(); } diff --git a/common/DiffractionExperiment.h b/common/DiffractionExperiment.h index 8723865e..a42dff01 100644 --- a/common/DiffractionExperiment.h +++ b/common/DiffractionExperiment.h @@ -184,10 +184,7 @@ public: UnitCell GetUnitCell() const; bool HasUnitCell() const; - float ResToPxl(float resolution) const; Coord LabCoord(float detector_x, float detector_y) const; - float PxlToRes(float detector_x, float detector_y) const; - float CalcRadIntSolidAngleCorr(float q) const; float GetLowQForRadialInt_recipA() const; float GetHighQForRadialInt_recipA() const; diff --git a/common/DiffractionGeometry.h b/common/DiffractionGeometry.h new file mode 100644 index 00000000..89461f1e --- /dev/null +++ b/common/DiffractionGeometry.h @@ -0,0 +1,76 @@ +// Copyright (2019-2023) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#ifndef JUNGFRAUJOCH_DIFFRACTIONGEOMETRY_H +#define JUNGFRAUJOCH_DIFFRACTIONGEOMETRY_H + +#include "DiffractionExperiment.h" +#include + +inline Coord DetectorToRecip(const DiffractionExperiment &experiment, float x, float y) { + return experiment.LabCoord(x, y).Normalize() / experiment.GetWavelength_A() - experiment.GetScatteringVector(); +} + +inline std::pair RecipToDector(const DiffractionExperiment &experiment, const Coord &recip) { + auto S = recip + experiment.GetScatteringVector(); + float coeff = experiment.GetDetectorDistance_mm() / (S.z * experiment.GetPixelSize_mm()); + float x = experiment.GetBeamX_pxl() + S.x * coeff; + float y = experiment.GetBeamY_pxl() + S.y * coeff; + return {x, y}; +} + +inline float CosTwoTheta(const DiffractionExperiment& experiment, float x, float y) { + auto lab = experiment.LabCoord(x, y); + return experiment.GetDetectorDistance_mm() / lab.Length(); +} + +inline float Phi(const DiffractionExperiment& experiment, float x, float y) { + auto lab = experiment.LabCoord(x, y); + return atan2f(lab.y, lab.x); +} + +inline float PxlToRes(const DiffractionExperiment& experiment, float x, float y) { + float cos_2theta = CosTwoTheta(experiment, x, y); + if (cos_2theta == 1.0f) + return std::numeric_limits::infinity(); + + // cos(2theta) = cos(theta)^2 - sin(theta)^2 + // cos(2theta) = 1 - 2*sin(theta)^2 + // Technically two solutions for two theta, but it makes sense only to take positive one in this case + float sin_theta = sqrtf((1 - cos_2theta)/2); + return experiment.GetWavelength_A() / (2 * sin_theta); +} + +inline float ResToPxl(const DiffractionExperiment& experiment, float d) { + if (d == 0) + return INFINITY; + + float sin_theta = experiment.GetWavelength_A() / (2 * d); + float theta = asinf(sin_theta); + float tan_2theta = tanf(2 * theta); + return tan_2theta * experiment.GetDetectorDistance_mm() / experiment.GetPixelSize_mm(); +} + +inline float CalcRadIntSolidAngleCorr(const DiffractionExperiment& experiment, float q) { + float sin_theta = q * experiment.GetWavelength_A() / (4 * static_cast(M_PI)); + float cos_2theta = 1.0f - 2.0f * sin_theta * sin_theta; // cos(2*alpha) = 1 - 2 * sin(alpha)^2 + float cos_2theta_3 = cos_2theta * cos_2theta * cos_2theta; + return cos_2theta_3; +} + +inline float CalcRadIntSolidAngleCorr(const DiffractionExperiment& experiment, float x, float y) { + float cos_2theta = CosTwoTheta(experiment, x, y); + float cos_2theta_3 = cos_2theta * cos_2theta * cos_2theta; + return cos_2theta_3; +} + + +inline float CalcRadIntPolarizationCorrection(const DiffractionExperiment& experiment, + float polarization_factor, float x, float y) { + auto cos_2theta = CosTwoTheta(experiment, x, y); + float cos_2theta_2 = cos_2theta * cos_2theta; + float cos_2phi = cosf(2.0f * Phi(experiment, x, y)); + return 0.5f * (1.0f + cos_2theta_2 - polarization_factor * cos_2phi) * (1.0f - cos_2theta_2); +} + +#endif //JUNGFRAUJOCH_DIFFRACTIONGEOMETRY_H diff --git a/common/DiffractionSpot.cpp b/common/DiffractionSpot.cpp index ea6526ae..1b6cb9c6 100644 --- a/common/DiffractionSpot.cpp +++ b/common/DiffractionSpot.cpp @@ -2,7 +2,7 @@ // SPDX-License-Identifier: GPL-3.0-or-later #include "DiffractionSpot.h" -#include "RawToConvertedGeometry.h" +#include "DiffractionGeometry.h" DiffractionSpot::DiffractionSpot(uint32_t col, uint32_t line, int64_t in_photons) { if (in_photons < 0) in_photons = 0; @@ -38,17 +38,16 @@ int64_t DiffractionSpot::PixelCount() const { return pixel_count; } -Coord DiffractionSpot::LabCoord(const DiffractionExperiment &experiment, uint16_t data_stream) const { +Coord DiffractionSpot::LabCoord(const DiffractionExperiment &experiment) const { return experiment.LabCoord(x / (float)photons, y / (float)photons); } -Coord DiffractionSpot::ReciprocalCoord(const DiffractionExperiment &experiment, uint16_t data_stream) const { - return LabCoord(experiment, data_stream).Normalize() / experiment.GetWavelength_A() - - experiment.GetScatteringVector(); +Coord DiffractionSpot::ReciprocalCoord(const DiffractionExperiment &experiment) const { + return DetectorToRecip(experiment, x / (float)photons, y / (float)photons); } -double DiffractionSpot::GetResolution(const DiffractionExperiment &experiment, uint16_t data_stream) const { - return experiment.PxlToRes(x / (float)photons, y / (float)photons); +double DiffractionSpot::GetResolution(const DiffractionExperiment &experiment) const { + return PxlToRes(experiment, x / (float)photons, y / (float)photons); } DiffractionSpot::operator SpotToSave() const { diff --git a/common/DiffractionSpot.h b/common/DiffractionSpot.h index d2359f77..9f56a4f8 100644 --- a/common/DiffractionSpot.h +++ b/common/DiffractionSpot.h @@ -23,9 +23,9 @@ public: int64_t Count() const; int64_t MaxCount() const; Coord RawCoord() const; - Coord LabCoord(const DiffractionExperiment &experiment, uint16_t data_stream = TASK_NO_DATA_STREAM) const; - double GetResolution(const DiffractionExperiment &experiment, uint16_t data_stream = TASK_NO_DATA_STREAM) const; - Coord ReciprocalCoord(const DiffractionExperiment &experiment, uint16_t data_stream = TASK_NO_DATA_STREAM) const; + Coord LabCoord(const DiffractionExperiment &experiment) const; + double GetResolution(const DiffractionExperiment &experiment) const; + Coord ReciprocalCoord(const DiffractionExperiment &experiment) const; operator SpotToSave() const; void AddPixel(uint32_t col, uint32_t line, int64_t photons); }; diff --git a/image_analysis/RadialIntegrationMapping.cpp b/image_analysis/RadialIntegrationMapping.cpp index 5ceca4bb..d7c2f883 100644 --- a/image_analysis/RadialIntegrationMapping.cpp +++ b/image_analysis/RadialIntegrationMapping.cpp @@ -5,6 +5,7 @@ #include "RadialIntegrationMapping.h" #include "../common/JFJochException.h" +#include "../common/DiffractionGeometry.h" RadialIntegrationMapping::RadialIntegrationMapping(const DiffractionExperiment& experiment, const uint8_t *one_byte_mask) : low_q(experiment.GetLowQForRadialInt_recipA()), @@ -34,7 +35,7 @@ RadialIntegrationMapping::RadialIntegrationMapping(const DiffractionExperiment& for (int x = 0; x < experiment.GetXPixelsNum(); x++) { int64_t pixel_number = y * experiment.GetXPixelsNum() + x; - double pixel_q = 2 * M_PI / experiment.PxlToRes(x, y); + double pixel_q = 2 * M_PI / PxlToRes(experiment, x, y); if (((one_byte_mask != nullptr) && (one_byte_mask[pixel_number] == 0)) || (pixel_q < low_q) || (pixel_q >= high_q)) @@ -57,7 +58,7 @@ RadialIntegrationMapping::RadialIntegrationMapping(const DiffractionExperiment& solid_angle_corr.resize(max_bin_number + 1); for (int i = 0; i < max_bin_number + 1; i++) - solid_angle_corr[i] = 1.0f / experiment.CalcRadIntSolidAngleCorr(bin_to_q[i]); + solid_angle_corr[i] = 1.0f / CalcRadIntSolidAngleCorr(experiment, bin_to_q[i]); } uint16_t RadialIntegrationMapping::GetBinNumber() const { diff --git a/tests/CMakeLists.txt b/tests/CMakeLists.txt index 381bdafd..ecf9ba06 100644 --- a/tests/CMakeLists.txt +++ b/tests/CMakeLists.txt @@ -25,7 +25,7 @@ ADD_EXECUTABLE(CatchTest RadialIntegrationTest.cpp StatusVectorTest.cpp ProcessRawPacketTest.cpp CBORTest.cpp ../tests/stream2.h ../tests/stream2.c - JFConversionTest.cpp DetectorGeometryTest.cpp JFJochBrokerParserTest.cpp DetectorSetupTest.cpp) + JFConversionTest.cpp DetectorGeometryTest.cpp JFJochBrokerParserTest.cpp DetectorSetupTest.cpp DiffractionGeometryTest.cpp) target_link_libraries(CatchTest JFJochBroker JFJochReceiver JFJochWriter ImageAnalysis CommonFunctions HLSSimulation) target_include_directories(CatchTest PRIVATE .) diff --git a/tests/DiffractionExperimentTest.cpp b/tests/DiffractionExperimentTest.cpp index 58f5cce1..2bf71843 100644 --- a/tests/DiffractionExperimentTest.cpp +++ b/tests/DiffractionExperimentTest.cpp @@ -559,21 +559,6 @@ TEST_CASE("DiffractionExperiment_CopyConstructor", "[DiffractionExperiment]") { REQUIRE (c.GetBeamX_pxl() == 10.0); } -TEST_CASE("DiffractionExperiment_ResToPxl","[DiffractionExperiment]") { - DiffractionExperiment x(DetectorGeometry(8, 2, 8, 36)); - x.DetectorDistance_mm(75).PhotonEnergy_keV(WVL_1A_IN_KEV); - - // sin(theta) = 1/2 - // theta = 30 deg - // tan(2 * theta) = sqrt(3) - REQUIRE(x.ResToPxl(1.0) == Approx(1000 * sqrt(3))); - - // sin(theta) = 1/4 - // theta = 14.47 deg - // tan(2 * theta) = 0.55328333517 - REQUIRE(x.ResToPxl(2.0) == Approx(1000 * 0.55328333517)); -} - TEST_CASE("DiffractionExperiment_RadialIntegration_LowQ","[DiffractionExperiment]") { DiffractionExperiment x(DetectorGeometry(8, 2, 8, 36)); @@ -982,9 +967,3 @@ TEST_CASE("DiffractionExperiment_DetectorModuleHostname","[DiffractionExperiment REQUIRE_NOTHROW(det_cfg = x.DetectorConfig(net_cfg)); } -TEST_CASE("DiffractionExperiment_SolidAngleCorrection","[DiffractionExperiment]") { - DiffractionExperiment x; - x.PhotonEnergy_keV(WVL_1A_IN_KEV); - REQUIRE(x.CalcRadIntSolidAngleCorr(0.0) == 1.0f); - REQUIRE(x.CalcRadIntSolidAngleCorr(2*M_PI) == Approx(0.5f*0.5f*0.5f)); -} diff --git a/tests/DiffractionGeometryTest.cpp b/tests/DiffractionGeometryTest.cpp new file mode 100644 index 00000000..3d566e04 --- /dev/null +++ b/tests/DiffractionGeometryTest.cpp @@ -0,0 +1,106 @@ +// Copyright (2019-2023) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#include +#include "../common/DiffractionGeometry.h" + +TEST_CASE("RecipToDetector_1", "[LinearAlgebra][Coord]") { + DiffractionExperiment x(DetectorGeometry(8, 2)); + x.BeamX_pxl(1024).BeamY_pxl(1024).DetectorDistance_mm(120); + + float pos_x = 512, pos_y = 512; + + auto recip = DetectorToRecip(x, pos_x, pos_y); + auto [proj_x, proj_y] = RecipToDector(x, recip); + REQUIRE(proj_x == Approx(pos_x)); + REQUIRE(proj_y == Approx(pos_y)); + REQUIRE((recip - DetectorToRecip(x, proj_x, proj_y)).Length() < 0.00000001f); +} + +TEST_CASE("RecipToDetector_2", "[LinearAlgebra][Coord]") { + DiffractionExperiment x(DetectorGeometry(8, 2)); + x.BeamX_pxl(1024).BeamY_pxl(1024).DetectorDistance_mm(120); + float pos_x = 1023, pos_y = 1023; + + auto recip = DetectorToRecip(x, pos_x, pos_y); + auto [proj_x, proj_y] = RecipToDector(x, recip); + REQUIRE(proj_x == Approx(pos_x)); + REQUIRE(proj_y == Approx(pos_y)); + REQUIRE((recip - DetectorToRecip(x, proj_x, proj_y)).Length() < 0.00000001f); +} + +TEST_CASE("RecipToDetector_3", "[LinearAlgebra][Coord]") { + DiffractionExperiment x(DetectorGeometry(8, 2)); + x.BeamX_pxl(1024).BeamY_pxl(1024).DetectorDistance_mm(120); + float pos_x = 30, pos_y = 30; + + auto recip = DetectorToRecip(x, pos_x, pos_y); + auto [proj_x, proj_y] = RecipToDector(x, recip); + REQUIRE(proj_x == Approx(pos_x)); + REQUIRE(proj_y == Approx(pos_y)); + REQUIRE((recip - DetectorToRecip(x, proj_x, proj_y)).Length() < 0.00000001f); +} + +TEST_CASE("Phi","") { + DiffractionExperiment x(DetectorGeometry(8, 2, 8, 36)); + x.DetectorDistance_mm(75).PhotonEnergy_keV(WVL_1A_IN_KEV); + x.BeamX_pxl(1000).BeamY_pxl(1000); + + REQUIRE(Phi(x, 2000, 1000) == Approx(0.0)); + REQUIRE(Phi(x, 1000, 2000) == Approx(M_PI_2)); + REQUIRE(Phi(x, 2000, 2000) == Approx(M_PI_4)); +} + +TEST_CASE("Cos2Theta","") { + DiffractionExperiment x(DetectorGeometry(8, 2, 8, 36)); + x.DetectorDistance_mm(75).PhotonEnergy_keV(WVL_1A_IN_KEV); + x.BeamX_pxl(1000).BeamY_pxl(1000); + + // det distance == 1000 pixel + // theta = 30 deg + // tan(2 * theta) = sqrt(3) + REQUIRE(CosTwoTheta(x, 1000, 1000 * (1.0 + sqrt(3))) == Approx(0.5f)); +} + +TEST_CASE("PxlToRes","") { + DiffractionExperiment x(DetectorGeometry(8, 2, 8, 36)); + x.DetectorDistance_mm(75).PhotonEnergy_keV(WVL_1A_IN_KEV); + + // sin(theta) = 1/2 + // theta = 30 deg + // tan(2 * theta) = sqrt(3) + REQUIRE(PxlToRes(x, 0, 1000 * sqrt(3)) == Approx(1.0)); + + // sin(theta) = 1/4 + // theta = 14.47 deg + // tan(2 * theta) = 0.55328333517 + + REQUIRE(PxlToRes(x, 1000 * 0.55328333517 * cosf(1), 1000 * 0.55328333517 * sinf(1)) == Approx(2.0)); +} + +TEST_CASE("ResToPxl","") { + DiffractionExperiment x(DetectorGeometry(8, 2, 8, 36)); + x.DetectorDistance_mm(75).PhotonEnergy_keV(WVL_1A_IN_KEV); + + // sin(theta) = 1/2 + // theta = 30 deg + // tan(2 * theta) = sqrt(3) + REQUIRE(ResToPxl(x, 1.0) == Approx(1000 * sqrt(3))); + + // sin(theta) = 1/4 + // theta = 14.47 deg + // tan(2 * theta) = 0.55328333517 + REQUIRE(ResToPxl(x, 2.0) == Approx(1000 * 0.55328333517)); +} + +TEST_CASE("SolidAngleCorrection","") { + DiffractionExperiment x; + x.PhotonEnergy_keV(WVL_1A_IN_KEV); + x.BeamX_pxl(1000).BeamY_pxl(1000).DetectorDistance_mm(75); + + REQUIRE(CalcRadIntSolidAngleCorr(x, 0.0) == 1.0f); + REQUIRE(CalcRadIntSolidAngleCorr(x, 2*M_PI) == Approx(0.5f*0.5f*0.5f)); + + REQUIRE(CalcRadIntSolidAngleCorr(x, 1000, 1000) == 1.0f); + REQUIRE(CalcRadIntSolidAngleCorr(x, 1000 * (1.0 + sqrt(3)), 1000) == Approx(0.5f*0.5f*0.5f)); +} From 74ed4ad47b0f4d3afb42788424a1a948f28d53c9 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 19 Jun 2023 07:46:30 +0200 Subject: [PATCH 072/224] DiffractionGeometry: Fix PolarizationCorrection --- common/DiffractionGeometry.h | 2 +- tests/DiffractionGeometryTest.cpp | 22 ++++++++++++++++++++++ 2 files changed, 23 insertions(+), 1 deletion(-) diff --git a/common/DiffractionGeometry.h b/common/DiffractionGeometry.h index 89461f1e..a6bc8197 100644 --- a/common/DiffractionGeometry.h +++ b/common/DiffractionGeometry.h @@ -70,7 +70,7 @@ inline float CalcRadIntPolarizationCorrection(const DiffractionExperiment& exper auto cos_2theta = CosTwoTheta(experiment, x, y); float cos_2theta_2 = cos_2theta * cos_2theta; float cos_2phi = cosf(2.0f * Phi(experiment, x, y)); - return 0.5f * (1.0f + cos_2theta_2 - polarization_factor * cos_2phi) * (1.0f - cos_2theta_2); + return 0.5f * (1.0f + cos_2theta_2 - polarization_factor * cos_2phi * (1.0f - cos_2theta_2)); } #endif //JUNGFRAUJOCH_DIFFRACTIONGEOMETRY_H diff --git a/tests/DiffractionGeometryTest.cpp b/tests/DiffractionGeometryTest.cpp index 3d566e04..1963d534 100644 --- a/tests/DiffractionGeometryTest.cpp +++ b/tests/DiffractionGeometryTest.cpp @@ -101,6 +101,28 @@ TEST_CASE("SolidAngleCorrection","") { REQUIRE(CalcRadIntSolidAngleCorr(x, 0.0) == 1.0f); REQUIRE(CalcRadIntSolidAngleCorr(x, 2*M_PI) == Approx(0.5f*0.5f*0.5f)); + // theta = 30 deg + // cos (2 * theta) = 1/2 REQUIRE(CalcRadIntSolidAngleCorr(x, 1000, 1000) == 1.0f); REQUIRE(CalcRadIntSolidAngleCorr(x, 1000 * (1.0 + sqrt(3)), 1000) == Approx(0.5f*0.5f*0.5f)); } + +TEST_CASE("PolarizationCorrection","") { + DiffractionExperiment x; + x.PhotonEnergy_keV(WVL_1A_IN_KEV); + x.BeamX_pxl(1000).BeamY_pxl(1000).DetectorDistance_mm(75); + + // Circular polarization 0.5*(1+cos(2theta)^2) + REQUIRE(CalcRadIntPolarizationCorrection(x, 0.0, 1000 * (1.0 + sqrt(3)), 1000) == Approx(0.5f*(1+0.5f*0.5f))); + REQUIRE(CalcRadIntPolarizationCorrection(x, 0.0, 1000, 1000* (1.0 + sqrt(3))) == Approx(0.5f*(1+0.5f*0.5f))); + + // Horizontal polarization + + // No correction in vertical direction + REQUIRE(CalcRadIntPolarizationCorrection(x, 1.0, 1000, 1000 * (1.0 + sqrt(3))) == Approx(1.0f)); + REQUIRE(CalcRadIntPolarizationCorrection(x, 1.0, 1000, 1000 * (1.0 - sqrt(3))) == Approx(1.0f)); + + // cos(2*theta)^2 in horizontal direction + REQUIRE(CalcRadIntPolarizationCorrection(x, 1.0, 1000 * (1.0 + sqrt(3)), 1000) == Approx(0.5f*0.5f)); + REQUIRE(CalcRadIntPolarizationCorrection(x, 1.0, 1000 * (1.0 - sqrt(3)), 1000) == Approx(0.5f*0.5f)); +} \ No newline at end of file From 032543e69a2594c319e8a08acbd10b1dcc61a5f8 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 19 Jun 2023 09:26:10 +0200 Subject: [PATCH 073/224] GPUImageAnalysis: Add option to include corrections in radial integration + keep rad.int. sum and count as floats --- image_analysis/GPUImageAnalysis.cpp | 4 +- image_analysis/GPUImageAnalysis.cu | 47 ++++++++++++--------- image_analysis/GPUImageAnalysis.h | 14 +++--- image_analysis/RadialIntegrationProfile.cpp | 2 +- image_analysis/RadialIntegrationProfile.h | 6 +-- tests/RadialIntegrationTest.cpp | 6 +-- 6 files changed, 45 insertions(+), 34 deletions(-) diff --git a/image_analysis/GPUImageAnalysis.cpp b/image_analysis/GPUImageAnalysis.cpp index b2b12019..1052469e 100644 --- a/image_analysis/GPUImageAnalysis.cpp +++ b/image_analysis/GPUImageAnalysis.cpp @@ -50,11 +50,11 @@ void GPUImageAnalysis::RunRadialIntegration() {} void GPUImageAnalysis::GetRadialIntegrationProfile(std::vector &result) {} -std::vector GPUImageAnalysis::GetRadialIntegrationSum() const { +std::vector GPUImageAnalysis::GetRadialIntegrationSum() const { return {}; } -std::vector GPUImageAnalysis::GetRadialIntegrationCount() const { +std::vector GPUImageAnalysis::GetRadialIntegrationCount() const { return {}; } diff --git a/image_analysis/GPUImageAnalysis.cu b/image_analysis/GPUImageAnalysis.cu index f42e9a01..19ff8aa9 100644 --- a/image_analysis/GPUImageAnalysis.cu +++ b/image_analysis/GPUImageAnalysis.cu @@ -177,25 +177,25 @@ __global__ void analyze_pixel(const int16_t *in, uint8_t *out, const spot_parame } __global__ void gpu_radial_integration(const int16_t *image, const uint16_t *rad_integration_mapping, - int32_t *bin_sum, int32_t *bin_count, uint32_t npixel, + float *corr, float *bin_sum, float *bin_count, uint32_t npixel, uint16_t nbins) { - extern __shared__ int32_t shared_mem[]; - int32_t* shared_sum = shared_mem; // shared buffer [nbins] - int32_t* shared_count = &shared_sum[nbins]; // shared buffer [nbins] + extern __shared__ float shared_mem_fp[]; + float* shared_sum = shared_mem_fp; // shared buffer [nbins] + float* shared_count = &shared_sum[nbins]; // shared buffer [nbins] uint32_t idx = blockDim.x*blockIdx.x + threadIdx.x; for (uint32_t i = threadIdx.x; i < 2 * nbins; i += blockDim.x) - shared_mem[i] = 0; + shared_mem_fp[i] = 0; __syncthreads(); for (uint32_t i = idx; i < npixel; i += blockDim.x * gridDim.x) { uint16_t bin = rad_integration_mapping[i]; - int32_t value = image[i]; + float value = static_cast(image[i]) * corr[i]; if ((value > INT16_MIN + 4) && (value < INT16_MAX - 4) && (bin < nbins)) { atomicAdd(&shared_sum[bin], value); - atomicAdd(&shared_count[bin], 1); + atomicAdd(&shared_count[bin], 1.0f); } } __syncthreads(); @@ -228,7 +228,7 @@ __global__ void apply_pixel_mask(int16_t *image, const uint8_t *mask, uint32_t n GPUImageAnalysis::GPUImageAnalysis(int32_t in_xpixels, int32_t in_ypixels, const std::vector &mask, int32_t gpu_device) : - xpixels(in_xpixels), ypixels(in_ypixels), gpu_out(nullptr), rad_integration_nbins(0) { + xpixels(in_xpixels), ypixels(in_ypixels), gpu_out(nullptr), rad_integration_nbins(0), numberOfSMs(1) { int device_count; cuda_err(cudaGetDeviceCount(&device_count)); @@ -278,14 +278,19 @@ GPUImageAnalysis::GPUImageAnalysis(int32_t xpixels, int32_t ypixels, const std:: if (rad_integration_nbins > 0) { cuda_err(cudaMalloc(&gpu_rad_integration_bin_map, xpixels * ypixels * sizeof(int16_t))); - cuda_err(cudaMalloc(&gpu_rad_integration_count, rad_integration_nbins * sizeof(int32_t))); - cuda_err(cudaMalloc(&gpu_rad_integration_sum, rad_integration_nbins * sizeof(int32_t))); + cuda_err(cudaMalloc(&gpu_rad_integration_corr, xpixels * ypixels * sizeof(float))); - cuda_err(cudaHostAlloc(&host_rad_integration_count, rad_integration_nbins * sizeof(int32_t), cudaHostAllocPortable)); - cuda_err(cudaHostAlloc(&host_rad_integration_sum, rad_integration_nbins * sizeof(int32_t), cudaHostAllocPortable)); + cuda_err(cudaMalloc(&gpu_rad_integration_count, rad_integration_nbins * sizeof(float))); + cuda_err(cudaMalloc(&gpu_rad_integration_sum, rad_integration_nbins * sizeof(float))); + cuda_err(cudaHostAlloc(&host_rad_integration_count, rad_integration_nbins * sizeof(float), cudaHostAllocPortable)); + cuda_err(cudaHostAlloc(&host_rad_integration_sum, rad_integration_nbins * sizeof(float), cudaHostAllocPortable)); cudaMemcpy(gpu_rad_integration_bin_map, rad_int_mapping.data(), xpixels*ypixels * sizeof(uint16_t), cudaMemcpyHostToDevice); + + std::vector corr(xpixels * ypixels, 1.0f); + cudaMemcpy(gpu_rad_integration_corr, corr.data(), + xpixels * ypixels * sizeof(float), cudaMemcpyHostToDevice); } } @@ -303,6 +308,7 @@ GPUImageAnalysis::~GPUImageAnalysis() { cudaFree(gpu_rad_integration_bin_map); cudaFree(gpu_rad_integration_count); cudaFree(gpu_rad_integration_sum); + cudaFree(gpu_rad_integration_corr); cudaFreeHost(host_rad_integration_count); cudaFreeHost(host_rad_integration_sum); } @@ -431,7 +437,8 @@ void GPUImageAnalysis::RunRadialIntegration() { cuda_err(cudaMemsetAsync(gpu_rad_integration_count, 0, rad_integration_nbins * sizeof(int32_t), cudastream->v)); gpu_radial_integration<<<40, numberOfCudaThreads, rad_integration_nbins * sizeof(uint32_t) * 2, cudastream->v>>>( - gpu_in, gpu_rad_integration_bin_map, gpu_rad_integration_sum, gpu_rad_integration_count, xpixels*ypixels, + gpu_in, gpu_rad_integration_bin_map, gpu_rad_integration_corr, + gpu_rad_integration_sum, gpu_rad_integration_count, xpixels*ypixels, rad_integration_nbins); cuda_err(cudaMemcpyAsync(host_rad_integration_count, gpu_rad_integration_count, @@ -459,24 +466,24 @@ void GPUImageAnalysis::GetRadialIntegrationProfile(std::vector &result) { } } -std::vector GPUImageAnalysis::GetRadialIntegrationSum() const { +std::vector GPUImageAnalysis::GetRadialIntegrationSum() const { if (rad_integration_nbins == 0) throw JFJochException(JFJochExceptionCategory::SpotFinderError, "Radial integration not initialized"); cuda_err(cudaStreamSynchronize(cudastream->v)); - std::vector out(rad_integration_nbins); + std::vector out(rad_integration_nbins); memcpy(out.data(), host_rad_integration_sum, rad_integration_nbins * sizeof(int32_t)); return out; } -std::vector GPUImageAnalysis::GetRadialIntegrationCount() const { +std::vector GPUImageAnalysis::GetRadialIntegrationCount() const { if (rad_integration_nbins == 0) throw JFJochException(JFJochExceptionCategory::SpotFinderError, "Radial integration not initialized"); cuda_err(cudaStreamSynchronize(cudastream->v)); - std::vector out(rad_integration_nbins); + std::vector out(rad_integration_nbins); memcpy(out.data(), host_rad_integration_count, rad_integration_nbins * sizeof(int32_t)); return out; } @@ -487,8 +494,8 @@ float GPUImageAnalysis::GetRadialIntegrationRangeValue(uint16_t min_bin, uint16_ cuda_err(cudaStreamSynchronize(cudastream->v)); - int64_t ret_sum = 0; - int64_t ret_count = 0; + float ret_sum = 0; + float ret_count = 0; for (int i = std::min(rad_integration_nbins,min_bin); i <= std::min((uint16_t)(rad_integration_nbins-1),max_bin); @@ -500,7 +507,7 @@ float GPUImageAnalysis::GetRadialIntegrationRangeValue(uint16_t min_bin, uint16_ if (ret_count == 0) return 0; else - return static_cast(ret_sum) / static_cast(ret_count); + return ret_sum / ret_count; } std::atomic GPUImageAnalysis::threadid{0}; diff --git a/image_analysis/GPUImageAnalysis.h b/image_analysis/GPUImageAnalysis.h index b5af0929..be15a5d0 100644 --- a/image_analysis/GPUImageAnalysis.h +++ b/image_analysis/GPUImageAnalysis.h @@ -41,9 +41,12 @@ class GPUImageAnalysis { uint16_t rad_integration_nbins; uint16_t *gpu_rad_integration_bin_map = nullptr; - int32_t *gpu_rad_integration_sum = nullptr; - int32_t *gpu_rad_integration_count = nullptr; - int32_t *host_rad_integration_sum = nullptr, *host_rad_integration_count = nullptr; + float *gpu_rad_integration_sum = nullptr; + float *gpu_rad_integration_count = nullptr; + float *gpu_rad_integration_corr = nullptr; + + float *host_rad_integration_sum = nullptr, *host_rad_integration_count = nullptr; + int numberOfSMs; const int numberOfCudaThreads = 128; // #threads per block that works well for Nvidia T4 const int numberOfWaves = 40; // #waves that works well for Nvidia T4 @@ -68,10 +71,11 @@ public: void GetSpotFinderResults(const DiffractionExperiment &experiment, const JFJochProtoBuf::DataProcessingSettings &settings, std::vector &vec); + void CalcRadialIntegrationCorr(const DiffractionExperiment& experiment); void RunRadialIntegration(); void GetRadialIntegrationProfile(std::vector &result); - [[nodiscard]] std::vector GetRadialIntegrationSum() const; - [[nodiscard]] std::vector GetRadialIntegrationCount() const; + [[nodiscard]] std::vector GetRadialIntegrationSum() const; + [[nodiscard]] std::vector GetRadialIntegrationCount() const; [[nodiscard]] float GetRadialIntegrationRangeValue(uint16_t min_bin, uint16_t max_bin); static bool GPUPresent(); diff --git a/image_analysis/RadialIntegrationProfile.cpp b/image_analysis/RadialIntegrationProfile.cpp index cbd66737..32705020 100644 --- a/image_analysis/RadialIntegrationProfile.cpp +++ b/image_analysis/RadialIntegrationProfile.cpp @@ -16,7 +16,7 @@ const std::vector &RadialIntegrationProfile::GetSolidAngleCorr() const { return corrections; } -void RadialIntegrationProfile::Add(const std::vector &in_sum, const std::vector &in_count) { +void RadialIntegrationProfile::Add(const std::vector &in_sum, const std::vector &in_count) { std::unique_lock ul(m); if ((in_sum.size() == sum.size()) && (in_count.size() == count.size())) { diff --git a/image_analysis/RadialIntegrationProfile.h b/image_analysis/RadialIntegrationProfile.h index f8b00c62..f02e823f 100644 --- a/image_analysis/RadialIntegrationProfile.h +++ b/image_analysis/RadialIntegrationProfile.h @@ -12,13 +12,13 @@ class RadialIntegrationProfile { mutable std::mutex m; - std::vector sum; - std::vector count; + std::vector sum; + std::vector count; std::vector bin_to_q; std::vector corrections; public: explicit RadialIntegrationProfile(RadialIntegrationMapping &mapping, const DiffractionExperiment &experiment); - void Add(const std::vector &sum, const std::vector &count); + void Add(const std::vector &sum, const std::vector &count); std::vector GetResult(bool solid_angle_correction) const; void GetPlot(JFJochProtoBuf::Plot &plot, bool solid_angle_correction) const; const std::vector &GetSolidAngleCorr() const; diff --git a/tests/RadialIntegrationTest.cpp b/tests/RadialIntegrationTest.cpp index 4f83a1a1..506803fa 100644 --- a/tests/RadialIntegrationTest.cpp +++ b/tests/RadialIntegrationTest.cpp @@ -87,8 +87,8 @@ TEST_CASE("RadialIntegrationProfile","[RadialIntegration]") { RadialIntegrationProfile profile(mapping, x); - std::vector sum(mapping.GetBinNumber()); - std::vector count(mapping.GetBinNumber()); + std::vector sum(mapping.GetBinNumber()); + std::vector count(mapping.GetBinNumber()); for (int i = 0; i < mapping.GetBinNumber(); i++) { sum[i] = i * i * 4; @@ -96,7 +96,7 @@ TEST_CASE("RadialIntegrationProfile","[RadialIntegration]") { } REQUIRE_NOTHROW(profile.Add(sum, count)); - std::vector sum_wr(mapping.GetBinNumber() - 1); + std::vector sum_wr(mapping.GetBinNumber() - 1); REQUIRE_THROWS(profile.Add(sum_wr, count)); JFJochProtoBuf::Plot plot; From 945a3b92719813fd1201e38a0a93335110a0e7b3 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 19 Jun 2023 11:36:32 +0200 Subject: [PATCH 074/224] DiffractionExperiment: Enable/disable solid angle and polarization corrections --- common/DiffractionExperiment.cpp | 30 +++ common/DiffractionExperiment.h | 7 + common/DiffractionGeometry.h | 27 ++- grpc/jfjoch.proto | 6 +- image_analysis/GPUImageAnalysis.cpp | 2 + image_analysis/GPUImageAnalysis.cu | 13 +- image_analysis/GPUImageAnalysis.h | 2 +- image_analysis/RadialIntegrationProfile.cpp | 23 +-- image_analysis/RadialIntegrationProfile.h | 6 +- python/jfjoch_pb2.py | 208 ++++++++++---------- receiver/JFJochReceiver.cpp | 24 ++- receiver/JFJochReceiver.h | 1 + tests/DiffractionGeometryTest.cpp | 16 +- tests/HDF5WritingTest.cpp | 4 +- tests/RadialIntegrationTest.cpp | 2 +- 15 files changed, 215 insertions(+), 156 deletions(-) diff --git a/common/DiffractionExperiment.cpp b/common/DiffractionExperiment.cpp index 6575be30..c170487f 100644 --- a/common/DiffractionExperiment.cpp +++ b/common/DiffractionExperiment.cpp @@ -50,6 +50,9 @@ DiffractionExperiment::DiffractionExperiment(const DetectorSetup& det_setup) { dataset.set_compression(JFJochProtoBuf::BSHUF_LZ4); + dataset.set_rad_int_polarization_corr(false); + dataset.set_rad_int_solid_angle_corr(false); + internal.set_ndatastreams(1); internal.set_frame_time_us(MIN_FRAME_TIME_HALF_SPEED_IN_US); @@ -1172,3 +1175,30 @@ bool DiffractionExperiment::GetPedestalWithExternalTrigger() const { return (GetStorageCellNumber() > 1); } +DiffractionExperiment &DiffractionExperiment::ApplySolidAngleCorr(bool input) { + dataset.set_rad_int_solid_angle_corr(input); + return *this; +} + +DiffractionExperiment &DiffractionExperiment::ApplyPolarizationCorr(bool input) { + dataset.set_rad_int_polarization_corr(input); + return *this; +} + +DiffractionExperiment &DiffractionExperiment::PolarizationFactor(float input) { + dataset.set_rad_int_polarization_factor(input); + return *this; +} + +bool DiffractionExperiment::GetApplySolidAngleCorr() const { + return dataset.rad_int_solid_angle_corr(); +} + +bool DiffractionExperiment::GetApplyPolarizationCorr() const { + return dataset.rad_int_polarization_corr(); +} + +float DiffractionExperiment::GetPolarizationFactor() const { + return dataset.rad_int_polarization_factor(); +} + diff --git a/common/DiffractionExperiment.h b/common/DiffractionExperiment.h index a42dff01..9f392e4e 100644 --- a/common/DiffractionExperiment.h +++ b/common/DiffractionExperiment.h @@ -214,6 +214,13 @@ public: void GetDetectorModuleHostname(std::vector& output) const; bool GetPedestalWithExternalTrigger() const; + + DiffractionExperiment& ApplySolidAngleCorr(bool input); + DiffractionExperiment& ApplyPolarizationCorr(bool input); + DiffractionExperiment& PolarizationFactor(float input); + bool GetApplySolidAngleCorr() const; + bool GetApplyPolarizationCorr() const; + float GetPolarizationFactor() const; }; inline int64_t CalculateStride(const std::chrono::microseconds &frame_time, const std::chrono::microseconds &preview_time) { diff --git a/common/DiffractionGeometry.h b/common/DiffractionGeometry.h index a6bc8197..9ee0ee29 100644 --- a/common/DiffractionGeometry.h +++ b/common/DiffractionGeometry.h @@ -64,13 +64,32 @@ inline float CalcRadIntSolidAngleCorr(const DiffractionExperiment& experiment, f return cos_2theta_3; } - -inline float CalcRadIntPolarizationCorrection(const DiffractionExperiment& experiment, - float polarization_factor, float x, float y) { +inline float CalcRadIntPolarizationCorr(const DiffractionExperiment& experiment, float x, float y) { auto cos_2theta = CosTwoTheta(experiment, x, y); float cos_2theta_2 = cos_2theta * cos_2theta; float cos_2phi = cosf(2.0f * Phi(experiment, x, y)); - return 0.5f * (1.0f + cos_2theta_2 - polarization_factor * cos_2phi * (1.0f - cos_2theta_2)); + return 0.5f * (1.0f + cos_2theta_2 - experiment.GetPolarizationFactor() * cos_2phi * (1.0f - cos_2theta_2)); +} + +inline std::vector CalcRadIntCorr(const DiffractionExperiment& experiment) { + std::vector corr(experiment.GetPixelsNum(), 1.0); + auto xpixels = experiment.GetXPixelsNum(); + auto ypixels = experiment.GetYPixelsNum(); + + for (int y = 0; y < ypixels; y++) { + for (int x = 0; x < xpixels; x++) { + if (experiment.GetApplySolidAngleCorr()) + corr[y * xpixels + x] *= CalcRadIntSolidAngleCorr(experiment, + static_cast(x), + static_cast(y)); + if (experiment.GetApplyPolarizationCorr()) + corr[y * xpixels + x] *= CalcRadIntPolarizationCorr(experiment, + static_cast(x), + static_cast(y)); + } + } + + return corr; } #endif //JUNGFRAUJOCH_DIFFRACTIONGEOMETRY_H diff --git a/grpc/jfjoch.proto b/grpc/jfjoch.proto index eb4547b9..72494130 100644 --- a/grpc/jfjoch.proto +++ b/grpc/jfjoch.proto @@ -100,6 +100,10 @@ message DatasetSettings { bool apply_pixel_mask = 16; bool binning2x2 = 17; + + bool rad_int_solid_angle_corr = 18; + bool rad_int_polarization_corr = 19; + float rad_int_polarization_factor = 20; } message DetectorSettings { @@ -273,12 +277,10 @@ enum PlotType { message PlotRequest { PlotType type = 1; uint64 binning = 2; - bool solid_angle_correction = 3; } message RadialIntegrationProfiles { map plots = 1; - repeated float solid_angle_correction = 2; } // Writer diff --git a/image_analysis/GPUImageAnalysis.cpp b/image_analysis/GPUImageAnalysis.cpp index 1052469e..63e6e9c5 100644 --- a/image_analysis/GPUImageAnalysis.cpp +++ b/image_analysis/GPUImageAnalysis.cpp @@ -64,4 +64,6 @@ float GPUImageAnalysis::GetRadialIntegrationRangeValue(uint16_t min_bin, uint16_ std::atomic GPUImageAnalysis::threadid{0}; +void GPUImageAnalysis::LoadRadialIntegrationCorr(const std::vector& v) {} + #endif diff --git a/image_analysis/GPUImageAnalysis.cu b/image_analysis/GPUImageAnalysis.cu index 19ff8aa9..a6c87735 100644 --- a/image_analysis/GPUImageAnalysis.cu +++ b/image_analysis/GPUImageAnalysis.cu @@ -3,6 +3,8 @@ #include "GPUImageAnalysis.h" #include "../common/JFJochException.h" +#include "../common/DiffractionGeometry.h" + #include // input X x Y pixels array @@ -429,6 +431,15 @@ void GPUImageAnalysis::LoadDataToGPU(bool apply_pixel_mask_on_gpu) { } } +void GPUImageAnalysis::LoadRadialIntegrationCorr(const std::vector& v) { + if (rad_integration_nbins == 0) + throw JFJochException(JFJochExceptionCategory::SpotFinderError, "Radial integration not initialized"); + if (v.size() != xpixels * ypixels) + throw JFJochException(JFJochExceptionCategory::SpotFinderError, "Mismatch in correction input size"); + + cudaMemcpy(gpu_rad_integration_corr, v.data(), xpixels * ypixels * sizeof(float), cudaMemcpyHostToDevice); +} + void GPUImageAnalysis::RunRadialIntegration() { if (rad_integration_nbins == 0) throw JFJochException(JFJochExceptionCategory::SpotFinderError, "Radial integration not initialized"); @@ -436,7 +447,7 @@ void GPUImageAnalysis::RunRadialIntegration() { cuda_err(cudaMemsetAsync(gpu_rad_integration_sum, 0, rad_integration_nbins * sizeof(int32_t), cudastream->v)); cuda_err(cudaMemsetAsync(gpu_rad_integration_count, 0, rad_integration_nbins * sizeof(int32_t), cudastream->v)); - gpu_radial_integration<<<40, numberOfCudaThreads, rad_integration_nbins * sizeof(uint32_t) * 2, cudastream->v>>>( + gpu_radial_integration<<v>>>( gpu_in, gpu_rad_integration_bin_map, gpu_rad_integration_corr, gpu_rad_integration_sum, gpu_rad_integration_count, xpixels*ypixels, rad_integration_nbins); diff --git a/image_analysis/GPUImageAnalysis.h b/image_analysis/GPUImageAnalysis.h index be15a5d0..963a64fe 100644 --- a/image_analysis/GPUImageAnalysis.h +++ b/image_analysis/GPUImageAnalysis.h @@ -71,7 +71,7 @@ public: void GetSpotFinderResults(const DiffractionExperiment &experiment, const JFJochProtoBuf::DataProcessingSettings &settings, std::vector &vec); - void CalcRadialIntegrationCorr(const DiffractionExperiment& experiment); + void LoadRadialIntegrationCorr(const std::vector& v); void RunRadialIntegration(); void GetRadialIntegrationProfile(std::vector &result); [[nodiscard]] std::vector GetRadialIntegrationSum() const; diff --git a/image_analysis/RadialIntegrationProfile.cpp b/image_analysis/RadialIntegrationProfile.cpp index 32705020..ae435368 100644 --- a/image_analysis/RadialIntegrationProfile.cpp +++ b/image_analysis/RadialIntegrationProfile.cpp @@ -8,12 +8,7 @@ RadialIntegrationProfile::RadialIntegrationProfile(RadialIntegrationMapping &map const DiffractionExperiment& experiment) : bin_to_q(mapping.GetBinToQ()), sum(mapping.GetBinNumber(), 0), - count(mapping.GetBinNumber(), 0), - corrections(mapping.GetSolidAngleCorr()) { -} - -const std::vector &RadialIntegrationProfile::GetSolidAngleCorr() const { - return corrections; + count(mapping.GetBinNumber(), 0){ } void RadialIntegrationProfile::Add(const std::vector &in_sum, const std::vector &in_count) { @@ -28,25 +23,19 @@ void RadialIntegrationProfile::Add(const std::vector &in_sum, const std:: throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Mismatch in size of sum/count datasets"); } -std::vector RadialIntegrationProfile::GetResult(bool solid_angle_correction) const { +std::vector RadialIntegrationProfile::GetResult() const { std::vector rad_int_profile(sum.size(), 0); for (int i = 0; i < sum.size(); i++) { - float tmp = 0; - - if (count[i] > 0) { - tmp = static_cast(sum[i]) / static_cast(count[i]); - if (solid_angle_correction) - tmp *= corrections[i]; - } - rad_int_profile[i] = tmp; + if (count[i] > 0) + rad_int_profile[i] = static_cast(sum[i]) / static_cast(count[i]); } return rad_int_profile; } -void RadialIntegrationProfile::GetPlot(JFJochProtoBuf::Plot &plot, bool solid_angle_correction) const { +void RadialIntegrationProfile::GetPlot(JFJochProtoBuf::Plot &plot) const { std::unique_lock ul(m); - std::vector rad_int_profile = GetResult(solid_angle_correction); + std::vector rad_int_profile = GetResult(); *plot.mutable_x() = {bin_to_q.begin(), bin_to_q.end()}; *plot.mutable_y() = {rad_int_profile.begin(), rad_int_profile.end()}; diff --git a/image_analysis/RadialIntegrationProfile.h b/image_analysis/RadialIntegrationProfile.h index f02e823f..64b41900 100644 --- a/image_analysis/RadialIntegrationProfile.h +++ b/image_analysis/RadialIntegrationProfile.h @@ -15,13 +15,11 @@ class RadialIntegrationProfile { std::vector sum; std::vector count; std::vector bin_to_q; - std::vector corrections; public: explicit RadialIntegrationProfile(RadialIntegrationMapping &mapping, const DiffractionExperiment &experiment); void Add(const std::vector &sum, const std::vector &count); - std::vector GetResult(bool solid_angle_correction) const; - void GetPlot(JFJochProtoBuf::Plot &plot, bool solid_angle_correction) const; - const std::vector &GetSolidAngleCorr() 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_builder.BuildMessageAndEnumDescriptors(DESCRIPTOR, globals()) _builder.BuildTopDescriptorsAndMessages(DESCRIPTOR, 'jfjoch_pb2', globals()) @@ -24,18 +24,18 @@ if _descriptor._USE_C_DESCRIPTORS == False: _RADIALINTEGRATIONPROFILES_PLOTSENTRY._serialized_options = b'8\001' _FPGASTATUS_FIFOSTATUSENTRY._options = None _FPGASTATUS_FIFOSTATUSENTRY._serialized_options = b'8\001' - _COMPRESSION._serialized_start=8831 - _COMPRESSION._serialized_end=8915 - _DETECTORTYPE._serialized_start=8917 - _DETECTORTYPE._serialized_end=8956 - _DETECTORMODE._serialized_start=8958 - _DETECTORMODE._serialized_end=9048 - _FPGAFIFOSTATUS._serialized_start=9050 - _FPGAFIFOSTATUS._serialized_end=9100 - _STATE._serialized_start=9102 - _STATE._serialized_end=9196 - _PLOTTYPE._serialized_start=9198 - _PLOTTYPE._serialized_end=9302 + _COMPRESSION._serialized_start=8873 + _COMPRESSION._serialized_end=8957 + _DETECTORTYPE._serialized_start=8959 + _DETECTORTYPE._serialized_end=8998 + _DETECTORMODE._serialized_start=9000 + _DETECTORMODE._serialized_end=9090 + _FPGAFIFOSTATUS._serialized_start=9092 + _FPGAFIFOSTATUS._serialized_end=9142 + _STATE._serialized_start=9144 + _STATE._serialized_end=9238 + _PLOTTYPE._serialized_start=9240 + _PLOTTYPE._serialized_end=9344 _EMPTY._serialized_start=32 _EMPTY._serialized_end=39 _UNITCELL._serialized_start=41 @@ -47,95 +47,95 @@ if _descriptor._USE_C_DESCRIPTORS == False: _PLOT._serialized_start=299 _PLOT._serialized_end=327 _DATASETSETTINGS._serialized_start=330 - _DATASETSETTINGS._serialized_end=879 - _DETECTORSETTINGS._serialized_start=882 - _DETECTORSETTINGS._serialized_end=1257 - _DETECTORMODULEGEOMETRY._serialized_start=1259 - _DETECTORMODULEGEOMETRY._serialized_end=1357 - _DETECTORGEOMETRY._serialized_start=1359 - _DETECTORGEOMETRY._serialized_end=1481 - _DETECTOR._serialized_start=1484 - _DETECTOR._serialized_end=1677 - _INTERNALSETTINGS._serialized_start=1680 - _INTERNALSETTINGS._serialized_end=2417 - _JUNGFRAUJOCHSETTINGS._serialized_start=2419 - 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_GRPC_JFJOCHRECEIVER._serialized_start=9347 + _GRPC_JFJOCHRECEIVER._serialized_end=10114 + _GRPC_JFJOCHWRITER._serialized_start=10117 + _GRPC_JFJOCHWRITER._serialized_end=10319 + _GRPC_JFJOCHDETECTOR._serialized_start=10322 + _GRPC_JFJOCHDETECTOR._serialized_end=10708 + _GRPC_JFJOCHBROKER._serialized_start=10711 + _GRPC_JFJOCHBROKER._serialized_end=12400 # @@protoc_insertion_point(module_scope) diff --git a/receiver/JFJochReceiver.cpp b/receiver/JFJochReceiver.cpp index 61e4d33e..f9a53769 100644 --- a/receiver/JFJochReceiver.cpp +++ b/receiver/JFJochReceiver.cpp @@ -8,6 +8,7 @@ #include "../image_analysis/GPUImageAnalysis.h" #include "../jungfrau/JFPedestalCalc.h" #include "../image_analysis/IndexerWrapper.h" +#include "../common/DiffractionGeometry.h" #ifdef JFJOCH_USE_NUMA #include @@ -89,6 +90,7 @@ JFJochReceiver::JFJochReceiver(const JFJochProtoBuf::ReceiverInput &settings, rad_int_mapping = std::make_unique(experiment, one_byte_mask.data()); rad_int_profile = std::make_unique(*rad_int_mapping, experiment); + rad_int_corr = CalcRadIntCorr(experiment); for (int i = 0; i < experiment.GetDataFileCount(); i++) rad_int_profile_per_file.emplace_back(std::make_unique(*rad_int_mapping, experiment)); @@ -308,11 +310,12 @@ void JFJochReceiver::FrameTransformationThread() { std::unique_ptr spot_finder; try { - if (rad_int_mapping) + if (rad_int_mapping) { spot_finder = std::make_unique(experiment.GetXPixelsNum(), experiment.GetYPixelsNum(), one_byte_mask, *rad_int_mapping); - else + spot_finder->LoadRadialIntegrationCorr(rad_int_corr); + } else spot_finder = std::make_unique(experiment.GetXPixelsNum(), experiment.GetYPixelsNum(), one_byte_mask); @@ -614,10 +617,10 @@ void JFJochReceiver::FinalizeMeasurement() { message.write_master_file = true; if (rad_int_profile) - message.rad_int_result["dataset"] = rad_int_profile->GetResult(true); + message.rad_int_result["dataset"] = rad_int_profile->GetResult(); for (int i = 0; i < rad_int_profile_per_file.size(); i++) message.rad_int_result["file" + std::to_string(i)] - = rad_int_profile_per_file[i]->GetResult(true); + = rad_int_profile_per_file[i]->GetResult(); image_pusher.EndDataCollection(message); logger.Info("Disconnected from writers"); @@ -676,7 +679,7 @@ JFJochProtoBuf::Plot JFJochReceiver::GetPlots(const JFJochProtoBuf::PlotRequest switch (request.type()) { case JFJochProtoBuf::RAD_INT: if (rad_int_profile) - rad_int_profile->GetPlot(ret, request.solid_angle_correction()); + rad_int_profile->GetPlot(ret); break; case JFJochProtoBuf::SPOT_COUNT: spot_count.GetPlot(ret, nbins); @@ -702,16 +705,11 @@ JFJochProtoBuf::RadialIntegrationProfiles JFJochReceiver::GetRadialIntegrationPr auto &map = *ret.mutable_plots(); - if (rad_int_profile) { - rad_int_profile->GetPlot(map["dataset"], true); - auto &corr = rad_int_profile->GetSolidAngleCorr(); - for (const auto &i: corr) - ret.add_solid_angle_correction(i); - } + if (rad_int_profile) + rad_int_profile->GetPlot(map["dataset"]); for (int i = 0; i < rad_int_profile_per_file.size(); i++) - rad_int_profile_per_file[i]->GetPlot(map["file" + std::to_string(i)], true); - + rad_int_profile_per_file[i]->GetPlot(map["file" + std::to_string(i)]); return ret; } diff --git a/receiver/JFJochReceiver.h b/receiver/JFJochReceiver.h index 8ff2849f..2744d05b 100644 --- a/receiver/JFJochReceiver.h +++ b/receiver/JFJochReceiver.h @@ -45,6 +45,7 @@ class JFJochReceiver { std::unique_ptr rad_int_mapping; std::unique_ptr rad_int_profile; std::vector> rad_int_profile_per_file; + std::vector rad_int_corr; std::vector spot_finder_mask; diff --git a/tests/DiffractionGeometryTest.cpp b/tests/DiffractionGeometryTest.cpp index 1963d534..6c5ce37f 100644 --- a/tests/DiffractionGeometryTest.cpp +++ b/tests/DiffractionGeometryTest.cpp @@ -113,16 +113,18 @@ TEST_CASE("PolarizationCorrection","") { x.BeamX_pxl(1000).BeamY_pxl(1000).DetectorDistance_mm(75); // Circular polarization 0.5*(1+cos(2theta)^2) - REQUIRE(CalcRadIntPolarizationCorrection(x, 0.0, 1000 * (1.0 + sqrt(3)), 1000) == Approx(0.5f*(1+0.5f*0.5f))); - REQUIRE(CalcRadIntPolarizationCorrection(x, 0.0, 1000, 1000* (1.0 + sqrt(3))) == Approx(0.5f*(1+0.5f*0.5f))); + x.PolarizationFactor(0); + REQUIRE(CalcRadIntPolarizationCorr(x, 1000 * (1.0 + sqrt(3)), 1000) == Approx(0.5f*(1+0.5f*0.5f))); + REQUIRE(CalcRadIntPolarizationCorr(x, 1000, 1000* (1.0 + sqrt(3))) == Approx(0.5f*(1+0.5f*0.5f))); // Horizontal polarization + x.PolarizationFactor(1); // No correction in vertical direction - REQUIRE(CalcRadIntPolarizationCorrection(x, 1.0, 1000, 1000 * (1.0 + sqrt(3))) == Approx(1.0f)); - REQUIRE(CalcRadIntPolarizationCorrection(x, 1.0, 1000, 1000 * (1.0 - sqrt(3))) == Approx(1.0f)); + REQUIRE(CalcRadIntPolarizationCorr(x, 1000, 1000 * (1.0 + sqrt(3))) == Approx(1.0f)); + REQUIRE(CalcRadIntPolarizationCorr(x, 1000, 1000 * (1.0 - sqrt(3))) == Approx(1.0f)); // cos(2*theta)^2 in horizontal direction - REQUIRE(CalcRadIntPolarizationCorrection(x, 1.0, 1000 * (1.0 + sqrt(3)), 1000) == Approx(0.5f*0.5f)); - REQUIRE(CalcRadIntPolarizationCorrection(x, 1.0, 1000 * (1.0 - sqrt(3)), 1000) == Approx(0.5f*0.5f)); -} \ No newline at end of file + REQUIRE(CalcRadIntPolarizationCorr(x, 1000 * (1.0 + sqrt(3)), 1000) == Approx(0.5f*0.5f)); + REQUIRE(CalcRadIntPolarizationCorr(x, 1000 * (1.0 - sqrt(3)), 1000) == Approx(0.5f*0.5f)); +} diff --git a/tests/HDF5WritingTest.cpp b/tests/HDF5WritingTest.cpp index 04266367..04d7901f 100644 --- a/tests/HDF5WritingTest.cpp +++ b/tests/HDF5WritingTest.cpp @@ -155,8 +155,8 @@ TEST_CASE("HDF5MasterFile_RadInt", "[HDF5][Full]") { start_message.rad_int_bin_to_q = mapping.GetBinToQ(); EndMessage end_message; end_message.number_of_images = x.GetImageNum(); - end_message.rad_int_result["avg1"] = profile.GetResult(false); - end_message.rad_int_result["avg2"] = profile.GetResult(false); + end_message.rad_int_result["avg1"] = profile.GetResult(); + end_message.rad_int_result["avg2"] = profile.GetResult(); REQUIRE_NOTHROW(HDF5Metadata::NXmx(start_message, end_message)); } diff --git a/tests/RadialIntegrationTest.cpp b/tests/RadialIntegrationTest.cpp index 506803fa..df382d23 100644 --- a/tests/RadialIntegrationTest.cpp +++ b/tests/RadialIntegrationTest.cpp @@ -100,7 +100,7 @@ TEST_CASE("RadialIntegrationProfile","[RadialIntegration]") { REQUIRE_THROWS(profile.Add(sum_wr, count)); JFJochProtoBuf::Plot plot; - profile.GetPlot(plot, false); + profile.GetPlot(plot); REQUIRE(plot.x_size() == mapping.GetBinNumber()); REQUIRE(plot.y_size() == mapping.GetBinNumber()); From ca1555696484215daceb93f93e53ead6d4cef269 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 19 Jun 2023 20:06:11 +0200 Subject: [PATCH 075/224] DiffractionGeometry: Add DistFromEwaldSphere function --- common/DiffractionGeometry.h | 5 +++++ tests/DiffractionGeometryTest.cpp | 3 +++ 2 files changed, 8 insertions(+) diff --git a/common/DiffractionGeometry.h b/common/DiffractionGeometry.h index 9ee0ee29..7f341448 100644 --- a/common/DiffractionGeometry.h +++ b/common/DiffractionGeometry.h @@ -51,6 +51,11 @@ inline float ResToPxl(const DiffractionExperiment& experiment, float d) { return tan_2theta * experiment.GetDetectorDistance_mm() / experiment.GetPixelSize_mm(); } +inline float DistFromEwaldSphere(const DiffractionExperiment& experiment, const Coord& recip) { + auto S = recip + experiment.GetScatteringVector(); + return fabsf(S.Length() - (1.0f/experiment.GetWavelength_A())); +} + inline float CalcRadIntSolidAngleCorr(const DiffractionExperiment& experiment, float q) { float sin_theta = q * experiment.GetWavelength_A() / (4 * static_cast(M_PI)); float cos_2theta = 1.0f - 2.0f * sin_theta * sin_theta; // cos(2*alpha) = 1 - 2 * sin(alpha)^2 diff --git a/tests/DiffractionGeometryTest.cpp b/tests/DiffractionGeometryTest.cpp index 6c5ce37f..a014290e 100644 --- a/tests/DiffractionGeometryTest.cpp +++ b/tests/DiffractionGeometryTest.cpp @@ -15,6 +15,7 @@ TEST_CASE("RecipToDetector_1", "[LinearAlgebra][Coord]") { REQUIRE(proj_x == Approx(pos_x)); REQUIRE(proj_y == Approx(pos_y)); REQUIRE((recip - DetectorToRecip(x, proj_x, proj_y)).Length() < 0.00000001f); + REQUIRE(DistFromEwaldSphere(x, recip) < 4e-4); } TEST_CASE("RecipToDetector_2", "[LinearAlgebra][Coord]") { @@ -27,6 +28,7 @@ TEST_CASE("RecipToDetector_2", "[LinearAlgebra][Coord]") { REQUIRE(proj_x == Approx(pos_x)); REQUIRE(proj_y == Approx(pos_y)); REQUIRE((recip - DetectorToRecip(x, proj_x, proj_y)).Length() < 0.00000001f); + REQUIRE(DistFromEwaldSphere(x, recip) < 4e-4); } TEST_CASE("RecipToDetector_3", "[LinearAlgebra][Coord]") { @@ -39,6 +41,7 @@ TEST_CASE("RecipToDetector_3", "[LinearAlgebra][Coord]") { REQUIRE(proj_x == Approx(pos_x)); REQUIRE(proj_y == Approx(pos_y)); REQUIRE((recip - DetectorToRecip(x, proj_x, proj_y)).Length() < 0.00000001f); + REQUIRE(DistFromEwaldSphere(x, recip) < 4e-4); } TEST_CASE("Phi","") { From 4c28d2d9762779c3d0c796b43c3331f1652ea994 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 19 Jun 2023 20:08:37 +0200 Subject: [PATCH 076/224] GPUImageAnalysis: minor correction --- image_analysis/GPUImageAnalysis.cu | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/image_analysis/GPUImageAnalysis.cu b/image_analysis/GPUImageAnalysis.cu index a6c87735..943c5f90 100644 --- a/image_analysis/GPUImageAnalysis.cu +++ b/image_analysis/GPUImageAnalysis.cu @@ -195,7 +195,7 @@ __global__ void gpu_radial_integration(const int16_t *image, const uint16_t *rad for (uint32_t i = idx; i < npixel; i += blockDim.x * gridDim.x) { uint16_t bin = rad_integration_mapping[i]; float value = static_cast(image[i]) * corr[i]; - if ((value > INT16_MIN + 4) && (value < INT16_MAX - 4) && (bin < nbins)) { + if ((image[i] > INT16_MIN + 4) && (image[i] < INT16_MAX - 4) && (bin < nbins)) { atomicAdd(&shared_sum[bin], value); atomicAdd(&shared_count[bin], 1.0f); } From dd20ac2acdf3f968ee98c8bb43c980b5613b7421 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 19 Jun 2023 20:08:51 +0200 Subject: [PATCH 077/224] RadialIntegrationTest: Add test for corrections --- tests/RadialIntegrationTest.cpp | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/tests/RadialIntegrationTest.cpp b/tests/RadialIntegrationTest.cpp index df382d23..1a816904 100644 --- a/tests/RadialIntegrationTest.cpp +++ b/tests/RadialIntegrationTest.cpp @@ -190,6 +190,30 @@ TEST_CASE("RadialIntegrationGPU_Process","[RadialIntegration]") { REQUIRE(image_analysis.GetRadialIntegrationSum()[1] == 6+2); } +TEST_CASE("RadialIntegrationGPU_Process_Corr","[RadialIntegration]") { + std::vector pixel_to_bin = {0,1,2,4,3,1,2,3}; + std::vector test_image = {7,6,5,4,3,2,1,0}; + std::vector one_byte_mask = {1,1,1,1,1,1,1,1}; + + std::vector corr = {0.5f, 0.3f, 0.5f, 0.2f, 0.8f, 0.9f, 1.0f, 0.5f}; + GPUImageAnalysis image_analysis(8, 1, one_byte_mask, pixel_to_bin, 4); + image_analysis.SetInputBuffer(test_image.data()); + image_analysis.LoadRadialIntegrationCorr(corr); + image_analysis.LoadDataToGPU(); + image_analysis.RunRadialIntegration(); + + REQUIRE(image_analysis.GetRadialIntegrationCount().size() == 4); + REQUIRE(image_analysis.GetRadialIntegrationSum().size() == 4); + + REQUIRE(image_analysis.GetRadialIntegrationCount()[0] == 1); + REQUIRE(image_analysis.GetRadialIntegrationCount()[1] == 2); + + REQUIRE(image_analysis.GetRadialIntegrationSum()[0] == Approx(7 * 0.5f)); + REQUIRE(image_analysis.GetRadialIntegrationSum()[1] == Approx(6*0.3f + 2*0.9f)); + REQUIRE(image_analysis.GetRadialIntegrationSum()[2] == Approx(5*0.5f + 1*1.0f)); + REQUIRE(image_analysis.GetRadialIntegrationSum()[3] == Approx(3*0.8f)); +} + TEST_CASE("RadialIntegrationGPU_Process_Mask","[RadialIntegration]") { std::vector pixel_to_bin = {0,1,2,4,3,1,2,3}; std::vector test_image = {7,6,5,4,3,2,1,0}; From bbd0b6ef360bc1d9d0c9a860680db3428970ef0b Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 23 Jun 2023 12:38:34 +0200 Subject: [PATCH 078/224] ROIFilter: Add filter to only preserve ROI regions --- common/CMakeLists.txt | 3 +- common/FrameTransformation.cpp | 7 ++ common/FrameTransformation.h | 2 + common/ROIFilter.h | 63 ++++++++++++++++ tests/CMakeLists.txt | 2 +- tests/FrameTransformationTest.cpp | 116 ++++++++++++++++++++++++++++++ tests/ROIFilterTest.cpp | 29 ++++++++ 7 files changed, 220 insertions(+), 2 deletions(-) create mode 100644 common/ROIFilter.h create mode 100644 tests/ROIFilterTest.cpp diff --git a/common/CMakeLists.txt b/common/CMakeLists.txt index a60406f2..c7272c3c 100644 --- a/common/CMakeLists.txt +++ b/common/CMakeLists.txt @@ -43,7 +43,8 @@ ADD_LIBRARY( CommonFunctions STATIC grpcToJson.h jsonToGrpc.h to_fixed.h DetectorGeometry.cpp DetectorGeometry.h DetectorModuleGeometry.cpp DetectorModuleGeometry.h - DetectorSetup.h DetectorSetup.cpp ZeroCopyReturnValue.h Histogram.h DiffractionGeometry.h) + DetectorSetup.h DetectorSetup.cpp ZeroCopyReturnValue.h Histogram.h DiffractionGeometry.h + ROIFilter.h) TARGET_LINK_LIBRARIES(CommonFunctions Compression FrameSerialize libzmq JFCalibration JFJochProtoBuf -lrt) diff --git a/common/FrameTransformation.cpp b/common/FrameTransformation.cpp index 14db8989..25ac9afe 100644 --- a/common/FrameTransformation.cpp +++ b/common/FrameTransformation.cpp @@ -143,6 +143,13 @@ void FrameTransformation::ProcessModule(const int16_t *input, uint16_t module_nu } } +void FrameTransformation::ApplyROI(const ROIFilter &filter) { + if (pixel_depth == 2) + filter.Apply((int16_t *) precompression_buffer.data(), static_cast(INT16_MIN)); + else + filter.Apply((int32_t *) precompression_buffer.data(), static_cast(INT32_MIN)); +} + int16_t *FrameTransformation::GetPreview16BitImage() { if (pixel_depth == 2) return (int16_t *) precompression_buffer.data(); diff --git a/common/FrameTransformation.h b/common/FrameTransformation.h index 99ace14f..e86eb18e 100644 --- a/common/FrameTransformation.h +++ b/common/FrameTransformation.h @@ -7,6 +7,7 @@ #include "DiffractionExperiment.h" #include "../compression/JFJochCompressor.h" #include "../jungfrau/JFConversion.h" +#include "ROIFilter.h" class FrameTransformation { const DiffractionExperiment& experiment; @@ -31,6 +32,7 @@ public: int data_stream); void Pack(); // transfer summed image to converted coordinates, clear summation buffer size_t SaveCompressedImage(void *output); + void ApplyROI(const ROIFilter &filter); int16_t *GetPreview16BitImage(); }; diff --git a/common/ROIFilter.h b/common/ROIFilter.h new file mode 100644 index 00000000..eab8fefe --- /dev/null +++ b/common/ROIFilter.h @@ -0,0 +1,63 @@ +// Copyright (2019-2023) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#ifndef JUNGFRAUJOCH_ROIFILTER_H +#define JUNGFRAUJOCH_ROIFILTER_H + +#include +#include +#include +#include "JFJochException.h" + +class ROIFilter { + size_t width, height; + std::vector mask; +public: + ROIFilter(size_t in_width, size_t in_height, uint8_t fill_value = 0) + : width(in_width), height(in_height), mask (in_width * in_height, fill_value) {} + + void SetRectangle(size_t x0, size_t y0, size_t in_width, size_t in_height, uint8_t fill_value = 1) { + if (y0 + in_height > height) + throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, "Mismatch in array size"); + if (x0 + in_width > width) + throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, "Mismatch in array size"); + + for (size_t y = y0; y < y0 + in_height; y++) { + for (size_t x = x0; x < x0 + in_width; x++) { + mask[y * width + x] |= fill_value; + } + } + } + + + void ClearRectangle(size_t x0, size_t y0, size_t in_width, size_t in_height, uint8_t fill_value = 1) { + if (y0 + in_height > height) + throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, "Mismatch in array size"); + if (x0 + in_width > width) + throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, "Mismatch in array size"); + + for (size_t y = y0; y < y0 + in_height; y++) { + for (size_t x = x0; x < x0 + in_width; x++) { + mask[y * width + x] &= ~fill_value; + } + } + } + + template + void Apply(T* data, T fill_value) const { + for (size_t i = 0; i < mask.size(); i++) { + if (mask[i] == 0) + data[i] = fill_value; + } + } + + template + void Apply(std::vector &data, T fill_value) const { + if (data.size() != mask.size()) + throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, "Mismatch in array size"); + Apply(data.data(), fill_value); + } +}; + + +#endif //JUNGFRAUJOCH_ROIFILTER_H diff --git a/tests/CMakeLists.txt b/tests/CMakeLists.txt index ecf9ba06..e589acd7 100644 --- a/tests/CMakeLists.txt +++ b/tests/CMakeLists.txt @@ -25,7 +25,7 @@ ADD_EXECUTABLE(CatchTest RadialIntegrationTest.cpp StatusVectorTest.cpp ProcessRawPacketTest.cpp CBORTest.cpp ../tests/stream2.h ../tests/stream2.c - JFConversionTest.cpp DetectorGeometryTest.cpp JFJochBrokerParserTest.cpp DetectorSetupTest.cpp DiffractionGeometryTest.cpp) + JFConversionTest.cpp DetectorGeometryTest.cpp JFJochBrokerParserTest.cpp DetectorSetupTest.cpp DiffractionGeometryTest.cpp ROIFilterTest.cpp) target_link_libraries(CatchTest JFJochBroker JFJochReceiver JFJochWriter ImageAnalysis CommonFunctions HLSSimulation) target_include_directories(CatchTest PRIVATE .) diff --git a/tests/FrameTransformationTest.cpp b/tests/FrameTransformationTest.cpp index 5b02bc04..bf7c94f9 100644 --- a/tests/FrameTransformationTest.cpp +++ b/tests/FrameTransformationTest.cpp @@ -168,6 +168,122 @@ TEST_CASE("FrameTransformation_Converted_bshuf_lz4" ,"") { REQUIRE(input_1[(511+512)*1024 + 800] == output[CONVERTED_MODULE_SIZE * (nmodules - 2) + 1030 + 800 + 6]); } + +TEST_CASE("FrameTransformation_Converted_bshuf_lz4_roi" ,"") { + const uint16_t nmodules = 4; + const uint16_t ndatastreams = 2; + DiffractionExperiment experiment(DetectorGeometry(ndatastreams * nmodules, 2)); + experiment.DataStreams(ndatastreams); + + experiment.Mode(DetectorMode::Conversion).Compression(JFJochProtoBuf::BSHUF_LZ4); + + FrameTransformation transformation(experiment); + + ROIFilter filter(experiment.GetXPixelsNum(), experiment.GetYPixelsNum(), 0); + filter.SetRectangle(100, 20, 10, 10); + + std::vector input_0(nmodules*RAW_MODULE_SIZE); + for (int i = 0; i < nmodules*RAW_MODULE_SIZE; i++) + input_0[i] = 50; + + std::vector input_1(nmodules*RAW_MODULE_SIZE); + for (int i = 0; i < nmodules*RAW_MODULE_SIZE; i++) + input_1[i] = 50; + + std::vector output_compressed(experiment.GetMaxCompressedSize()); + + for (int i = 0; i < nmodules; i++) { + REQUIRE_NOTHROW(transformation.ProcessModule(input_0.data() + i * RAW_MODULE_SIZE, i, 0)); + REQUIRE_NOTHROW(transformation.ProcessModule(input_1.data() + i * RAW_MODULE_SIZE, i, 1)); + } + + size_t compressed_size; + transformation.Pack(); + transformation.ApplyROI(filter); + REQUIRE_NOTHROW(compressed_size = transformation.SaveCompressedImage(output_compressed.data())); + output_compressed.resize(compressed_size); + + REQUIRE(bshuf_read_uint64_BE(output_compressed.data()) == experiment.GetPixelsNum() * experiment.GetPixelDepth()); + REQUIRE(bshuf_read_uint32_BE(output_compressed.data()+8) == JFJochBitShuffleCompressor::DefaultBlockSize * experiment.GetPixelDepth()); + + std::vector output; + REQUIRE_NOTHROW(JFJochDecompress(output, experiment.GetCompressionAlgorithmEnum(), output_compressed, + experiment.GetPixelsNum())); + + size_t diff = 0; + for (int y = 0; y < experiment.GetYPixelsNum(); y++) { + for (int x = 0; x < experiment.GetXPixelsNum(); x++) { + if ((y >= 20 ) && (y < 30) && (x >= 100) && (x < 110)) { + if (output[y * experiment.GetXPixelsNum() + x] != 50) + diff++; + } else { + if (output[y * experiment.GetXPixelsNum() + x] != INT16_MIN) + diff++; + } + } + } + REQUIRE(diff == 0); +} + +TEST_CASE("FrameTransformation_Converted_bshuf_lz4_roi_summation" ,"") { + const uint16_t nmodules = 4; + const uint16_t ndatastreams = 2; + const uint16_t nframes = 4; + DiffractionExperiment experiment(DetectorGeometry(ndatastreams * nmodules, 2)); + experiment.DataStreams(ndatastreams); + + experiment.Mode(DetectorMode::Conversion).Compression(JFJochProtoBuf::BSHUF_LZ4).Summation(nframes); + + FrameTransformation transformation(experiment); + + ROIFilter filter(experiment.GetXPixelsNum(), experiment.GetYPixelsNum(), 0); + filter.SetRectangle(100, 20, 10, 10); + + std::vector input_0(nmodules*RAW_MODULE_SIZE); + for (int i = 0; i < nmodules*RAW_MODULE_SIZE; i++) + input_0[i] = 50; + + std::vector input_1(nmodules*RAW_MODULE_SIZE); + for (int i = 0; i < nmodules*RAW_MODULE_SIZE; i++) + input_1[i] = 50; + + std::vector output_compressed(experiment.GetMaxCompressedSize()); + + for (int f = 0; f < nframes; f++) { + for (int i = 0; i < nmodules; i++) { + REQUIRE_NOTHROW(transformation.ProcessModule(input_0.data() + i * RAW_MODULE_SIZE, i, 0)); + REQUIRE_NOTHROW(transformation.ProcessModule(input_1.data() + i * RAW_MODULE_SIZE, i, 1)); + } + } + + size_t compressed_size; + transformation.Pack(); + transformation.ApplyROI(filter); + REQUIRE_NOTHROW(compressed_size = transformation.SaveCompressedImage(output_compressed.data())); + output_compressed.resize(compressed_size); + + REQUIRE(bshuf_read_uint64_BE(output_compressed.data()) == experiment.GetPixelsNum() * experiment.GetPixelDepth()); + REQUIRE(bshuf_read_uint32_BE(output_compressed.data()+8) == JFJochBitShuffleCompressor::DefaultBlockSize * experiment.GetPixelDepth()); + + std::vector output; + REQUIRE_NOTHROW(JFJochDecompress(output, experiment.GetCompressionAlgorithmEnum(), output_compressed, + experiment.GetPixelsNum())); + + size_t diff = 0; + for (int y = 0; y < experiment.GetYPixelsNum(); y++) { + for (int x = 0; x < experiment.GetXPixelsNum(); x++) { + if ((y >= 20 ) && (y < 30) && (x >= 100) && (x < 110)) { + if (output[y * experiment.GetXPixelsNum() + x] != nframes * 50) + diff++; + } else { + if (output[y * experiment.GetXPixelsNum() + x] != INT32_MIN) + diff++; + } + } + } + REQUIRE(diff == 0); +} + TEST_CASE("FrameTransformation_Converted_bshuf_zstd" ,"") { const uint16_t nmodules = 4; const uint16_t ndatastreams = 2; diff --git a/tests/ROIFilterTest.cpp b/tests/ROIFilterTest.cpp new file mode 100644 index 00000000..4d9738ed --- /dev/null +++ b/tests/ROIFilterTest.cpp @@ -0,0 +1,29 @@ +// Copyright (2019-2022) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#include + +#include "../common/ROIFilter.h" + +TEST_CASE("ROIFilter") { + size_t width = 4; + size_t height = 5; + std::vector v(width * height, 1); + + ROIFilter filter(width, height); + + filter.SetRectangle(1, 1, 2, 3); + + filter.Apply(v, (uint32_t) 55); + + REQUIRE(v[0] == 55); + REQUIRE(v[2] == 55); + + REQUIRE(v[width * 1 + 0] == 55); + REQUIRE(v[width * 1 + 1] == 1); + REQUIRE(v[width * 1 + 2] == 1); + REQUIRE(v[width * 1 + 3] == 55); + + REQUIRE(v[width * 3 + 2] == 1); + REQUIRE(v[width * 4 + 2] == 55); +} From bd549bb339c39510f2aaca4d849bad09d1e7b58d Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 23 Jun 2023 13:47:07 +0200 Subject: [PATCH 079/224] ROIFilter: Add filter to only preserve ROI regions --- common/ROIFilter.h | 46 ++++++++++------ tests/ROIFilterTest.cpp | 113 +++++++++++++++++++++++++++++++++++++++- 2 files changed, 141 insertions(+), 18 deletions(-) diff --git a/common/ROIFilter.h b/common/ROIFilter.h index eab8fefe..339755c3 100644 --- a/common/ROIFilter.h +++ b/common/ROIFilter.h @@ -10,35 +10,49 @@ #include "JFJochException.h" class ROIFilter { - size_t width, height; + int32_t width, height; std::vector mask; public: - ROIFilter(size_t in_width, size_t in_height, uint8_t fill_value = 0) - : width(in_width), height(in_height), mask (in_width * in_height, fill_value) {} + ROIFilter(int32_t in_width, int32_t in_height, uint8_t fill_value = 0) + : width(in_width), height(in_height) { + if ((width < 0) || (height < 0)) + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Negative dimensions are wrong"); + mask = std::vector(in_width * in_height, fill_value); + } - void SetRectangle(size_t x0, size_t y0, size_t in_width, size_t in_height, uint8_t fill_value = 1) { - if (y0 + in_height > height) - throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, "Mismatch in array size"); - if (x0 + in_width > width) - throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, "Mismatch in array size"); + void SetRectangle(int32_t x0, int32_t y0, int32_t in_width, int32_t in_height, uint8_t mask_value = 1) { + if (x0 < 0) { in_width += x0; x0 = 0; } + if (in_width <= 0) return; - for (size_t y = y0; y < y0 + in_height; y++) { + if (x0 >= width) return; + if (x0 + in_width >= width) in_width = width - 1 - x0; + + if (y0 < 0) { in_height += y0; y0 = 0; } + if (in_height <= 0) return; + + if (y0 >= height) return; + if (y0 + in_height >= height) in_height = height - 1 - y0; + + for (size_t y = y0; y < y0 + in_height; y++) { for (size_t x = x0; x < x0 + in_width; x++) { - mask[y * width + x] |= fill_value; + mask[y * width + x] |= mask_value; } } } + void ClearRectangle(int32_t x0, int32_t y0, int32_t in_width, int32_t in_height, uint8_t mask_value = 1) { + if (x0 < 0) { in_width += x0; x0 = 0; } + if (in_width <= 0) return; - void ClearRectangle(size_t x0, size_t y0, size_t in_width, size_t in_height, uint8_t fill_value = 1) { - if (y0 + in_height > height) - throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, "Mismatch in array size"); - if (x0 + in_width > width) - throw JFJochException(JFJochExceptionCategory::ArrayOutOfBounds, "Mismatch in array size"); + if (x0 >= width) return; + if (x0 + in_width >= width) in_width = width - 1 - x0; + + if (y0 < 0) { in_height += y0; y0 = 0; } + if (in_height <= 0) return; for (size_t y = y0; y < y0 + in_height; y++) { for (size_t x = x0; x < x0 + in_width; x++) { - mask[y * width + x] &= ~fill_value; + mask[y * width + x] &= ~mask_value; } } } diff --git a/tests/ROIFilterTest.cpp b/tests/ROIFilterTest.cpp index 4d9738ed..bf96de9b 100644 --- a/tests/ROIFilterTest.cpp +++ b/tests/ROIFilterTest.cpp @@ -6,8 +6,8 @@ #include "../common/ROIFilter.h" TEST_CASE("ROIFilter") { - size_t width = 4; - size_t height = 5; + int32_t width = 4; + int32_t height = 5; std::vector v(width * height, 1); ROIFilter filter(width, height); @@ -27,3 +27,112 @@ TEST_CASE("ROIFilter") { REQUIRE(v[width * 3 + 2] == 1); REQUIRE(v[width * 4 + 2] == 55); } + +TEST_CASE("ROIFilter_out_of_bounds") { + int32_t width = 4; + int32_t height = 5; + std::vector v(width * height, 1); + + ROIFilter filter(width, height); + + filter.SetRectangle(1, 5, 2, 3); + + filter.SetRectangle(4, 1, 2, 3); + + filter.Apply(v, (uint32_t) 55); + size_t diff = 0; + for (auto &i: v) { + if (i != 55) + diff++; + } + REQUIRE(diff == 0); +} + +TEST_CASE("ROIFilter_negative_out_of_bounds") { + int32_t width = 4; + int32_t height = 5; + std::vector v(width * height, 1); + + ROIFilter filter(width, height); + + filter.SetRectangle(1, -9, 2, 3); + + filter.SetRectangle(-3, 1, 2, 3); + + filter.Apply(v, (uint32_t) 55); + size_t diff = 0; + for (auto &i: v) { + if (i != 55) + diff++; + } + REQUIRE(diff == 0); +} + +TEST_CASE("ROIFilter_on_bounds") { + int32_t width = 4; + int32_t height = 5; + std::vector v(width * height, 1); + + ROIFilter filter(width, height); + + filter.SetRectangle(2, 3, 10, 10); + + filter.Apply(v, (uint32_t) 55); + + REQUIRE(v[1 * width + 0] == 55); + REQUIRE(v[1 * width + 1] == 55); + REQUIRE(v[1 * width + 2] == 55); + REQUIRE(v[1 * width + 3] == 55); + + REQUIRE(v[2 * width + 0] == 55); + REQUIRE(v[2 * width + 1] == 55); + REQUIRE(v[2 * width + 2] == 55); + REQUIRE(v[2 * width + 3] == 55); + + REQUIRE(v[3 * width + 0] == 55); + REQUIRE(v[3 * width + 1] == 55); + REQUIRE(v[3 * width + 2] == 1); + REQUIRE(v[3 * width + 3] == 1); + + REQUIRE(v[4 * width + 0] == 55); + REQUIRE(v[4 * width + 1] == 55); + REQUIRE(v[4 * width + 2] == 1); + REQUIRE(v[4 * width + 3] == 1); +} + +TEST_CASE("ROIFilter_negative_start") { + int32_t width = 4; + int32_t height = 5; + std::vector v(width * height, 1); + + ROIFilter filter(width, height); + + filter.SetRectangle(-1, -1, 3, 4); + + filter.Apply(v, (uint32_t) 55); + + CHECK(v[0 * width + 0] == 1); + CHECK(v[0 * width + 1] == 1); + CHECK(v[0 * width + 2] == 55); + CHECK(v[0 * width + 3] == 55); + + CHECK(v[1 * width + 0] == 1); + CHECK(v[1 * width + 1] == 1); + CHECK(v[1 * width + 2] == 55); + CHECK(v[1 * width + 3] == 55); + + CHECK(v[2 * width + 0] == 1); + CHECK(v[2 * width + 1] == 1); + CHECK(v[2 * width + 2] == 55); + CHECK(v[2 * width + 3] == 55); + + CHECK(v[3 * width + 0] == 55); + CHECK(v[3 * width + 1] == 55); + CHECK(v[3 * width + 2] == 55); + CHECK(v[3 * width + 3] == 55); + + CHECK(v[4 * width + 0] == 55); + CHECK(v[4 * width + 1] == 55); + CHECK(v[4 * width + 2] == 55); + CHECK(v[4 * width + 3] == 55); +} \ No newline at end of file From 2b72039045ad21f44edbec50c36e47ca69aa0df2 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 23 Jun 2023 14:18:36 +0200 Subject: [PATCH 080/224] PredictSpotsOnDetector: Add (but no correctness test so far) --- image_analysis/CMakeLists.txt | 2 +- image_analysis/PredictSpotsOnDetector.h | 59 +++++++++++++++++++++++++ tools/DataAnalysisPerfTest.cpp | 42 ++++++++++++++++++ 3 files changed, 102 insertions(+), 1 deletion(-) create mode 100644 image_analysis/PredictSpotsOnDetector.h diff --git a/image_analysis/CMakeLists.txt b/image_analysis/CMakeLists.txt index 6b927ae9..0ebfd5a4 100644 --- a/image_analysis/CMakeLists.txt +++ b/image_analysis/CMakeLists.txt @@ -4,7 +4,7 @@ ADD_LIBRARY(ImageAnalysis STATIC GPUImageAnalysis.h RadialIntegration.cpp RadialIntegration.h RadialIntegrationMapping.cpp RadialIntegrationMapping.h - StrongPixelSet.cpp StrongPixelSet.h GPUImageAnalysis.cpp RadialIntegrationProfile.cpp RadialIntegrationProfile.h) + StrongPixelSet.cpp StrongPixelSet.h GPUImageAnalysis.cpp RadialIntegrationProfile.cpp RadialIntegrationProfile.h PredictSpotsOnDetector.h) TARGET_LINK_LIBRARIES(ImageAnalysis CommonFunctions) diff --git a/image_analysis/PredictSpotsOnDetector.h b/image_analysis/PredictSpotsOnDetector.h new file mode 100644 index 00000000..37c79640 --- /dev/null +++ b/image_analysis/PredictSpotsOnDetector.h @@ -0,0 +1,59 @@ +// Copyright (2019-2023) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#ifndef JUNGFRAUJOCH_PREDICTSPOTSONDETECTOR_H +#define JUNGFRAUJOCH_PREDICTSPOTSONDETECTOR_H + +#include +#include "../common/DiffractionGeometry.h" +#include "../common/ROIFilter.h" +#include "CrystalLattice.h" + +std::vector> PredictSpotsOnDetector(const DiffractionExperiment& experiment, + const CrystalLattice& lattice, + int32_t max_hkl = 30, + float epsilon = 4e-4) { + CrystalLattice recip_l = lattice.ReciprocalLattice(); + std::vector> ret; + for (int h = -max_hkl; h < max_hkl; h++) { + for (int k = -max_hkl; k < max_hkl; k++) { + for (int l = -max_hkl; l < max_hkl; l++) { + Coord recip = static_cast(h) * recip_l.Vec0() + + static_cast(k) * recip_l.Vec1() + + static_cast(l) * recip_l.Vec2(); + + if (DistFromEwaldSphere(experiment, recip) < epsilon) + ret.push_back(RecipToDector(experiment, recip)); + } + } + } + return ret; +} + +void PredictSpotsOnDetector(ROIFilter &filter, + const DiffractionExperiment& experiment, + const CrystalLattice& lattice, + int32_t max_hkl = 30, + float epsilon = 4e-4, + uint16_t box_size = 7) { + CrystalLattice recip_l = lattice.ReciprocalLattice(); + std::vector> ret; + for (int h = -max_hkl; h < max_hkl; h++) { + for (int k = -max_hkl; k < max_hkl; k++) { + for (int l = -max_hkl; l < max_hkl; l++) { + Coord recip = static_cast(h) * recip_l.Vec0() + + static_cast(k) * recip_l.Vec1() + + static_cast(l) * recip_l.Vec2(); + + if (DistFromEwaldSphere(experiment, recip) < epsilon) { + auto [x,y] = RecipToDector(experiment, recip); + auto x0 = static_cast(std::lroundf(x - static_cast(box_size))); + auto y0 = static_cast(std::lroundf(y - static_cast(box_size))); + filter.SetRectangle(x0, y0, 2 * box_size + 1, 2 * box_size + 1); + } + } + } + } +} + +#endif //JUNGFRAUJOCH_PREDICTSPOTSONDETECTOR_H diff --git a/tools/DataAnalysisPerfTest.cpp b/tools/DataAnalysisPerfTest.cpp index 6c976355..d3c2ac3e 100644 --- a/tools/DataAnalysisPerfTest.cpp +++ b/tools/DataAnalysisPerfTest.cpp @@ -13,6 +13,7 @@ #include "../image_analysis/RadialIntegration.h" #include "../common/Logger.h" +#include "../image_analysis/PredictSpotsOnDetector.h" #define make_unit_cell(a1,a2,a3,a4,a5,a6) UnitCell{.a = a1, .b = a2, .c = a3, .alpha = a4, .beta = a5, .gamma = a6} @@ -50,6 +51,46 @@ auto TestAll(const DiffractionExperiment &experiment, const JFJochProtoBuf::Data return strstream.str(); } +auto TestAllWithROI(const DiffractionExperiment &experiment, const JFJochProtoBuf::DataProcessingSettings &settings, + GPUImageAnalysis &spot_finder, int16_t* image, size_t nimages) { + IndexerWrapper indexer; + indexer.Setup(experiment.GetUnitCell()); + + spot_finder.SetInputBuffer(image); + + std::vector roi_image(experiment.GetPixelsNum()); + + auto start_time = std::chrono::system_clock::now(); + for (int i = 0; i < nimages; i++) { + ROIFilter filter(experiment.GetXPixelsNum(), experiment.GetYPixelsNum()); + + std::vector spots; + std::vector result; + spot_finder.LoadDataToGPU(); + spot_finder.RunSpotFinder(settings); + spot_finder.GetSpotFinderResults(experiment, settings, spots); + spot_finder.RunRadialIntegration(); + std::vector recip; + for (const auto& s: spots) + recip.emplace_back(s.ReciprocalCoord(experiment)); + auto indexer_ret = indexer.Run(recip); + spot_finder.GetRadialIntegrationProfile(result); + if (!indexer_ret.empty()) { + PredictSpotsOnDetector(filter, experiment, indexer_ret[0].l); + filter.Apply(roi_image, INT16_MIN); + } + } + + auto end_time = std::chrono::system_clock::now(); + auto elapsed = std::chrono::duration_cast(end_time - start_time); + + std::ostringstream strstream; + logger.Info("{:20s} {:8.1f} ms/image", "Full+ROI", + elapsed.count() / (1000.0 * (double) nimages)); + + return strstream.str(); +} + void TestIndexing() { constexpr const int nexec = 5; @@ -305,5 +346,6 @@ int main(int argc, char **argv) { if (GPUImageAnalysis::GPUPresent()) { GPUImageAnalysis local_peakfinder_gpu(x.GetXPixelsNum(), x.GetYPixelsNum(), one_byte_mask, mapping); TestAll(x, settings, local_peakfinder_gpu,image_conv.data(), nimages); + TestAllWithROI(x, settings, local_peakfinder_gpu,image_conv.data(), nimages); } } From 9089794d4622e47bfec09d8aa486b974ee1ce252 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 23 Jun 2023 14:29:49 +0200 Subject: [PATCH 081/224] ROIFilter: Fix --- common/ROIFilter.h | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/common/ROIFilter.h b/common/ROIFilter.h index 339755c3..be96f0c5 100644 --- a/common/ROIFilter.h +++ b/common/ROIFilter.h @@ -25,13 +25,13 @@ public: if (in_width <= 0) return; if (x0 >= width) return; - if (x0 + in_width >= width) in_width = width - 1 - x0; + if (x0 + in_width >= width) in_width = width - x0; if (y0 < 0) { in_height += y0; y0 = 0; } if (in_height <= 0) return; if (y0 >= height) return; - if (y0 + in_height >= height) in_height = height - 1 - y0; + if (y0 + in_height >= height) in_height = height - y0; for (size_t y = y0; y < y0 + in_height; y++) { for (size_t x = x0; x < x0 + in_width; x++) { @@ -45,11 +45,14 @@ public: if (in_width <= 0) return; if (x0 >= width) return; - if (x0 + in_width >= width) in_width = width - 1 - x0; + if (x0 + in_width >= width) in_width = width - x0; if (y0 < 0) { in_height += y0; y0 = 0; } if (in_height <= 0) return; + if (y0 >= height) return; + if (y0 + in_height >= height) in_height = height - y0; + for (size_t y = y0; y < y0 + in_height; y++) { for (size_t x = x0; x < x0 + in_width; x++) { mask[y * width + x] &= ~mask_value; From 2caba97bb26ad630135defd4f4fb1984d8eb00bc Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 23 Jun 2023 21:04:15 +0200 Subject: [PATCH 082/224] DiffractionExperiment: Save ROI --- common/DiffractionExperiment.cpp | 28 ++++ common/DiffractionExperiment.h | 7 + grpc/jfjoch.proto | 9 ++ python/jfjoch_pb2.py | 212 ++++++++++++++++--------------- tests/ROIFilterTest.cpp | 38 ++++++ 5 files changed, 189 insertions(+), 105 deletions(-) diff --git a/common/DiffractionExperiment.cpp b/common/DiffractionExperiment.cpp index c170487f..26963286 100644 --- a/common/DiffractionExperiment.cpp +++ b/common/DiffractionExperiment.cpp @@ -1202,3 +1202,31 @@ float DiffractionExperiment::GetPolarizationFactor() const { return dataset.rad_int_polarization_factor(); } +DiffractionExperiment &DiffractionExperiment::ApplyROI(bool input) { + internal.set_roi_apply(input); + return *this; +} + +DiffractionExperiment &DiffractionExperiment::AddROIRectangle(int32_t x, int32_t y, int32_t width, int32_t height) { + auto *tmp = internal.add_roi_rectangle(); + tmp->set_x0(x); + tmp->set_y0(y); + tmp->set_width(width); + tmp->set_height(height); + return *this; +} + +DiffractionExperiment &DiffractionExperiment::ClearROI() { + internal.clear_roi_rectangle(); + return *this; +} + +bool DiffractionExperiment::GetApplyROI() const { + return internal.roi_apply(); +} + +void DiffractionExperiment::SetupROIFilter(ROIFilter &filter) { + for (const auto& i: internal.roi_rectangle()) + filter.SetRectangle(i.x0(), i.y0(), i.width(), i.height()); +} + diff --git a/common/DiffractionExperiment.h b/common/DiffractionExperiment.h index 9f392e4e..527a4784 100644 --- a/common/DiffractionExperiment.h +++ b/common/DiffractionExperiment.h @@ -18,6 +18,7 @@ #include "../frame_serialize/StartMessage.h" #include "../frame_serialize/EndMessage.h" #include "DetectorSetup.h" +#include "ROIFilter.h" enum class DetectorMode : int { Conversion, Raw, PedestalG0, PedestalG1, PedestalG2 @@ -221,6 +222,12 @@ public: bool GetApplySolidAngleCorr() const; bool GetApplyPolarizationCorr() const; float GetPolarizationFactor() const; + + DiffractionExperiment& ApplyROI(bool input); + DiffractionExperiment& AddROIRectangle(int32_t x, int32_t y, int32_t width, int32_t height); + DiffractionExperiment& ClearROI(); + bool GetApplyROI() const; + void SetupROIFilter(ROIFilter& filter); }; inline int64_t CalculateStride(const std::chrono::microseconds &frame_time, const std::chrono::microseconds &preview_time) { diff --git a/grpc/jfjoch.proto b/grpc/jfjoch.proto index 72494130..6e5e8cd5 100644 --- a/grpc/jfjoch.proto +++ b/grpc/jfjoch.proto @@ -70,6 +70,13 @@ message Plot { repeated float y = 2; } +message ROIRectangle { + int32 x0 = 1; + int32 y0 = 2; + int32 width = 3; + int32 height = 4; +} + // DiffractionExperiment message DatasetSettings { @@ -183,6 +190,8 @@ message InternalSettings { string instrument_name = 34; string instrument_name_short = 35; + repeated ROIRectangle roi_rectangle = 36; + bool roi_apply = 37; } diff --git a/python/jfjoch_pb2.py b/python/jfjoch_pb2.py index 907cbe70..1b825c58 100644 --- a/python/jfjoch_pb2.py +++ b/python/jfjoch_pb2.py @@ -13,7 +13,7 @@ _sym_db = _symbol_database.Default() -DESCRIPTOR = _descriptor_pool.Default().AddSerializedFile(b'\n\x0cjfjoch.proto\x12\x0eJFJochProtoBuf\"\x07\n\x05\x45mpty\"W\n\x08UnitCell\x12\t\n\x01\x61\x18\x01 \x01(\x02\x12\t\n\x01\x62\x18\x02 \x01(\x02\x12\t\n\x01\x63\x18\x03 \x01(\x02\x12\r\n\x05\x61lpha\x18\x04 \x01(\x02\x12\x0c\n\x04\x62\x65ta\x18\x05 \x01(\x02\x12\r\n\x05gamma\x18\x06 \x01(\x02\")\n\x06Vector\x12\t\n\x01x\x18\x01 \x01(\x02\x12\t\n\x01y\x18\x02 \x01(\x02\x12\t\n\x01z\x18\x03 \x01(\x02\"|\n\x10RotationSettings\x12\x17\n\x0fstart_angle_deg\x18\x01 \x01(\x02\x12 \n\x18\x61ngle_incr_per_image_deg\x18\x02 \x01(\x02\x12-\n\rrotation_axis\x18\x03 \x01(\x0b\x32\x16.JFJochProtoBuf.Vector\"\x1c\n\x04Plot\x12\t\n\x01x\x18\x01 \x03(\x02\x12\t\n\x01y\x18\x02 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CHECK(v[4 * width + 2] == 55); CHECK(v[4 * width + 3] == 55); +} + +TEST_CASE("ROIFilter_DiffractionExperiment_ApplyROI") { + DiffractionExperiment x(DetectorGeometry(1)); + + REQUIRE(!x.GetApplyROI()); + x.ApplyROI(true); + REQUIRE(x.GetApplyROI()); + +} + +TEST_CASE("ROIFilter_DiffractionExperiment") { + DiffractionExperiment x(DetectorGeometry(1)); + x.Mode(DetectorMode::Raw); + + x.AddROIRectangle(0, 0, 1024, 1024); + x.ClearROI(); + x.AddROIRectangle(0, 0, 256, 256); + x.AddROIRectangle(768, 0, 256, 256); + + std::vector v(x.GetPixelsNum(), 1); + + ROIFilter filter(x.GetXPixelsNum(), x.GetYPixelsNum()); + x.SetupROIFilter(filter); + filter.Apply(v, (uint32_t) 55); + + CHECK(v[ 0*1024 + 0] == 1); + CHECK(v[ 0*1024 + 255] == 1); + CHECK(v[ 0*1024 + 256] == 55); + CHECK(v[ 0*1024 + 767] == 55); + CHECK(v[ 0*1024 + 768] == 1); + CHECK(v[128*1024 + 255] == 1); + CHECK(v[128*1024 + 256] == 55); + CHECK(v[255*1024 + 255] == 1); + CHECK(v[256*1024 + 255] == 55); + CHECK(v[255*1024 + 767] == 55); + CHECK(v[255*1024 + 768] == 1); } \ No newline at end of file From a43fa2a296eaaba8bda487d8d2665ac2c07bd4a5 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 26 Jun 2023 09:27:47 +0200 Subject: [PATCH 083/224] ProtoBuf: Don't use maps, as these don't preserve order of elements --- grpc/jfjoch.proto | 16 +++- python/jfjoch_pb2.py | 142 ++++++++++++++-------------- receiver/FPGAAcquisitionDevice.cpp | 33 ++++--- receiver/JFJochReceiver.cpp | 16 ++-- receiver/jfjoch_pcie_status.cpp | 18 ++-- tests/JFJochFullIntegrationTest.cpp | 22 +++-- 6 files changed, 136 insertions(+), 111 deletions(-) diff --git a/grpc/jfjoch.proto b/grpc/jfjoch.proto index 6e5e8cd5..6ace8760 100644 --- a/grpc/jfjoch.proto +++ b/grpc/jfjoch.proto @@ -25,7 +25,7 @@ enum DetectorMode { PEDESTAL_G2 = 4; }; -enum FPGAFIFOStatus { +enum FPGAFIFOStatusEnum { EMPTY = 0; FULL = 1; PARTIAL = 2; @@ -288,8 +288,13 @@ message PlotRequest { uint64 binning = 2; } +message RadialIntegrationProfile { + string title = 1; + Plot plot = 2; +} + message RadialIntegrationProfiles { - map plots = 1; + repeated RadialIntegrationProfile profiles = 1; } // Writer @@ -351,6 +356,11 @@ message DetectorStatus { string server_version = 3; } +message FPGAFIFOStatus { + string name = 1; + FPGAFIFOStatusEnum value = 2; +} + message FPGAStatus { uint64 packets_ether = 2; uint64 packets_udp = 3; @@ -363,7 +373,7 @@ message FPGAStatus { uint64 stalls_host = 10; bool ethernet_rx_aligned = 11; uint32 full_status_register = 13; - map fifo_status = 14; + repeated FPGAFIFOStatus fifo_status = 14; uint64 max_modules = 15; uint32 git_sha1 = 16; uint32 mailbox_err_reg = 17; diff --git a/python/jfjoch_pb2.py b/python/jfjoch_pb2.py index 1b825c58..6ed73a93 100644 --- a/python/jfjoch_pb2.py +++ b/python/jfjoch_pb2.py @@ -13,29 +13,25 @@ _sym_db = _symbol_database.Default() -DESCRIPTOR = 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_builder.BuildMessageAndEnumDescriptors(DESCRIPTOR, globals()) _builder.BuildTopDescriptorsAndMessages(DESCRIPTOR, 'jfjoch_pb2', globals()) if _descriptor._USE_C_DESCRIPTORS == False: DESCRIPTOR._options = None - _RADIALINTEGRATIONPROFILES_PLOTSENTRY._options = None - _RADIALINTEGRATIONPROFILES_PLOTSENTRY._serialized_options = b'8\001' - _FPGASTATUS_FIFOSTATUSENTRY._options = None - _FPGASTATUS_FIFOSTATUSENTRY._serialized_options = b'8\001' - _COMPRESSION._serialized_start=9016 - _COMPRESSION._serialized_end=9100 - _DETECTORTYPE._serialized_start=9102 - _DETECTORTYPE._serialized_end=9141 - _DETECTORMODE._serialized_start=9143 - _DETECTORMODE._serialized_end=9233 - _FPGAFIFOSTATUS._serialized_start=9235 - _FPGAFIFOSTATUS._serialized_end=9285 - _STATE._serialized_start=9287 - _STATE._serialized_end=9381 - _PLOTTYPE._serialized_start=9383 - _PLOTTYPE._serialized_end=9487 + _COMPRESSION._serialized_start=9005 + _COMPRESSION._serialized_end=9089 + _DETECTORTYPE._serialized_start=9091 + _DETECTORTYPE._serialized_end=9130 + _DETECTORMODE._serialized_start=9132 + _DETECTORMODE._serialized_end=9222 + _FPGAFIFOSTATUSENUM._serialized_start=9224 + _FPGAFIFOSTATUSENUM._serialized_end=9278 + _STATE._serialized_start=9280 + _STATE._serialized_end=9374 + _PLOTTYPE._serialized_start=9376 + _PLOTTYPE._serialized_end=9480 _EMPTY._serialized_start=32 _EMPTY._serialized_end=39 _UNITCELL._serialized_start=41 @@ -84,60 +80,60 @@ if _descriptor._USE_C_DESCRIPTORS == False: _RECEIVERSTATUS._serialized_end=4406 _PLOTREQUEST._serialized_start=4408 _PLOTREQUEST._serialized_end=4478 - _RADIALINTEGRATIONPROFILES._serialized_start=4481 - _RADIALINTEGRATIONPROFILES._serialized_end=4645 - _RADIALINTEGRATIONPROFILES_PLOTSENTRY._serialized_start=4579 - _RADIALINTEGRATIONPROFILES_PLOTSENTRY._serialized_end=4645 - _WRITERINPUT._serialized_start=4647 - _WRITERINPUT._serialized_end=4709 - _DATAFILESTATISTICS._serialized_start=4711 - _DATAFILESTATISTICS._serialized_end=4762 - _WRITEROUTPUT._serialized_start=4765 - _WRITEROUTPUT._serialized_end=4906 - _DETECTORMODULECONFIG._serialized_start=4909 - _DETECTORMODULECONFIG._serialized_end=5167 - _DETECTORCONFIG._serialized_start=5169 - _DETECTORCONFIG._serialized_end=5265 - _DETECTORINPUT._serialized_start=5268 - _DETECTORINPUT._serialized_end=5517 - _DETECTOROUTPUT._serialized_start=5519 - _DETECTOROUTPUT._serialized_end=5535 - _DETECTORSTATUS._serialized_start=5537 - _DETECTORSTATUS._serialized_end=5635 - _FPGASTATUS._serialized_start=5638 - _FPGASTATUS._serialized_end=6694 - _FPGASTATUS_FIFOSTATUSENTRY._serialized_start=6613 - _FPGASTATUS_FIFOSTATUSENTRY._serialized_end=6694 - _DATAPROCESSINGSETTINGS._serialized_start=6697 - _DATAPROCESSINGSETTINGS._serialized_end=7043 - _PREVIEWFRAMESPOT._serialized_start=7045 - _PREVIEWFRAMESPOT._serialized_end=7102 - _PREVIEWFRAME._serialized_start=7105 - _PREVIEWFRAME._serialized_end=7423 - _MODULESTATISTICS._serialized_start=7426 - _MODULESTATISTICS._serialized_end=7663 - _IMAGE._serialized_start=7665 - _IMAGE._serialized_end=7738 - _MASKTOLOAD._serialized_start=7740 - _MASKTOLOAD._serialized_end=7786 - _MEASUREMENTSTATISTICS._serialized_start=7789 - _MEASUREMENTSTATISTICS._serialized_end=8402 - _BROKERSTATUS._serialized_start=8405 - _BROKERSTATUS._serialized_end=8620 - _BROKERFULLSTATUS._serialized_start=8623 - _BROKERFULLSTATUS._serialized_end=8787 - _DETECTORLISTELEMENT._serialized_start=8789 - _DETECTORLISTELEMENT._serialized_end=8861 - _DETECTORLIST._serialized_start=8863 - _DETECTORLIST._serialized_end=8981 - _DETECTORSELECTION._serialized_start=8983 - _DETECTORSELECTION._serialized_end=9014 - _GRPC_JFJOCHRECEIVER._serialized_start=9490 - _GRPC_JFJOCHRECEIVER._serialized_end=10257 - _GRPC_JFJOCHWRITER._serialized_start=10260 - _GRPC_JFJOCHWRITER._serialized_end=10462 - _GRPC_JFJOCHDETECTOR._serialized_start=10465 - _GRPC_JFJOCHDETECTOR._serialized_end=10851 - _GRPC_JFJOCHBROKER._serialized_start=10854 - _GRPC_JFJOCHBROKER._serialized_end=12543 + _RADIALINTEGRATIONPROFILE._serialized_start=4480 + _RADIALINTEGRATIONPROFILE._serialized_end=4557 + _RADIALINTEGRATIONPROFILES._serialized_start=4559 + _RADIALINTEGRATIONPROFILES._serialized_end=4646 + _WRITERINPUT._serialized_start=4648 + _WRITERINPUT._serialized_end=4710 + _DATAFILESTATISTICS._serialized_start=4712 + _DATAFILESTATISTICS._serialized_end=4763 + _WRITEROUTPUT._serialized_start=4766 + _WRITEROUTPUT._serialized_end=4907 + _DETECTORMODULECONFIG._serialized_start=4910 + _DETECTORMODULECONFIG._serialized_end=5168 + _DETECTORCONFIG._serialized_start=5170 + _DETECTORCONFIG._serialized_end=5266 + _DETECTORINPUT._serialized_start=5269 + _DETECTORINPUT._serialized_end=5518 + _DETECTOROUTPUT._serialized_start=5520 + _DETECTOROUTPUT._serialized_end=5536 + _DETECTORSTATUS._serialized_start=5538 + _DETECTORSTATUS._serialized_end=5636 + _FPGAFIFOSTATUS._serialized_start=5638 + _FPGAFIFOSTATUS._serialized_end=5719 + _FPGASTATUS._serialized_start=5722 + _FPGASTATUS._serialized_end=6683 + _DATAPROCESSINGSETTINGS._serialized_start=6686 + _DATAPROCESSINGSETTINGS._serialized_end=7032 + _PREVIEWFRAMESPOT._serialized_start=7034 + _PREVIEWFRAMESPOT._serialized_end=7091 + _PREVIEWFRAME._serialized_start=7094 + _PREVIEWFRAME._serialized_end=7412 + _MODULESTATISTICS._serialized_start=7415 + _MODULESTATISTICS._serialized_end=7652 + _IMAGE._serialized_start=7654 + _IMAGE._serialized_end=7727 + _MASKTOLOAD._serialized_start=7729 + _MASKTOLOAD._serialized_end=7775 + _MEASUREMENTSTATISTICS._serialized_start=7778 + _MEASUREMENTSTATISTICS._serialized_end=8391 + _BROKERSTATUS._serialized_start=8394 + _BROKERSTATUS._serialized_end=8609 + _BROKERFULLSTATUS._serialized_start=8612 + _BROKERFULLSTATUS._serialized_end=8776 + _DETECTORLISTELEMENT._serialized_start=8778 + _DETECTORLISTELEMENT._serialized_end=8850 + _DETECTORLIST._serialized_start=8852 + _DETECTORLIST._serialized_end=8970 + _DETECTORSELECTION._serialized_start=8972 + _DETECTORSELECTION._serialized_end=9003 + _GRPC_JFJOCHRECEIVER._serialized_start=9483 + _GRPC_JFJOCHRECEIVER._serialized_end=10250 + _GRPC_JFJOCHWRITER._serialized_start=10253 + _GRPC_JFJOCHWRITER._serialized_end=10455 + _GRPC_JFJOCHDETECTOR._serialized_start=10458 + _GRPC_JFJOCHDETECTOR._serialized_end=10844 + _GRPC_JFJOCHBROKER._serialized_start=10847 + _GRPC_JFJOCHBROKER._serialized_end=12536 # @@protoc_insertion_point(module_scope) diff --git a/receiver/FPGAAcquisitionDevice.cpp b/receiver/FPGAAcquisitionDevice.cpp index b05abb72..eac7e96f 100644 --- a/receiver/FPGAAcquisitionDevice.cpp +++ b/receiver/FPGAAcquisitionDevice.cpp @@ -156,12 +156,19 @@ ActionConfig FPGAAcquisitionDevice::ReadActionRegister() { return cfg; } -inline JFJochProtoBuf::FPGAFIFOStatus FIFO_check(uint32_t fifo_register, uint16_t pos_empty, uint16_t pos_full) { +inline void FIFO_check(JFJochProtoBuf::FPGAStatus &fpga_status, + const std::string &name, + uint32_t fifo_register, + uint16_t pos_empty, + uint16_t pos_full) { + auto fifo_status = fpga_status.add_fifo_status(); + fifo_status->set_name(name); + if (std::bitset<32>(fifo_register).test(pos_empty)) - return JFJochProtoBuf::FPGAFIFOStatus::EMPTY; + fifo_status->set_value(JFJochProtoBuf::FPGAFIFOStatusEnum::EMPTY); if (std::bitset<32>(fifo_register).test(pos_full)) - return JFJochProtoBuf::FPGAFIFOStatus::FULL; - return JFJochProtoBuf::FPGAFIFOStatus::PARTIAL; + fifo_status->set_value(JFJochProtoBuf::FPGAFIFOStatusEnum::FULL); + fifo_status->set_value(JFJochProtoBuf::FPGAFIFOStatusEnum::PARTIAL); } JFJochProtoBuf::FPGAStatus FPGAAcquisitionDevice::GetStatus() const { @@ -182,15 +189,15 @@ JFJochProtoBuf::FPGAStatus FPGAAcquisitionDevice::GetStatus() const { ret.set_max_modules(status.max_modules); ret.set_git_sha1(status.git_sha1); - (*ret.mutable_fifo_status())["Conversion input (data)"] = FIFO_check(status.fifo_status, 0, 1); - (*ret.mutable_fifo_status())["Conversion input (cmd)"] = FIFO_check(status.fifo_status, 2, 3); - (*ret.mutable_fifo_status())["UDP"] = FIFO_check(status.fifo_status, 6, 7); - (*ret.mutable_fifo_status())["Work Request"] = FIFO_check(status.fifo_status, 12, 13); - (*ret.mutable_fifo_status())["Work Completion"] = FIFO_check(status.fifo_status, 14, 15); - (*ret.mutable_fifo_status())["Host mem (data)"] = FIFO_check(status.fifo_status, 8, 9); - (*ret.mutable_fifo_status())["Host mem (cmd)"] = FIFO_check(status.fifo_status, 10, 11); - (*ret.mutable_fifo_status())["Data FIFO #8"] = FIFO_check(status.fifo_status, 16, 17); - (*ret.mutable_fifo_status())["Addr FIFO #3"] = FIFO_check(status.fifo_status, 18, 19); + FIFO_check(ret, "Conversion input (data)", status.fifo_status, 0, 1); + FIFO_check(ret, "Conversion input (cmd)", status.fifo_status, 2, 3); + FIFO_check(ret, "UDP", status.fifo_status, 6, 7); + FIFO_check(ret, "Work Request", status.fifo_status, 12, 13); + FIFO_check(ret, "Work Completion", status.fifo_status, 14, 15); + FIFO_check(ret, "Host mem (data)", status.fifo_status, 8, 9); + FIFO_check(ret, "Host mem (cmd)", status.fifo_status, 10, 11); + FIFO_check(ret, "Data FIFO #8", status.fifo_status, 16, 17); + FIFO_check(ret, "Addr FIFO #3", status.fifo_status, 18, 19); ret.set_fpga_idle(HW_IsIdle()); diff --git a/receiver/JFJochReceiver.cpp b/receiver/JFJochReceiver.cpp index f9a53769..bda0b76b 100644 --- a/receiver/JFJochReceiver.cpp +++ b/receiver/JFJochReceiver.cpp @@ -703,13 +703,17 @@ JFJochProtoBuf::Plot JFJochReceiver::GetPlots(const JFJochProtoBuf::PlotRequest JFJochProtoBuf::RadialIntegrationProfiles JFJochReceiver::GetRadialIntegrationProfiles() { JFJochProtoBuf::RadialIntegrationProfiles ret; - auto &map = *ret.mutable_plots(); + if (rad_int_profile) { + auto p = ret.add_profiles(); + p->set_title("dataset"); + rad_int_profile->GetPlot(*p->mutable_plot()); + } - if (rad_int_profile) - rad_int_profile->GetPlot(map["dataset"]); - - for (int i = 0; i < rad_int_profile_per_file.size(); i++) - rad_int_profile_per_file[i]->GetPlot(map["file" + std::to_string(i)]); + for (int i = 0; i < rad_int_profile_per_file.size(); i++) { + auto p = ret.add_profiles(); + p->set_title("file" + std::to_string(i)); + rad_int_profile_per_file[i]->GetPlot(*p->mutable_plot()); + } return ret; } diff --git a/receiver/jfjoch_pcie_status.cpp b/receiver/jfjoch_pcie_status.cpp index aa99937d..0973b57c 100644 --- a/receiver/jfjoch_pcie_status.cpp +++ b/receiver/jfjoch_pcie_status.cpp @@ -51,19 +51,21 @@ int main(int argc, char **argv) { std::cout << "Frames int. pkt. gen. " << std::dec << cfg.nframes << std::endl; std::cout << std::endl; std::cout << "FPGA FIFO status: " << std::endl; - for (const auto &[x,y]: status.fifo_status()) { - std::string s = x; + for (const auto &i: status.fifo_status()) { + std::string s = i.name(); s.resize(28, ' '); - switch (y) { - case JFJochProtoBuf::FPGAFIFOStatus::PARTIAL: - s += "Partial"; - break; - case JFJochProtoBuf::FPGAFIFOStatus::EMPTY: + switch (i.value()) { + case JFJochProtoBuf::FPGAFIFOStatusEnum::EMPTY: s += "Empty"; break; - case JFJochProtoBuf::FPGAFIFOStatus::FULL: + case JFJochProtoBuf::FPGAFIFOStatusEnum::FULL: s += "Full"; break; + case JFJochProtoBuf::FPGAFIFOStatusEnum::PARTIAL: + s += "Partial"; + break; + default: + break; } std::cout << s << std::endl; } diff --git a/tests/JFJochFullIntegrationTest.cpp b/tests/JFJochFullIntegrationTest.cpp index d84ba047..950658a1 100644 --- a/tests/JFJochFullIntegrationTest.cpp +++ b/tests/JFJochFullIntegrationTest.cpp @@ -1493,14 +1493,20 @@ TEST_CASE("JFJochIntegrationTest_ZMQ_lysozyme_rad_int", "[JFJochReceiver]") { logger.Info("Stopped measurement"); auto rad_int = state_machine.GetRadialIntegrationProfiles(); - REQUIRE(rad_int.plots_size() == 4+1); - auto &plot_map = rad_int.plots(); - REQUIRE(plot_map.at("file0").x_size() == 3); - REQUIRE(plot_map.at("file0").y_size() == 3); - REQUIRE(plot_map.at("file3").x_size() == 3); - REQUIRE(plot_map.at("file3").y_size() == 3); - REQUIRE(plot_map.at("file3").x(0) == Approx(1.0)); - REQUIRE(plot_map.at("dataset").x_size() == 3); + REQUIRE(rad_int.profiles_size() == 4+1); + auto &plot_map = rad_int.profiles(); + + CHECK(plot_map[1].title() == "file0"); + CHECK(plot_map[1].plot().x_size() == 3); + CHECK(plot_map[1].plot().y_size() == 3); + + CHECK(plot_map[4].title() == "file3"); + REQUIRE(plot_map[4].plot().x_size() == 3); + CHECK(plot_map[4].plot().x(0) == Approx(1.0)); + CHECK(plot_map[4].plot().y_size() == 3); + + CHECK(plot_map[0].title() == "dataset"); + CHECK(plot_map[0].plot().x_size() == 3); fpga_receiver_server->Shutdown(); writer_server->Shutdown(); From e0bf111941912f246c8ac3bbc962ae7094f0d003 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 26 Jun 2023 09:58:10 +0200 Subject: [PATCH 084/224] JFJochReceiverClient: Generate dummy plots for radial_integration_profile --- grpc/JFJochReceiverClient.cpp | 51 +++++++++++++++++++++++++++++++++-- grpc/JFJochReceiverClient.h | 2 ++ 2 files changed, 51 insertions(+), 2 deletions(-) diff --git a/grpc/JFJochReceiverClient.cpp b/grpc/JFJochReceiverClient.cpp index 25c88f4e..0ef4eb90 100644 --- a/grpc/JFJochReceiverClient.cpp +++ b/grpc/JFJochReceiverClient.cpp @@ -154,8 +154,55 @@ JFJochProtoBuf::RadialIntegrationProfiles JFJochReceiverClient::GetRadialIntegra if (!status.ok()) throw JFJochException(JFJochExceptionCategory::gRPCError, "JFJochReceiver: " + status.error_message()); } else { - // TODO: Write some dummy plots + auto p = ret.add_profiles(); + p->set_title("dataset"); + *p->mutable_plot() = GenerateGaussianPlot(50, 0.1, 2.5, 0.2); + + p = ret.add_profiles(); + p->set_title("file0"); + *p->mutable_plot() = GenerateGaussianPlot(50, 0.1, 3.0, 0.2); + + p = ret.add_profiles(); + p->set_title("file1"); + *p->mutable_plot() = GenerateGaussianPlot(50, 0.1, 2.0, 0.2); + + p = ret.add_profiles(); + p->set_title("file2"); + *p->mutable_plot() = GenerateGaussianPlot(50, 0.1, 2.5, 0.1); + + p = ret.add_profiles(); + p->set_title("file3"); + *p->mutable_plot() = GenerateGaussianPlot(50, 0.1, 2.5, 0.5); + + for (int i = 4; i < 16; i++) { + p = ret.add_profiles(); + p->set_title("file" + std::to_string(i)); + *p->mutable_plot() = GenerateGaussianPlot(50, 0.1, 2.3, 0.1 + 0.02 * i); + } + } return ret; -} \ No newline at end of file +} + +JFJochProtoBuf::Plot JFJochReceiverClient::GenerateGaussianPlot(uint64_t n_elements, float spacing, float mean, float std) { + + std::vector x(n_elements); + std::vector y(n_elements); + + constexpr float inv_sqrt_2pi = 0.3989422804; + + for (int i = 0; i < n_elements; i++) { + x[i] = spacing * i; + float a = (x[i] - mean) / std; + y[i] = inv_sqrt_2pi / std * expf(-0.5f * a * a);; + } + + JFJochProtoBuf::Plot ret; + if (n_elements > 0) { + *ret.mutable_x() = {x.begin(), x.end()}; + *ret.mutable_y() = {y.begin(), y.end()}; + } + return ret; +} + diff --git a/grpc/JFJochReceiverClient.h b/grpc/JFJochReceiverClient.h index cc939bfe..401a6f37 100644 --- a/grpc/JFJochReceiverClient.h +++ b/grpc/JFJochReceiverClient.h @@ -12,6 +12,8 @@ class JFJochReceiverClient { std::unique_ptr _stub; + + static JFJochProtoBuf::Plot GenerateGaussianPlot(uint64_t n_elements, float spacing, float max, float std); public: void Connect(const std::string& addr); void Start(const DiffractionExperiment &experiment, const JFCalibration *calibration); From da9fc9570aa82caa03660627725d6cda4fb84bf7 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 26 Jun 2023 11:03:05 +0200 Subject: [PATCH 085/224] FrontEnd: Improvements for radial integration plots --- .../src/components/DataProcessingPlots.tsx | 24 +++-- .../src/components/DataProcessingSettings.tsx | 2 +- .../src/components/MultiLinePlotWrapper.js | 22 +++++ .../RadialIntegrationProfilePlots.tsx | 98 +++++++++++++++++++ 4 files changed, 137 insertions(+), 9 deletions(-) create mode 100644 frontend_ui/src/components/MultiLinePlotWrapper.js create mode 100644 frontend_ui/src/components/RadialIntegrationProfilePlots.tsx diff --git a/frontend_ui/src/components/DataProcessingPlots.tsx b/frontend_ui/src/components/DataProcessingPlots.tsx index e7dfc31c..5ae10905 100644 --- a/frontend_ui/src/components/DataProcessingPlots.tsx +++ b/frontend_ui/src/components/DataProcessingPlots.tsx @@ -6,7 +6,7 @@ import DataProcessingPlot from "./DataProcessingPlot"; import Toolbar from "@mui/material/Toolbar"; import MenuItem from "@mui/material/MenuItem"; import FormControl from "@mui/material/FormControl"; -import InputLabel from "@mui/material/InputLabel"; +import RadialIntegrationProfilePlots from "./RadialIntegrationProfilePlots"; import Select, {SelectChangeEvent} from "@mui/material/Select"; type MyProps = { @@ -50,11 +50,14 @@ class DataProcessingPlots extends Component { this.setState({type: "SPOT_COUNT", xlabel: "Image number", ylabel: "Spot count" }); break; case 3: - this.setState({type: "RAD_INT", xlabel: "Q [A^-1]", ylabel: "Photon count"}); + this.setState({type: "RAD_INT", xlabel: "Q [A-1]", ylabel: "Photon count"}); break; case 4: this.setState({type: "INDEXING_RATE_PER_FILE", xlabel: "File number", ylabel: "Indexing rate"}); break; + case 5: + this.setState({type: "RAD_INT_PER_FILE", xlabel: "Q [A^-1]", ylabel: "Photon count"}); + break; } } @@ -63,14 +66,15 @@ class DataProcessingPlots extends Component { }; render() { - return + return - + - + + @@ -94,9 +98,13 @@ class DataProcessingPlots extends Component { - - + + { + (this.state.type === "RAD_INT_PER_FILE") ? + : + + } } diff --git a/frontend_ui/src/components/DataProcessingSettings.tsx b/frontend_ui/src/components/DataProcessingSettings.tsx index 49e634ee..38c560d5 100644 --- a/frontend_ui/src/components/DataProcessingSettings.tsx +++ b/frontend_ui/src/components/DataProcessingSettings.tsx @@ -120,7 +120,7 @@ class DataProcessingSettings extends Component { } render() { - return + return diff --git a/frontend_ui/src/components/MultiLinePlotWrapper.js b/frontend_ui/src/components/MultiLinePlotWrapper.js new file mode 100644 index 00000000..ec1dca80 --- /dev/null +++ b/frontend_ui/src/components/MultiLinePlotWrapper.js @@ -0,0 +1,22 @@ +import React, {Component} from 'react'; + +import Plot from "react-plotly.js"; + +// Not using TypeScript, as plotly is not TypeScript :( + +class MultiLinePlotWrapper extends Component { + render() { + return + } +} + +export default MultiLinePlotWrapper; \ No newline at end of file diff --git a/frontend_ui/src/components/RadialIntegrationProfilePlots.tsx b/frontend_ui/src/components/RadialIntegrationProfilePlots.tsx new file mode 100644 index 00000000..f3b79f50 --- /dev/null +++ b/frontend_ui/src/components/RadialIntegrationProfilePlots.tsx @@ -0,0 +1,98 @@ +import React, {Component} from 'react'; + +import MultiLinePlotWrapper from "./MultiLinePlotWrapper"; +import {handleErrors} from "./handleErrors"; + +type MyProps = { + addr: string; +}; + +type Plot = { + x: number[], + y: number[] +} + +type RadialProfile = { + plot: Plot, + title: string +} + +type RadialProfiles = RadialProfile[] + +type PlotlyPlot = { + x: number[], + y: number[], + type: string, + mode: string, + name: string +} + +type PlotlyData = PlotlyPlot[] + +type MyState = { + profiles : RadialProfiles, + connection_error: boolean +} + +class RadialIntegrationProfilePlots extends Component { + addr: string; + interval: undefined | NodeJS.Timer; + + state: MyState = { + profiles: [ + { + plot: { + x: [0, 100, 200, 300, 400, 500], + y: [0.1, 0.3, 0.5, 0.2, 0.0, 0.1] + }, + title: "dataset" + } + ], + connection_error: true + } + + constructor(props: MyProps) { + super(props); + this.addr = props.addr; + } + + getValues() { + fetch(this.addr + 'data_processing/rad_int_profiles', { + method: "GET" + }).then(handleErrors) + .then(res => res.json()) + .then(data => this.setState({profiles: data.profiles, connection_error: false})) + .catch(error => { + console.log(error); + this.setState({connection_error: true}); + }); + } + componentDidMount() { + this.getValues(); + this.interval = setInterval(() => this.getValues(), 500); + } + + componentWillUnmount() { + clearInterval(this.interval); + } + + render() { + if (this.state.profiles !== undefined) { + let data: PlotlyData = []; + this.state.profiles.map(d => + data.push({ + x: d.plot.x, + y: d.plot.y, + type: "scatter", + mode: "line", + name: d.title + })); + + console.log(data); + return + } else + return
; + } +} + +export default RadialIntegrationProfilePlots; \ No newline at end of file From 2a29c09a1ad1a04c3e5749db61ceec8234915a2b Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 26 Jun 2023 14:30:59 +0200 Subject: [PATCH 086/224] JFJochReceiverClient: Minor fix --- grpc/JFJochReceiverClient.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/grpc/JFJochReceiverClient.cpp b/grpc/JFJochReceiverClient.cpp index 0ef4eb90..4294dc0b 100644 --- a/grpc/JFJochReceiverClient.cpp +++ b/grpc/JFJochReceiverClient.cpp @@ -182,7 +182,6 @@ JFJochProtoBuf::RadialIntegrationProfiles JFJochReceiverClient::GetRadialIntegra } return ret; - } JFJochProtoBuf::Plot JFJochReceiverClient::GenerateGaussianPlot(uint64_t n_elements, float spacing, float mean, float std) { From 04a2e9d20cb2abdf658629571107f99dc187330c Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 26 Jun 2023 14:32:46 +0200 Subject: [PATCH 087/224] DetectorWrapper: Clear synchronization prior to reconfiguring the detector --- detector_control/DetectorWrapper.cpp | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/detector_control/DetectorWrapper.cpp b/detector_control/DetectorWrapper.cpp index cbaf5b9d..b1391f0d 100644 --- a/detector_control/DetectorWrapper.cpp +++ b/detector_control/DetectorWrapper.cpp @@ -12,6 +12,11 @@ void DetectorWrapper::Configure(const JFJochProtoBuf::DetectorConfig &request) { try { if (det.size() > 0) InternalStop(); + + // Clear synchronization prior to reconfiguring the detector + det.setMaster(false, 0); + det.setSynchronization(false); + if (request.module_hostname_size() > 0) { std::vector module_hostname; for (const auto &iter: request.module_hostname()) From d831300d14c46ec83916db2760d5d6ea436d41c5 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 27 Jun 2023 14:52:18 +0200 Subject: [PATCH 088/224] JFJochFrameSerializer: Generalize 2D arrays for floats --- common/ImagePusher.cpp | 1 + frame_serialize/ImageMessage.h | 1 + frame_serialize/JFJochFrameDeserializer.cpp | 11 ++++ frame_serialize/JFJochFrameSerializer.cpp | 66 ++++++++++----------- tests/CBORTest.cpp | 60 +++++++++++++++++++ 5 files changed, 105 insertions(+), 34 deletions(-) diff --git a/common/ImagePusher.cpp b/common/ImagePusher.cpp index 64c9f54f..66926b71 100644 --- a/common/ImagePusher.cpp +++ b/common/ImagePusher.cpp @@ -12,6 +12,7 @@ void PrepareCBORImage(DataMessage& message, message.image.ypixel = experiment.GetYPixelsNum(); message.image.pixel_depth_bytes = experiment.GetPixelDepth(); message.image.pixel_is_signed = experiment.IsPixelSigned(); + message.image.pixel_is_float = false; message.image.algorithm = experiment.GetCompressionAlgorithmEnum(); message.image.channel = "default"; } diff --git a/frame_serialize/ImageMessage.h b/frame_serialize/ImageMessage.h index ca0c54bf..741e668f 100644 --- a/frame_serialize/ImageMessage.h +++ b/frame_serialize/ImageMessage.h @@ -18,6 +18,7 @@ struct CBORImage { size_t ypixel; size_t pixel_depth_bytes; bool pixel_is_signed; + bool pixel_is_float = false; CompressionAlgorithm algorithm; std::string channel; }; diff --git a/frame_serialize/JFJochFrameDeserializer.cpp b/frame_serialize/JFJochFrameDeserializer.cpp index d1a5acf2..72574490 100644 --- a/frame_serialize/JFJochFrameDeserializer.cpp +++ b/frame_serialize/JFJochFrameDeserializer.cpp @@ -184,29 +184,40 @@ inline void GetCBORTypedArray(CBORImage &v, CborValue &value) { CborTag tag = GetCBORTag(value); switch (tag) { + case TagFloatLE: + v.pixel_is_signed = true; + v.pixel_depth_bytes = sizeof(float); + v.pixel_is_float = true; + break; case TagSignedInt8Bit: v.pixel_is_signed = true; v.pixel_depth_bytes = 1; + v.pixel_is_float = false; break; case TagUnsignedInt8Bit: v.pixel_is_signed = false; v.pixel_depth_bytes = 1; + v.pixel_is_float = false; break; case TagSignedInt16BitLE: v.pixel_is_signed = true; v.pixel_depth_bytes = 2; + v.pixel_is_float = false; break; case TagUnsignedInt16BitLE: v.pixel_is_signed = false; v.pixel_depth_bytes = 2; + v.pixel_is_float = false; break; case TagSignedInt32BitLE: v.pixel_is_signed = true; v.pixel_depth_bytes = 4; + v.pixel_is_float = false; break; case TagUnsignedInt32BitLE: v.pixel_is_signed = false; v.pixel_depth_bytes = 4; + v.pixel_is_float = false; break; default: throw JFJochException(JFJochExceptionCategory::CBORError, diff --git a/frame_serialize/JFJochFrameSerializer.cpp b/frame_serialize/JFJochFrameSerializer.cpp index 5db632fd..92747332 100644 --- a/frame_serialize/JFJochFrameSerializer.cpp +++ b/frame_serialize/JFJochFrameSerializer.cpp @@ -78,41 +78,43 @@ void CBOR_ENC_COMPRESSED(CborEncoder &encoder, } } -inline void CBOR_ENC_MULTIDIM_TYPED_ARRAY(CborEncoder &encoder, const char* key, - const void *image, size_t image_size, - size_t xpixel, size_t ypixel, CompressionAlgorithm algorithm, - size_t elem_size, bool elem_sign) { +inline void CBOR_ENC_2D_TYPED_ARRAY(CborEncoder &encoder, const CBORImage& image) { //if ((algorithm == CompressionAlgorithm::NO_COMPRESSION) && (xpixel * ypixel != image_size / elem_size)) // throw JFJochException(JFJochExceptionCategory::CBORError, "Mismatch in array size"); CborEncoder arrayEncoder, arrayEncoder_2; - cborErr(cbor_encode_text_stringz(&encoder, key)); + cborErr(cbor_encode_text_stringz(&encoder, image.channel.c_str())); cbor_encode_tag(&encoder, TagMultiDimArray); cborErr(cbor_encoder_create_array(&encoder, &arrayEncoder, 2)); cborErr(cbor_encoder_create_array(&arrayEncoder, &arrayEncoder_2, 2)); - cborErr(cbor_encode_uint(&arrayEncoder_2, ypixel)); - cborErr(cbor_encode_uint(&arrayEncoder_2, xpixel)); + cborErr(cbor_encode_uint(&arrayEncoder_2, image.ypixel)); + cborErr(cbor_encode_uint(&arrayEncoder_2, image.xpixel)); cborErr(cbor_encoder_close_container(&arrayEncoder, &arrayEncoder_2)); CborTag typed_array_tag; - if (elem_sign) { - if (elem_size == 4) + if (image.pixel_is_float) { + if (image.pixel_depth_bytes == 4) + typed_array_tag = TagFloatLE; + else + throw JFJochException(JFJochExceptionCategory::CBORError, "Array size not supported"); + } else if (image.pixel_is_signed) { + if (image.pixel_depth_bytes == 4) typed_array_tag = TagSignedInt32BitLE; - else if (elem_size == 2) + else if (image.pixel_depth_bytes == 2) typed_array_tag = TagSignedInt16BitLE; - else if (elem_size == 1) + else if (image.pixel_depth_bytes == 1) typed_array_tag = TagSignedInt8Bit; else throw JFJochException(JFJochExceptionCategory::CBORError, "Array size not supported"); } else { - if (elem_size == 4) + if (image.pixel_depth_bytes == 4) typed_array_tag = TagUnsignedInt32BitLE; - else if (elem_size == 2) + else if (image.pixel_depth_bytes == 2) typed_array_tag = TagUnsignedInt16BitLE; - else if (elem_size == 1) + else if (image.pixel_depth_bytes == 1) typed_array_tag = TagUnsignedInt8Bit; else throw JFJochException(JFJochExceptionCategory::CBORError, "Array size not supported"); @@ -120,7 +122,7 @@ inline void CBOR_ENC_MULTIDIM_TYPED_ARRAY(CborEncoder &encoder, const char* key, cbor_encode_tag(&arrayEncoder, typed_array_tag); - CBOR_ENC_COMPRESSED(arrayEncoder, image, image_size, algorithm, elem_size); + CBOR_ENC_COMPRESSED(arrayEncoder, image.data, image.size, image.algorithm, image.pixel_depth_bytes); cborErr(cbor_encoder_close_container(&encoder, &arrayEncoder)); } @@ -130,15 +132,20 @@ inline void CBOR_ENC_PIXEL_MASK(CborEncoder &encoder, const char* key, CborEncoder mapEncoder; cborErr(cbor_encode_text_stringz(&encoder, key)); cborErr(cbor_encoder_create_map(&encoder, &mapEncoder, pixel_mask.size())); - for (auto &[pixel_mask_key, pixel_mask_array]: pixel_mask) - CBOR_ENC_MULTIDIM_TYPED_ARRAY(mapEncoder, - pixel_mask_key.c_str(), - pixel_mask_array.data(), - pixel_mask_array.size() * sizeof(uint32_t), - xpixel, ypixel, - CompressionAlgorithm::NO_COMPRESSION, - sizeof(uint32_t), - false); + for (auto &[pixel_mask_key, pixel_mask_array]: pixel_mask) { + CBORImage image{ + .data = reinterpret_cast(pixel_mask_array.data()), + .size = pixel_mask_array.size() * sizeof(uint32_t), + .xpixel = xpixel, + .ypixel = ypixel, + .pixel_depth_bytes = sizeof(uint32_t), + .pixel_is_signed = false, + .pixel_is_float = false, + .algorithm = CompressionAlgorithm::NO_COMPRESSION, + .channel = pixel_mask_key + }; + CBOR_ENC_2D_TYPED_ARRAY(mapEncoder, image); + } cborErr(cbor_encoder_close_container(&encoder, &mapEncoder)); } @@ -195,16 +202,7 @@ inline void CBOR_ENC(CborEncoder &encoder, const char* key, const CBORImage& mes cborErr(cbor_encode_text_stringz(&encoder, key)); cborErr(cbor_encoder_create_map(&encoder, &mapEncoder, 1)); - CBOR_ENC_MULTIDIM_TYPED_ARRAY(mapEncoder, - message.channel.c_str(), - (uint8_t *) message.data, - message.size, - message.xpixel, - message.ypixel, - message.algorithm, - message.pixel_depth_bytes, - message.pixel_is_signed); - + CBOR_ENC_2D_TYPED_ARRAY(mapEncoder, message); cborErr(cbor_encoder_close_container(&encoder, &mapEncoder)); } diff --git a/tests/CBORTest.cpp b/tests/CBORTest.cpp index 2be10aae..e2fdc3ab 100644 --- a/tests/CBORTest.cpp +++ b/tests/CBORTest.cpp @@ -208,6 +208,7 @@ JFJochFrameSerializer serializer(buffer.data(), buffer.size()); .ypixel = 2, .pixel_depth_bytes = 2, .pixel_is_signed = true, + .pixel_is_float = false, .algorithm = CompressionAlgorithm::NO_COMPRESSION, .channel = "default" }; @@ -240,6 +241,7 @@ JFJochFrameSerializer serializer(buffer.data(), buffer.size()); REQUIRE(image_array.image.ypixel == 2); REQUIRE(image_array.image.pixel_depth_bytes == 2); REQUIRE(image_array.image.pixel_is_signed); + REQUIRE(!image_array.image.pixel_is_float); REQUIRE(image_array.image.channel == "default"); REQUIRE(image_array.image.size == test.size()); REQUIRE(image_array.indexing_result == message.indexing_result); @@ -274,6 +276,7 @@ JFJochFrameSerializer serializer(buffer.data(), buffer.size()); .ypixel = 512, .pixel_depth_bytes = 1, .pixel_is_signed = false, + .pixel_is_float = false, .algorithm = CompressionAlgorithm::NO_COMPRESSION, .channel = "default" }; @@ -297,6 +300,7 @@ JFJochFrameSerializer serializer(buffer.data(), buffer.size()); REQUIRE(image_array.image.ypixel == 512); REQUIRE(image_array.image.pixel_depth_bytes == 1); REQUIRE(!image_array.image.pixel_is_signed); + REQUIRE(!image_array.image.pixel_is_float); REQUIRE(image_array.image.channel == "default"); REQUIRE(image_array.image.size == test.size()); REQUIRE(image_array.indexing_result == message.indexing_result); @@ -305,6 +309,56 @@ JFJochFrameSerializer serializer(buffer.data(), buffer.size()); REQUIRE(memcmp(image_array.image.data, test.data(), test.size()) == 0); } +TEST_CASE("CBORSerialize_Image_Float", "[CBOR]") { + std::vector buffer(8*1024*1024); + JFJochFrameSerializer serializer(buffer.data(), buffer.size()); + + std::vector spots; + + std::vector test(512*1024); + for (int i = 0; i < test.size(); i++) + test[i] = i * 0.1f; + + CBORImage image { + .data = reinterpret_cast(test.data()), + .size = 1024 * 512 * sizeof(float), + .xpixel = 1024, + .ypixel = 512, + .pixel_depth_bytes = 4, + .pixel_is_signed = true, + .pixel_is_float = true, + .algorithm = CompressionAlgorithm::NO_COMPRESSION, + .channel = "default" + }; + + DataMessage message { + .number = 480, + .image = image, + .spots = spots, + .indexing_result = 3 + }; + + REQUIRE_NOTHROW(serializer.SerializeImage(message)); + + JFJochFrameDeserializer deserializer; + REQUIRE_NOTHROW(deserializer.Process(buffer.data(), serializer.GetBufferSize())); + REQUIRE(deserializer.GetType() == JFJochFrameDeserializer::Type::IMAGE); + + auto image_array = deserializer.GetDataMessage(); + REQUIRE(image_array.image.algorithm == CompressionAlgorithm::NO_COMPRESSION); + REQUIRE(image_array.image.xpixel == 1024); + REQUIRE(image_array.image.ypixel == 512); + REQUIRE(image_array.image.pixel_is_float); + REQUIRE(image_array.image.pixel_depth_bytes == 4); + REQUIRE(image_array.image.pixel_is_signed); + REQUIRE(image_array.image.channel == "default"); + REQUIRE(image_array.image.size == test.size() * sizeof(float)); + REQUIRE(image_array.indexing_result == message.indexing_result); + REQUIRE(image_array.receiver_available_send_buffers == message.receiver_available_send_buffers); + REQUIRE(image_array.number == 480); + REQUIRE(memcmp(image_array.image.data, test.data(), test.size() * sizeof(float)) == 0); +} + TEST_CASE("CBORSerialize_Image_Append", "[CBOR]") { std::vector buffer(8*1024*1024); JFJochFrameSerializer serializer(buffer.data(), buffer.size()); @@ -322,6 +376,7 @@ JFJochFrameSerializer serializer(buffer.data(), buffer.size()); .ypixel = 512, .pixel_depth_bytes = 1, .pixel_is_signed = false, + .pixel_is_float = false, .algorithm = CompressionAlgorithm::NO_COMPRESSION, .channel = "default" }; @@ -347,6 +402,7 @@ JFJochFrameSerializer serializer(buffer.data(), buffer.size()); REQUIRE(image_array.image.ypixel == 512); REQUIRE(image_array.image.pixel_depth_bytes == 1); REQUIRE(!image_array.image.pixel_is_signed); + REQUIRE(!image_array.image.pixel_is_float); REQUIRE(image_array.image.channel == "default"); REQUIRE(image_array.image.size == test.size()); REQUIRE(image_array.indexing_result == message.indexing_result); @@ -371,6 +427,7 @@ JFJochFrameSerializer serializer(buffer.data(), buffer.size()); .ypixel = 2, .pixel_depth_bytes = 4, .pixel_is_signed = true, + .pixel_is_float = false, .algorithm = CompressionAlgorithm::BSHUF_LZ4, .channel = "default" }; @@ -392,6 +449,7 @@ JFJochFrameSerializer serializer(buffer.data(), buffer.size()); REQUIRE(image_array.image.xpixel == 256); REQUIRE(image_array.image.ypixel == 2); REQUIRE(image_array.image.pixel_depth_bytes == 4); + REQUIRE(!image_array.image.pixel_is_float); REQUIRE(image_array.image.channel == "default"); REQUIRE(image_array.image.size == test.size()); REQUIRE(image_array.image.pixel_is_signed == true); @@ -630,6 +688,7 @@ JFJochFrameSerializer serializer(buffer.data(), buffer.size()); .ypixel = 512, .pixel_depth_bytes = 2, .pixel_is_signed = false, + .pixel_is_float = false, .algorithm = CompressionAlgorithm::BSHUF_LZ4, .channel = "default" }; @@ -681,6 +740,7 @@ JFJochFrameSerializer serializer(buffer.data(), buffer.size()); .ypixel = 512, .pixel_depth_bytes = 1, .pixel_is_signed = false, + .pixel_is_float = false, .algorithm = CompressionAlgorithm::NO_COMPRESSION, .channel = "default" }; From d2788a09fd8e818f092d619e509ffd072095060f Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 27 Jun 2023 16:20:47 +0200 Subject: [PATCH 089/224] JFJochFrameSerializer: Add calibration settings --- frame_serialize/JFJochFrameDeserializer.cpp | 16 ++++++ frame_serialize/JFJochFrameDeserializer.h | 1 + frame_serialize/JFJochFrameSerializer.cpp | 13 ++++- frame_serialize/StartMessage.h | 3 + tests/CBORTest.cpp | 63 +++++++++++++++++++++ 5 files changed, 95 insertions(+), 1 deletion(-) diff --git a/frame_serialize/JFJochFrameDeserializer.cpp b/frame_serialize/JFJochFrameDeserializer.cpp index 72574490..226c13b0 100644 --- a/frame_serialize/JFJochFrameDeserializer.cpp +++ b/frame_serialize/JFJochFrameDeserializer.cpp @@ -422,6 +422,20 @@ bool JFJochFrameDeserializer::ProcessImageMessageElement(CborValue &value) { } } +void JFJochFrameDeserializer::ProcessCalibration(CborValue &value) { + CborValue map_value; + cborErr(cbor_value_enter_container(&value, &map_value)); + while (! cbor_value_at_end(&map_value)) { + auto key = GetCBORString(map_value); + CBORImage image; + image.channel = key; + GetCBORMultidimTypedArray(image, map_value); + start_message.calibration.push_back(image); + } + cborErr(cbor_value_leave_container(&value, &map_value)); + +} + void JFJochFrameDeserializer::ProcessPixelMaskElement(CborValue &value) { CborValue map_value; cborErr(cbor_value_enter_container(&value, &map_value)); @@ -547,6 +561,8 @@ void JFJochFrameDeserializer::ProcessStartMessageUserDataElement(CborValue &valu throw JFJochException(JFJochExceptionCategory::CBORError, "Unsupported compression"); } else if (key == "compression_block_size") start_message.compression_block_size = GetCBORUInt(map_value); + else if (key == "calibration") + ProcessCalibration(map_value); else cbor_value_advance(&map_value); } diff --git a/frame_serialize/JFJochFrameDeserializer.h b/frame_serialize/JFJochFrameDeserializer.h index e78ce8d0..748b1948 100644 --- a/frame_serialize/JFJochFrameDeserializer.h +++ b/frame_serialize/JFJochFrameDeserializer.h @@ -36,6 +36,7 @@ private: GoniometerAxis ProcessGoniometer(CborValue &value); void ProcessDetTranslation(CborValue &value); + void ProcessCalibration(CborValue &value); void ProcessChannels(CborValue &value); void ProcessImageData(CborValue &value); void ProcessPixelMaskElement(CborValue &value); diff --git a/frame_serialize/JFJochFrameSerializer.cpp b/frame_serialize/JFJochFrameSerializer.cpp index 92747332..832eee07 100644 --- a/frame_serialize/JFJochFrameSerializer.cpp +++ b/frame_serialize/JFJochFrameSerializer.cpp @@ -265,11 +265,21 @@ inline void CBOR_ENC_UNIT_CELL(CborEncoder &encoder, const char* key, const floa cborErr(cbor_encoder_close_container(&encoder, &mapEncoder)); } +inline void CBOR_ENC(CborEncoder &encoder, const char* key, const std::vector &v) { + CborEncoder mapEncoder; + + cborErr(cbor_encode_text_stringz(&encoder, key)); + cborErr(cbor_encoder_create_map(&encoder, &mapEncoder, v.size())); + for (const auto &i: v) + CBOR_ENC_2D_TYPED_ARRAY(mapEncoder, i); + cborErr(cbor_encoder_close_container(&encoder, &mapEncoder)); +} + inline void CBOR_ENC_USER_DATA(CborEncoder &encoder, const StartMessage& message) { CborEncoder mapEncoder; cborErr(cbor_encode_text_stringz(&encoder, "user_data")); - cborErr(cbor_encoder_create_map(&encoder, &mapEncoder, 20)); + cborErr(cbor_encoder_create_map(&encoder, &mapEncoder, 21)); CBOR_ENC(mapEncoder, "file_prefix", message.file_prefix); CBOR_ENC(mapEncoder, "sample_name", message.sample_name); @@ -304,6 +314,7 @@ inline void CBOR_ENC_USER_DATA(CborEncoder &encoder, const StartMessage& message CBOR_ENC(mapEncoder, "rad_int_bin_to_q", message.rad_int_bin_to_q); CBOR_ENC(mapEncoder, "rad_int_solid_angle_corr", message.rad_int_solid_angle_corr); CBOR_ENC(mapEncoder, "summation", message.summation); + CBOR_ENC(mapEncoder, "calibration", message.calibration); cborErr(cbor_encoder_close_container(&encoder, &mapEncoder)); } diff --git a/frame_serialize/StartMessage.h b/frame_serialize/StartMessage.h index 870cdff9..cfa11c94 100644 --- a/frame_serialize/StartMessage.h +++ b/frame_serialize/StartMessage.h @@ -9,6 +9,7 @@ #include #include #include "../compression/CompressionAlgorithmEnum.h" +#include "ImageMessage.h" struct GoniometerAxis { float increment; @@ -80,6 +81,8 @@ struct StartMessage { std::vector rad_int_bin_to_q; std::vector rad_int_solid_angle_corr; + + std::vector calibration; }; #endif //JUNGFRAUJOCH_STARTMESSAGE_H diff --git a/tests/CBORTest.cpp b/tests/CBORTest.cpp index e2fdc3ab..a335a211 100644 --- a/tests/CBORTest.cpp +++ b/tests/CBORTest.cpp @@ -127,6 +127,69 @@ TEST_CASE("CBORSerialize_Start", "[CBOR]") { } + +TEST_CASE("CBORSerialize_Start_Calibration", "[CBOR]") { + std::vector buffer(8*1024*1024); + JFJochFrameSerializer serializer(buffer.data(), buffer.size()); + + std::vector calib1(256); + std::vector calib2(256); + + for (int i = 0; i < 256; i++) { + calib1[i] = i * 34.567; + calib2[i] = i * 76.33456; + } + + CBORImage image1 { + .data = reinterpret_cast(calib1.data()), + .size = 16 * 16 * sizeof(float), + .xpixel = 16, + .ypixel = 16, + .pixel_depth_bytes = 4, + .pixel_is_signed = true, + .pixel_is_float = true, + .algorithm = CompressionAlgorithm::NO_COMPRESSION, + .channel = "calib1" + }; + + + CBORImage image2 { + .data = reinterpret_cast(calib2.data()), + .size = 16 * 16 * sizeof(float), + .xpixel = 16, + .ypixel = 16, + .pixel_depth_bytes = 4, + .pixel_is_signed = true, + .pixel_is_float = true, + .algorithm = CompressionAlgorithm::NO_COMPRESSION, + .channel = "calib2" + }; + + StartMessage message { + .calibration = {image2, image1} + }; + + REQUIRE_NOTHROW(serializer.SerializeSequenceStart(message)); + + JFJochFrameDeserializer deserializer; + REQUIRE_NOTHROW(deserializer.Process(buffer.data(), serializer.GetBufferSize())); + REQUIRE(deserializer.GetType() == JFJochFrameDeserializer::Type::START); + + StartMessage output_message; + REQUIRE_NOTHROW(output_message = deserializer.GetStartMessage()); + REQUIRE(output_message.calibration.size() == 2); + CHECK(output_message.calibration[0].pixel_is_float); + CHECK(output_message.calibration[1].pixel_is_float); + CHECK(output_message.calibration[0].xpixel == 16); + CHECK(output_message.calibration[0].ypixel == 16); + CHECK(output_message.calibration[1].xpixel == 16); + CHECK(output_message.calibration[1].ypixel == 16); + CHECK(output_message.calibration[0].channel == "calib2"); + CHECK(output_message.calibration[1].channel == "calib1"); + CHECK(memcmp(output_message.calibration[0].data, calib2.data(), 256 * sizeof(float)) == 0); + CHECK(memcmp(output_message.calibration[1].data, calib1.data(), 256 * sizeof(float)) == 0); +} + TEST_CASE("CBORSerialize_End", "[CBOR]") { std::vector buffer(8*1024*1024); JFJochFrameSerializer serializer(buffer.data(), buffer.size()); From e4720478394642594df6b94c0afaa7889f4dcde6 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 28 Jun 2023 17:13:34 +0200 Subject: [PATCH 090/224] JFJochCompressor: Add another template function --- compression/JFJochCompressor.h | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/compression/JFJochCompressor.h b/compression/JFJochCompressor.h index 7aff36a5..43300cd5 100644 --- a/compression/JFJochCompressor.h +++ b/compression/JFJochCompressor.h @@ -10,6 +10,7 @@ #include #include #include "CompressionAlgorithmEnum.h" +#include "MaxCompressedSize.h" #include "JFJochZstdCompressor.h" @@ -21,11 +22,21 @@ class JFJochBitShuffleCompressor { public: constexpr static const size_t DefaultBlockSize = 4096; - JFJochBitShuffleCompressor(CompressionAlgorithm algorithm); + explicit JFJochBitShuffleCompressor(CompressionAlgorithm algorithm); + template size_t Compress(void *dest, const std::vector &src) { return Compress((char *) dest, (char *) src.data(), src.size(), sizeof(T)); }; + + template + std::vector Compress(const std::vector &src) { + std::vector tmp(MaxCompressedSize(algorithm, src.size(), sizeof(T))); + size_t tmp_size = Compress(tmp.data(), src); + tmp.resize(tmp_size); + return tmp; + } + size_t Compress(char *dest, const char* source, size_t nelements, size_t elem_size); }; From 0904e1f198b99e09cf351b33acff7c97c7aa27fe Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 28 Jun 2023 17:14:09 +0200 Subject: [PATCH 091/224] JFJochFrameSerializer: Using CBORImage for mask and calibration + writing calibration in HDF5 file --- common/ZMQImagePusher.cpp | 2 +- frame_serialize/JFJochFrameDeserializer.cpp | 17 ++---- frame_serialize/JFJochFrameSerializer.cpp | 26 +------- frame_serialize/StartMessage.h | 15 ++++- receiver/JFJochReceiver.cpp | 43 ++++++++++++- tests/CBORTest.cpp | 68 +++++++++++++++++---- writer/HDF5NXmx.cpp | 27 ++++++-- writer/HDF5NXmx.h | 1 + 8 files changed, 142 insertions(+), 57 deletions(-) diff --git a/common/ZMQImagePusher.cpp b/common/ZMQImagePusher.cpp index 6b7681bf..c57339d5 100644 --- a/common/ZMQImagePusher.cpp +++ b/common/ZMQImagePusher.cpp @@ -56,7 +56,7 @@ void ZMQImagePusher::SendImage(const uint8_t *image_data, size_t image_size, int } void ZMQImagePusher::StartDataCollection(const StartMessage& message) { - std::vector serialization_buffer(80*1024*1024); + std::vector serialization_buffer(message.approx_size); JFJochFrameSerializer serializer(serialization_buffer.data(), serialization_buffer.size()); // 80 MiB should be safe even for 16M if (message.data_file_count < 1) diff --git a/frame_serialize/JFJochFrameDeserializer.cpp b/frame_serialize/JFJochFrameDeserializer.cpp index 226c13b0..5cdd38f3 100644 --- a/frame_serialize/JFJochFrameDeserializer.cpp +++ b/frame_serialize/JFJochFrameDeserializer.cpp @@ -441,19 +441,10 @@ void JFJochFrameDeserializer::ProcessPixelMaskElement(CborValue &value) { cborErr(cbor_value_enter_container(&value, &map_value)); while (! cbor_value_at_end(&map_value)) { auto key = GetCBORString(map_value); - CBORImage cbor_multidim_array; - GetCBORMultidimTypedArray(cbor_multidim_array, map_value); - - if (cbor_multidim_array.size != cbor_multidim_array.xpixel * cbor_multidim_array.ypixel - * cbor_multidim_array.pixel_depth_bytes) - throw JFJochException(JFJochExceptionCategory::CBORError, "Pixel mask size mismatch"); - - if (cbor_multidim_array.pixel_depth_bytes != sizeof(uint32_t)) - throw JFJochException(JFJochExceptionCategory::CBORError, "Pixel mask must be 32-bit"); - - std::vector v(cbor_multidim_array.xpixel * cbor_multidim_array.ypixel); - memcpy(v.data(), cbor_multidim_array.data, cbor_multidim_array.size); - start_message.pixel_mask[key] = v; + CBORImage image; + image.channel = key; + GetCBORMultidimTypedArray(image, map_value); + start_message.pixel_mask.push_back(image); } cborErr(cbor_value_leave_container(&value, &map_value)); } diff --git a/frame_serialize/JFJochFrameSerializer.cpp b/frame_serialize/JFJochFrameSerializer.cpp index 832eee07..0d3ffc90 100644 --- a/frame_serialize/JFJochFrameSerializer.cpp +++ b/frame_serialize/JFJochFrameSerializer.cpp @@ -126,30 +126,6 @@ inline void CBOR_ENC_2D_TYPED_ARRAY(CborEncoder &encoder, const CBORImage& image cborErr(cbor_encoder_close_container(&encoder, &arrayEncoder)); } -inline void CBOR_ENC_PIXEL_MASK(CborEncoder &encoder, const char* key, - const std::map> &pixel_mask, - size_t xpixel, size_t ypixel) { - CborEncoder mapEncoder; - cborErr(cbor_encode_text_stringz(&encoder, key)); - cborErr(cbor_encoder_create_map(&encoder, &mapEncoder, pixel_mask.size())); - for (auto &[pixel_mask_key, pixel_mask_array]: pixel_mask) { - CBORImage image{ - .data = reinterpret_cast(pixel_mask_array.data()), - .size = pixel_mask_array.size() * sizeof(uint32_t), - .xpixel = xpixel, - .ypixel = ypixel, - .pixel_depth_bytes = sizeof(uint32_t), - .pixel_is_signed = false, - .pixel_is_float = false, - .algorithm = CompressionAlgorithm::NO_COMPRESSION, - .channel = pixel_mask_key - }; - CBOR_ENC_2D_TYPED_ARRAY(mapEncoder, image); - } - - cborErr(cbor_encoder_close_container(&encoder, &mapEncoder)); -} - inline void CBOR_ENC(CborEncoder &encoder, const char* key, const std::vector& v) { CborEncoder arrayEncoder; @@ -392,7 +368,7 @@ void JFJochFrameSerializer::SerializeSequenceStart(const StartMessage& message) CBOR_ENC_GONIOMETER_MAP(mapEncoder, "goniometer", message.goniometer); CBOR_ENC_USER_DATA(mapEncoder, message); - CBOR_ENC_PIXEL_MASK(mapEncoder, "pixel_mask", message.pixel_mask, message.image_size_x, message.image_size_y); + CBOR_ENC(mapEncoder, "pixel_mask", message.pixel_mask); CBOR_ENC_CHANNELS(mapEncoder, "channels", message.channels); cborErr(cbor_encoder_close_container(&encoder, &mapEncoder)); diff --git a/frame_serialize/StartMessage.h b/frame_serialize/StartMessage.h index cfa11c94..dece5f8d 100644 --- a/frame_serialize/StartMessage.h +++ b/frame_serialize/StartMessage.h @@ -53,7 +53,6 @@ struct StartMessage { uint64_t storage_cell_number; // user data - std::map> pixel_mask; bool pixel_mask_enabled; std::string arm_date; @@ -82,7 +81,21 @@ struct StartMessage { std::vector rad_int_bin_to_q; std::vector rad_int_solid_angle_corr; + std::vector pixel_mask; std::vector calibration; + + size_t approx_size = 1024*1024; + + // Use function below to update approx_size + void AddPixelMask(CBORImage image) { + approx_size += image.size; + pixel_mask.emplace_back(std::move(image)); + } + + void AddCalibration(CBORImage image) { + approx_size += image.size; + calibration.emplace_back(std::move(image)); + } }; #endif //JUNGFRAUJOCH_STARTMESSAGE_H diff --git a/receiver/JFJochReceiver.cpp b/receiver/JFJochReceiver.cpp index bda0b76b..a8d24072 100644 --- a/receiver/JFJochReceiver.cpp +++ b/receiver/JFJochReceiver.cpp @@ -153,8 +153,47 @@ JFJochReceiver::JFJochReceiver(const JFJochProtoBuf::ReceiverInput &settings, experiment.FillMessage(message); message.arm_date = time_UTC(std::chrono::system_clock::now()); - if (calib) - message.pixel_mask["sc0"] = calib->CalculateNexusMask(experiment, 0); + JFJochBitShuffleCompressor compressor(CompressionAlgorithm::BSHUF_LZ4); + std::vector pixel_mask; + std::vector > pedestal; + + if (calib) { + size_t xpixel = experiment.GetXPixelsNum(); + size_t ypixel = experiment.GetYPixelsNum(); + + pixel_mask = compressor.Compress(calib->CalculateNexusMask(experiment, 0)); + message.AddPixelMask(CBORImage{ + .data = pixel_mask.data(), + .size = pixel_mask.size(), + .xpixel = (size_t) xpixel, + .ypixel = (size_t) ypixel, + .pixel_depth_bytes = 4, + .pixel_is_signed = false, + .pixel_is_float = false, + .algorithm = CompressionAlgorithm::BSHUF_LZ4, + .channel = "sc0" + }); + for (int sc = 0; sc < experiment.GetStorageCellNumber(); sc++) { + for (int gain = 0; gain < 3; gain++) { + auto tmp = compressor.Compress(calib->GetPedestal(gain, sc)); + pedestal.emplace_back(tmp); + std::string channel = "pedestal_G" + std::to_string(gain)+ "_sc" + std::to_string(sc); + + CBORImage image{ + .data = pedestal.at(pedestal.size()-1).data(), + .size = pedestal.at(pedestal.size()-1).size(), + .xpixel = (size_t) xpixel, + .ypixel = (size_t) ypixel, + .pixel_depth_bytes = 2, + .pixel_is_signed = false, + .pixel_is_float = false, + .algorithm = CompressionAlgorithm::BSHUF_LZ4, + .channel = channel + }; + message.AddCalibration(image); + } + } + } if (rad_int_mapping) { message.rad_int_bin_number = rad_int_mapping->GetBinNumber(); diff --git a/tests/CBORTest.cpp b/tests/CBORTest.cpp index a335a211..ddb0881c 100644 --- a/tests/CBORTest.cpp +++ b/tests/CBORTest.cpp @@ -62,7 +62,6 @@ TEST_CASE("CBORSerialize_Start", "[CBOR]") { .rad_int_bin_to_q = {0.1, 0.2, 0.3, 0.5}, .rad_int_solid_angle_corr = {10, 20, 30, 50} }; - message.pixel_mask["sc0"] = std::vector(456*457, 15); REQUIRE_NOTHROW(serializer.SerializeSequenceStart(message)); @@ -72,7 +71,6 @@ TEST_CASE("CBORSerialize_Start", "[CBOR]") { StartMessage output_message; REQUIRE_NOTHROW(output_message = deserializer.GetStartMessage()); - REQUIRE(output_message.pixel_mask.contains("sc0")); CHECK(output_message.data_file_count == message.data_file_count); CHECK(output_message.detector_distance == Approx(message.detector_distance)); CHECK(output_message.beam_center_x == Approx(message.beam_center_x)); @@ -91,7 +89,6 @@ TEST_CASE("CBORSerialize_Start", "[CBOR]") { CHECK(output_message.pixel_size_y == Approx(message.pixel_size_y)); CHECK(output_message.sensor_thickness == Approx(message.sensor_thickness)); CHECK(output_message.sensor_material == message.sensor_material); - CHECK(output_message.pixel_mask == message.pixel_mask); CHECK(output_message.pixel_mask_enabled == message.pixel_mask_enabled); CHECK(output_message.compression_algorithm == message.compression_algorithm); CHECK(output_message.compression_block_size == message.compression_block_size); @@ -127,6 +124,42 @@ TEST_CASE("CBORSerialize_Start", "[CBOR]") { } +TEST_CASE("CBORSerialize_Start_PixelMask", "[CBOR]") { + std::vector buffer(8*1024*1024); + JFJochFrameSerializer serializer(buffer.data(), buffer.size()); + + std::vector mask(456*457, 15); + + CBORImage image_mask { + .data = reinterpret_cast(mask.data()), + .size = 456 * 457 * sizeof(uint32_t), + .xpixel = 456, + .ypixel = 457, + .pixel_depth_bytes = 4, + .pixel_is_signed = false, + .pixel_is_float = false, + .algorithm = CompressionAlgorithm::NO_COMPRESSION, + .channel = "sc0" + }; + + StartMessage message {}; + + message.AddPixelMask(image_mask); + REQUIRE_NOTHROW(serializer.SerializeSequenceStart(message)); + + JFJochFrameDeserializer deserializer; + REQUIRE_NOTHROW(deserializer.Process(buffer.data(), serializer.GetBufferSize())); + REQUIRE(deserializer.GetType() == JFJochFrameDeserializer::Type::START); + + StartMessage output_message; + REQUIRE_NOTHROW(output_message = deserializer.GetStartMessage()); + REQUIRE(output_message.pixel_mask.size() == 1); + CHECK(!output_message.pixel_mask[0].pixel_is_float); + CHECK(output_message.pixel_mask[0].xpixel == 456); + CHECK(output_message.pixel_mask[0].ypixel == 457); + CHECK(output_message.pixel_mask[0].channel == "sc0"); + CHECK(memcmp(output_message.pixel_mask[0].data, mask.data(), mask.size() * sizeof(float)) == 0); +} TEST_CASE("CBORSerialize_Start_Calibration", "[CBOR]") { std::vector buffer(8*1024*1024); @@ -152,7 +185,6 @@ TEST_CASE("CBORSerialize_Start_Calibration", "[CBOR]") { .channel = "calib1" }; - CBORImage image2 { .data = reinterpret_cast(calib2.data()), .size = 16 * 16 * sizeof(float), @@ -165,10 +197,10 @@ TEST_CASE("CBORSerialize_Start_Calibration", "[CBOR]") { .channel = "calib2" }; - StartMessage message { - .calibration = {image2, image1} - }; + StartMessage message {}; + message.AddCalibration(image2); + message.AddCalibration(image1); REQUIRE_NOTHROW(serializer.SerializeSequenceStart(message)); JFJochFrameDeserializer deserializer; @@ -615,7 +647,21 @@ inline bool CmpString(const char *str1, const std::string& str2) { TEST_CASE("CBORSerialize_Start_stream2", "[CBOR]") { std::vector buffer(8*1024*1024); -JFJochFrameSerializer serializer(buffer.data(), buffer.size()); + JFJochFrameSerializer serializer(buffer.data(), buffer.size()); + + std::vector mask(456*457, 15); + + CBORImage image_mask { + .data = reinterpret_cast(mask.data()), + .size = 456 * 457 * sizeof(uint32_t), + .xpixel = 456, + .ypixel = 457, + .pixel_depth_bytes = 4, + .pixel_is_signed = false, + .pixel_is_float = false, + .algorithm = CompressionAlgorithm::NO_COMPRESSION, + .channel = "sc0" + }; StartMessage message { .data_file_count = 3, @@ -664,7 +710,8 @@ JFJochFrameSerializer serializer(buffer.data(), buffer.size()); .rad_int_bin_number = 35, .summation = 567 }; - message.pixel_mask["sc0"] = std::vector(456*457, 15); + + message.AddPixelMask(image_mask); REQUIRE_NOTHROW(serializer.SerializeSequenceStart(message)); @@ -693,8 +740,7 @@ JFJochFrameSerializer serializer(buffer.data(), buffer.size()); CHECK(msg2->pixel_mask.ptr[0].pixel_mask.dim[0] == 457); CHECK(msg2->pixel_mask.ptr[0].pixel_mask.dim[1] == 456); CHECK(msg2->pixel_mask.ptr[0].pixel_mask.array.data.len == 456 * 457 * sizeof(uint32_t)); - CHECK(memcmp(msg2->pixel_mask.ptr[0].pixel_mask.array.data.ptr, message.pixel_mask["sc0"].data(), - 456 * 457 * sizeof(uint32_t)) == 0); + CHECK(memcmp(msg2->pixel_mask.ptr[0].pixel_mask.array.data.ptr, mask.data(), 456 * 457 * sizeof(uint32_t)) == 0); CHECK(msg2->pixel_mask.ptr[0].pixel_mask.array.tag == TagUnsignedInt32BitLE); stream2_free_msg(msg); } diff --git a/writer/HDF5NXmx.cpp b/writer/HDF5NXmx.cpp index 68f82595..3c99acbb 100644 --- a/writer/HDF5NXmx.cpp +++ b/writer/HDF5NXmx.cpp @@ -192,14 +192,33 @@ void HDF5Metadata::DetectorModule(HDF5File *hdf5_file, const std::string &name, "", "", "translation", {0,0,0}); } +void HDF5Metadata::SaveCBORImage(HDF5File *hdf5_file, const std::string &hdf5_path, const CBORImage &image) { + std::vector dims = {image.xpixel, image.ypixel}; + + HDF5DataType data_type(image.pixel_depth_bytes, image.pixel_is_signed); + HDF5Dcpl dcpl; + + dcpl.SetCompression(image.algorithm, H5Tget_size(data_type.GetID()), 0); + dcpl.SetChunking(dims); + + HDF5DataSpace data_space(dims); + auto dataset = std::make_unique(*hdf5_file, hdf5_path, data_type, data_space, dcpl); + + if (image.algorithm == CompressionAlgorithm::NO_COMPRESSION) + dataset->Write(data_type, image.data); + else + dataset->WriteDirectChunk(image.data, image.size, {0,0}); +} + void HDF5Metadata::Calibration(HDF5File *hdf5_file, const StartMessage &start, const EndMessage &end) { - if (start.pixel_mask.count("sc0") == 1) { - auto v = start.pixel_mask.at("sc0"); - std::vector dims = {start.image_size_y, start.image_size_x}; - SaveVector(*hdf5_file, "/entry/instrument/detector/pixel_mask", v, dims, CompressionAlgorithm::BSHUF_LZ4); + if (!start.pixel_mask.empty()) { + SaveCBORImage(hdf5_file, "/entry/instrument/detector/pixel_mask", start.pixel_mask[0]); hdf5_file->HardLink("/entry/instrument/detector/pixel_mask", "/entry/instrument/detector/detectorSpecific/pixel_mask"); } + + for (const auto &i: start.calibration) + SaveCBORImage(hdf5_file, "/entry/instrument/detector/detectorSpecific/" + i.channel, i); } void HDF5Metadata::LinkToData(HDF5File *hdf5_file, const StartMessage &start, const EndMessage &end) { diff --git a/writer/HDF5NXmx.h b/writer/HDF5NXmx.h index 05516b87..291fb895 100644 --- a/writer/HDF5NXmx.h +++ b/writer/HDF5NXmx.h @@ -27,6 +27,7 @@ namespace HDF5Metadata { void Mask(HDF5File *hdf5_file, const StartMessage &start, const EndMessage &end); void Calibration(HDF5File *hdf5_file, const StartMessage &start, const EndMessage &end); + void SaveCBORImage(HDF5File *hdf5_file, const std::string& hdf5_path, const CBORImage &image); void RadInt(HDF5File *hdf5_file, const StartMessage &start, const EndMessage &end); std::string DataFileName(const std::string& prefix, int64_t file_number); } From 831c93104d328174623e60bebfaf2bb01fa1de08 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 28 Jun 2023 17:30:59 +0200 Subject: [PATCH 092/224] DiffractionExperiment: Add option to save calibration --- common/DiffractionExperiment.cpp | 10 ++ common/DiffractionExperiment.h | 3 + grpc/jfjoch.proto | 2 + python/jfjoch_pb2.py | 208 ++++++++++++++-------------- receiver/JFJochReceiver.cpp | 40 +++--- tests/JFJochFullIntegrationTest.cpp | 97 +++++++++++++ 6 files changed, 239 insertions(+), 121 deletions(-) diff --git a/common/DiffractionExperiment.cpp b/common/DiffractionExperiment.cpp index 26963286..76fd4347 100644 --- a/common/DiffractionExperiment.cpp +++ b/common/DiffractionExperiment.cpp @@ -52,6 +52,7 @@ DiffractionExperiment::DiffractionExperiment(const DetectorSetup& det_setup) { dataset.set_rad_int_polarization_corr(false); dataset.set_rad_int_solid_angle_corr(false); + dataset.set_save_calibration(false); internal.set_ndatastreams(1); @@ -1230,3 +1231,12 @@ void DiffractionExperiment::SetupROIFilter(ROIFilter &filter) { filter.SetRectangle(i.x0(), i.y0(), i.width(), i.height()); } +DiffractionExperiment &DiffractionExperiment::SaveCalibration(bool input) { + dataset.set_save_calibration(input); + return *this; +} + +bool DiffractionExperiment::GetSaveCalibration() const { + return dataset.save_calibration(); +} + diff --git a/common/DiffractionExperiment.h b/common/DiffractionExperiment.h index 527a4784..17952e82 100644 --- a/common/DiffractionExperiment.h +++ b/common/DiffractionExperiment.h @@ -228,6 +228,9 @@ public: DiffractionExperiment& ClearROI(); bool GetApplyROI() const; void SetupROIFilter(ROIFilter& filter); + + DiffractionExperiment& SaveCalibration(bool input); + bool GetSaveCalibration() const; }; inline int64_t CalculateStride(const std::chrono::microseconds &frame_time, const std::chrono::microseconds &preview_time) { diff --git a/grpc/jfjoch.proto b/grpc/jfjoch.proto index 6ace8760..af25beeb 100644 --- a/grpc/jfjoch.proto +++ b/grpc/jfjoch.proto @@ -111,6 +111,8 @@ message DatasetSettings { bool rad_int_solid_angle_corr = 18; bool rad_int_polarization_corr = 19; float rad_int_polarization_factor = 20; + + bool save_calibration = 21; } message DetectorSettings { diff --git a/python/jfjoch_pb2.py b/python/jfjoch_pb2.py index 6ed73a93..6850a62d 100644 --- a/python/jfjoch_pb2.py +++ b/python/jfjoch_pb2.py @@ -13,25 +13,25 @@ _sym_db = _symbol_database.Default() -DESCRIPTOR = _descriptor_pool.Default().AddSerializedFile(b'\n\x0cjfjoch.proto\x12\x0eJFJochProtoBuf\"\x07\n\x05\x45mpty\"W\n\x08UnitCell\x12\t\n\x01\x61\x18\x01 \x01(\x02\x12\t\n\x01\x62\x18\x02 \x01(\x02\x12\t\n\x01\x63\x18\x03 \x01(\x02\x12\r\n\x05\x61lpha\x18\x04 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_GRPC_JFJOCHDETECTOR._serialized_start=10484 + _GRPC_JFJOCHDETECTOR._serialized_end=10870 + _GRPC_JFJOCHBROKER._serialized_start=10873 + _GRPC_JFJOCHBROKER._serialized_end=12562 # @@protoc_insertion_point(module_scope) diff --git a/receiver/JFJochReceiver.cpp b/receiver/JFJochReceiver.cpp index a8d24072..7abb5412 100644 --- a/receiver/JFJochReceiver.cpp +++ b/receiver/JFJochReceiver.cpp @@ -173,24 +173,30 @@ JFJochReceiver::JFJochReceiver(const JFJochProtoBuf::ReceiverInput &settings, .algorithm = CompressionAlgorithm::BSHUF_LZ4, .channel = "sc0" }); - for (int sc = 0; sc < experiment.GetStorageCellNumber(); sc++) { - for (int gain = 0; gain < 3; gain++) { - auto tmp = compressor.Compress(calib->GetPedestal(gain, sc)); - pedestal.emplace_back(tmp); - std::string channel = "pedestal_G" + std::to_string(gain)+ "_sc" + std::to_string(sc); + if (experiment.GetSaveCalibration()) { + for (int sc = 0; sc < experiment.GetStorageCellNumber(); sc++) { + for (int gain = 0; gain < 3; gain++) { + auto tmp = compressor.Compress(calib->GetPedestal(gain, sc)); + pedestal.emplace_back(tmp); + std::string channel = "pedestal_G" + std::to_string(gain); - CBORImage image{ - .data = pedestal.at(pedestal.size()-1).data(), - .size = pedestal.at(pedestal.size()-1).size(), - .xpixel = (size_t) xpixel, - .ypixel = (size_t) ypixel, - .pixel_depth_bytes = 2, - .pixel_is_signed = false, - .pixel_is_float = false, - .algorithm = CompressionAlgorithm::BSHUF_LZ4, - .channel = channel - }; - message.AddCalibration(image); + if (experiment.GetStorageCellNumber() > 1) + channel += "_sc" + std::to_string(sc); + + CBORImage image{ + .data = pedestal.at(pedestal.size() - 1).data(), + .size = pedestal.at(pedestal.size() - 1).size(), + .xpixel = (size_t) xpixel, + .ypixel = (size_t) ypixel, + .pixel_depth_bytes = 2, + .pixel_is_signed = false, + .pixel_is_float = false, + .algorithm = CompressionAlgorithm::BSHUF_LZ4, + .channel = channel + }; + + message.AddCalibration(image); + } } } } diff --git a/tests/JFJochFullIntegrationTest.cpp b/tests/JFJochFullIntegrationTest.cpp index 950658a1..2f72b76c 100644 --- a/tests/JFJochFullIntegrationTest.cpp +++ b/tests/JFJochFullIntegrationTest.cpp @@ -110,6 +110,103 @@ TEST_CASE("JFJochIntegrationTest_ZMQ", "[JFJochReceiver]") { writer_server->Shutdown(); } + +TEST_CASE("JFJochIntegrationTest_ZMQ_save_calibration", "[JFJochReceiver]") { + Logger logger("JFJochIntegrationTest_ZMQ_save_calibration"); + ZMQContext zmq_context; + + RegisterHDF5Filter(); + + int64_t nimages = 5; + int64_t ndatastream = 2; + int64_t nmodules = 4; + + JFJochServices services(logger); + JFJochStateMachine state_machine(services, logger); + + REQUIRE(!state_machine.GetMeasurementStatistics().has_value()); + state_machine.AddDetectorSetup(DetectorGeometry(ndatastream * nmodules, 2, 8, 36)); + + state_machine.NotThreadSafe_Experiment().DataStreams(ndatastream); + state_machine.NotThreadSafe_Experiment().PedestalG0Frames(0).PedestalG1Frames(0).PedestalG2Frames(0); + services.Writer("unix:writer_test", "inproc://#1").Receiver("unix:fpga_receiver_test"); + + logger.Verbose(true); + + std::vector image(RAW_MODULE_SIZE); + + std::vector> aq_devices; + + for (int i = 0; i < ndatastream; i++) { + auto *test = new MockAcquisitionDevice(i, 256); + aq_devices.emplace_back(test); + } + + std::vector tmp_devices; + for (const auto &i: aq_devices) + tmp_devices.emplace_back(i.get()); + + ZMQImagePusher pusher(zmq_context, {"inproc://#1"}); + JFJochReceiverService fpga_receiver(tmp_devices, logger, pusher); + + JFJochWriterService writer(zmq_context, logger); + + auto fpga_receiver_server = gRPCServer("unix:fpga_receiver_test", fpga_receiver); + auto writer_server = gRPCServer("unix:writer_test", writer); + + REQUIRE_NOTHROW(state_machine.Initialize()); + logger.Info("Initialized"); + + JFJochProtoBuf::DatasetSettings setup; + setup.set_ntrigger(1); + setup.set_images_per_trigger(5); + setup.set_detector_distance_mm(100); + setup.set_file_prefix("integration_test_with_calibration"); + setup.set_photon_energy_kev(12.4); + setup.set_data_file_count(2); + setup.set_summation(1); + setup.set_save_calibration(true); + + REQUIRE_NOTHROW(state_machine.Start(setup)); + logger.Info("Started measurement"); + + JFJochProtoBuf::BrokerStatus status; + status = state_machine.GetStatus(); + REQUIRE(status.progress() == Approx(0.0)); + REQUIRE(status.broker_state() == JFJochProtoBuf::DATA_COLLECTION); + + for (int i = 0; i < ndatastream; i++) { + for (int m = 0; m < state_machine.NotThreadSafe_Experiment().GetModulesNum(i); m++) { + for (int image_num = 1; image_num <= nimages; image_num++) + aq_devices[i]->AddModule(image_num, m, image.data()); + } + aq_devices[i]->Terminate(); + } + + REQUIRE_NOTHROW(state_machine.Stop()); + logger.Info("Stopped measurement"); + + status = state_machine.GetStatus(); + REQUIRE(status.broker_state() == JFJochProtoBuf::IDLE); + + auto tmp = state_machine.GetMeasurementStatistics(); + REQUIRE(tmp.has_value()); + auto statistics = tmp.value(); + + REQUIRE(statistics.collection_efficiency() == 1.0); + REQUIRE(statistics.images_collected() == 5); + REQUIRE(statistics.images_written() == 5); + REQUIRE(statistics.max_image_number_sent() == 4); + REQUIRE(!statistics.cancelled()); + REQUIRE(statistics.file_prefix() == "integration_test_with_calibration"); + REQUIRE(statistics.detector_width() == 2068); + REQUIRE(statistics.detector_height() == 2164); + REQUIRE(statistics.detector_pixel_depth() == 2); + REQUIRE(statistics.file_statistics_size() == 2); + fpga_receiver_server->Shutdown(); + writer_server->Shutdown(); +} + TEST_CASE("JFJochIntegrationTest_ZMQ_2DataStreams_4Devices", "[JFJochReceiver]") { Logger logger("JFJochIntegrationTest_ZMQ_2DataStreams_4Devices"); ZMQContext zmq_context; From 736d00976428c2534ea602cedd53301665a683ae Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 28 Jun 2023 20:33:25 +0200 Subject: [PATCH 093/224] HDF5DatasetWriteTest: Fix --- tools/HDF5DatasetWriteTest.cpp | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/tools/HDF5DatasetWriteTest.cpp b/tools/HDF5DatasetWriteTest.cpp index 7fcac68f..8554efa3 100644 --- a/tools/HDF5DatasetWriteTest.cpp +++ b/tools/HDF5DatasetWriteTest.cpp @@ -100,7 +100,22 @@ int main(int argc, char **argv) { x.FillMessage(start_message); JFCalibration calib(x); - start_message.pixel_mask = {{"sc0", calib.CalculateNexusMask(x, 0)}}; + auto pixel_mask = calib.CalculateNexusMask(x, 0); + { + size_t xpixel = x.GetXPixelsNum(); + size_t ypixel = x.GetYPixelsNum(); + start_message.AddPixelMask(CBORImage{ + .data = reinterpret_cast(pixel_mask.data()), + .size = pixel_mask.size() * sizeof(uint32_t), + .xpixel = xpixel, + .ypixel = ypixel, + .pixel_depth_bytes = 4, + .pixel_is_signed = false, + .pixel_is_float = false, + .algorithm = CompressionAlgorithm::NO_COMPRESSION, + .channel = "sc0" + }); + } // Master & calibration files are written outside of timing routine auto fileset = std::make_unique(start_message); From f9deb58d20f75cba8707316fa3952b2220aecb1f Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 28 Jun 2023 21:24:07 +0200 Subject: [PATCH 094/224] HDF5NXmx: Fix dimension order in SaveCBORImage --- writer/HDF5NXmx.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/writer/HDF5NXmx.cpp b/writer/HDF5NXmx.cpp index 3c99acbb..36e0eb56 100644 --- a/writer/HDF5NXmx.cpp +++ b/writer/HDF5NXmx.cpp @@ -193,7 +193,7 @@ void HDF5Metadata::DetectorModule(HDF5File *hdf5_file, const std::string &name, } void HDF5Metadata::SaveCBORImage(HDF5File *hdf5_file, const std::string &hdf5_path, const CBORImage &image) { - std::vector dims = {image.xpixel, image.ypixel}; + std::vector dims = {image.ypixel, image.xpixel}; HDF5DataType data_type(image.pixel_depth_bytes, image.pixel_is_signed); HDF5Dcpl dcpl; From a66ac66d0b8e793c0958671da07205fdc6cd741b Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 30 Jun 2023 13:34:45 +0200 Subject: [PATCH 095/224] gRPC: Changed behavior, so mask application during conversion is now default behavior --- common/DiffractionExperiment.cpp | 6 +++--- grpc/jfjoch.proto | 2 +- python/jfjoch_pb2.py | 2 +- tests/DiffractionExperimentTest.cpp | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/common/DiffractionExperiment.cpp b/common/DiffractionExperiment.cpp index 76fd4347..ffc325c7 100644 --- a/common/DiffractionExperiment.cpp +++ b/common/DiffractionExperiment.cpp @@ -921,7 +921,7 @@ void DiffractionExperiment::LoadDatasetSettings(const JFJochProtoBuf::DatasetSet if (settings.has_scattering_vector()) ScatteringVector({0,0,1}); Compression(settings.compression()); - ApplyPixelMaskInFPGA(settings.apply_pixel_mask()); + ApplyPixelMaskInFPGA(!settings.debug_pixel_mask()); Binning2x2(settings.binning2x2()); } catch (...) { dataset = tmp; @@ -1083,13 +1083,13 @@ void DiffractionExperiment::FillMessage(StartMessage &message) const { } DiffractionExperiment &DiffractionExperiment::ApplyPixelMaskInFPGA(bool input) { - dataset.set_apply_pixel_mask(input); + dataset.set_debug_pixel_mask(!input); return *this; } bool DiffractionExperiment::GetApplyPixelMaskInFPGA() const { if (GetDetectorMode() == DetectorMode::Conversion) - return dataset.apply_pixel_mask(); + return !dataset.debug_pixel_mask(); else return false; } diff --git a/grpc/jfjoch.proto b/grpc/jfjoch.proto index af25beeb..64e62898 100644 --- a/grpc/jfjoch.proto +++ b/grpc/jfjoch.proto @@ -104,7 +104,7 @@ message DatasetSettings { optional Vector scattering_vector = 15; - bool apply_pixel_mask = 16; + bool debug_pixel_mask = 16; bool binning2x2 = 17; diff --git a/python/jfjoch_pb2.py b/python/jfjoch_pb2.py index 6850a62d..3dbf1bdf 100644 --- a/python/jfjoch_pb2.py +++ b/python/jfjoch_pb2.py @@ -13,7 +13,7 @@ _sym_db = _symbol_database.Default() -DESCRIPTOR = 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_builder.BuildMessageAndEnumDescriptors(DESCRIPTOR, globals()) _builder.BuildTopDescriptorsAndMessages(DESCRIPTOR, 'jfjoch_pb2', globals()) diff --git a/tests/DiffractionExperimentTest.cpp b/tests/DiffractionExperimentTest.cpp index 2bf71843..7ec5afc3 100644 --- a/tests/DiffractionExperimentTest.cpp +++ b/tests/DiffractionExperimentTest.cpp @@ -736,7 +736,7 @@ TEST_CASE("DiffractionExperiment_LoadDatasetSettings", "[DiffractionExperiment]" settings.set_data_file_count(5); settings.set_space_group_number(45); settings.set_sample_name("lyso1"); - settings.set_apply_pixel_mask(true); + settings.set_debug_pixel_mask(false); settings.set_binning2x2(true); REQUIRE_NOTHROW(x.LoadDatasetSettings(settings)); From 8a203b7cf5e97fc79995bb0ba5b20a65aa83816a Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 1 Jul 2023 19:20:19 +0200 Subject: [PATCH 096/224] gRPC: Mask application during conversion is part of internal settings and is not part of easy accessible settings (to ensure it is always applied) --- common/DiffractionExperiment.cpp | 7 +- grpc/jfjoch.proto | 6 +- python/jfjoch_pb2.py | 208 ++++++++++++++-------------- tests/DiffractionExperimentTest.cpp | 2 - 4 files changed, 112 insertions(+), 111 deletions(-) diff --git a/common/DiffractionExperiment.cpp b/common/DiffractionExperiment.cpp index ffc325c7..0e12a1ed 100644 --- a/common/DiffractionExperiment.cpp +++ b/common/DiffractionExperiment.cpp @@ -54,6 +54,8 @@ DiffractionExperiment::DiffractionExperiment(const DetectorSetup& det_setup) { dataset.set_rad_int_solid_angle_corr(false); dataset.set_save_calibration(false); + internal.set_debug_pixel_mask(false); + internal.set_ndatastreams(1); internal.set_frame_time_us(MIN_FRAME_TIME_HALF_SPEED_IN_US); @@ -921,7 +923,6 @@ void DiffractionExperiment::LoadDatasetSettings(const JFJochProtoBuf::DatasetSet if (settings.has_scattering_vector()) ScatteringVector({0,0,1}); Compression(settings.compression()); - ApplyPixelMaskInFPGA(!settings.debug_pixel_mask()); Binning2x2(settings.binning2x2()); } catch (...) { dataset = tmp; @@ -1083,13 +1084,13 @@ void DiffractionExperiment::FillMessage(StartMessage &message) const { } DiffractionExperiment &DiffractionExperiment::ApplyPixelMaskInFPGA(bool input) { - dataset.set_debug_pixel_mask(!input); + internal.set_debug_pixel_mask(!input); return *this; } bool DiffractionExperiment::GetApplyPixelMaskInFPGA() const { if (GetDetectorMode() == DetectorMode::Conversion) - return !dataset.debug_pixel_mask(); + return !internal.debug_pixel_mask(); else return false; } diff --git a/grpc/jfjoch.proto b/grpc/jfjoch.proto index 64e62898..60a43bd4 100644 --- a/grpc/jfjoch.proto +++ b/grpc/jfjoch.proto @@ -104,8 +104,6 @@ message DatasetSettings { optional Vector scattering_vector = 15; - bool debug_pixel_mask = 16; - bool binning2x2 = 17; bool rad_int_solid_angle_corr = 18; @@ -113,6 +111,8 @@ message DatasetSettings { float rad_int_polarization_factor = 20; bool save_calibration = 21; + + repeated ROIRectangle user_mask = 22; } message DetectorSettings { @@ -194,6 +194,8 @@ message InternalSettings { repeated ROIRectangle roi_rectangle = 36; bool roi_apply = 37; + + bool debug_pixel_mask = 38; } diff --git a/python/jfjoch_pb2.py b/python/jfjoch_pb2.py index 3dbf1bdf..f05fbb47 100644 --- a/python/jfjoch_pb2.py +++ b/python/jfjoch_pb2.py @@ -13,25 +13,25 @@ _sym_db = _symbol_database.Default() -DESCRIPTOR = _descriptor_pool.Default().AddSerializedFile(b'\n\x0cjfjoch.proto\x12\x0eJFJochProtoBuf\"\x07\n\x05\x45mpty\"W\n\x08UnitCell\x12\t\n\x01\x61\x18\x01 \x01(\x02\x12\t\n\x01\x62\x18\x02 \x01(\x02\x12\t\n\x01\x63\x18\x03 \x01(\x02\x12\r\n\x05\x61lpha\x18\x04 \x01(\x02\x12\x0c\n\x04\x62\x65ta\x18\x05 \x01(\x02\x12\r\n\x05gamma\x18\x06 \x01(\x02\")\n\x06Vector\x12\t\n\x01x\x18\x01 \x01(\x02\x12\t\n\x01y\x18\x02 \x01(\x02\x12\t\n\x01z\x18\x03 \x01(\x02\"|\n\x10RotationSettings\x12\x17\n\x0fstart_angle_deg\x18\x01 \x01(\x02\x12 \n\x18\x61ngle_incr_per_image_deg\x18\x02 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_WRITERINPUT._serialized_start=4723 + _WRITERINPUT._serialized_end=4785 + _DATAFILESTATISTICS._serialized_start=4787 + _DATAFILESTATISTICS._serialized_end=4838 + _WRITEROUTPUT._serialized_start=4841 + _WRITEROUTPUT._serialized_end=4982 + _DETECTORMODULECONFIG._serialized_start=4985 + _DETECTORMODULECONFIG._serialized_end=5243 + _DETECTORCONFIG._serialized_start=5245 + _DETECTORCONFIG._serialized_end=5341 + _DETECTORINPUT._serialized_start=5344 + _DETECTORINPUT._serialized_end=5593 + _DETECTOROUTPUT._serialized_start=5595 + _DETECTOROUTPUT._serialized_end=5611 + _DETECTORSTATUS._serialized_start=5613 + _DETECTORSTATUS._serialized_end=5711 + _FPGAFIFOSTATUS._serialized_start=5713 + _FPGAFIFOSTATUS._serialized_end=5794 + _FPGASTATUS._serialized_start=5797 + _FPGASTATUS._serialized_end=6758 + _DATAPROCESSINGSETTINGS._serialized_start=6761 + _DATAPROCESSINGSETTINGS._serialized_end=7107 + _PREVIEWFRAMESPOT._serialized_start=7109 + _PREVIEWFRAMESPOT._serialized_end=7166 + _PREVIEWFRAME._serialized_start=7169 + _PREVIEWFRAME._serialized_end=7487 + _MODULESTATISTICS._serialized_start=7490 + _MODULESTATISTICS._serialized_end=7727 + _IMAGE._serialized_start=7729 + _IMAGE._serialized_end=7802 + _MASKTOLOAD._serialized_start=7804 + _MASKTOLOAD._serialized_end=7850 + _MEASUREMENTSTATISTICS._serialized_start=7853 + _MEASUREMENTSTATISTICS._serialized_end=8466 + _BROKERSTATUS._serialized_start=8469 + _BROKERSTATUS._serialized_end=8684 + _BROKERFULLSTATUS._serialized_start=8687 + _BROKERFULLSTATUS._serialized_end=8851 + _DETECTORLISTELEMENT._serialized_start=8853 + _DETECTORLISTELEMENT._serialized_end=8925 + _DETECTORLIST._serialized_start=8927 + _DETECTORLIST._serialized_end=9045 + _DETECTORSELECTION._serialized_start=9047 + _DETECTORSELECTION._serialized_end=9078 + _GRPC_JFJOCHRECEIVER._serialized_start=9558 + _GRPC_JFJOCHRECEIVER._serialized_end=10325 + _GRPC_JFJOCHWRITER._serialized_start=10328 + _GRPC_JFJOCHWRITER._serialized_end=10530 + _GRPC_JFJOCHDETECTOR._serialized_start=10533 + _GRPC_JFJOCHDETECTOR._serialized_end=10919 + _GRPC_JFJOCHBROKER._serialized_start=10922 + _GRPC_JFJOCHBROKER._serialized_end=12611 # @@protoc_insertion_point(module_scope) diff --git a/tests/DiffractionExperimentTest.cpp b/tests/DiffractionExperimentTest.cpp index 7ec5afc3..8e871b9c 100644 --- a/tests/DiffractionExperimentTest.cpp +++ b/tests/DiffractionExperimentTest.cpp @@ -736,7 +736,6 @@ TEST_CASE("DiffractionExperiment_LoadDatasetSettings", "[DiffractionExperiment]" settings.set_data_file_count(5); settings.set_space_group_number(45); settings.set_sample_name("lyso1"); - settings.set_debug_pixel_mask(false); settings.set_binning2x2(true); REQUIRE_NOTHROW(x.LoadDatasetSettings(settings)); @@ -750,7 +749,6 @@ TEST_CASE("DiffractionExperiment_LoadDatasetSettings", "[DiffractionExperiment]" REQUIRE(x.GetSampleName() == "lyso1"); REQUIRE(x.GetDataFileCount() == 5); REQUIRE(x.GetDetectorDistance_mm() == Approx(57.6)); - REQUIRE(x.GetApplyPixelMaskInFPGA()); REQUIRE(x.GetBinning2x2()); } From 9d35660cf40af3dfb62ecd59dca888228723b18f Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 4 Jul 2023 11:25:19 +0200 Subject: [PATCH 097/224] DetectorGeometry: Fix module slow direction if horizontal stacking > module number --- common/DetectorGeometry.cpp | 2 ++ tests/DetectorGeometryTest.cpp | 14 ++++++++++++++ 2 files changed, 16 insertions(+) diff --git a/common/DetectorGeometry.cpp b/common/DetectorGeometry.cpp index 05243ab1..14f0dfae 100644 --- a/common/DetectorGeometry.cpp +++ b/common/DetectorGeometry.cpp @@ -29,6 +29,8 @@ DetectorGeometry::DetectorGeometry(int32_t nmodules, int32_t horizontal_stacking throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Gap x has to be non-negative"); if (gap_y < 0) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Gap y has to be non-negative"); + if (nmodules < horizontal_stacking) + horizontal_stacking = nmodules; width = horizontal_stacking * CONVERTED_MODULE_COLS + (horizontal_stacking - 1) * gap_x; int64_t conv_lines = nmodules / horizontal_stacking + (nmodules % horizontal_stacking > 0 ? 1 : 0); diff --git a/tests/DetectorGeometryTest.cpp b/tests/DetectorGeometryTest.cpp index d3ff8981..0b70958c 100644 --- a/tests/DetectorGeometryTest.cpp +++ b/tests/DetectorGeometryTest.cpp @@ -20,6 +20,20 @@ TEST_CASE("DetectorGeometry_Regular", "[DetectorGeometry]") { REQUIRE(pbuf.module_geometry(15).slow_direction_step() == pbuf.width_pxl()); } +TEST_CASE("DetectorGeometry_Regular_1Module", "[DetectorGeometry]") { + DetectorGeometry geometry(1, 3, 8, 36, false); + + const JFJochProtoBuf::DetectorGeometry pbuf = geometry; + REQUIRE(pbuf.module_geometry_size() == 1); + + REQUIRE(pbuf.width_pxl() == CONVERTED_MODULE_COLS); + REQUIRE(pbuf.height_pxl() == CONVERTED_MODULE_LINES); + REQUIRE(pbuf.module_geometry(0).pixel0() == 0); + + REQUIRE(pbuf.module_geometry(0).fast_direction_step() == 1); + REQUIRE(pbuf.module_geometry(0).slow_direction_step() == CONVERTED_MODULE_COLS); +} + TEST_CASE("DetectorGeometry_RegularMirror", "[DetectorGeometry]") { DetectorGeometry geometry(18, 3, 8, 36, true); From 7a4e75efd38505996e12f0823dd3c0f309e7af44 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 4 Jul 2023 11:45:17 +0200 Subject: [PATCH 098/224] CheckConversionWithGeomTransform: Use fill value for gaps consistent with JFJochReceiver --- tests/DetectorGeometryTest.cpp | 15 +++++++++++++++ tests/FPGAIntegrationTest.cpp | 17 ++++++++--------- tests/FPGAUnitTest.h | 6 ++++-- 3 files changed, 27 insertions(+), 11 deletions(-) diff --git a/tests/DetectorGeometryTest.cpp b/tests/DetectorGeometryTest.cpp index 0b70958c..5f8d4b75 100644 --- a/tests/DetectorGeometryTest.cpp +++ b/tests/DetectorGeometryTest.cpp @@ -34,6 +34,21 @@ TEST_CASE("DetectorGeometry_Regular_1Module", "[DetectorGeometry]") { REQUIRE(pbuf.module_geometry(0).slow_direction_step() == CONVERTED_MODULE_COLS); } +TEST_CASE("DetectorGeometry_Regular_2Module", "[DetectorGeometry]") { + DetectorGeometry geometry(2, 2, 8, 36, false); + + const JFJochProtoBuf::DetectorGeometry pbuf = geometry; + REQUIRE(pbuf.module_geometry_size() == 2); + + REQUIRE(pbuf.width_pxl() == CONVERTED_MODULE_COLS * 2 + 8); + REQUIRE(pbuf.height_pxl() == CONVERTED_MODULE_LINES); + REQUIRE(pbuf.module_geometry(0).pixel0() == 0); + REQUIRE(pbuf.module_geometry(1).pixel0() == CONVERTED_MODULE_COLS + 8); + + REQUIRE(pbuf.module_geometry(0).fast_direction_step() == 1); + REQUIRE(pbuf.module_geometry(0).slow_direction_step() == CONVERTED_MODULE_COLS * 2 + 8); +} + TEST_CASE("DetectorGeometry_RegularMirror", "[DetectorGeometry]") { DetectorGeometry geometry(18, 3, 8, 36, true); diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index d20d3666..fb08881c 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -404,12 +404,11 @@ TEST_CASE("HLS_C_Simulation_check_convert_full_range", "[FPGA][Full]") { TEST_CASE("HLS_C_Simulation_internal_packet_generator_convert_full_range", "[FPGA][Full]") { double energy = 6.0; - const uint16_t nmodules = 1; - DiffractionExperiment x((DetectorGeometry(nmodules))); + const uint16_t nmodules = 4; + DiffractionExperiment x((DetectorGeometry(nmodules, 2, 8, 36, true))); std::vector data(RAW_MODULE_SIZE); JFModulePedestal pedestal_g0, pedestal_g1, pedestal_g2; - std::vector gain(3 * RAW_MODULE_SIZE); for (int i = 0; i < RAW_MODULE_SIZE; i++) { pedestal_g0.GetPedestal()[i] = 0 + (i / 65536) * 1000 + 100 * (i % 5); @@ -428,12 +427,12 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_convert_full_range", "[FPG auto gain_from_file = GainCalibrationFromTestFile(); JFCalibration c(x); - c.Pedestal(0,0) = pedestal_g0; - c.Pedestal(0,1) = pedestal_g1; - c.Pedestal(0,2) = pedestal_g2; - - for (int i = 0; i < x.GetModulesNum(); i++) + for (int i = 0; i < x.GetModulesNum(); i++) { + c.Pedestal(i, 0) = pedestal_g0; + c.Pedestal(i, 1) = pedestal_g1; + c.Pedestal(i, 2) = pedestal_g2; c.GainCalibration(i) = gain_from_file; + } HLSSimulatedDevice test(0, 64); @@ -444,7 +443,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_convert_full_range", "[FPG REQUIRE_NOTHROW(test.OutputStream().read()); REQUIRE(test.OutputStream().size() == 0); - REQUIRE(test.GetBytesReceived() == 128 * JUNGFRAU_PACKET_SIZE_BYTES); + REQUIRE(test.GetBytesReceived() == nmodules * 128 * JUNGFRAU_PACKET_SIZE_BYTES); double mean_error = CheckConversion(x, c, data.data(), test.GetFrameBuffer(0,0)); diff --git a/tests/FPGAUnitTest.h b/tests/FPGAUnitTest.h index 3e8a476b..03d81cc8 100644 --- a/tests/FPGAUnitTest.h +++ b/tests/FPGAUnitTest.h @@ -66,8 +66,11 @@ template double CheckConversionWithGeomTransform(const DiffractionExpe const JFCalibration &calib, const uint16_t *raw, T *converted, size_t storage_cell = 0) { + T fill_value = INT16_MIN; + if (experiment.GetPixelDepth() == 4) + fill_value = INT32_MIN; std::vector conversion_ref(experiment.GetModulesNum() * RAW_MODULE_SIZE); - std::vector conversion_ref_transformed(experiment.GetPixelsNum()); + std::vector conversion_ref_transformed(experiment.GetPixelsNum(), fill_value); JFConversionFloatingPoint conversion; @@ -78,7 +81,6 @@ template double CheckConversionWithGeomTransform(const DiffractionExpe calib.Pedestal(m, 2, storage_cell), experiment.GetPhotonEnergy_keV()); conversion.ConvertFP(conversion_ref.data() + m * RAW_MODULE_SIZE, raw); - } RawToConvertedGeometryAdjustMultipixels(experiment, conversion_ref_transformed.data(), conversion_ref.data() ); From 52902d352ebbc0aad623a83a1608ec41dd53b450 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 4 Jul 2023 14:26:40 +0200 Subject: [PATCH 099/224] JFConversionGPU: Fix procedure in case there is no CUDA --- jungfrau/JFConversionGPU.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/jungfrau/JFConversionGPU.cpp b/jungfrau/JFConversionGPU.cpp index e0169861..4f527304 100644 --- a/jungfrau/JFConversionGPU.cpp +++ b/jungfrau/JFConversionGPU.cpp @@ -1,10 +1,10 @@ // Copyright (2019-2023) Paul Scherrer Institute // SPDX-License-Identifier: GPL-3.0-or-later -#include "JFConversionGPU.h" - #ifndef JFJOCH_USE_CUDA +#include "JFConversionGPU.h" + JFConversionGPU::JFConversionGPU() {} JFConversionGPU::~JFConversionGPU() {} @@ -14,8 +14,8 @@ void JFConversionGPU::Setup(const JFModuleGainCalibration &gain_calibration, con alt_conv.Setup(gain_calibration, pedestal_g0, pedestal_g1, pedestal_g2, energy); } -void JFConversionGPU::ConvertPacket(int16_t *dest, const uint16_t *source, uint16_t packet_number) { - alt_conv.ConvertPacket(dest, source, packet_number); +void JFConversionGPU::ConvertModule(int16_t *dest, const uint16_t *source) { + alt_conv.ConvertPacket(dest, source); } void JFConversionGPU::Sync() {} From 3067604e2a1cc003d53782e9b80cfb216898db76 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 4 Jul 2023 16:37:56 +0200 Subject: [PATCH 100/224] Definitions.h: shortest allowed count time is 5 us --- common/Definitions.h | 2 +- frontend_ui/src/components/DetectorSettings.tsx | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/common/Definitions.h b/common/Definitions.h index 69758c91..d8bd9980 100644 --- a/common/Definitions.h +++ b/common/Definitions.h @@ -18,7 +18,7 @@ #define FPGA_BUFFER_LOCATION_SIZE (RAW_MODULE_SIZE * sizeof(short)) -#define MIN_COUNT_TIME_IN_US 10 +#define MIN_COUNT_TIME_IN_US 5 #define MIN_FRAME_TIME_HALF_SPEED_IN_US 1000 #define MIN_FRAME_TIME_FULL_SPEED_IN_US 470 #define MAX_FRAME_TIME 2000 diff --git a/frontend_ui/src/components/DetectorSettings.tsx b/frontend_ui/src/components/DetectorSettings.tsx index e4ac48ca..fa0d7e1a 100644 --- a/frontend_ui/src/components/DetectorSettings.tsx +++ b/frontend_ui/src/components/DetectorSettings.tsx @@ -72,7 +72,7 @@ class DetectorSettings extends Component { } if (!count_err) { - if (Number(count_time) < 0) + if (Number(count_time) < 5) count_err = true; } From 4ce2fcf98f77fc7936bb41dd80d496eeb3539096 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 4 Jul 2023 20:58:48 +0200 Subject: [PATCH 101/224] DiffractionExperiment: Adjust storage cell delay as a parameter --- common/Definitions.h | 2 +- common/DiffractionExperiment.cpp | 19 +- common/DiffractionExperiment.h | 3 + detector_control/DetectorWrapper.cpp | 2 +- frame_serialize/JFJochFrameDeserializer.cpp | 2 + frame_serialize/JFJochFrameSerializer.cpp | 4 +- frame_serialize/StartMessage.h | 1 + .../src/components/DetectorSettings.tsx | 53 ++++- grpc/jfjoch.proto | 6 +- python/jfjoch_pb2.py | 204 +++++++++--------- tests/CBORTest.cpp | 2 + tests/DiffractionExperimentTest.cpp | 22 +- writer/HDF5NXmx.cpp | 3 +- 13 files changed, 205 insertions(+), 118 deletions(-) diff --git a/common/Definitions.h b/common/Definitions.h index d8bd9980..f9c3a46a 100644 --- a/common/Definitions.h +++ b/common/Definitions.h @@ -23,7 +23,7 @@ #define MIN_FRAME_TIME_FULL_SPEED_IN_US 470 #define MAX_FRAME_TIME 2000 #define MAX_SUMMATION 5000 - +#define MIN_STORAGE_CELL_DELAY_IN_NS 2100 #define READOUT_TIME_IN_US 20 #define GRPC_MAX_MESSAGE_SIZE (1000L*1000L*1000L) diff --git a/common/DiffractionExperiment.cpp b/common/DiffractionExperiment.cpp index 0e12a1ed..a0297604 100644 --- a/common/DiffractionExperiment.cpp +++ b/common/DiffractionExperiment.cpp @@ -78,7 +78,7 @@ DiffractionExperiment::DiffractionExperiment(const DetectorSetup& det_setup) { internal.set_storage_cells(1); internal.set_storage_cell_start(15); - + internal.set_storage_cell_delay_ns(10*1000); Detector(det_setup); Mode(DetectorMode::Conversion); } @@ -854,7 +854,7 @@ DiffractionExperiment::operator JFJochProtoBuf::DetectorInput() const { } ret.set_storage_cell_start(GetStorageCellStart()); ret.set_storage_cell_number(GetStorageCellNumber()); - ret.set_storage_cell_delay(7.5); + ret.set_storage_cell_delay_ns(GetStorageCellDelay().count()); if (GetStorageCellNumber() > 1) { ret.set_period_us((GetFrameTime().count() +10) * GetStorageCellNumber()); @@ -955,7 +955,8 @@ void DiffractionExperiment::LoadDetectorSettings(const JFJochProtoBuf::DetectorS if (settings.has_pedestal_g2_frames()) PedestalG2Frames(settings.pedestal_g2_frames()); - + if (settings.has_storage_cell_delay_ns()) + StorageCellDelay(std::chrono::nanoseconds(settings.storage_cell_delay_ns())); ConversionOnCPU(settings.conversion_on_cpu()); } catch (...) { internal = tmp; @@ -973,6 +974,7 @@ JFJochProtoBuf::DetectorSettings DiffractionExperiment::GetDetectorSettings() co ret.set_pedestal_g0_frames(GetPedestalG0Frames()); ret.set_pedestal_g1_frames(GetPedestalG1Frames()); ret.set_pedestal_g2_frames(GetPedestalG2Frames()); + ret.set_storage_cell_delay_ns(GetStorageCellDelay().count()); return ret; } @@ -1052,6 +1054,7 @@ void DiffractionExperiment::FillMessage(StartMessage &message) const { message.compression_block_size = JFJochBitShuffleCompressor::DefaultBlockSize; message.pixel_bit_depth = GetPixelDepth() * 8; message.storage_cell_number = GetStorageCellNumber(); + message.storage_cell_delay_ns = GetStorageCellDelay().count(); message.file_prefix = GetFilePrefix(); message.pixel_signed = IsPixelSigned(); message.sample_name = GetSampleName(); @@ -1241,3 +1244,13 @@ bool DiffractionExperiment::GetSaveCalibration() const { return dataset.save_calibration(); } +DiffractionExperiment &DiffractionExperiment::StorageCellDelay(std::chrono::nanoseconds input) { + check_min("Storage cell delay [ns]", input.count(), MIN_STORAGE_CELL_DELAY_IN_NS); + internal.set_storage_cell_delay_ns(input.count()); + return *this; +} + +std::chrono::nanoseconds DiffractionExperiment::GetStorageCellDelay() const { + return std::chrono::nanoseconds(internal.storage_cell_delay_ns()); +} + diff --git a/common/DiffractionExperiment.h b/common/DiffractionExperiment.h index 17952e82..f59326ba 100644 --- a/common/DiffractionExperiment.h +++ b/common/DiffractionExperiment.h @@ -132,6 +132,9 @@ public: std::chrono::microseconds GetImageCountTime() const; std::chrono::microseconds GetFrameCountTime() const; + DiffractionExperiment& StorageCellDelay(std::chrono::nanoseconds input); + std::chrono::nanoseconds GetStorageCellDelay() const; + float GetPhotonEnergy_keV() const; float GetWavelength_A() const; float GetBeamX_pxl() const; diff --git a/detector_control/DetectorWrapper.cpp b/detector_control/DetectorWrapper.cpp index b1391f0d..48d1e293 100644 --- a/detector_control/DetectorWrapper.cpp +++ b/detector_control/DetectorWrapper.cpp @@ -105,7 +105,7 @@ void DetectorWrapper::Start(const JFJochProtoBuf::DetectorInput &request) { det.setNumberOfTriggers(request.num_triggers()); det.setStorageCellStart(request.storage_cell_start()); det.setNumberOfAdditionalStorageCells(request.storage_cell_number() - 1); - det.setStorageCellDelay(std::chrono::nanoseconds(static_cast(request.storage_cell_delay() * 1000))); + det.setStorageCellDelay(std::chrono::nanoseconds(request.storage_cell_delay_ns() - MIN_STORAGE_CELL_DELAY_IN_NS)); if (request.period_us() < MIN_FRAME_TIME_HALF_SPEED_IN_US) det.setReadoutSpeed(slsDetectorDefs::speedLevel::FULL_SPEED); diff --git a/frame_serialize/JFJochFrameDeserializer.cpp b/frame_serialize/JFJochFrameDeserializer.cpp index 5cdd38f3..a83fe831 100644 --- a/frame_serialize/JFJochFrameDeserializer.cpp +++ b/frame_serialize/JFJochFrameDeserializer.cpp @@ -540,6 +540,8 @@ void JFJochFrameDeserializer::ProcessStartMessageUserDataElement(CborValue &valu start_message.summation = GetCBORUInt(map_value); else if (key == "storage_cell_number") start_message.storage_cell_number = GetCBORUInt(map_value); + else if (key == "storage_cell_delay") + start_message.storage_cell_delay_ns = GetRational(map_value).first; else if (key == "compression_algorithm") { auto tmp = GetCBORString(map_value); if (tmp == "bslz4") diff --git a/frame_serialize/JFJochFrameSerializer.cpp b/frame_serialize/JFJochFrameSerializer.cpp index 0d3ffc90..14f533ba 100644 --- a/frame_serialize/JFJochFrameSerializer.cpp +++ b/frame_serialize/JFJochFrameSerializer.cpp @@ -255,7 +255,7 @@ inline void CBOR_ENC_USER_DATA(CborEncoder &encoder, const StartMessage& message CborEncoder mapEncoder; cborErr(cbor_encode_text_stringz(&encoder, "user_data")); - cborErr(cbor_encoder_create_map(&encoder, &mapEncoder, 21)); + cborErr(cbor_encoder_create_map(&encoder, &mapEncoder, 22)); CBOR_ENC(mapEncoder, "file_prefix", message.file_prefix); CBOR_ENC(mapEncoder, "sample_name", message.sample_name); @@ -263,6 +263,8 @@ inline void CBOR_ENC_USER_DATA(CborEncoder &encoder, const StartMessage& message CBOR_ENC(mapEncoder, "max_spot_count", message.max_spot_count); CBOR_ENC(mapEncoder, "data_file_count", message.data_file_count); CBOR_ENC(mapEncoder, "storage_cell_number", message.storage_cell_number); + CBOR_ENC_RATIONAL(mapEncoder, "storage_cell_delay", message.storage_cell_delay_ns, 1000*1000*1000UL); + CBOR_ENC(mapEncoder, "pixel_bit_depth", message.pixel_bit_depth); CBOR_ENC(mapEncoder, "pixel_signed", message.pixel_signed); CBOR_ENC(mapEncoder, "min_value", message.min_value); diff --git a/frame_serialize/StartMessage.h b/frame_serialize/StartMessage.h index dece5f8d..463a2102 100644 --- a/frame_serialize/StartMessage.h +++ b/frame_serialize/StartMessage.h @@ -52,6 +52,7 @@ struct StartMessage { uint64_t max_spot_count; // user data uint64_t storage_cell_number; // user data + uint64_t storage_cell_delay_ns; bool pixel_mask_enabled; diff --git a/frontend_ui/src/components/DetectorSettings.tsx b/frontend_ui/src/components/DetectorSettings.tsx index fa0d7e1a..a636f40b 100644 --- a/frontend_ui/src/components/DetectorSettings.tsx +++ b/frontend_ui/src/components/DetectorSettings.tsx @@ -22,11 +22,13 @@ type MyState = { countTimeUs: number | string, pedestalG0Frames: number | string, pedestalG1Frames: number | string, - pedestalG2Frames: number | string + pedestalG2Frames: number | string, + storageCellDelayNs: number | string }, storage_cell_list_value: string, frame_time_error: boolean, count_time_error: boolean, + storage_cell_delay_error: boolean, connection_error: boolean } @@ -46,11 +48,13 @@ class DetectorSettings extends Component { countTimeUs: 980, pedestalG0Frames: 2000, pedestalG1Frames: 300, - pedestalG2Frames: 300 + pedestalG2Frames: 300, + storageCellDelayNs: 10000 }, storage_cell_list_value: "1", frame_time_error: false, count_time_error: false, + storage_cell_delay_error: false, connection_error: true } @@ -88,6 +92,22 @@ class DetectorSettings extends Component { )); } + updateStorageCellDelay = (event: React.ChangeEvent) => { + let num_val = Number(event.target.value); + let err = !Number.isInteger(num_val); + if (!err) { + if (num_val < 2100) err = true; + } + + this.setState(prevState => ( + { + storage_cell_delay_error: err, + s : {...prevState.s, + storageCellDelayNs: event.target.value + } + } + )); + } updateFrameTime = (event: React.ChangeEvent) => { this.updateCollectionTime(event.target.value, this.state.s.countTimeUs); @@ -183,10 +203,14 @@ class DetectorSettings extends Component { }}/>

- + + + + Storage cell count

+ + + ns + }}/> +

+ + + + Collect raw data

@@ -210,7 +253,9 @@ class DetectorSettings extends Component {    + disabled={this.state.count_time_error + || this.state.frame_time_error + || this.state.storage_cell_delay_error}>Upload

diff --git a/grpc/jfjoch.proto b/grpc/jfjoch.proto index 60a43bd4..be39d129 100644 --- a/grpc/jfjoch.proto +++ b/grpc/jfjoch.proto @@ -128,6 +128,7 @@ message DetectorSettings { optional int64 pedestal_g2_frames = 8; bool conversion_on_cpu = 9; + optional int64 storage_cell_delay_ns = 10; } message DetectorModuleGeometry { @@ -164,7 +165,7 @@ message InternalSettings { bool internal_fpga_packet_generator = 9; int64 storage_cells = 10; int64 storage_cell_start = 11; - + int64 storage_cell_delay_ns = 39; int64 pedestal_g0_frames = 12; int64 pedestal_g1_frames = 13; int64 pedestal_g2_frames = 14; @@ -196,6 +197,7 @@ message InternalSettings { bool roi_apply = 37; bool debug_pixel_mask = 38; + } @@ -345,7 +347,7 @@ message DetectorInput { int64 num_triggers = 4; int64 storage_cell_number = 5; int64 storage_cell_start = 6; - double storage_cell_delay = 7; + int64 storage_cell_delay_ns = 7; int64 period_us = 9; int64 count_time_us = 10; } diff --git a/python/jfjoch_pb2.py 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_IMAGE._serialized_start=7825 + _IMAGE._serialized_end=7898 + _MASKTOLOAD._serialized_start=7900 + _MASKTOLOAD._serialized_end=7946 + _MEASUREMENTSTATISTICS._serialized_start=7949 + _MEASUREMENTSTATISTICS._serialized_end=8562 + _BROKERSTATUS._serialized_start=8565 + _BROKERSTATUS._serialized_end=8780 + _BROKERFULLSTATUS._serialized_start=8783 + _BROKERFULLSTATUS._serialized_end=8947 + _DETECTORLISTELEMENT._serialized_start=8949 + _DETECTORLISTELEMENT._serialized_end=9021 + _DETECTORLIST._serialized_start=9023 + _DETECTORLIST._serialized_end=9141 + _DETECTORSELECTION._serialized_start=9143 + _DETECTORSELECTION._serialized_end=9174 + _GRPC_JFJOCHRECEIVER._serialized_start=9654 + _GRPC_JFJOCHRECEIVER._serialized_end=10421 + _GRPC_JFJOCHWRITER._serialized_start=10424 + _GRPC_JFJOCHWRITER._serialized_end=10626 + _GRPC_JFJOCHDETECTOR._serialized_start=10629 + _GRPC_JFJOCHDETECTOR._serialized_end=11015 + _GRPC_JFJOCHBROKER._serialized_start=11018 + _GRPC_JFJOCHBROKER._serialized_end=12707 # @@protoc_insertion_point(module_scope) diff --git a/tests/CBORTest.cpp b/tests/CBORTest.cpp index ddb0881c..06b4551e 100644 --- a/tests/CBORTest.cpp +++ b/tests/CBORTest.cpp @@ -39,6 +39,7 @@ TEST_CASE("CBORSerialize_Start", "[CBOR]") { .space_group_number = 154, .max_spot_count = 250, .storage_cell_number = 16, + .storage_cell_delay_ns = 15345, .pixel_mask_enabled = true, .arm_date = "abc", .sample_name = "lyso", @@ -95,6 +96,7 @@ TEST_CASE("CBORSerialize_Start", "[CBOR]") { CHECK(output_message.space_group_number == message.space_group_number); CHECK(output_message.arm_date == message.arm_date); CHECK(output_message.storage_cell_number == message.storage_cell_number); + CHECK(output_message.storage_cell_delay_ns == message.storage_cell_delay_ns); CHECK(output_message.pixel_signed == message.pixel_signed); CHECK(output_message.sample_name == message.sample_name); CHECK(output_message.file_prefix == message.file_prefix); diff --git a/tests/DiffractionExperimentTest.cpp b/tests/DiffractionExperimentTest.cpp index 8e871b9c..8067b0ab 100644 --- a/tests/DiffractionExperimentTest.cpp +++ b/tests/DiffractionExperimentTest.cpp @@ -709,7 +709,7 @@ TEST_CASE("DiffractionExperiment_DetectorInput_PedestalG2","[DiffractionExperime TEST_CASE("DiffractionExperiment_DetectorInput_StorageCell","[DiffractionExperiment]") { DiffractionExperiment x(DetectorGeometry(8, 2, 8, 36)); - x.FrameTime(1200us).Summation(1).NumTriggers(4560).StorageCells(8); + x.FrameTime(1200us).Summation(1).NumTriggers(4560).StorageCells(8).StorageCellDelay(7000ns); JFJochProtoBuf::DetectorInput ret = x; REQUIRE(ret.modules_num() == 8); REQUIRE(ret.period_us() == 8 * (x.GetFrameTime().count() + 10)); @@ -717,7 +717,7 @@ TEST_CASE("DiffractionExperiment_DetectorInput_StorageCell","[DiffractionExperim REQUIRE(ret.num_triggers() == 4560 + 1); REQUIRE(ret.num_frames() == 1); REQUIRE(ret.storage_cell_number() == 8); - REQUIRE(ret.storage_cell_delay() == 7.5); + REQUIRE(ret.storage_cell_delay_ns() == 7000); REQUIRE(ret.storage_cell_start() == x.GetStorageCellStart()); } @@ -808,7 +808,7 @@ TEST_CASE("DiffractionExperiment_LoadDatasetSettings_Invalid", "[DiffractionExpe TEST_CASE("DiffractionExperiment_LoadDetectorSettings", "[DiffractionExperiment]") { DiffractionExperiment x; - x.PedestalG0Frames(456).PedestalG1Frames(1234).PedestalG2Frames(123); + x.PedestalG0Frames(456).PedestalG1Frames(1234).PedestalG2Frames(123).StorageCellDelay(2500ns); JFJochProtoBuf::DetectorSettings settings; settings.set_frame_time_us(600); @@ -829,6 +829,22 @@ TEST_CASE("DiffractionExperiment_LoadDetectorSettings", "[DiffractionExperiment] REQUIRE(x.GetPedestalG0Frames() == 5000); REQUIRE(x.GetPedestalG1Frames() == 100); REQUIRE(x.GetPedestalG2Frames() == 150); + REQUIRE(x.GetStorageCellDelay().count() == 2500); +} + +TEST_CASE("DiffractionExperiment_LoadDetectorSettings_StorageCellDelay", "[DiffractionExperiment]") { + DiffractionExperiment x; + x.PedestalG0Frames(456).PedestalG1Frames(1234).PedestalG2Frames(123).StorageCellDelay(5000ns); + + JFJochProtoBuf::DetectorSettings settings; + settings.set_frame_time_us(600); + settings.set_count_time_us(400); + settings.set_storage_cell_count(8); + settings.set_use_internal_packet_generator(true); + settings.set_collect_raw_data(true); + settings.set_storage_cell_delay_ns(7000); + REQUIRE_NOTHROW(x.LoadDetectorSettings(settings)); + REQUIRE(x.GetStorageCellDelay().count() == 7000); } TEST_CASE("DiffractionExperiment_LoadDetectorSettings_invalid", "[DiffractionExperiment]") { diff --git a/writer/HDF5NXmx.cpp b/writer/HDF5NXmx.cpp index 36e0eb56..3afeed4d 100644 --- a/writer/HDF5NXmx.cpp +++ b/writer/HDF5NXmx.cpp @@ -93,7 +93,8 @@ void HDF5Metadata::Detector(HDF5File *hdf5_file, const StartMessage &start, cons SaveScalar(det_specific, "software_git_commit", jfjoch_git_sha1()); SaveScalar(det_specific, "software_git_date", jfjoch_git_date()); SaveScalar(det_specific, "storage_cell_number", static_cast(start.storage_cell_number)); - + if (start.storage_cell_number > 1) + SaveScalar(det_specific, "storage_cell_delay", static_cast(start.storage_cell_delay_ns))->Units("ns"); SaveScalar(det_specific, "data_collection_efficiency", end.efficiency); SaveScalar(det_specific, "max_receiver_delay", end.max_receiver_delay); } From 3f7c2600d09760a346c27e7ab75f6a47e86e06ac Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 4 Jul 2023 21:16:25 +0200 Subject: [PATCH 102/224] FPGA: Allow any storage cell number from 1 to 16 --- fpga/hls/jf_conversion.cpp | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-) diff --git a/fpga/hls/jf_conversion.cpp b/fpga/hls/jf_conversion.cpp index 263d844f..25df9b08 100644 --- a/fpga/hls/jf_conversion.cpp +++ b/fpga/hls/jf_conversion.cpp @@ -267,17 +267,8 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, ap_uint<17> gain_offset = (addr_module(addr), addr_eth_packet(addr), counter); ap_uint<12> pedestal_location = addr_module(addr); - if (storage_cells == 2) { - ap_uint<4> storage_cell_id = (addr_frame_number(addr) - 1) % 2; - pedestal_location += modules * storage_cell_id; - } else if (storage_cells == 4) { - ap_uint<4> storage_cell_id = (addr_frame_number(addr) - 1) % 4; - pedestal_location += modules * storage_cell_id; - } else if (storage_cells == 8) { - ap_uint<4> storage_cell_id = (addr_frame_number(addr) - 1) % 8; - pedestal_location += modules * storage_cell_id; - } else if (storage_cells == 16) { - ap_uint<4> storage_cell_id = (addr_frame_number(addr) - 1) % 16; + if (storage_cells > 1) { + ap_uint<4> storage_cell_id = (addr_frame_number(addr) - 1) % storage_cells; pedestal_location += modules * storage_cell_id; } From c9b7bb5a752bcd56907606319b1b06e2db219267 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 4 Jul 2023 21:38:10 +0200 Subject: [PATCH 103/224] JFJochStateMachine: If storage cell number > 1 start from cell 0 --- broker/JFJochStateMachine.cpp | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/broker/JFJochStateMachine.cpp b/broker/JFJochStateMachine.cpp index 90f6177b..35d0e17c 100644 --- a/broker/JFJochStateMachine.cpp +++ b/broker/JFJochStateMachine.cpp @@ -64,7 +64,11 @@ void JFJochStateMachine::TakePedestalInternalG0(std::unique_lock &ul state = JFJochState::Pedestal; DiffractionExperiment local_experiment(experiment); local_experiment.Mode(DetectorMode::PedestalG0); - local_experiment.StorageCellStart(16 - local_experiment.GetStorageCellNumber()); + + if (local_experiment.GetStorageCellNumber() == 1) + local_experiment.StorageCellStart(15); + else + local_experiment.StorageCellStart(0); if (!cancel_sequence && (local_experiment.GetPedestalG0Frames() > 0)) { services.Start(local_experiment, *calibration); @@ -88,6 +92,8 @@ void JFJochStateMachine::TakePedestalInternalG1(std::unique_lock &ul if (local_experiment.GetStorageCellNumber() == 2) local_experiment.StorageCellStart((storage_cell + 15) % 16); // one previous + else + local_experiment.StorageCellStart(15); if (!cancel_sequence && (local_experiment.GetPedestalG1Frames() > 0)) { services.Start(local_experiment, *calibration); @@ -111,6 +117,8 @@ void JFJochStateMachine::TakePedestalInternalG2(std::unique_lock &ul if (local_experiment.GetStorageCellNumber() == 2) local_experiment.StorageCellStart((storage_cell + 15) % 16); // one previous + else + local_experiment.StorageCellStart(15); if (!cancel_sequence && (local_experiment.GetPedestalG2Frames() > 0)) { services.Start(local_experiment, *calibration); @@ -180,7 +188,10 @@ void JFJochStateMachine::Start(const JFJochProtoBuf::DatasetSettings& settings) ClearAndSetMeasurementStatistics(); cancel_sequence = false; - experiment.StorageCellStart(16 - experiment.GetStorageCellNumber()); + if (experiment.GetStorageCellNumber() == 1) + experiment.StorageCellStart(15); + else + experiment.StorageCellStart(0); try { state = JFJochState::Busy; From 2f7b46290af49b811038f1a4c20d7d2a1354d1a4 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 4 Jul 2023 21:59:48 +0200 Subject: [PATCH 104/224] FPGA: Enable non-power of 2 storage cell number --- common/Definitions.h | 2 +- common/DiffractionExperiment.cpp | 6 +- .../src/components/DetectorSettings.tsx | 1 + tests/DiffractionExperimentTest.cpp | 11 +- tests/FPGAIntegrationTest.cpp | 121 ++++++++++++++++-- 5 files changed, 125 insertions(+), 16 deletions(-) diff --git a/common/Definitions.h b/common/Definitions.h index f9c3a46a..549bf901 100644 --- a/common/Definitions.h +++ b/common/Definitions.h @@ -50,7 +50,7 @@ // For FPGA #define ACTION_TYPE 0x52324158 -#define RELEASE_LEVEL 0x0037 +#define RELEASE_LEVEL 0x0038 #define MODE_CONV 0x0001L #define MODE_INTERNAL_PACKET_GEN 0x0002L diff --git a/common/DiffractionExperiment.cpp b/common/DiffractionExperiment.cpp index a0297604..024eff06 100644 --- a/common/DiffractionExperiment.cpp +++ b/common/DiffractionExperiment.cpp @@ -354,9 +354,9 @@ DiffractionExperiment &DiffractionExperiment::SpaceGroupNumber(int64_t input) { DiffractionExperiment &DiffractionExperiment::StorageCells(int64_t input) { check_min("Storage cell number", input, 1); check_max("Storage cell number", input, 16); - if ((input != 1) && (input != 2) && (input != 4) && (input != 8) && (input != 16)) - throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, - "Storage cell count invalid, must be power of 2"); + //if ((input != 1) && (input != 2) && (input != 4) && (input != 8) && (input != 16)) + // throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, + // "Storage cell count invalid, must be power of 2"); internal.set_storage_cells(input); return *this; } diff --git a/frontend_ui/src/components/DetectorSettings.tsx b/frontend_ui/src/components/DetectorSettings.tsx index a636f40b..0ba6dbc7 100644 --- a/frontend_ui/src/components/DetectorSettings.tsx +++ b/frontend_ui/src/components/DetectorSettings.tsx @@ -222,6 +222,7 @@ class DetectorSettings extends Component { 2 4 8 + 15 16 diff --git a/tests/DiffractionExperimentTest.cpp b/tests/DiffractionExperimentTest.cpp index 8067b0ab..49935a54 100644 --- a/tests/DiffractionExperimentTest.cpp +++ b/tests/DiffractionExperimentTest.cpp @@ -618,12 +618,17 @@ TEST_CASE("DiffractionExperiment_StorageCells","[DiffractionExperiment]") { REQUIRE(x.GetImageNumPerTrigger() == 5); REQUIRE(x.GetNumTriggers() == num_triggers); - REQUIRE_THROWS(x.StorageCells(5)); + REQUIRE_NOTHROW(x.StorageCells(5)); + REQUIRE(x.GetStorageCellNumber() == 5); + REQUIRE_THROWS(x.StorageCells(0)); REQUIRE_THROWS(x.StorageCells(-1)); REQUIRE_THROWS(x.StorageCells(32)); - REQUIRE_THROWS(x.StorageCells(3)); - REQUIRE_THROWS(x.StorageCells(15)); + REQUIRE_NOTHROW(x.StorageCells(3)); + REQUIRE(x.GetStorageCellNumber() == 3); + + REQUIRE_NOTHROW(x.StorageCells(15)); + REQUIRE(x.GetStorageCellNumber() == 15); REQUIRE_NOTHROW(x.StorageCells(4)); REQUIRE(x.GetStorageCellNumber() == 4); diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index fb08881c..cefc10a2 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -841,15 +841,21 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { REQUIRE(addr_last_flag(addr)); } -TEST_CASE("HLS_C_Simulation_internal_packet_generator_storage_cell_convert_G0", "[FPGA][Full]") { + +TEST_CASE("HLS_C_Simulation_internal_packet_generator_15_storage_cell_convert_G0", "[FPGA][Full]") { const uint16_t nmodules = 2; + const uint16_t ntrigger = 4; + const uint16_t nstoragecells = 15; + DiffractionExperiment x((DetectorGeometry(nmodules))); x.Mode(DetectorMode::Conversion); - x.PedestalG0Frames(0).NumTriggers(1).ImagesPerTrigger(16).UseInternalPacketGenerator(true) - .PhotonEnergy_keV(10.0).StorageCells(16); + x.PedestalG0Frames(0).NumTriggers(ntrigger).ImagesPerTrigger(nstoragecells).UseInternalPacketGenerator(true) + .PhotonEnergy_keV(10.0).StorageCells(nstoragecells); - HLSSimulatedDevice test(0, 64); + REQUIRE(x.GetImageNum() == ntrigger * nstoragecells); + + HLSSimulatedDevice test(0, ntrigger * nstoragecells); std::vector tmp(3 * RAW_MODULE_SIZE, 50); JFModuleGainCalibration gain(tmp); @@ -860,7 +866,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_storage_cell_convert_G0", REQUIRE_NOTHROW(test.SetCustomInternalGeneratorFrame(data)); JFCalibration c(x); - for (int i = 0; i < 16; i++) { + for (int i = 0; i < nstoragecells; i++) { for (int j = 0; j < RAW_MODULE_SIZE; j++) { c.Pedestal(0, 0, i).GetPedestal()[j] = (15 - i) * 500; c.Pedestal(1, 0, i).GetPedestal()[j] = i * 1000; @@ -876,11 +882,108 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_storage_cell_convert_G0", REQUIRE_NOTHROW(test.OutputStream().read()); REQUIRE(test.OutputStream().size() == 0); - REQUIRE(test.GetBytesReceived() == 2*16*128 * JUNGFRAU_PACKET_SIZE_BYTES); + REQUIRE(test.GetBytesReceived() == ntrigger * nmodules * nstoragecells * 128 * JUNGFRAU_PACKET_SIZE_BYTES); - for (int i = 0; i < 16; i++) { - REQUIRE(test.GetFrameBuffer(i,0)[511*764] == 32 - 15 + (i % 16)); - REQUIRE(test.GetFrameBuffer(i,1)[200*145] == 32 - 2 * (i % 16)); + for (int i = 0; i < ntrigger * nstoragecells; i++) { + REQUIRE(test.GetFrameBuffer(i, 0)[511 * 764] == 32 - 15 + (i % nstoragecells)); + REQUIRE(test.GetFrameBuffer(i, 1)[200 * 145] == 32 - 2 * (i % nstoragecells)); + } +} + +TEST_CASE("HLS_C_Simulation_internal_packet_generator_8_storage_cell_convert_G0", "[FPGA][Full]") { + const uint16_t nmodules = 2; + const uint16_t ntrigger = 4; + const uint16_t nstoragecells = 8; + + DiffractionExperiment x((DetectorGeometry(nmodules))); + + x.Mode(DetectorMode::Conversion); + x.PedestalG0Frames(0).NumTriggers(ntrigger).ImagesPerTrigger(nstoragecells).UseInternalPacketGenerator(true) + .PhotonEnergy_keV(10.0).StorageCells(nstoragecells); + + REQUIRE(x.GetImageNum() == ntrigger * nstoragecells); + + HLSSimulatedDevice test(0, ntrigger * nstoragecells); + + std::vector tmp(3 * RAW_MODULE_SIZE, 50); + JFModuleGainCalibration gain(tmp); + + std::vector data(RAW_MODULE_SIZE); + for (auto &i: data) + i = 16000; + REQUIRE_NOTHROW(test.SetCustomInternalGeneratorFrame(data)); + + JFCalibration c(x); + for (int i = 0; i < nstoragecells; i++) { + for (int j = 0; j < RAW_MODULE_SIZE; j++) { + c.Pedestal(0, 0, i).GetPedestal()[j] = (15 - i) * 500; + c.Pedestal(1, 0, i).GetPedestal()[j] = i * 1000; + } + } + c.GainCalibration(0) = gain; + c.GainCalibration(1) = gain; + + REQUIRE_NOTHROW(test.InitializeCalibration(x, c)); + REQUIRE_NOTHROW(test.StartAction(x)); + REQUIRE_NOTHROW(test.WaitForActionComplete()); + + REQUIRE_NOTHROW(test.OutputStream().read()); + REQUIRE(test.OutputStream().size() == 0); + + REQUIRE(test.GetBytesReceived() == ntrigger * nmodules * nstoragecells * 128 * JUNGFRAU_PACKET_SIZE_BYTES); + + for (int i = 0; i < ntrigger * nstoragecells; i++) { + REQUIRE(test.GetFrameBuffer(i, 0)[511 * 764] == 32 - 15 + (i % nstoragecells)); + REQUIRE(test.GetFrameBuffer(i, 1)[200 * 145] == 32 - 2 * (i % nstoragecells)); + } +} + + +TEST_CASE("HLS_C_Simulation_internal_packet_generator_16_storage_cell_convert_G0", "[FPGA][Full]") { + const uint16_t nmodules = 2; + const uint16_t ntrigger = 4; + const uint16_t nstoragecells = 16; + + DiffractionExperiment x((DetectorGeometry(nmodules))); + + x.Mode(DetectorMode::Conversion); + x.PedestalG0Frames(0).NumTriggers(ntrigger).ImagesPerTrigger(nstoragecells).UseInternalPacketGenerator(true) + .PhotonEnergy_keV(10.0).StorageCells(nstoragecells); + + REQUIRE(x.GetImageNum() == ntrigger * nstoragecells); + + HLSSimulatedDevice test(0, ntrigger * nstoragecells); + + std::vector tmp(3 * RAW_MODULE_SIZE, 50); + JFModuleGainCalibration gain(tmp); + + std::vector data(RAW_MODULE_SIZE); + for (auto &i: data) + i = 16000; + REQUIRE_NOTHROW(test.SetCustomInternalGeneratorFrame(data)); + + JFCalibration c(x); + for (int i = 0; i < nstoragecells; i++) { + for (int j = 0; j < RAW_MODULE_SIZE; j++) { + c.Pedestal(0, 0, i).GetPedestal()[j] = (15 - i) * 500; + c.Pedestal(1, 0, i).GetPedestal()[j] = i * 1000; + } + } + c.GainCalibration(0) = gain; + c.GainCalibration(1) = gain; + + REQUIRE_NOTHROW(test.InitializeCalibration(x, c)); + REQUIRE_NOTHROW(test.StartAction(x)); + REQUIRE_NOTHROW(test.WaitForActionComplete()); + + REQUIRE_NOTHROW(test.OutputStream().read()); + REQUIRE(test.OutputStream().size() == 0); + + REQUIRE(test.GetBytesReceived() == ntrigger * nmodules * nstoragecells * 128 * JUNGFRAU_PACKET_SIZE_BYTES); + + for (int i = 0; i < ntrigger * nstoragecells; i++) { + REQUIRE(test.GetFrameBuffer(i, 0)[511 * 764] == 32 - 15 + (i % nstoragecells)); + REQUIRE(test.GetFrameBuffer(i, 1)[200 * 145] == 32 - 2 * (i % nstoragecells)); } } From f37a99e7e6ee7135681b014c3907685105c5743f Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 5 Jul 2023 11:49:17 +0200 Subject: [PATCH 105/224] DiffractionExperiment: Remove scattering vector setting --- common/DiffractionExperiment.cpp | 24 +--- common/DiffractionExperiment.h | 2 - grpc/jfjoch.proto | 2 - python/jfjoch_pb2.py | 208 ++++++++++++++-------------- tests/DiffractionExperimentTest.cpp | 14 +- 5 files changed, 108 insertions(+), 142 deletions(-) diff --git a/common/DiffractionExperiment.cpp b/common/DiffractionExperiment.cpp index 024eff06..1eb9788c 100644 --- a/common/DiffractionExperiment.cpp +++ b/common/DiffractionExperiment.cpp @@ -36,9 +36,6 @@ DiffractionExperiment::DiffractionExperiment() : DiffractionExperiment(DetectorG DiffractionExperiment::DiffractionExperiment(const DetectorSetup& det_setup) { dataset.set_photon_energy_kev(WVL_1A_IN_KEV); dataset.set_detector_distance_mm(100); - dataset.mutable_scattering_vector()->set_x(0); - dataset.mutable_scattering_vector()->set_y(0); - dataset.mutable_scattering_vector()->set_z(1); dataset.set_data_file_count(1); dataset.set_file_prefix("test"); @@ -214,19 +211,6 @@ DiffractionExperiment &DiffractionExperiment::DetectorDistance_mm(float input) { return *this; } -DiffractionExperiment &DiffractionExperiment::ScatteringVector(Coord input) { - auto c = input.Normalize(); - dataset.mutable_scattering_vector()->set_x(c.x); - dataset.mutable_scattering_vector()->set_y(c.y); - dataset.mutable_scattering_vector()->set_z(c.z); - return *this; -} - -DiffractionExperiment &DiffractionExperiment::ScatteringVector() { - dataset.clear_scattering_vector(); - return *this; -} - DiffractionExperiment &DiffractionExperiment::FilePrefix(std::string input) { // File prefix with front slash is not allowed for security reasons if (input.front() == '/') @@ -556,11 +540,7 @@ float DiffractionExperiment::GetDetectorDistance_mm() const { } Coord DiffractionExperiment::GetScatteringVector() const { - if (dataset.has_scattering_vector()) - return Coord(dataset.scattering_vector().x(), dataset.scattering_vector().y(), dataset.scattering_vector().z()) - * (dataset.photon_energy_kev() / WVL_1A_IN_KEV); - else - return {0,0,dataset.photon_energy_kev() / WVL_1A_IN_KEV}; + return {0,0,dataset.photon_energy_kev() / WVL_1A_IN_KEV}; } std::string DiffractionExperiment::GetFilePrefix() const { @@ -920,8 +900,6 @@ void DiffractionExperiment::LoadDatasetSettings(const JFJochProtoBuf::DatasetSet SetUnitCell(); SpaceGroupNumber(settings.space_group_number()); SampleName(settings.sample_name()); - if (settings.has_scattering_vector()) - ScatteringVector({0,0,1}); Compression(settings.compression()); Binning2x2(settings.binning2x2()); } catch (...) { diff --git a/common/DiffractionExperiment.h b/common/DiffractionExperiment.h index f59326ba..322fe262 100644 --- a/common/DiffractionExperiment.h +++ b/common/DiffractionExperiment.h @@ -60,8 +60,6 @@ public: DiffractionExperiment& BeamY_pxl(float input); DiffractionExperiment& DetectorDistance_mm(float input); - DiffractionExperiment& ScatteringVector(Coord input); - DiffractionExperiment& ScatteringVector(); DiffractionExperiment& FilePrefix(std::string input); DiffractionExperiment& DataFileCount(int64_t input); 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_GRPC_JFJOCHDETECTOR._serialized_start=10551 + _GRPC_JFJOCHDETECTOR._serialized_end=10937 + _GRPC_JFJOCHBROKER._serialized_start=10940 + _GRPC_JFJOCHBROKER._serialized_end=12629 # @@protoc_insertion_point(module_scope) diff --git a/tests/DiffractionExperimentTest.cpp b/tests/DiffractionExperimentTest.cpp index 49935a54..88b0aa38 100644 --- a/tests/DiffractionExperimentTest.cpp +++ b/tests/DiffractionExperimentTest.cpp @@ -368,16 +368,12 @@ TEST_CASE("DiffractionExperiment_Metadata","[DiffractionExperiment]") { REQUIRE(x.GetPhotonEnergy_keV() == 6.0); REQUIRE(x.GetWavelength_A() == Approx(12.39854 / 6.0)); - x.DetectorDistance_mm(30.0).BeamX_pxl(1200).BeamY_pxl(1000) - .ScatteringVector({1,2,3}).Summation(3).FrameTime(900us); + x.DetectorDistance_mm(30.0).BeamX_pxl(1200).BeamY_pxl(1000).Summation(3).FrameTime(900us); REQUIRE(x.GetBeamX_pxl() == Approx(1200)); REQUIRE(x.GetBeamY_pxl() == Approx(1000)); REQUIRE(x.GetDetectorDistance_mm() == Approx(30.0)); - REQUIRE(x.GetScatteringVector().x == Approx(1.0/sqrt(14.0) / x.GetWavelength_A())); - REQUIRE(x.GetScatteringVector().y == Approx(2.0/sqrt(14.0) / x.GetWavelength_A())); - REQUIRE(x.GetScatteringVector().z == Approx(3.0/sqrt(14.0) / x.GetWavelength_A())); REQUIRE_THROWS(x.PedestalG0Frames(-1)); REQUIRE_THROWS(x.PedestalG1Frames(-1)); @@ -728,8 +724,7 @@ TEST_CASE("DiffractionExperiment_DetectorInput_StorageCell","[DiffractionExperim TEST_CASE("DiffractionExperiment_LoadDatasetSettings", "[DiffractionExperiment]") { DiffractionExperiment x; - x.ImagesPerTrigger(567).BeamY_pxl(324).ScatteringVector({1,0,0}) - .Compression(JFJochProtoBuf::BSHUF_ZSTD); + x.ImagesPerTrigger(567).BeamY_pxl(324).Compression(JFJochProtoBuf::BSHUF_ZSTD); JFJochProtoBuf::DatasetSettings settings; settings.set_images_per_trigger(234); settings.set_ntrigger(56); @@ -745,7 +740,6 @@ TEST_CASE("DiffractionExperiment_LoadDatasetSettings", "[DiffractionExperiment]" REQUIRE_NOTHROW(x.LoadDatasetSettings(settings)); - REQUIRE(x.GetScatteringVector().x == 0); REQUIRE(x.GetImageNumPerTrigger() == 234); REQUIRE(x.GetBeamX_pxl() == Approx(23.4/2)); REQUIRE(x.GetBeamY_pxl() == Approx(123.4/2)); @@ -789,8 +783,7 @@ TEST_CASE("DiffractionExperiment_ImageTimeUs", "[DiffractionExperiment]") { TEST_CASE("DiffractionExperiment_LoadDatasetSettings_Invalid", "[DiffractionExperiment]") { DiffractionExperiment x; - x.ImagesPerTrigger(567).BeamY_pxl(324).ScatteringVector({1,0,0}) - .Compression(JFJochProtoBuf::BSHUF_ZSTD); + x.ImagesPerTrigger(567).BeamY_pxl(324).Compression(JFJochProtoBuf::BSHUF_ZSTD); JFJochProtoBuf::DatasetSettings settings; settings.set_images_per_trigger(-1); settings.set_ntrigger(56); @@ -805,7 +798,6 @@ TEST_CASE("DiffractionExperiment_LoadDatasetSettings_Invalid", "[DiffractionExpe REQUIRE_THROWS(x.LoadDatasetSettings(settings)); - REQUIRE(x.GetScatteringVector().x == Approx(1)); REQUIRE(x.GetImageNumPerTrigger() == 567); REQUIRE(x.GetBeamY_pxl() == Approx(324)); REQUIRE(x.GetSpaceGroupNumber() == 0); From 31e1cb159bf54d031423b13c63ee624d88540019 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 5 Jul 2023 12:50:41 +0200 Subject: [PATCH 106/224] PCIe driver: Fix path --- fpga/pcie_driver/jfjoch_drv.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fpga/pcie_driver/jfjoch_drv.h b/fpga/pcie_driver/jfjoch_drv.h index 3827847d..ee6c443c 100644 --- a/fpga/pcie_driver/jfjoch_drv.h +++ b/fpga/pcie_driver/jfjoch_drv.h @@ -11,7 +11,7 @@ #include #include -#include "../host/ActionConfig.h" +#include "ActionConfig.h" // From Xilinx XDMA /* obtain the 32 most significant (high) bits of a 32-bit or 64-bit address */ From e3c224ccb1a9359dc18f0437edd793f944ecad5b Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 5 Jul 2023 14:03:10 +0200 Subject: [PATCH 107/224] jfjoch_receiver: Fix preive indexed ZMQ address --- receiver/jfjoch_receiver.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/receiver/jfjoch_receiver.cpp b/receiver/jfjoch_receiver.cpp index adf82fae..26e8a102 100644 --- a/receiver/jfjoch_receiver.cpp +++ b/receiver/jfjoch_receiver.cpp @@ -152,7 +152,7 @@ int main(int argc, char **argv) { } if (input.contains("preview_indexed_zmq_addr")) { - preview_indexed = std::make_unique(context, input["preview_zmq_addr"]); + preview_indexed = std::make_unique(context, input["preview_indexed_zmq_addr"]); service.PreviewPublisher(preview_indexed.get()); logger.Info("Preview available on ZMQ addr " + input["preview_indexed_zmq_addr"].get()); } From 377410500687f6dbfc1abdff0dfc856793bfdc4d Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 5 Jul 2023 14:05:24 +0200 Subject: [PATCH 108/224] jfjoch_receiver: Fix preview indexed ZMQ address --- receiver/jfjoch_receiver.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/receiver/jfjoch_receiver.cpp b/receiver/jfjoch_receiver.cpp index 26e8a102..c6bf8c11 100644 --- a/receiver/jfjoch_receiver.cpp +++ b/receiver/jfjoch_receiver.cpp @@ -154,7 +154,7 @@ int main(int argc, char **argv) { if (input.contains("preview_indexed_zmq_addr")) { preview_indexed = std::make_unique(context, input["preview_indexed_zmq_addr"]); service.PreviewPublisher(preview_indexed.get()); - logger.Info("Preview available on ZMQ addr " + input["preview_indexed_zmq_addr"].get()); + logger.Info("Preview available for indexed frames on ZMQ addr " + input["preview_indexed_zmq_addr"].get()); } if (input.contains("compression_threads")) { From 9e92e230baa92dd42ac158aab2b7bd265396d43e Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 6 Jul 2023 10:44:01 +0200 Subject: [PATCH 109/224] JFJochFrameSerializer: Single header for all the messages --- common/DiffractionExperiment.h | 3 +- common/ImagePusher.h | 3 +- common/ZMQPreviewPublisher.h | 2 +- .../{StartMessage.h => CBORMessages.h} | 62 +++++++++++++++++-- frame_serialize/CMakeLists.txt | 3 +- frame_serialize/EndMessage.h | 25 -------- frame_serialize/ImageMessage.h | 51 --------------- frame_serialize/JFJochFrameDeserializer.h | 4 +- frame_serialize/JFJochFrameSerializer.h | 4 +- writer/HDF5DataFile.h | 2 +- writer/HDF5NXmx.h | 3 +- writer/HDF5Writer.h | 3 +- 12 files changed, 66 insertions(+), 99 deletions(-) rename frame_serialize/{StartMessage.h => CBORMessages.h} (62%) delete mode 100644 frame_serialize/EndMessage.h delete mode 100644 frame_serialize/ImageMessage.h diff --git a/common/DiffractionExperiment.h b/common/DiffractionExperiment.h index 322fe262..20e79896 100644 --- a/common/DiffractionExperiment.h +++ b/common/DiffractionExperiment.h @@ -15,8 +15,7 @@ #include "UnitCell.h" #include "Coord.h" #include "Definitions.h" -#include "../frame_serialize/StartMessage.h" -#include "../frame_serialize/EndMessage.h" +#include "../frame_serialize/CBORMessages.h" #include "DetectorSetup.h" #include "ROIFilter.h" diff --git a/common/ImagePusher.h b/common/ImagePusher.h index bde64161..51aaf76f 100644 --- a/common/ImagePusher.h +++ b/common/ImagePusher.h @@ -10,8 +10,7 @@ #include "DiffractionExperiment.h" #include "DiffractionSpot.h" #include "../frame_serialize/JFJochFrameSerializer.h" -#include "../frame_serialize/StartMessage.h" -#include "../frame_serialize/EndMessage.h" +#include "../frame_serialize/CBORMessages.h" #include "ZeroCopyReturnValue.h" void PrepareCBORImage(DataMessage& message, diff --git a/common/ZMQPreviewPublisher.h b/common/ZMQPreviewPublisher.h index 489ee898..aea24872 100644 --- a/common/ZMQPreviewPublisher.h +++ b/common/ZMQPreviewPublisher.h @@ -9,7 +9,7 @@ #include "ZMQWrappers.h" #include "DiffractionExperiment.h" #include "../jungfrau/JFCalibration.h" -#include "../frame_serialize/ImageMessage.h" +#include "../frame_serialize/CBORMessages.h" class ZMQPreviewPublisher { ZMQSocket socket; diff --git a/frame_serialize/StartMessage.h b/frame_serialize/CBORMessages.h similarity index 62% rename from frame_serialize/StartMessage.h rename to frame_serialize/CBORMessages.h index 463a2102..9f1b09c6 100644 --- a/frame_serialize/StartMessage.h +++ b/frame_serialize/CBORMessages.h @@ -1,15 +1,52 @@ -// Copyright (2019-2022) Paul Scherrer Institute +// Copyright (2019-2023) Paul Scherrer Institute // SPDX-License-Identifier: GPL-3.0-or-later -#ifndef JUNGFRAUJOCH_STARTMESSAGE_H -#define JUNGFRAUJOCH_STARTMESSAGE_H +#ifndef JUNGFRAUJOCH_CBORMESSAGES_H +#define JUNGFRAUJOCH_CBORMESSAGES_H #include #include #include #include #include "../compression/CompressionAlgorithmEnum.h" -#include "ImageMessage.h" +#include "../common/SpotToSave.h" + +struct CBORImage { + const uint8_t *data; + size_t size; // Including compression + size_t xpixel; + size_t ypixel; + size_t pixel_depth_bytes; + bool pixel_is_signed; + bool pixel_is_float = false; + CompressionAlgorithm algorithm; + std::string channel; +}; + +struct DataMessage { + int64_t number = INT64_MIN; + CBORImage image; + std::vector spots; + std::vector rad_int_profile; + uint64_t indexing_result; // 0 - not tried, 1 - tried and failed, 2 - tried and success + std::vector indexing_lattice; + + uint64_t bunch_id; + uint32_t jf_info; + float receiver_available_send_buffers; + int64_t receiver_aq_dev_delay; + + uint64_t timestamp; + uint32_t timestamp_base; + + uint32_t storage_cell; + + uint32_t exptime; + uint32_t exptime_base; + + std::string series_unique_id; + uint64_t series_id; +}; struct GoniometerAxis { float increment; @@ -99,4 +136,19 @@ struct StartMessage { } }; -#endif //JUNGFRAUJOCH_STARTMESSAGE_H +struct EndMessage { + uint64_t number_of_images; + uint64_t max_receiver_delay; + float efficiency; + + bool write_master_file; + + std::string end_date; + + std::string series_unique_id; + uint64_t series_id; + + std::map> rad_int_result; +}; + +#endif //JUNGFRAUJOCH_CBORMESSAGES_H diff --git a/frame_serialize/CMakeLists.txt b/frame_serialize/CMakeLists.txt index 0d9b62ee..c4d541f8 100644 --- a/frame_serialize/CMakeLists.txt +++ b/frame_serialize/CMakeLists.txt @@ -1,7 +1,6 @@ ADD_LIBRARY(FrameSerialize STATIC JFJochFrameSerializer.cpp JFJochFrameSerializer.h JFJochFrameDeserializer.cpp JFJochFrameDeserializer.h - ImageMessage.h tinycbor/src/cborparser_dup_string.c tinycbor/src/cborencoder.c tinycbor/src/cborencoder_close_container_checked.c @@ -11,4 +10,4 @@ ADD_LIBRARY(FrameSerialize STATIC tinycbor/src/cborpretty.c tinycbor/src/cborerrorstrings.c tinycbor/src/cbor.h - tinycbor/src/tinycbor-version.h CborErr.h StartMessage.h EndMessage.h CborUtil.h) + tinycbor/src/tinycbor-version.h CborErr.h CborUtil.h CBORMessages.h) diff --git a/frame_serialize/EndMessage.h b/frame_serialize/EndMessage.h deleted file mode 100644 index e6bb462c..00000000 --- a/frame_serialize/EndMessage.h +++ /dev/null @@ -1,25 +0,0 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later - -#ifndef JUNGFRAUJOCH_ENDMESSAGE_H -#define JUNGFRAUJOCH_ENDMESSAGE_H - -#include -#include - -struct EndMessage { - uint64_t number_of_images; - uint64_t max_receiver_delay; - float efficiency; - - bool write_master_file; - - std::string end_date; - - std::string series_unique_id; - uint64_t series_id; - - std::map> rad_int_result; -}; - -#endif //JUNGFRAUJOCH_ENDMESSAGE_H diff --git a/frame_serialize/ImageMessage.h b/frame_serialize/ImageMessage.h deleted file mode 100644 index 741e668f..00000000 --- a/frame_serialize/ImageMessage.h +++ /dev/null @@ -1,51 +0,0 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later - -#ifndef JUNGFRAUJOCH_IMAGEMESSAGE_H -#define JUNGFRAUJOCH_IMAGEMESSAGE_H - -#include -#include -#include -#include -#include "../compression/CompressionAlgorithmEnum.h" -#include "../common/SpotToSave.h" - -struct CBORImage { - const uint8_t *data; - size_t size; // Including compression - size_t xpixel; - size_t ypixel; - size_t pixel_depth_bytes; - bool pixel_is_signed; - bool pixel_is_float = false; - CompressionAlgorithm algorithm; - std::string channel; -}; - -struct DataMessage { - int64_t number = INT64_MIN; - CBORImage image; - std::vector spots; - std::vector rad_int_profile; - uint64_t indexing_result; // 0 - not tried, 1 - tried and failed, 2 - tried and success - std::vector indexing_lattice; - - uint64_t bunch_id; - uint32_t jf_info; - float receiver_available_send_buffers; - int64_t receiver_aq_dev_delay; - - uint64_t timestamp; - uint32_t timestamp_base; - - uint32_t storage_cell; - - uint32_t exptime; - uint32_t exptime_base; - - std::string series_unique_id; - uint64_t series_id; -}; - -#endif //JUNGFRAUJOCH_IMAGEMESSAGE_H diff --git a/frame_serialize/JFJochFrameDeserializer.h b/frame_serialize/JFJochFrameDeserializer.h index 748b1948..04ac9aee 100644 --- a/frame_serialize/JFJochFrameDeserializer.h +++ b/frame_serialize/JFJochFrameDeserializer.h @@ -11,9 +11,7 @@ #include "../common/SpotToSave.h" #include "tinycbor/src/cbor.h" -#include "EndMessage.h" -#include "StartMessage.h" -#include "ImageMessage.h" +#include "CBORMessages.h" #include class JFJochFrameDeserializer { diff --git a/frame_serialize/JFJochFrameSerializer.h b/frame_serialize/JFJochFrameSerializer.h index 8ecc5472..96a751a7 100644 --- a/frame_serialize/JFJochFrameSerializer.h +++ b/frame_serialize/JFJochFrameSerializer.h @@ -8,9 +8,7 @@ #include #include #include "../common/SpotToSave.h" -#include "StartMessage.h" -#include "EndMessage.h" -#include "ImageMessage.h" +#include "CBORMessages.h" class JFJochFrameSerializer { uint8_t *buffer = nullptr; diff --git a/writer/HDF5DataFile.h b/writer/HDF5DataFile.h index bd43a00e..18924b9d 100644 --- a/writer/HDF5DataFile.h +++ b/writer/HDF5DataFile.h @@ -10,7 +10,7 @@ #include "HDF5Objects.h" #include "../common/SpotToSave.h" -#include "../frame_serialize/ImageMessage.h" +#include "../frame_serialize/CBORMessages.h" struct HDF5DataFileStatistics { std::string filename; diff --git a/writer/HDF5NXmx.h b/writer/HDF5NXmx.h index 291fb895..19c80771 100644 --- a/writer/HDF5NXmx.h +++ b/writer/HDF5NXmx.h @@ -4,8 +4,7 @@ #ifndef JUNGFRAUJOCH_HDF5NXMX_H #define JUNGFRAUJOCH_HDF5NXMX_H -#include "../frame_serialize/StartMessage.h" -#include "../frame_serialize/EndMessage.h" +#include "../frame_serialize/CBORMessages.h" #include "HDF5Objects.h" diff --git a/writer/HDF5Writer.h b/writer/HDF5Writer.h index a85fbd10..d23d78f3 100644 --- a/writer/HDF5Writer.h +++ b/writer/HDF5Writer.h @@ -7,8 +7,7 @@ #include #include "HDF5DataFile.h" -#include "../frame_serialize/StartMessage.h" -#include "../frame_serialize/ImageMessage.h" +#include "../frame_serialize/CBORMessages.h" class HDF5Writer { std::vector > files; From 36cfba6093de2114c4f71c1dc19246de39364520 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 6 Jul 2023 11:09:24 +0200 Subject: [PATCH 110/224] JFJochFrameSerializer: Add magic number to ensure that CBOR user data fields are consistent between receiver and writer --- frame_serialize/CBORMessages.h | 3 + frame_serialize/JFJochFrameDeserializer.cpp | 63 +++++++++++++++++---- frame_serialize/JFJochFrameDeserializer.h | 1 + frame_serialize/JFJochFrameSerializer.cpp | 28 +++++---- 4 files changed, 74 insertions(+), 21 deletions(-) diff --git a/frame_serialize/CBORMessages.h b/frame_serialize/CBORMessages.h index 9f1b09c6..17bf2d7c 100644 --- a/frame_serialize/CBORMessages.h +++ b/frame_serialize/CBORMessages.h @@ -11,6 +11,9 @@ #include "../compression/CompressionAlgorithmEnum.h" #include "../common/SpotToSave.h" +constexpr const uint64_t user_data_release = 1; +constexpr const uint64_t user_data_magic_number = 0x52320000UL | user_data_release; + struct CBORImage { const uint8_t *data; size_t size; // Including compression diff --git a/frame_serialize/JFJochFrameDeserializer.cpp b/frame_serialize/JFJochFrameDeserializer.cpp index a83fe831..3fafd480 100644 --- a/frame_serialize/JFJochFrameDeserializer.cpp +++ b/frame_serialize/JFJochFrameDeserializer.cpp @@ -279,6 +279,16 @@ void GetCBORMultidimTypedArray(CBORImage &v, CborValue &value) { cborErr(cbor_value_leave_container(&value, &array_value)); } +bool CheckMagicNumber(CborValue &v) { + auto key = GetCBORString(v); + if (key != "magic_number") { + cbor_value_advance(&v); + return false; + } else { + return GetCBORUInt(v) == user_data_magic_number; + } +} + void JFJochFrameDeserializer::GetCBORSpots(CborValue &value) { size_t array_len = GetCBORArrayLen(value); @@ -365,6 +375,12 @@ void JFJochFrameDeserializer::ProcessDetTranslation(CborValue &value) { void JFJochFrameDeserializer::ProcessImageMessageUserDataElement(CborValue &value) { CborValue map_value; cborErr(cbor_value_enter_container(&value, &map_value)); + + if (!CheckMagicNumber(map_value)) { + cborErr(cbor_value_leave_container(&value, &map_value)); + return; + } + while (!cbor_value_at_end(&map_value)) { auto key = GetCBORString(map_value); @@ -501,6 +517,12 @@ void JFJochFrameDeserializer::ProcessUnitCellElement(CborValue &value) { void JFJochFrameDeserializer::ProcessStartMessageUserDataElement(CborValue &value) { CborValue map_value; cborErr(cbor_value_enter_container(&value, &map_value)); + + if (!CheckMagicNumber(map_value)) { + cborErr(cbor_value_leave_container(&value, &map_value)); + return; + } + while (!cbor_value_at_end(&map_value)) { auto key = GetCBORString(map_value); @@ -626,27 +648,46 @@ bool JFJochFrameDeserializer::ProcessStartMessageElement(CborValue &value) { } } +void JFJochFrameDeserializer::ProcessEndMessageUserDataElement(CborValue &value) { + CborValue map_value; + cborErr(cbor_value_enter_container(&value, &map_value)); + + if (!CheckMagicNumber(map_value)) { + cborErr(cbor_value_leave_container(&value, &map_value)); + return; + } + + while (!cbor_value_at_end(&map_value)) { + auto key = GetCBORString(map_value); + if (key == "number_of_images") + end_message.number_of_images = GetCBORUInt(map_value); + else if (key == "max_receiver_delay") + end_message.max_receiver_delay = GetCBORUInt(map_value); + else if (key == "receiver_efficiency") + end_message.efficiency = GetCBORFloat(map_value); + else if (key == "write_master_file") + end_message.write_master_file = GetCBORBool(map_value); + else if (key == "rad_int_result") + ProcessRadIntResultElement(map_value); + else + cbor_value_advance(&map_value); + } + cborErr(cbor_value_leave_container(&value, &map_value)); +} + bool JFJochFrameDeserializer::ProcessEndMessageElement(CborValue &value) { if (cbor_value_at_end(&value)) return false; else { auto key = GetCBORString(value); - if (key == "number_of_images") - end_message.number_of_images = GetCBORUInt(value); - else if (key == "max_receiver_delay") - end_message.max_receiver_delay = GetCBORUInt(value); - else if (key == "receiver_efficiency") - end_message.efficiency = GetCBORFloat(value); - else if (key == "write_master_file") - end_message.write_master_file = GetCBORBool(value); - else if (key == "end_date") + if (key == "end_date") end_message.end_date = GetCBORString(value); else if (key == "series_unique_id") end_message.series_unique_id = GetCBORString(value); else if (key == "series_id") end_message.series_id = GetCBORUInt(value); - else if (key == "rad_int_result") - ProcessRadIntResultElement(value); + else if (key == "user_data") + ProcessEndMessageUserDataElement(value); else cbor_value_advance(&value); return true; diff --git a/frame_serialize/JFJochFrameDeserializer.h b/frame_serialize/JFJochFrameDeserializer.h index 04ac9aee..bd20ab80 100644 --- a/frame_serialize/JFJochFrameDeserializer.h +++ b/frame_serialize/JFJochFrameDeserializer.h @@ -42,6 +42,7 @@ private: void ProcessUnitCellElement(CborValue &value); void ProcessStartMessageUserDataElement(CborValue &value); void ProcessImageMessageUserDataElement(CborValue &value); + void ProcessEndMessageUserDataElement(CborValue &value); bool ProcessImageMessageElement(CborValue &value); bool ProcessStartMessageElement(CborValue &value); bool ProcessEndMessageElement(CborValue &value); diff --git a/frame_serialize/JFJochFrameSerializer.cpp b/frame_serialize/JFJochFrameSerializer.cpp index 14f533ba..ae5cf7a8 100644 --- a/frame_serialize/JFJochFrameSerializer.cpp +++ b/frame_serialize/JFJochFrameSerializer.cpp @@ -255,7 +255,8 @@ inline void CBOR_ENC_USER_DATA(CborEncoder &encoder, const StartMessage& message CborEncoder mapEncoder; cborErr(cbor_encode_text_stringz(&encoder, "user_data")); - cborErr(cbor_encoder_create_map(&encoder, &mapEncoder, 22)); + cborErr(cbor_encoder_create_map(&encoder, &mapEncoder, 23)); + CBOR_ENC(mapEncoder, "magic_number", user_data_magic_number); CBOR_ENC(mapEncoder, "file_prefix", message.file_prefix); CBOR_ENC(mapEncoder, "sample_name", message.sample_name); @@ -378,20 +379,26 @@ void JFJochFrameSerializer::SerializeSequenceStart(const StartMessage& message) } void JFJochFrameSerializer::SerializeSequenceEnd(const EndMessage& message) { - CborEncoder encoder, mapEncoder; + CborEncoder encoder, mapEncoder, userDataMapEncoder; cbor_encoder_init(&encoder, buffer, max_buffer_size, 0); - cborErr(cbor_encode_tag(&encoder,CborSignatureTag )); - cborErr(cbor_encoder_create_map(&encoder, &mapEncoder, 9)); + cborErr(cbor_encode_tag(&encoder, CborSignatureTag)); + cborErr(cbor_encoder_create_map(&encoder, &mapEncoder, 5)); CBOR_ENC(mapEncoder, "type", "end"); CBOR_ENC(mapEncoder, "series_unique_id", message.series_unique_id); CBOR_ENC(mapEncoder, "series_id", message.series_id); - CBOR_ENC(mapEncoder, "number_of_images", message.number_of_images); - CBOR_ENC(mapEncoder, "max_receiver_delay", message.max_receiver_delay); - CBOR_ENC(mapEncoder, "receiver_efficiency", message.efficiency); - CBOR_ENC(mapEncoder, "write_master_file", message.write_master_file); CBOR_ENC(mapEncoder, "end_date", message.end_date); - CBOR_ENC_RAD_INT_RESULT(mapEncoder, "rad_int_result", message.rad_int_result); + + cborErr(cbor_encode_text_stringz(&mapEncoder, "user_data")); + cborErr(cbor_encoder_create_map(&mapEncoder, &userDataMapEncoder, 6)); + CBOR_ENC(userDataMapEncoder, "magic_number", user_data_magic_number); + CBOR_ENC(userDataMapEncoder, "number_of_images", message.number_of_images); + CBOR_ENC(userDataMapEncoder, "max_receiver_delay", message.max_receiver_delay); + CBOR_ENC(userDataMapEncoder, "receiver_efficiency", message.efficiency); + CBOR_ENC(userDataMapEncoder, "write_master_file", message.write_master_file); + CBOR_ENC_RAD_INT_RESULT(userDataMapEncoder, "rad_int_result", message.rad_int_result); + cborErr(cbor_encoder_close_container(&mapEncoder, &userDataMapEncoder)); + cborErr(cbor_encoder_close_container(&encoder, &mapEncoder)); curr_size = cbor_encoder_get_buffer_size(&encoder, buffer); @@ -416,8 +423,9 @@ void JFJochFrameSerializer::SerializeImage(const DataMessage& message) { message.timestamp_base); cborErr(cbor_encode_text_stringz(&mapEncoder, "user_data")); - cborErr(cbor_encoder_create_map(&mapEncoder, &userDataMapEncoder, 9)); + cborErr(cbor_encoder_create_map(&mapEncoder, &userDataMapEncoder, 10)); + CBOR_ENC(userDataMapEncoder, "magic_number", user_data_magic_number); CBOR_ENC(userDataMapEncoder, "spots", message.spots); CBOR_ENC(userDataMapEncoder, "rad_int_profile", message.rad_int_profile); CBOR_ENC(userDataMapEncoder, "indexing_result", message.indexing_result); From 35b3704ccf9c4b3dec7a4c4d0f0fac74e1b99f21 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 25 Jul 2023 11:16:39 +0200 Subject: [PATCH 111/224] FPGA: ignore packets with module number out of bounds + set bit in error register --- fpga/hls/host_writer.cpp | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/fpga/hls/host_writer.cpp b/fpga/hls/host_writer.cpp index 83ebf926..6e0f0471 100644 --- a/fpga/hls/host_writer.cpp +++ b/fpga/hls/host_writer.cpp @@ -144,6 +144,7 @@ void host_writer(STREAM_512 &data_in, packet_512_t packet_in; data_in >> packet_in; + ap_uint<5> nmodules = ACT_REG_NMODULES(packet_in.data); ap_uint<32> data_collection_mode = ACT_REG_MODE(packet_in.data); ap_uint<32> data_collection_id = data_collection_mode(31, 16); // upper 16-bit of mode @@ -171,9 +172,9 @@ void host_writer(STREAM_512 &data_in, // Process one UDP packet per iteration #pragma HLS PIPELINE II=128 ap_uint<64> frame_number = addr_frame_number(addr); - ap_uint<4> module = addr_module(addr); + ap_uint<4> module_number = addr_module(addr); ap_uint<7> eth_packet = addr_eth_packet(addr); - ap_uint<5> id = module * 2 + (frame_number % 2); + ap_uint<5> id = module_number * 2 + (frame_number % 2); if (curr_frame[id] != frame_number) { if (packet_mask[id] != 0) { @@ -186,13 +187,16 @@ void host_writer(STREAM_512 &data_in, ap_uint<64> comp_bunchid = jf_bunchid[id]; ap_uint<32> comp_exptime = exptime[id]; - write_completion(m_axis_completion, comp_handle, module, + write_completion(m_axis_completion, comp_handle, module_number, comp_frame, comp_packet_mask, comp_packet_count, comp_debug, comp_timestamp, comp_bunchid, comp_exptime, data_collection_id); } - - if (s_axis_work_request.empty() && mode_nonblocking) { + if (module_number >= nmodules) { + req_handle = HANDLE_SKIP_FRAME; + req_host_offset = 0; + internal_err_reg[5] = 1; + } else if (s_axis_work_request.empty() && mode_nonblocking) { req_handle = HANDLE_SKIP_FRAME; req_host_offset = 0; } else { @@ -253,9 +257,9 @@ void host_writer(STREAM_512 &data_in, std::this_thread::sleep_for(std::chrono::milliseconds(100)); #endif - for (ap_uint<8> m = 0; m < MAX_MODULES_FPGA * 2; m++) { + for (ap_uint<8> m = 0; m < nmodules * 2; m++) { #pragma HLS PIPELINE II=16 - if (packet_mask[m] > 0) + if (packet_mask[m] != 0) write_completion(m_axis_completion, handle[m], m / 2, curr_frame[m], packet_mask[m], packet_count[m], debug[m], timestamp[m], jf_bunchid[m], From 847ca0922c52dbba5f20b56eeb8e1bb433fc9024 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 25 Jul 2023 11:44:12 +0200 Subject: [PATCH 112/224] FPGA: host writer error register is 8-bit --- fpga/hdl/action_config.v | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/fpga/hdl/action_config.v b/fpga/hdl/action_config.v index fe86ebc2..527349bb 100644 --- a/fpga/hdl/action_config.v +++ b/fpga/hdl/action_config.v @@ -137,7 +137,7 @@ module action_config input [31:0] udp_err_len , input udp_err_len_valid , - input [3:0] host_writer_err , + input [7:0] host_writer_err , input host_writer_err_valid , output reg clear_counters ); @@ -181,7 +181,7 @@ localparam reg [31:0] reg_udp_err_eth; reg [31:0] reg_fifo_status; - reg [3:0] reg_host_writer_err; + reg [7:0] reg_host_writer_err; reg reg_data_collection_idle; //------------------------Instantiation------------------ From 13b2e16b331562ba16e7ae0d6cdad858df3a3939 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 25 Jul 2023 12:00:55 +0200 Subject: [PATCH 113/224] FPGA: handle better weird work request handle --- fpga/hls/host_writer.cpp | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/fpga/hls/host_writer.cpp b/fpga/hls/host_writer.cpp index 6e0f0471..4b17134d 100644 --- a/fpga/hls/host_writer.cpp +++ b/fpga/hls/host_writer.cpp @@ -192,7 +192,12 @@ void host_writer(STREAM_512 &data_in, comp_debug, comp_timestamp, comp_bunchid, comp_exptime, data_collection_id); } - if (module_number >= nmodules) { + + if (req_handle >= HANDLE_SKIP_FRAME) { + req_handle = HANDLE_SKIP_FRAME; + req_host_offset = 0; + internal_err_reg[4] = 1; + } else if (module_number >= nmodules) { req_handle = HANDLE_SKIP_FRAME; req_host_offset = 0; internal_err_reg[5] = 1; @@ -204,8 +209,6 @@ void host_writer(STREAM_512 &data_in, internal_err_reg[2] = 1; } - if (req_handle >= HANDLE_START) - internal_err_reg[4] = 1; handle[id] = req_handle; curr_frame[id] = frame_number; From 0421e517fc2cd7621684c787386de54da7f5c3f9 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 25 Jul 2023 12:21:32 +0200 Subject: [PATCH 114/224] FPGA: host writer - fix wrong req handle check + add marker in work complection for flushing frame --- fpga/hls/host_writer.cpp | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/fpga/hls/host_writer.cpp b/fpga/hls/host_writer.cpp index 4b17134d..8a923327 100644 --- a/fpga/hls/host_writer.cpp +++ b/fpga/hls/host_writer.cpp @@ -19,14 +19,15 @@ inline void write_completion(hls::stream > &m_axis_completion, const ap_uint<64> ×tamp, const ap_uint<64> &bunchid, const ap_uint<32> &exptime, - const ap_uint<32> &data_collection_id) { + const ap_uint<32> &data_collection_id, + const ap_uint<1> &flushing) { #pragma HLS INLINE ap_uint<1> all_packets_ok = packet_mask.and_reduce(); ap_uint<1> any_packets_received = packet_mask.or_reduce(); ap_uint<8> status = 0; status[0] = all_packets_ok; status[1] = any_packets_received; - + status[2] = flushing; ap_uint<128> tmp = (handle, packet_count, status, module_number, frame_num); status[7] = tmp.xor_reduce(); // ensure completion has even parity @@ -153,7 +154,7 @@ void host_writer(STREAM_512 &data_in, ap_uint<8> internal_err_reg = 0; err_reg = internal_err_reg; - write_completion(m_axis_completion, HANDLE_START, 0, 0, 0, 0, 0, 0, 0, 0, data_collection_id); + write_completion(m_axis_completion, HANDLE_START, 0, 0, 0, 0, 0, 0, 0, 0, data_collection_id, 0); idle = 0; uint64_t total_counter = 0; @@ -190,14 +191,10 @@ void host_writer(STREAM_512 &data_in, write_completion(m_axis_completion, comp_handle, module_number, comp_frame, comp_packet_mask, comp_packet_count, comp_debug, comp_timestamp, comp_bunchid, - comp_exptime, data_collection_id); + comp_exptime, data_collection_id, 0); } - if (req_handle >= HANDLE_SKIP_FRAME) { - req_handle = HANDLE_SKIP_FRAME; - req_host_offset = 0; - internal_err_reg[4] = 1; - } else if (module_number >= nmodules) { + if (module_number >= nmodules) { req_handle = HANDLE_SKIP_FRAME; req_host_offset = 0; internal_err_reg[5] = 1; @@ -207,9 +204,13 @@ void host_writer(STREAM_512 &data_in, } else { if (read_request(s_axis_work_request, req_handle, req_host_offset)) internal_err_reg[2] = 1; + if (req_handle >= HANDLE_SKIP_FRAME) { + req_handle = HANDLE_SKIP_FRAME; + req_host_offset = 0; + internal_err_reg[4] = 1; + } } - handle[id] = req_handle; curr_frame[id] = frame_number; curr_offset[id] = req_host_offset; @@ -266,11 +267,11 @@ void host_writer(STREAM_512 &data_in, write_completion(m_axis_completion, handle[m], m / 2, curr_frame[m], packet_mask[m], packet_count[m], debug[m], timestamp[m], jf_bunchid[m], - exptime[m], data_collection_id); + exptime[m], data_collection_id, 1); } data_in >> packet_in; - write_completion(m_axis_completion, HANDLE_END, 0, 0, 0, 0, 0, 0, 0, 0, data_collection_id); + write_completion(m_axis_completion, HANDLE_END, 0, 0, 0, 0, 0, 0, 0, 0, data_collection_id, 0); idle = 1; } From ac1d358700f0e5f074a2cb5877cdecf44f984823 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 25 Jul 2023 12:22:25 +0200 Subject: [PATCH 115/224] AcquisitionDevice: Improve detection of erroneous frames without killing data acquisition --- grpc/jfjoch.proto | 4 +- python/jfjoch_pb2.py | 92 +++++++++++++++--------------- receiver/AcquisitionDevice.cpp | 13 +++-- receiver/Completion.cpp | 2 +- receiver/Completion.h | 3 +- receiver/FPGAAcquisitionDevice.cpp | 15 ++++- receiver/JFJochReceiver.cpp | 6 +- receiver/jfjoch_pcie_status.cpp | 6 ++ 8 files changed, 81 insertions(+), 60 deletions(-) diff --git a/grpc/jfjoch.proto b/grpc/jfjoch.proto index 8353f5c6..e5329073 100644 --- a/grpc/jfjoch.proto +++ b/grpc/jfjoch.proto @@ -382,9 +382,7 @@ message FPGAStatus { uint32 git_sha1 = 16; uint32 mailbox_err_reg = 17; uint32 mailbox_status_reg = 18; - bool frame_statistics_alignment_err = 21; - bool frame_statistics_tlast_err = 22; - bool frame_statistics_work_req_err = 23; + repeated string host_writer_err = 21; uint64 slowest_head = 24; float fpga_temp_degC = 26; diff --git a/python/jfjoch_pb2.py b/python/jfjoch_pb2.py index 69f5948e..283e3149 100644 --- a/python/jfjoch_pb2.py +++ b/python/jfjoch_pb2.py @@ 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_builder.BuildMessageAndEnumDescriptors(DESCRIPTOR, globals()) _builder.BuildTopDescriptorsAndMessages(DESCRIPTOR, 'jfjoch_pb2', globals()) if _descriptor._USE_C_DESCRIPTORS == False: DESCRIPTOR._options = None - _COMPRESSION._serialized_start=9098 - _COMPRESSION._serialized_end=9182 - _DETECTORTYPE._serialized_start=9184 - _DETECTORTYPE._serialized_end=9223 - _DETECTORMODE._serialized_start=9225 - _DETECTORMODE._serialized_end=9315 - _FPGAFIFOSTATUSENUM._serialized_start=9317 - _FPGAFIFOSTATUSENUM._serialized_end=9371 - _STATE._serialized_start=9373 - _STATE._serialized_end=9467 - _PLOTTYPE._serialized_start=9469 - _PLOTTYPE._serialized_end=9573 + _COMPRESSION._serialized_start=9008 + _COMPRESSION._serialized_end=9092 + _DETECTORTYPE._serialized_start=9094 + _DETECTORTYPE._serialized_end=9133 + _DETECTORMODE._serialized_start=9135 + _DETECTORMODE._serialized_end=9225 + _FPGAFIFOSTATUSENUM._serialized_start=9227 + _FPGAFIFOSTATUSENUM._serialized_end=9281 + _STATE._serialized_start=9283 + _STATE._serialized_end=9377 + _PLOTTYPE._serialized_start=9379 + _PLOTTYPE._serialized_end=9483 _EMPTY._serialized_start=32 _EMPTY._serialized_end=39 _UNITCELL._serialized_start=41 @@ -103,37 +103,37 @@ if _descriptor._USE_C_DESCRIPTORS == False: _FPGAFIFOSTATUS._serialized_start=5731 _FPGAFIFOSTATUS._serialized_end=5812 _FPGASTATUS._serialized_start=5815 - _FPGASTATUS._serialized_end=6776 - _DATAPROCESSINGSETTINGS._serialized_start=6779 - _DATAPROCESSINGSETTINGS._serialized_end=7125 - _PREVIEWFRAMESPOT._serialized_start=7127 - _PREVIEWFRAMESPOT._serialized_end=7184 - _PREVIEWFRAME._serialized_start=7187 - _PREVIEWFRAME._serialized_end=7505 - _MODULESTATISTICS._serialized_start=7508 - _MODULESTATISTICS._serialized_end=7745 - _IMAGE._serialized_start=7747 - _IMAGE._serialized_end=7820 - _MASKTOLOAD._serialized_start=7822 - _MASKTOLOAD._serialized_end=7868 - _MEASUREMENTSTATISTICS._serialized_start=7871 - _MEASUREMENTSTATISTICS._serialized_end=8484 - _BROKERSTATUS._serialized_start=8487 - _BROKERSTATUS._serialized_end=8702 - _BROKERFULLSTATUS._serialized_start=8705 - _BROKERFULLSTATUS._serialized_end=8869 - _DETECTORLISTELEMENT._serialized_start=8871 - _DETECTORLISTELEMENT._serialized_end=8943 - _DETECTORLIST._serialized_start=8945 - _DETECTORLIST._serialized_end=9063 - _DETECTORSELECTION._serialized_start=9065 - _DETECTORSELECTION._serialized_end=9096 - _GRPC_JFJOCHRECEIVER._serialized_start=9576 - _GRPC_JFJOCHRECEIVER._serialized_end=10343 - _GRPC_JFJOCHWRITER._serialized_start=10346 - _GRPC_JFJOCHWRITER._serialized_end=10548 - _GRPC_JFJOCHDETECTOR._serialized_start=10551 - _GRPC_JFJOCHDETECTOR._serialized_end=10937 - _GRPC_JFJOCHBROKER._serialized_start=10940 - _GRPC_JFJOCHBROKER._serialized_end=12629 + _FPGASTATUS._serialized_end=6686 + _DATAPROCESSINGSETTINGS._serialized_start=6689 + _DATAPROCESSINGSETTINGS._serialized_end=7035 + _PREVIEWFRAMESPOT._serialized_start=7037 + _PREVIEWFRAMESPOT._serialized_end=7094 + _PREVIEWFRAME._serialized_start=7097 + _PREVIEWFRAME._serialized_end=7415 + _MODULESTATISTICS._serialized_start=7418 + _MODULESTATISTICS._serialized_end=7655 + _IMAGE._serialized_start=7657 + _IMAGE._serialized_end=7730 + _MASKTOLOAD._serialized_start=7732 + _MASKTOLOAD._serialized_end=7778 + _MEASUREMENTSTATISTICS._serialized_start=7781 + _MEASUREMENTSTATISTICS._serialized_end=8394 + _BROKERSTATUS._serialized_start=8397 + _BROKERSTATUS._serialized_end=8612 + _BROKERFULLSTATUS._serialized_start=8615 + _BROKERFULLSTATUS._serialized_end=8779 + _DETECTORLISTELEMENT._serialized_start=8781 + _DETECTORLISTELEMENT._serialized_end=8853 + _DETECTORLIST._serialized_start=8855 + _DETECTORLIST._serialized_end=8973 + _DETECTORSELECTION._serialized_start=8975 + _DETECTORSELECTION._serialized_end=9006 + _GRPC_JFJOCHRECEIVER._serialized_start=9486 + _GRPC_JFJOCHRECEIVER._serialized_end=10253 + _GRPC_JFJOCHWRITER._serialized_start=10256 + _GRPC_JFJOCHWRITER._serialized_end=10458 + _GRPC_JFJOCHDETECTOR._serialized_start=10461 + _GRPC_JFJOCHDETECTOR._serialized_end=10847 + _GRPC_JFJOCHBROKER._serialized_start=10850 + _GRPC_JFJOCHBROKER._serialized_end=12539 # @@protoc_insertion_point(module_scope) diff --git a/receiver/AcquisitionDevice.cpp b/receiver/AcquisitionDevice.cpp index dcab83fe..a2b805e2 100644 --- a/receiver/AcquisitionDevice.cpp +++ b/receiver/AcquisitionDevice.cpp @@ -92,15 +92,18 @@ void AcquisitionDevice::WaitForActionComplete() { Cancel(); // this frame is not of any interest, therefore its location can be immediately released SendWorkRequest(c.handle); + } else if (c.module_number >= max_modules) { + // Module number out of bounds, don't process + if (logger != nullptr) + logger->Error("Completion with wrong module number data stream {} completion frame number {} module {} handle {} timestamp {} status {}", + data_stream, c.frame_number, c.module_number, c.handle, c.timestamp, c.status); + SendWorkRequest(c.handle); } else counters.UpdateCounters(&c); if (logger != nullptr) - logger->Debug("Data stream " + std::to_string(data_stream) - + " completion frame number " + std::to_string(c.frame_number) - + " module " + std::to_string(c.module_number) - + " handle " + std::to_string(c.handle) - + " timestamp " + std::to_string(c.timestamp)); + logger->Debug("Data stream {} completion frame number {} module {} handle {} timestamp {} status {}", + data_stream, c.frame_number, c.module_number, c.handle, c.timestamp, c.status); c = work_completion_queue.GetBlocking(); } diff --git a/receiver/Completion.cpp b/receiver/Completion.cpp index c9455aa4..5a93145e 100644 --- a/receiver/Completion.cpp +++ b/receiver/Completion.cpp @@ -17,6 +17,7 @@ Completion parse_hw_completion(uint32_t tmp[16]) { c.handle = tmp[0]; c.module_number = tmp[1] & 0xFF; c.packet_count = (tmp[1] & (0xFFFF0000)) >> 16; + c.status = (tmp[1] >> 8) & 0xFF; c.data_collection_id = tmp[11] & UINT16_MAX; uint64_t detector_frame_number = bit_concat(tmp[2], tmp[3]); @@ -34,7 +35,6 @@ Completion parse_hw_completion(uint32_t tmp[16]) { c.frame_number = detector_frame_number; } else { c.type = Completion::Type::Image; - if (detector_frame_number == 0) throw JFJochException(JFJochExceptionCategory::HardwareParityError, "Detector frame number cannot be zero"); else diff --git a/receiver/Completion.h b/receiver/Completion.h index 6c6a1e91..114002b1 100644 --- a/receiver/Completion.h +++ b/receiver/Completion.h @@ -23,7 +23,8 @@ struct Completion { uint32_t handle; uint16_t packet_count; uint16_t data_collection_id; - uint8_t module_number; + uint16_t status; + uint16_t module_number; }; Completion parse_hw_completion(uint32_t hw_input[16]); diff --git a/receiver/FPGAAcquisitionDevice.cpp b/receiver/FPGAAcquisitionDevice.cpp index eac7e96f..52f8beb0 100644 --- a/receiver/FPGAAcquisitionDevice.cpp +++ b/receiver/FPGAAcquisitionDevice.cpp @@ -171,6 +171,12 @@ inline void FIFO_check(JFJochProtoBuf::FPGAStatus &fpga_status, fifo_status->set_value(JFJochProtoBuf::FPGAFIFOStatusEnum::PARTIAL); } +inline void CheckHostWriterErr(JFJochProtoBuf::FPGAStatus &output, uint32_t status_register, + uint32_t bit, const std::string &name) { + if (status_register & (1 << (24+bit))) + output.add_host_writer_err(name); +} + JFJochProtoBuf::FPGAStatus FPGAAcquisitionDevice::GetStatus() const { ActionStatus status{}; @@ -210,9 +216,12 @@ JFJochProtoBuf::FPGAStatus FPGAAcquisitionDevice::GetStatus() const { ret.set_error_packet_len(status.udp_err_len); ret.set_cancel_bit(full_status_register & (1<<2)); ret.set_host_writer_idle(full_status_register & (1<<4)); - ret.set_frame_statistics_alignment_err(full_status_register & (1 << 24)); - ret.set_frame_statistics_tlast_err(full_status_register & (1 << 25)); - ret.set_frame_statistics_work_req_err(full_status_register & (1 << 26)); + CheckHostWriterErr(ret, full_status_register, 0, "Alignment error"); + CheckHostWriterErr(ret, full_status_register, 1, "TLAST error"); + CheckHostWriterErr(ret, full_status_register, 2, "Work request parity error"); + CheckHostWriterErr(ret, full_status_register, 3, "Handle error"); + CheckHostWriterErr(ret, full_status_register, 4, "Null pointer"); + CheckHostWriterErr(ret, full_status_register, 5, "Module number exceeded"); ret.set_mailbox_status_reg(env.mailbox_status_reg); ret.set_mailbox_err_reg(env.mailbox_err_reg); diff --git a/receiver/JFJochReceiver.cpp b/receiver/JFJochReceiver.cpp index 7abb5412..d42da4b5 100644 --- a/receiver/JFJochReceiver.cpp +++ b/receiver/JFJochReceiver.cpp @@ -256,7 +256,11 @@ void JFJochReceiver::AcquireThread(uint16_t data_stream) { } catch (const JFJochException &e) { Cancel(e); } - + auto status = acquisition_device[data_stream]->GetStatus(); + if (!status.host_writer_err().empty()) { + for (const auto &i: status.host_writer_err()) + logger.Error("Device thread {}: host writer error {}", data_stream, i); + } logger.Info("Device thread {} done", data_stream); } diff --git a/receiver/jfjoch_pcie_status.cpp b/receiver/jfjoch_pcie_status.cpp index 0973b57c..8bd1650f 100644 --- a/receiver/jfjoch_pcie_status.cpp +++ b/receiver/jfjoch_pcie_status.cpp @@ -70,6 +70,12 @@ int main(int argc, char **argv) { std::cout << s << std::endl; } + if (!status.host_writer_err().empty()) { + std::cout << "FPGA host writer errors: " << std::endl; + for (const auto &i: status.host_writer_err()) + std::cout << " " << i << std::endl; + } + std::cout << std::endl; std::cout << "Packet counters - ETH " << status.packets_ether() << std::endl; std::cout << " - UDP " << status.packets_udp() << std::endl; From 580cc776a1bdf724478c3f101ae7c2642351a16a Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 26 Jul 2023 11:26:41 +0200 Subject: [PATCH 116/224] CMake: Add L4 GPU architecture --- CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 54aca17c..d33f20e8 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -11,7 +11,7 @@ SET(CMAKE_C_FLAGS_RELEASE "-O3 -march=native -mtune=native") INCLUDE(CheckLanguage) CHECK_LANGUAGE(CUDA) -SET(CMAKE_CUDA_ARCHITECTURES 70 75 80 86) # V100, T4, A100, RTX A4000 +SET(CMAKE_CUDA_ARCHITECTURES 70 75 80 86 89) # V100, T4, A100, RTX A4000, L4 SET(CMAKE_CUDA_STANDARD 17) SET(CMAKE_CUDA_FLAGS_RELEASE "-O3") From 0969bf662ea5d6fcd2e2dbf082e0457b5ced0ad1 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 26 Jul 2023 11:28:45 +0200 Subject: [PATCH 117/224] jfjoch_action_test: Adapt --- receiver/jfjoch_action_test.cpp | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/receiver/jfjoch_action_test.cpp b/receiver/jfjoch_action_test.cpp index 89febe48..0b759bc9 100644 --- a/receiver/jfjoch_action_test.cpp +++ b/receiver/jfjoch_action_test.cpp @@ -121,12 +121,9 @@ int main(int argc, char **argv) { // Assuming 250 MHz clock logger.Info("Device {}: stalls HBM: {} stalls host: {} est. performance: {:.2f} GB/s", i, stalls_hbm, stalls_host, performance); - if (output.device_statistics(i).fpga_status().frame_statistics_alignment_err()) - logger.Error("Device {}: memory alignment error", i); - if (output.device_statistics(i).fpga_status().frame_statistics_tlast_err()) - logger.Error("Device {}: error in AXI-Stream sequence", i); - if (output.device_statistics(i).fpga_status().frame_statistics_work_req_err()) - logger.Error("Device {}: parity error in work request", i); + for (const auto& iter: output.device_statistics(i).fpga_status().host_writer_err()) + logger.Error("Device {}: FPGA host writer error {}", i, iter); + if (output.device_statistics(i).fpga_status().mailbox_err_reg() != 0) logger.Error("Device {}: Mailbox error {:x}", i, output.device_statistics(i).fpga_status().mailbox_err_reg()); From 9d1add32e588602d826bcfe6a0dab95926ee25d7 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 26 Jul 2023 17:26:32 +0200 Subject: [PATCH 118/224] jsonToGrpc.h: Some issues with conversion of error message to string between gRPC version --- common/jsonToGrpc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/jsonToGrpc.h b/common/jsonToGrpc.h index a06accbd..1ec84a07 100644 --- a/common/jsonToGrpc.h +++ b/common/jsonToGrpc.h @@ -18,7 +18,7 @@ T jsonToGrpc(const std::string& json) { auto status = google::protobuf::util::JsonStringToMessage(json, &output, opts); if (!status.ok()) - throw JFJochException(JFJochExceptionCategory::JSON, "Error in generating ProtoBuf from JSON: " + status.message().ToString()); + throw JFJochException(JFJochExceptionCategory::JSON, "Error in generating ProtoBuf from JSON"); return output; } From fdb31a027a99cdf344b148e0ac2f23bc40c8b4de Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 26 Jul 2023 20:02:15 +0200 Subject: [PATCH 119/224] grpcToJson.h: Issue with newer gRPC and ToString() method --- common/grpcToJson.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/grpcToJson.h b/common/grpcToJson.h index bac0a040..334a64c8 100644 --- a/common/grpcToJson.h +++ b/common/grpcToJson.h @@ -18,7 +18,7 @@ inline std::string grpcToJson(const google::protobuf::Message &message) { std::string s; auto status = google::protobuf::util::MessageToJsonString(message, &s, opts); if (!status.ok()) - throw JFJochException(JFJochExceptionCategory::JSON, "Error in generating JSON from ProtoBuf: " + status.message().ToString()); + throw JFJochException(JFJochExceptionCategory::JSON, "Error in generating JSON from ProtoBuf"); return s; } From 3217e5209eb18c6964a19d10b437b1d797caa0f1 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 27 Jul 2023 09:03:26 +0200 Subject: [PATCH 120/224] MockAcquisitionDevice: More robust implementation --- receiver/MockAcquisitionDevice.cpp | 33 ++++++++++++++++++++++++++---- receiver/MockAcquisitionDevice.h | 7 +++++++ 2 files changed, 36 insertions(+), 4 deletions(-) diff --git a/receiver/MockAcquisitionDevice.cpp b/receiver/MockAcquisitionDevice.cpp index fbe30770..7f64914b 100644 --- a/receiver/MockAcquisitionDevice.cpp +++ b/receiver/MockAcquisitionDevice.cpp @@ -7,13 +7,15 @@ void MockAcquisitionDevice::Start(const DiffractionExperiment& experiment) { idle = false; + cancel = false; + measure = std::async(std::launch::async, &MockAcquisitionDevice::MeasureThread, this); } void MockAcquisitionDevice::Cancel() { if (!idle) { if (logger) logger->Info("MockAcquisitionDevice cancelling " + std::to_string(data_stream)); - Terminate(); + cancel = true; } } @@ -22,7 +24,6 @@ MockAcquisitionDevice::MockAcquisitionDevice(uint16_t data_stream, size_t in_fra max_modules = 16; MapBuffersStandard(in_frame_buffer_size_modules, 1, -1); max_handle = in_frame_buffer_size_modules; - work_completion_queue.Put(Completion{.type = Completion::Type::Start}); } void MockAcquisitionDevice::SendCompletion(uint32_t handle, uint16_t module_number, uint64_t frame_number) { @@ -34,7 +35,7 @@ void MockAcquisitionDevice::SendCompletion(uint32_t handle, uint16_t module_numb c.packet_mask[0] = UINT64_MAX; c.packet_mask[1] = UINT64_MAX; c.packet_count = 128; - work_completion_queue.Put(c); + mock_completions.Put(c); } void MockAcquisitionDevice::AddModule(uint64_t frame_number, uint16_t module_number, const uint16_t *data) { @@ -52,13 +53,33 @@ void MockAcquisitionDevice::AddModule(uint64_t frame_number, uint16_t module_num } } -void MockAcquisitionDevice::Terminate() { +void MockAcquisitionDevice::MeasureThread() { + work_completion_queue.Put(Completion{.type = Completion::Type::Start}); + + while (!cancel) { + Completion c{}; + + if (mock_completions.Get(c)) { + if (c.type == Completion::Type::Image) + work_completion_queue.Put(c); + else + cancel = true; + } else + std::this_thread::sleep_for(std::chrono::microseconds(100)); + } + work_completion_queue.Put(Completion{ .type = Completion::Type::End }); idle = true; } +void MockAcquisitionDevice::Terminate() { + mock_completions.Put(Completion{ + .type = Completion::Type::End + }); +} + std::string MockAcquisitionDevice::GetMACAddress() const { return "00:00:00:00:00:00"; } @@ -67,3 +88,7 @@ std::string MockAcquisitionDevice::GetIPv4Address() const { return "127.0.0.1"; } +void MockAcquisitionDevice::Finalize() { + if (measure.valid()) + measure.get(); +} \ No newline at end of file diff --git a/receiver/MockAcquisitionDevice.h b/receiver/MockAcquisitionDevice.h index 0a3cddd4..677d8d7f 100644 --- a/receiver/MockAcquisitionDevice.h +++ b/receiver/MockAcquisitionDevice.h @@ -6,15 +6,21 @@ #include "AcquisitionDevice.h" #include "../common/ThreadSafeFIFO.h" +#include class MockAcquisitionDevice : public AcquisitionDevice { uint32_t current_handle = 0; uint32_t max_handle = 0; bool idle = true; + std::future measure; + volatile bool cancel = false; + + ThreadSafeFIFO mock_completions; void SendCompletion(uint32_t handle, uint16_t module_number, uint64_t frame_number); void Start(const DiffractionExperiment& experiment) override; + void MeasureThread(); public: MockAcquisitionDevice(uint16_t data_stream, size_t in_frame_buffer_size_modules); void AddModule(uint64_t frame, uint16_t module_number, const uint16_t *data); @@ -22,6 +28,7 @@ public: std::string GetMACAddress() const override; std::string GetIPv4Address() const override; void Cancel() override; + void Finalize() override; }; #endif //JUNGFRAUJOCH_MOCKACQUISITIONDEVICE_H From 8a7b088b2f72afa012551c2d90d99aab4381c9e2 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 27 Jul 2023 12:57:40 +0200 Subject: [PATCH 121/224] MockAcquisitionDevice: Add Internal Packet Generator --- common/DiffractionExperiment.cpp | 2 +- receiver/MockAcquisitionDevice.cpp | 82 +++++++++++++++++++++++++++-- receiver/MockAcquisitionDevice.h | 11 +++- tests/MockAcquisitionDeviceTest.cpp | 68 ++++++++++++++++++++++++ 4 files changed, 158 insertions(+), 5 deletions(-) diff --git a/common/DiffractionExperiment.cpp b/common/DiffractionExperiment.cpp index 1eb9788c..c863689e 100644 --- a/common/DiffractionExperiment.cpp +++ b/common/DiffractionExperiment.cpp @@ -108,7 +108,7 @@ DiffractionExperiment &DiffractionExperiment::Mode(DetectorMode input) { } DiffractionExperiment &DiffractionExperiment::DataStreams(int64_t input) { - check_max("Number of data streams", input, 7); + check_max("Number of data streams", input, 16); check_min("Number of data streams", input, 1); internal.set_ndatastreams(input); return *this; diff --git a/receiver/MockAcquisitionDevice.cpp b/receiver/MockAcquisitionDevice.cpp index 7f64914b..513cb843 100644 --- a/receiver/MockAcquisitionDevice.cpp +++ b/receiver/MockAcquisitionDevice.cpp @@ -4,11 +4,25 @@ #include "MockAcquisitionDevice.h" #include "../common/JFJochException.h" #include +#include "../jungfrau/JFConversionFloatingPoint.h" void MockAcquisitionDevice::Start(const DiffractionExperiment& experiment) { idle = false; cancel = false; - measure = std::async(std::launch::async, &MockAcquisitionDevice::MeasureThread, this); + + if (experiment.IsUsingInternalPacketGen()) { + if (experiment.GetDetectorMode() == DetectorMode::Conversion) { + for (auto &i: buffer_device) + memcpy(i, internal_pkt_gen_frame_conv.data(), RAW_MODULE_SIZE * sizeof(uint16_t)); + } else { + for (auto &i: buffer_device) + memcpy(i, internal_pkt_gen_frame.data(), RAW_MODULE_SIZE * sizeof(uint16_t)); + } + measure = std::async(std::launch::async, &MockAcquisitionDevice::InternalPacketGeneratorThread, this, + experiment.GetModulesNum(data_stream), experiment.GetFrameNum()); + } else { + measure = std::async(std::launch::async, &MockAcquisitionDevice::MeasureThread, this); + } } void MockAcquisitionDevice::Cancel() { @@ -20,10 +34,15 @@ void MockAcquisitionDevice::Cancel() { } MockAcquisitionDevice::MockAcquisitionDevice(uint16_t data_stream, size_t in_frame_buffer_size_modules) -: AcquisitionDevice(data_stream) { +: AcquisitionDevice(data_stream), internal_pkt_gen_frame(RAW_MODULE_SIZE), internal_pkt_gen_frame_conv(RAW_MODULE_SIZE) { max_modules = 16; MapBuffersStandard(in_frame_buffer_size_modules, 1, -1); max_handle = in_frame_buffer_size_modules; + + for (int i = 0; i < RAW_MODULE_SIZE; i++) { + internal_pkt_gen_frame[i] = i % 65536; + internal_pkt_gen_frame_conv[i] = i % 65536; + } } void MockAcquisitionDevice::SendCompletion(uint32_t handle, uint16_t module_number, uint64_t frame_number) { @@ -74,6 +93,40 @@ void MockAcquisitionDevice::MeasureThread() { idle = true; } +void MockAcquisitionDevice::InternalPacketGeneratorThread(uint32_t nmodules, uint32_t nframes) { + work_completion_queue.Put(Completion{.type = Completion::Type::Start}); + uint32_t curr_module = 0; + uint32_t curr_frame = 0; + + while ((!cancel) && (curr_frame < nframes)) { + WorkRequest wr{}; + if (work_request_queue.Get(wr)) { + Completion c{}; + + c.handle = wr.handle; + c.module_number = curr_module; + c.frame_number = curr_frame; + c.type = Completion::Type::Image; + c.packet_mask[0] = UINT64_MAX; + c.packet_mask[1] = UINT64_MAX; + c.packet_count = 128; + work_completion_queue.Put(c); + + curr_module++; + if (curr_module == nmodules) { + curr_module = 0; + curr_frame++; + } + } else + std::this_thread::sleep_for(std::chrono::microseconds(100)); + } + + work_completion_queue.Put(Completion{ + .type = Completion::Type::End + }); + idle = true; +} + void MockAcquisitionDevice::Terminate() { mock_completions.Put(Completion{ .type = Completion::Type::End @@ -91,4 +144,27 @@ std::string MockAcquisitionDevice::GetIPv4Address() const { void MockAcquisitionDevice::Finalize() { if (measure.valid()) measure.get(); -} \ No newline at end of file +} + +void MockAcquisitionDevice::SetCustomInternalGeneratorFrame(const std::vector &v) { + if (v.size() != RAW_MODULE_SIZE) + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, + "Error in size of custom internal generator frame"); + + internal_pkt_gen_frame = v; + internal_pkt_gen_frame_conv = v; +} + +void MockAcquisitionDevice::InitializeCalibration(const DiffractionExperiment &experiment, const JFCalibration &calib) { + JFConversionFloatingPoint conv; + conv.Setup(calib.GainCalibration(experiment.GetFirstModuleOfDataStream(data_stream)), + calib.Pedestal(experiment.GetFirstModuleOfDataStream(data_stream),0), + calib.Pedestal(experiment.GetFirstModuleOfDataStream(data_stream),1), + calib.Pedestal(experiment.GetFirstModuleOfDataStream(data_stream),2), + experiment.GetPhotonEnergy_keV()); + conv.ConvertModule((int16_t *) internal_pkt_gen_frame_conv.data(), internal_pkt_gen_frame.data()); +} + +std::vector MockAcquisitionDevice::GetInternalGeneratorFrame() const { + return internal_pkt_gen_frame; +} diff --git a/receiver/MockAcquisitionDevice.h b/receiver/MockAcquisitionDevice.h index 677d8d7f..c53d4d2b 100644 --- a/receiver/MockAcquisitionDevice.h +++ b/receiver/MockAcquisitionDevice.h @@ -15,12 +15,14 @@ class MockAcquisitionDevice : public AcquisitionDevice { bool idle = true; std::future measure; volatile bool cancel = false; - + std::vector internal_pkt_gen_frame; + std::vector internal_pkt_gen_frame_conv; ThreadSafeFIFO mock_completions; void SendCompletion(uint32_t handle, uint16_t module_number, uint64_t frame_number); void Start(const DiffractionExperiment& experiment) override; void MeasureThread(); + void InternalPacketGeneratorThread(uint32_t nmodules, uint32_t nframes); public: MockAcquisitionDevice(uint16_t data_stream, size_t in_frame_buffer_size_modules); void AddModule(uint64_t frame, uint16_t module_number, const uint16_t *data); @@ -29,6 +31,13 @@ public: std::string GetIPv4Address() const override; void Cancel() override; void Finalize() override; + + // Warning - internal packet generator in MockAcquisitionDevice has one limitation: + // it assumes the same calibration for all modules of the device + // For routine receiver tests one should always set one module per device + void SetCustomInternalGeneratorFrame(const std::vector &v); + std::vector GetInternalGeneratorFrame() const override; + void InitializeCalibration(const DiffractionExperiment &experiment, const JFCalibration &calib) override; }; #endif //JUNGFRAUJOCH_MOCKACQUISITIONDEVICE_H diff --git a/tests/MockAcquisitionDeviceTest.cpp b/tests/MockAcquisitionDeviceTest.cpp index 30a72155..9f0dff6a 100644 --- a/tests/MockAcquisitionDeviceTest.cpp +++ b/tests/MockAcquisitionDeviceTest.cpp @@ -3,6 +3,7 @@ #include #include "../receiver/MockAcquisitionDevice.h" +#include "../receiver/JFJochReceiverTest.h" TEST_CASE("MockAcquisitionDevice") { std::vector module_data(RAW_MODULE_SIZE, 765); @@ -37,3 +38,70 @@ TEST_CASE("MockAcquisitionDevice") { RAW_MODULE_SIZE * sizeof(uint16_t)) == 0); } +TEST_CASE("JFJochReceiverTest_Raw_MockAcquisitionDevice", "[JFJochReceiver]") { + Logger logger("JFJochReceiverTest_Raw_MockAcquisitionDevice"); + logger.Verbose(true); + + std::mt19937 g1(1387); + std::uniform_int_distribution dist(0, 65535); + + DiffractionExperiment x(DetectorGeometry(4)); + const uint16_t nthreads = 4; + + std::vector test_frame(RAW_MODULE_SIZE); + + x.Mode(DetectorMode::Raw); + x.PedestalG0Frames(0).NumTriggers(1).UseInternalPacketGenerator(true) + .ImagesPerTrigger(100).DataFileCount(16).PhotonEnergy_keV(12.4).Compression(JFJochProtoBuf::NO_COMPRESSION); + + std::vector> aq_devices; + for (int i = 0; i < x.GetDataStreamsNum(); i++) { + for (auto &j: test_frame) + j = dist(g1); + + auto *test = new MockAcquisitionDevice(i, 64); + test->EnableLogging(&logger); + test->SetCustomInternalGeneratorFrame(test_frame); + aq_devices.emplace_back(test); + } + + JFJochProtoBuf::ReceiverOutput output; + bool ret; + REQUIRE_NOTHROW(ret = JFJochReceiverTest(output, logger, aq_devices, x, nthreads, false)); + REQUIRE(ret); + REQUIRE(output.efficiency() == 1.0); + REQUIRE(output.images_sent() == x.GetImageNum()); + REQUIRE(output.compressed_ratio() == 1.0); + REQUIRE(output.compressed_size() == x.GetImageNum() * x.GetPixelDepth() * x.GetPixelsNum()); + REQUIRE(output.max_image_number_sent() == x.GetImageNum() - 1); + REQUIRE(!output.cancelled()); +} + + +TEST_CASE("JFJochReceiverTest_Conversion_MockAcquisitionDevice", "[JFJochReceiver]") { + Logger logger("JFJochReceiverTest_Conversion"); + + DiffractionExperiment x(DetectorGeometry(8)); + const uint16_t nthreads = 4; + + x.Mode(DetectorMode::Conversion); + x.PedestalG0Frames(0).NumTriggers(1).UseInternalPacketGenerator(true).DataStreams(x.GetModulesNum()) + .ImagesPerTrigger(32).DataFileCount(16).PhotonEnergy_keV(12.4).Compression(JFJochProtoBuf::BSHUF_ZSTD); + + std::vector> aq_devices; + for (int i = 0; i < x.GetDataStreamsNum(); i++) { + AcquisitionDevice *test; + test = new MockAcquisitionDevice(i, 64); + test->EnableLogging(&logger); + aq_devices.emplace_back(test); + } + + JFJochProtoBuf::ReceiverOutput output; + bool ret; + REQUIRE_NOTHROW(ret = JFJochReceiverTest(output, logger, aq_devices, x, nthreads, false)); + REQUIRE(ret); + REQUIRE(output.efficiency() == 1.0); + REQUIRE(output.images_sent() == x.GetImageNum()); + + REQUIRE(!output.cancelled()); +} From 231ef5b08b61c53e61ca34230ffdd115086840b7 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 27 Jul 2023 13:16:09 +0200 Subject: [PATCH 122/224] jfjoch_action_test_mock: Added, to be later merged with jfjoch_action_test --- receiver/CMakeLists.txt | 6 +- receiver/jfjoch_action_test_mock.cpp | 89 ++++++++++++++++++++++++++++ 2 files changed, 94 insertions(+), 1 deletion(-) create mode 100644 receiver/jfjoch_action_test_mock.cpp diff --git a/receiver/CMakeLists.txt b/receiver/CMakeLists.txt index 1a1712b6..b2670647 100644 --- a/receiver/CMakeLists.txt +++ b/receiver/CMakeLists.txt @@ -72,4 +72,8 @@ INSTALL(TARGETS jfjoch_receiver RUNTIME) ADD_EXECUTABLE(jfjoch_action_test jfjoch_action_test.cpp) TARGET_LINK_LIBRARIES(jfjoch_action_test JungfraujochHost JFJochReceiver) -INSTALL(TARGETS jfjoch_action_test RUNTIME) \ No newline at end of file +INSTALL(TARGETS jfjoch_action_test RUNTIME) + +ADD_EXECUTABLE(jfjoch_action_test_mock jfjoch_action_test_mock.cpp) +TARGET_LINK_LIBRARIES(jfjoch_action_test_mock JungfraujochHost JFJochReceiver) +INSTALL(TARGETS jfjoch_action_test_mock RUNTIME) \ No newline at end of file diff --git a/receiver/jfjoch_action_test_mock.cpp b/receiver/jfjoch_action_test_mock.cpp new file mode 100644 index 00000000..bb39b251 --- /dev/null +++ b/receiver/jfjoch_action_test_mock.cpp @@ -0,0 +1,89 @@ +// Copyright (2019-2022) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#include + +#include "MockAcquisitionDevice.h" +#include "JFJochReceiverTest.h" +#include "../tests/FPGAUnitTest.h" + +int main(int argc, char **argv) { + uint16_t nstreams = 1; + const uint16_t nmodules = 1; + size_t nimages = 2; + uint64_t processing_period = 20; + + Logger logger("ActionTest"); + logger.Verbose(true); + + bool abort_test = false; + + if ((argc == 1) || (argc > 6)) { + logger.Error("Usage ./jfjoch_action_test {<# of images> {<# of modules> {<# of streams> {}}}}"); + exit(EXIT_FAILURE); + } + + if (argc >= 3) nimages = atol(argv[2]); + if (argc >= 4) nstreams = atoi(argv[3]); + if (argc >= 5) processing_period = atoi(argv[4]); + + DiffractionExperiment x(DetectorGeometry(nmodules*nstreams, 2, 8, 36, true)); + + x.Mode(DetectorMode::Conversion); + x.ImagesPerTrigger(nimages).PedestalG0Frames(0).UseInternalPacketGenerator(true).PhotonEnergy_keV(12.4).NumTriggers(1); + x.SpotFindingPeriod(std::chrono::milliseconds(processing_period)).MaskModuleEdges(false).MaskChipEdges(false); + x.Compression(JFJochProtoBuf::BSHUF_LZ4).DataStreams(nstreams); + + bool verbose = false; + bool print_status_updates = true; + uint16_t nthreads = 16; + + logger.Verbose(verbose); + + std::vector> pcie_devices; + std::vector aq_devices; + + std::string image_path = std::string(argv[1]) + "/tests/test_data/mod5_raw0.bin"; + std::vector input(RAW_MODULE_SIZE, 0); + LoadBinaryFile(image_path, input.data(), RAW_MODULE_SIZE); + + for (int i = 0; i < nstreams; i++) { + pcie_devices.push_back(std::make_unique(i, 1024)); + pcie_devices[i]->SetCustomInternalGeneratorFrame(input); + pcie_devices[i]->EnableLogging(&logger); + aq_devices.push_back(pcie_devices[i].get()); + } + + volatile bool done = false; + JFJochProtoBuf::ReceiverOutput output; + bool ret; + std::thread run_thread([&] { + try { + ret = JFJochReceiverTest(output, logger, aq_devices, x, nthreads,abort_test, verbose); + } catch (std::exception &e) { + logger.Error(e.what()); + ret = false; + } + done = true; + }); + + + run_thread.join(); + + double receiving_time = static_cast(output.end_time_ms() - output.start_time_ms())/1000.0; + + logger.Info("Efficiency: {:.2f}%", output.efficiency() * 100.f); + logger.Info("Max delay: {}",output.max_receive_delay()); + logger.Info("Compression factor: {}x", output.compressed_ratio()); + logger.Info("Receiving time: {} s", receiving_time); + logger.Info("Frame rate: {} Hz", static_cast(nimages)/receiving_time); + logger.Info("Total throughput: {:.2f} GB/s", + static_cast(nimages*nstreams*nmodules*RAW_MODULE_SIZE*sizeof(uint16_t)) / (receiving_time * 1e9)); + logger.Info(""); + + if (ret) { + logger.Info("Test properly executed! (check stall values manually)"); + exit(EXIT_SUCCESS); + } else + exit(EXIT_FAILURE); +} From 52aa879d472703c6b89a2a4ca2e4f0608ed40716 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 27 Jul 2023 13:27:50 +0200 Subject: [PATCH 123/224] MockAcquisitionDevice: Change conversion rules --- receiver/MockAcquisitionDevice.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/receiver/MockAcquisitionDevice.cpp b/receiver/MockAcquisitionDevice.cpp index 513cb843..73139b20 100644 --- a/receiver/MockAcquisitionDevice.cpp +++ b/receiver/MockAcquisitionDevice.cpp @@ -11,7 +11,7 @@ void MockAcquisitionDevice::Start(const DiffractionExperiment& experiment) { cancel = false; if (experiment.IsUsingInternalPacketGen()) { - if (experiment.GetDetectorMode() == DetectorMode::Conversion) { + if (experiment.GetConversionOnFPGA()) { for (auto &i: buffer_device) memcpy(i, internal_pkt_gen_frame_conv.data(), RAW_MODULE_SIZE * sizeof(uint16_t)); } else { From 8def7d624c257c3ba487d3c8849bb533fc5eebe4 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 27 Jul 2023 13:31:21 +0200 Subject: [PATCH 124/224] jfjoch_receiver: minor fix in absence of IBVERBS --- receiver/jfjoch_receiver.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/receiver/jfjoch_receiver.cpp b/receiver/jfjoch_receiver.cpp index c6bf8c11..1e1acd20 100644 --- a/receiver/jfjoch_receiver.cpp +++ b/receiver/jfjoch_receiver.cpp @@ -53,12 +53,13 @@ AcquisitionDevice *SetupAcquisitionDevice(const nlohmann::json &input, uint16_t std::vector tmp(RAW_MODULE_SIZE); auto filename = input["custom_test_frame"].get(); std::fstream file(filename.c_str(), std::fstream::in | std::fstream::binary); - file.read((char *) tmp.data(),RAW_MODULE_SIZE * sizeof(uint16_t)); + file.read((char *) tmp.data(), RAW_MODULE_SIZE * sizeof(uint16_t)); pci_dev->SetCustomInternalGeneratorFrame(tmp); } ret = pci_dev; + } #ifdef JFJOCH_USE_IBVERBS - } else if (input.contains("type") && (input["type"] == "mlx_raw_eth")) { + else if (input.contains("type") && (input["type"] == "mlx_raw_eth")) { auto mlx_dev = new MlxRawEthDevice(pci_slot, data_stream, frame_buffer_size, numa_node); mlx_dev->SetIPv4Address(ipv4_addr); mlx_dev->SetMACAddress(MacAddressFromStr(input["mac_addr"].get())); From 1717887d4aaa0f6a3f3d64a4fe32458652a8ecfd Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 27 Jul 2023 14:09:03 +0200 Subject: [PATCH 125/224] jfjoch_action_test: Command line options for more flexibility in testing --- receiver/CMakeLists.txt | 4 - receiver/jfjoch_action_test.cpp | 161 +++++++++++++++++++-------- receiver/jfjoch_action_test_mock.cpp | 89 --------------- 3 files changed, 116 insertions(+), 138 deletions(-) delete mode 100644 receiver/jfjoch_action_test_mock.cpp diff --git a/receiver/CMakeLists.txt b/receiver/CMakeLists.txt index b2670647..acf4ecea 100644 --- a/receiver/CMakeLists.txt +++ b/receiver/CMakeLists.txt @@ -73,7 +73,3 @@ INSTALL(TARGETS jfjoch_receiver RUNTIME) ADD_EXECUTABLE(jfjoch_action_test jfjoch_action_test.cpp) TARGET_LINK_LIBRARIES(jfjoch_action_test JungfraujochHost JFJochReceiver) INSTALL(TARGETS jfjoch_action_test RUNTIME) - -ADD_EXECUTABLE(jfjoch_action_test_mock jfjoch_action_test_mock.cpp) -TARGET_LINK_LIBRARIES(jfjoch_action_test_mock JungfraujochHost JFJochReceiver) -INSTALL(TARGETS jfjoch_action_test_mock RUNTIME) \ No newline at end of file diff --git a/receiver/jfjoch_action_test.cpp b/receiver/jfjoch_action_test.cpp index 0b759bc9..9e76402d 100644 --- a/receiver/jfjoch_action_test.cpp +++ b/receiver/jfjoch_action_test.cpp @@ -4,49 +4,98 @@ #include #include "PCIExpressDevice.h" +#include "MockAcquisitionDevice.h" #include "JFJochReceiverTest.h" #include "../tests/FPGAUnitTest.h" +void print_usage(Logger &logger) { + logger.Info("Usage ./jfjoch_action_test {} "); + logger.Info("Options:"); + logger.Info(" -C conversion on CPU"); + logger.Info(" -M use mock device"); + logger.Info(" -B blocking mode (FPGA)"); + logger.Info(" -v verbose"); + logger.Info(" -s number of data streams (acquisition devices)"); + logger.Info(" -m number of modules per data stream"); + logger.Info(" -i number of images"); + logger.Info(" -p data processing period"); + logger.Info(" -N number of image processing threads"); +} + int main(int argc, char **argv) { + Logger logger("ActionTest"); + logger.Verbose(true); + + constexpr uint64_t clock_MHz = 200; uint16_t nstreams = 1; uint16_t nmodules = 1; size_t nimages = 2; uint64_t processing_period = 20; + uint16_t nthreads = 64; + bool conversion_on_cpu = false; + bool use_mock_device = false; + bool nonblocking_mode = true; + bool verbose = false; - Logger logger("ActionTest"); - logger.Verbose(true); + if (argc == 1) + print_usage(logger); - bool abort_test = false; - - if ((argc == 1) || (argc > 6)) { - logger.Error("Usage ./jfjoch_action_test {<# of images> {<# of modules> {<# of streams> {}}}}"); - exit(EXIT_FAILURE); + int opt; + while ((opt = getopt(argc, argv, "s:i:m:p:N:CMBv")) != -1) { + switch (opt) { + case 'C': + conversion_on_cpu = true; + break; + case 'M': + use_mock_device = true; + break; + case 'B': + nonblocking_mode = false; + break; + case 'i': + nimages = atol(optarg); + break; + case 'm': + nmodules = atol(optarg); + break; + case 's': + nstreams = atol(optarg); + break; + case 'p': + processing_period = atol(optarg); + break; + case 'N': + nthreads = atol(optarg); + break; + case 'v': + verbose = true; + break; + default: /* '?' */ + print_usage(logger); + exit(EXIT_FAILURE); + } } - if (argc >= 3) nimages = atol(argv[2]); - if (argc >= 4) nmodules = atol(argv[3]); - if (argc >= 5) nstreams = atoi(argv[4]); - if (argc >= 6) processing_period = atoi(argv[5]); + if (optind != argc - 1) { + print_usage(logger); + exit(EXIT_FAILURE); + } DiffractionExperiment x(DetectorGeometry(nmodules*nstreams, 2, 8, 36, true)); x.Mode(DetectorMode::Conversion); x.ImagesPerTrigger(nimages).PedestalG0Frames(0).UseInternalPacketGenerator(true).PhotonEnergy_keV(12.4).NumTriggers(1); - x.SpotFindingPeriod(std::chrono::milliseconds(processing_period)).MaskModuleEdges(false).MaskChipEdges(false); + x.SpotFindingPeriod(std::chrono::milliseconds(processing_period)).MaskModuleEdges(false).MaskChipEdges(false).ConversionOnCPU(conversion_on_cpu); x.Compression(JFJochProtoBuf::BSHUF_LZ4).DataStreams(nstreams); + logger.Info("Data streams {} Total modules {} Total images {} Threads {}", nstreams, nstreams * nmodules, nimages, nthreads); + std::vector dev_name = { "/dev/jfjoch0", "/dev/jfjoch2", "/dev/jfjoch1", "/dev/jfjoch3" }; - std::vector numa_node = {0,1,0,1}; - bool verbose = false; - bool print_status_updates = true; - uint16_t nthreads = 64; - uint64_t clock_MHz = 200; - bool nonblocking_mode = true; logger.Verbose(verbose); @@ -56,29 +105,44 @@ int main(int argc, char **argv) { } std::vector> pcie_devices; + std::vector> mock_devices; std::vector aq_devices; - std::string image_path = std::string(argv[1]) + "/tests/test_data/mod5_raw0.bin"; + std::string image_path = std::string(argv[optind]) + "/tests/test_data/mod5_raw0.bin"; std::vector input(RAW_MODULE_SIZE, 0); LoadBinaryFile(image_path, input.data(), RAW_MODULE_SIZE); - for (int i = 0; i < nstreams; i++) { - pcie_devices.push_back(std::make_unique(dev_name[i], i)); - pcie_devices[i]->SetCustomInternalGeneratorFrame(input); - pcie_devices[i]->EnableLogging(&logger); - pcie_devices[i]->SetFPGANonBlockingMode(nonblocking_mode); - aq_devices.push_back(pcie_devices[i].get()); - } + if (use_mock_device) { + if (nmodules > 1) { + logger.Warning("Conversion results will be wrong with more than 1 module per stream"); + } + for (int i = 0; i < nstreams; i++) { + mock_devices.push_back(std::make_unique(i, 1024)); + mock_devices[i]->SetCustomInternalGeneratorFrame(input); + mock_devices[i]->EnableLogging(&logger); + aq_devices.push_back(mock_devices[i].get()); + } - if (!nonblocking_mode) - logger.Warning("FPGA uses blocking mode - in case data acquisition is aborted, it is necessary to cold reboot the machine"); + } else { + for (int i = 0; i < nstreams; i++) { + pcie_devices.push_back(std::make_unique(dev_name[i], i)); + pcie_devices[i]->SetCustomInternalGeneratorFrame(input); + pcie_devices[i]->EnableLogging(&logger); + pcie_devices[i]->SetFPGANonBlockingMode(nonblocking_mode); + aq_devices.push_back(pcie_devices[i].get()); + } + + if (!nonblocking_mode) + logger.Warning( + "FPGA uses blocking mode - in case data acquisition is aborted, it is necessary to cold reboot the machine"); + } volatile bool done = false; JFJochProtoBuf::ReceiverOutput output; bool ret; std::thread run_thread([&] { try { - ret = JFJochReceiverTest(output, logger, aq_devices, x, nthreads,abort_test, verbose); + ret = JFJochReceiverTest(output, logger, aq_devices, x, nthreads, false, verbose); } catch (std::exception &e) { logger.Error(e.what()); ret = false; @@ -86,7 +150,7 @@ int main(int argc, char **argv) { done = true; }); - if (print_status_updates) { + if (!use_mock_device) { while (!done) { for (int i = 0; i < nstreams; i++) { auto status = pcie_devices[i]->GetStatus(); @@ -111,27 +175,34 @@ int main(int argc, char **argv) { logger.Info("Frame rate: {} Hz", static_cast(nimages)/receiving_time); logger.Info("Total throughput: {:.2f} GB/s", static_cast(nimages*nstreams*nmodules*RAW_MODULE_SIZE*sizeof(uint16_t)) / (receiving_time * 1e9)); - logger.Info(""); - for (int i = 0; i < nstreams; i++) { - auto stalls_hbm = output.device_statistics(i).fpga_status().stalls_hbm(); - auto stalls_host = output.device_statistics(i).fpga_status().stalls_host(); - uint64_t throughput_MBs = nimages * nmodules * RAW_MODULE_SIZE*sizeof(uint16_t) * clock_MHz / (nimages * nmodules * 128 * 128 + stalls_hbm); - double performance = static_cast(throughput_MBs) / 1000; - // Assuming 250 MHz clock - logger.Info("Device {}: stalls HBM: {} stalls host: {} est. performance: {:.2f} GB/s", i, stalls_hbm, stalls_host, performance); + if (!use_mock_device) { + logger.Info(""); + for (int i = 0; i < nstreams; i++) { + auto stalls_hbm = output.device_statistics(i).fpga_status().stalls_hbm(); + auto stalls_host = output.device_statistics(i).fpga_status().stalls_host(); - for (const auto& iter: output.device_statistics(i).fpga_status().host_writer_err()) - logger.Error("Device {}: FPGA host writer error {}", i, iter); + uint64_t throughput_MBs = nimages * nmodules * RAW_MODULE_SIZE * sizeof(uint16_t) * clock_MHz / + (nimages * nmodules * 128 * 128 + stalls_hbm); + double performance = static_cast(throughput_MBs) / 1000; - if (output.device_statistics(i).fpga_status().mailbox_err_reg() != 0) - logger.Error("Device {}: Mailbox error {:x}", i, - output.device_statistics(i).fpga_status().mailbox_err_reg()); + logger.Info("Device {}: stalls HBM: {} stalls host: {} est. performance: {:.2f} GB/s", i, stalls_hbm, + stalls_host, performance); + + for (const auto &iter: output.device_statistics(i).fpga_status().host_writer_err()) + logger.Error("Device {}: FPGA host writer error {}", i, iter); + + if (output.device_statistics(i).fpga_status().mailbox_err_reg() != 0) + logger.Error("Device {}: Mailbox error {:x}", i, + output.device_statistics(i).fpga_status().mailbox_err_reg()); + } } - if (ret) { + logger.Info(""); logger.Info("Test properly executed! (check stall values manually)"); exit(EXIT_SUCCESS); - } else + } else { + logger.Info("Test finished with errors! (check stall values manually)"); exit(EXIT_FAILURE); + } } diff --git a/receiver/jfjoch_action_test_mock.cpp b/receiver/jfjoch_action_test_mock.cpp deleted file mode 100644 index bb39b251..00000000 --- a/receiver/jfjoch_action_test_mock.cpp +++ /dev/null @@ -1,89 +0,0 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later - -#include - -#include "MockAcquisitionDevice.h" -#include "JFJochReceiverTest.h" -#include "../tests/FPGAUnitTest.h" - -int main(int argc, char **argv) { - uint16_t nstreams = 1; - const uint16_t nmodules = 1; - size_t nimages = 2; - uint64_t processing_period = 20; - - Logger logger("ActionTest"); - logger.Verbose(true); - - bool abort_test = false; - - if ((argc == 1) || (argc > 6)) { - logger.Error("Usage ./jfjoch_action_test {<# of images> {<# of modules> {<# of streams> {}}}}"); - exit(EXIT_FAILURE); - } - - if (argc >= 3) nimages = atol(argv[2]); - if (argc >= 4) nstreams = atoi(argv[3]); - if (argc >= 5) processing_period = atoi(argv[4]); - - DiffractionExperiment x(DetectorGeometry(nmodules*nstreams, 2, 8, 36, true)); - - x.Mode(DetectorMode::Conversion); - x.ImagesPerTrigger(nimages).PedestalG0Frames(0).UseInternalPacketGenerator(true).PhotonEnergy_keV(12.4).NumTriggers(1); - x.SpotFindingPeriod(std::chrono::milliseconds(processing_period)).MaskModuleEdges(false).MaskChipEdges(false); - x.Compression(JFJochProtoBuf::BSHUF_LZ4).DataStreams(nstreams); - - bool verbose = false; - bool print_status_updates = true; - uint16_t nthreads = 16; - - logger.Verbose(verbose); - - std::vector> pcie_devices; - std::vector aq_devices; - - std::string image_path = std::string(argv[1]) + "/tests/test_data/mod5_raw0.bin"; - std::vector input(RAW_MODULE_SIZE, 0); - LoadBinaryFile(image_path, input.data(), RAW_MODULE_SIZE); - - for (int i = 0; i < nstreams; i++) { - pcie_devices.push_back(std::make_unique(i, 1024)); - pcie_devices[i]->SetCustomInternalGeneratorFrame(input); - pcie_devices[i]->EnableLogging(&logger); - aq_devices.push_back(pcie_devices[i].get()); - } - - volatile bool done = false; - JFJochProtoBuf::ReceiverOutput output; - bool ret; - std::thread run_thread([&] { - try { - ret = JFJochReceiverTest(output, logger, aq_devices, x, nthreads,abort_test, verbose); - } catch (std::exception &e) { - logger.Error(e.what()); - ret = false; - } - done = true; - }); - - - run_thread.join(); - - double receiving_time = static_cast(output.end_time_ms() - output.start_time_ms())/1000.0; - - logger.Info("Efficiency: {:.2f}%", output.efficiency() * 100.f); - logger.Info("Max delay: {}",output.max_receive_delay()); - logger.Info("Compression factor: {}x", output.compressed_ratio()); - logger.Info("Receiving time: {} s", receiving_time); - logger.Info("Frame rate: {} Hz", static_cast(nimages)/receiving_time); - logger.Info("Total throughput: {:.2f} GB/s", - static_cast(nimages*nstreams*nmodules*RAW_MODULE_SIZE*sizeof(uint16_t)) / (receiving_time * 1e9)); - logger.Info(""); - - if (ret) { - logger.Info("Test properly executed! (check stall values manually)"); - exit(EXIT_SUCCESS); - } else - exit(EXIT_FAILURE); -} From e63ce5df59b304e5418145eb5b586c654f83ce59 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 27 Jul 2023 15:28:52 +0200 Subject: [PATCH 126/224] DiffractionExperiment: Save calibration is loaded from DatasetSettings --- common/DiffractionExperiment.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/common/DiffractionExperiment.cpp b/common/DiffractionExperiment.cpp index c863689e..b4606c66 100644 --- a/common/DiffractionExperiment.cpp +++ b/common/DiffractionExperiment.cpp @@ -902,6 +902,7 @@ void DiffractionExperiment::LoadDatasetSettings(const JFJochProtoBuf::DatasetSet SampleName(settings.sample_name()); Compression(settings.compression()); Binning2x2(settings.binning2x2()); + SaveCalibration(settings.save_calibration()); } catch (...) { dataset = tmp; throw; From 4ac06794daf087f83a64261b8bccb4da3dfe02f4 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 27 Jul 2023 15:29:45 +0200 Subject: [PATCH 127/224] JFConversionGPU: minor fix --- jungfrau/JFConversionGPU.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/jungfrau/JFConversionGPU.cpp b/jungfrau/JFConversionGPU.cpp index 4f527304..695a27b0 100644 --- a/jungfrau/JFConversionGPU.cpp +++ b/jungfrau/JFConversionGPU.cpp @@ -15,7 +15,7 @@ void JFConversionGPU::Setup(const JFModuleGainCalibration &gain_calibration, con } void JFConversionGPU::ConvertModule(int16_t *dest, const uint16_t *source) { - alt_conv.ConvertPacket(dest, source); + alt_conv.ConvertModule(dest, source); } void JFConversionGPU::Sync() {} From 347fe9603f173696663a1367e21709384440c04c Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 27 Jul 2023 15:31:15 +0200 Subject: [PATCH 128/224] DetectorWrapper: Fix bug, when creating detector from at start failed --- detector_control/DetectorWrapper.cpp | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/detector_control/DetectorWrapper.cpp b/detector_control/DetectorWrapper.cpp index 48d1e293..94e50ae8 100644 --- a/detector_control/DetectorWrapper.cpp +++ b/detector_control/DetectorWrapper.cpp @@ -10,12 +10,16 @@ void DetectorWrapper::Configure(const JFJochProtoBuf::DetectorConfig &request) { logger.Info("Configure"); try { - if (det.size() > 0) + if (det.size() > 0) { + // Only if the detector is already defined + + // Stop the detector InternalStop(); - // Clear synchronization prior to reconfiguring the detector - det.setMaster(false, 0); - det.setSynchronization(false); + // Clear synchronization prior to reconfiguring the detector + det.setMaster(false, 0); + det.setSynchronization(false); + } if (request.module_hostname_size() > 0) { std::vector module_hostname; From 3e42e997f4d17b772ca8815a5f4f4e717f79cb6b Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 27 Jul 2023 20:34:46 +0200 Subject: [PATCH 129/224] CMake: minor CUDA fixes --- CMakeLists.txt | 2 ++ image_analysis/CMakeLists.txt | 3 --- jungfrau/CMakeLists.txt | 4 ---- 3 files changed, 2 insertions(+), 7 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index d33f20e8..05c5c1ad 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -18,6 +18,8 @@ SET(CMAKE_CUDA_FLAGS_RELEASE "-O3") IF (CMAKE_CUDA_COMPILER) ENABLE_LANGUAGE(CUDA) MESSAGE(STATUS "CUDA VERSION: ${CMAKE_CUDA_COMPILER_VERSION}") + ADD_COMPILE_DEFINITIONS(-DJFJOCH_USE_CUDA) + FIND_LIBRARY(CUDART_LIBRARY cudart_static PATHS ${CMAKE_CUDA_IMPLICIT_LINK_DIRECTORIES} REQUIRED) ENDIF() SET(JFJOCH_COMPILE_WRITER ON CACHE BOOL "Compile HDF5 writer") diff --git a/image_analysis/CMakeLists.txt b/image_analysis/CMakeLists.txt index 0ebfd5a4..0977a096 100644 --- a/image_analysis/CMakeLists.txt +++ b/image_analysis/CMakeLists.txt @@ -13,8 +13,6 @@ TARGET_INCLUDE_DIRECTORIES(ImageAnalysis PUBLIC fast-feedback-indexer/eigen) IF (CMAKE_CUDA_COMPILER) TARGET_SOURCES(ImageAnalysis PRIVATE GPUImageAnalysis.cu ) - TARGET_COMPILE_DEFINITIONS(ImageAnalysis PUBLIC -DJFJOCH_USE_CUDA) - TARGET_SOURCES(ImageAnalysis PRIVATE fast-feedback-indexer/indexer/src/indexer.cpp fast-feedback-indexer/indexer/src/indexer_gpu.cu @@ -29,7 +27,6 @@ IF (CMAKE_CUDA_COMPILER) TARGET_INCLUDE_DIRECTORIES(ImageAnalysis PUBLIC fast-feedback-indexer/indexer/src/) - FIND_LIBRARY(CUDART_LIBRARY cudart_static PATHS ${CMAKE_CUDA_IMPLICIT_LINK_DIRECTORIES} REQUIRED) TARGET_LINK_LIBRARIES(ImageAnalysis ${CUDART_LIBRARY} ${CMAKE_DL_LIBS} rt) ELSE() MESSAGE(WARNING "CUDA is strongly recommended for image analysis." ) diff --git a/jungfrau/CMakeLists.txt b/jungfrau/CMakeLists.txt index e99bc537..bc556467 100644 --- a/jungfrau/CMakeLists.txt +++ b/jungfrau/CMakeLists.txt @@ -15,9 +15,5 @@ TARGET_LINK_LIBRARIES(JFCalibration JFJochProtoBuf Compression) IF (CMAKE_CUDA_COMPILER) TARGET_SOURCES(JFCalibration PRIVATE JFConversionGPU.cu ) - - TARGET_COMPILE_DEFINITIONS(JFCalibration PUBLIC -DJFJOCH_USE_CUDA) - - FIND_LIBRARY(CUDART_LIBRARY cudart_static PATHS ${CMAKE_CUDA_IMPLICIT_LINK_DIRECTORIES} REQUIRED) TARGET_LINK_LIBRARIES(JFCalibration ${CUDART_LIBRARY} ${CMAKE_DL_LIBS} rt) ENDIF() From 5ca23ff64f086bb8021dbf229854cbfaf724c09a Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 27 Jul 2023 20:45:30 +0200 Subject: [PATCH 130/224] MockAcquisitionDevice: Minor fix --- receiver/MockAcquisitionDevice.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/receiver/MockAcquisitionDevice.cpp b/receiver/MockAcquisitionDevice.cpp index 73139b20..71cd9d5c 100644 --- a/receiver/MockAcquisitionDevice.cpp +++ b/receiver/MockAcquisitionDevice.cpp @@ -11,7 +11,7 @@ void MockAcquisitionDevice::Start(const DiffractionExperiment& experiment) { cancel = false; if (experiment.IsUsingInternalPacketGen()) { - if (experiment.GetConversionOnFPGA()) { + if (experiment.GetConversionOnFPGA() && (experiment.GetDetectorMode() == DetectorMode::Conversion)) { for (auto &i: buffer_device) memcpy(i, internal_pkt_gen_frame_conv.data(), RAW_MODULE_SIZE * sizeof(uint16_t)); } else { From 669b2d9358d69c060b52d17d7b2acee8a8f6f345 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 27 Jul 2023 21:30:10 +0200 Subject: [PATCH 131/224] CUDAWrapper: Move select device to dedicated wrapper --- common/CMakeLists.txt | 9 ++++++++- common/CUDAWrapper.cpp | 14 ++++++++++++++ common/CUDAWrapper.cu | 25 +++++++++++++++++++++++++ common/CUDAWrapper.h | 12 ++++++++++++ image_analysis/GPUImageAnalysis.cpp | 2 -- image_analysis/GPUImageAnalysis.cu | 27 +++++++-------------------- image_analysis/GPUImageAnalysis.h | 9 +++------ 7 files changed, 69 insertions(+), 29 deletions(-) create mode 100644 common/CUDAWrapper.cpp create mode 100644 common/CUDAWrapper.cu create mode 100644 common/CUDAWrapper.h diff --git a/common/CMakeLists.txt b/common/CMakeLists.txt index c7272c3c..b2e7e530 100644 --- a/common/CMakeLists.txt +++ b/common/CMakeLists.txt @@ -44,10 +44,17 @@ ADD_LIBRARY( CommonFunctions STATIC DetectorGeometry.cpp DetectorGeometry.h DetectorModuleGeometry.cpp DetectorModuleGeometry.h DetectorSetup.h DetectorSetup.cpp ZeroCopyReturnValue.h Histogram.h DiffractionGeometry.h - ROIFilter.h) + ROIFilter.h + CUDAWrapper.cpp + CUDAWrapper.h) TARGET_LINK_LIBRARIES(CommonFunctions Compression FrameSerialize libzmq JFCalibration JFJochProtoBuf -lrt) +IF (CMAKE_CUDA_COMPILER) + TARGET_SOURCES(CommonFunctions PRIVATE CUDAWrapper.cu ) + TARGET_LINK_LIBRARIES(CommonFunctions ${CUDART_LIBRARY} ${CMAKE_DL_LIBS} rt) +ENDIF() + IF(HAS_NUMAIF AND NUMA_LIBRARY) TARGET_COMPILE_DEFINITIONS(CommonFunctions PRIVATE -DJFJOCH_USE_NUMA) TARGET_LINK_LIBRARIES(CommonFunctions ${NUMA_LIBRARY}) diff --git a/common/CUDAWrapper.cpp b/common/CUDAWrapper.cpp new file mode 100644 index 00000000..ead14de6 --- /dev/null +++ b/common/CUDAWrapper.cpp @@ -0,0 +1,14 @@ +// Copyright (2019-2023) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#ifndef JFJOCH_USE_CUDA + +#include "CUDAWrapper.h" + +int32_t get_gpu_count() { + return 0; +} + +void set_gpu_count(int32_t dev_id) {} + +#endif diff --git a/common/CUDAWrapper.cu b/common/CUDAWrapper.cu new file mode 100644 index 00000000..df4108fb --- /dev/null +++ b/common/CUDAWrapper.cu @@ -0,0 +1,25 @@ +// Copyright (2019-2023) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#include "CUDAWrapper.h" +#include "JFJochException.h" + +inline void cuda_err(cudaError_t val) { + if (val != cudaSuccess) + throw JFJochException(JFJochExceptionCategory::GPUCUDAError, cudaGetErrorString(val)); +} + +int32_t get_gpu_count() { + int device_count; + cuda_err(cudaGetDeviceCount(&device_count)); + return device_count; +} + +void set_gpu_count(int32_t dev_id) { + auto dev_count = get_gpu_count(); + + if ((dev_id < 0) || (dev_id >= dev_count)) + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Device ID cannot be negative"); + + cuda_err(cudaSetDevice(dev_id)); +} \ No newline at end of file diff --git a/common/CUDAWrapper.h b/common/CUDAWrapper.h new file mode 100644 index 00000000..61865da5 --- /dev/null +++ b/common/CUDAWrapper.h @@ -0,0 +1,12 @@ +// Copyright (2019-2023) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#ifndef JUNGFRAUJOCH_CUDAWRAPPER_H +#define JUNGFRAUJOCH_CUDAWRAPPER_H + +#include + +int32_t get_gpu_count(); +void set_gpu_count(int32_t dev_id); + +#endif //JUNGFRAUJOCH_CUDAWRAPPER_H diff --git a/image_analysis/GPUImageAnalysis.cpp b/image_analysis/GPUImageAnalysis.cpp index 63e6e9c5..f3f48921 100644 --- a/image_analysis/GPUImageAnalysis.cpp +++ b/image_analysis/GPUImageAnalysis.cpp @@ -62,8 +62,6 @@ float GPUImageAnalysis::GetRadialIntegrationRangeValue(uint16_t min_bin, uint16_ return 0; } -std::atomic GPUImageAnalysis::threadid{0}; - void GPUImageAnalysis::LoadRadialIntegrationCorr(const std::vector& v) {} #endif diff --git a/image_analysis/GPUImageAnalysis.cu b/image_analysis/GPUImageAnalysis.cu index 943c5f90..ba054a5d 100644 --- a/image_analysis/GPUImageAnalysis.cu +++ b/image_analysis/GPUImageAnalysis.cu @@ -6,6 +6,7 @@ #include "../common/DiffractionGeometry.h" #include +#include "../common/CUDAWrapper.h" // input X x Y pixels array // output X x Y byte array @@ -228,22 +229,12 @@ __global__ void apply_pixel_mask(int16_t *image, const uint8_t *mask, uint32_t n } } -GPUImageAnalysis::GPUImageAnalysis(int32_t in_xpixels, int32_t in_ypixels, const std::vector &mask, - int32_t gpu_device) : +GPUImageAnalysis::GPUImageAnalysis(int32_t in_xpixels, int32_t in_ypixels, const std::vector &mask) : xpixels(in_xpixels), ypixels(in_ypixels), gpu_out(nullptr), rad_integration_nbins(0), numberOfSMs(1) { - int device_count; - cuda_err(cudaGetDeviceCount(&device_count)); - - if (device_count == 0) + if (get_gpu_count() == 0) throw JFJochException(JFJochExceptionCategory::GPUCUDAError, "No CUDA devices found"); - if (gpu_device < 0) - gpu_device = threadid++; - - if (device_count > 1) - cuda_err(cudaSetDevice(gpu_device % device_count)); - int deviceId; cuda_err(cudaGetDevice(&deviceId)); cudaDeviceGetAttribute(&numberOfSMs, cudaDevAttrMultiProcessorCount, deviceId); @@ -271,8 +262,8 @@ GPUImageAnalysis::GPUImageAnalysis(int32_t in_xpixels, int32_t in_ypixels, const } GPUImageAnalysis::GPUImageAnalysis(int32_t xpixels, int32_t ypixels, const std::vector &mask, - const std::vector &rad_int_mapping, uint16_t rad_int_nbins, - int32_t gpu_device) : GPUImageAnalysis(xpixels, ypixels, mask, gpu_device) { + const std::vector &rad_int_mapping, uint16_t rad_int_nbins) + : GPUImageAnalysis(xpixels, ypixels, mask) { rad_integration_nbins = rad_int_nbins; if (rad_int_mapping.size() != xpixels * ypixels) @@ -297,10 +288,8 @@ GPUImageAnalysis::GPUImageAnalysis(int32_t xpixels, int32_t ypixels, const std:: } GPUImageAnalysis::GPUImageAnalysis(int32_t xpixels, int32_t ypixels, const std::vector &mask, - const RadialIntegrationMapping& mapping, - int32_t gpu_device) - : GPUImageAnalysis(xpixels, ypixels, mask, mapping.GetPixelToBinMapping(), - mapping.GetBinNumber(), gpu_device) {} + const RadialIntegrationMapping& mapping) + : GPUImageAnalysis(xpixels, ypixels, mask, mapping.GetPixelToBinMapping(),mapping.GetBinNumber()) {} GPUImageAnalysis::~GPUImageAnalysis() { cudaStreamDestroy(cudastream->v); @@ -520,5 +509,3 @@ float GPUImageAnalysis::GetRadialIntegrationRangeValue(uint16_t min_bin, uint16_ else return ret_sum / ret_count; } - -std::atomic GPUImageAnalysis::threadid{0}; diff --git a/image_analysis/GPUImageAnalysis.h b/image_analysis/GPUImageAnalysis.h index 963a64fe..a0086fff 100644 --- a/image_analysis/GPUImageAnalysis.h +++ b/image_analysis/GPUImageAnalysis.h @@ -25,8 +25,6 @@ class GPUImageAnalysis { std::mutex m; CudaStreamWrapper *cudastream; - static std::atomic threadid; - const int32_t xpixels; const int32_t ypixels; @@ -54,12 +52,11 @@ class GPUImageAnalysis { const int maxStrongPixel = 65536; public: - GPUImageAnalysis(int32_t xpixels, int32_t ypixels, const std::vector &mask, int32_t gpu_device = -1); + GPUImageAnalysis(int32_t xpixels, int32_t ypixels, const std::vector &mask); GPUImageAnalysis(int32_t xpixels, int32_t ypixels, const std::vector &mask, - const std::vector &rad_int_mapping, uint16_t rad_int_nbins, - int32_t gpu_device = -1); + const std::vector &rad_int_mapping, uint16_t rad_int_nbins); GPUImageAnalysis(int32_t xpixels, int32_t ypixels, const std::vector &mask, - const RadialIntegrationMapping& mapping,int32_t gpu_device = -1); + const RadialIntegrationMapping& mapping); ~GPUImageAnalysis(); From 9d978a41f766760c2a5dec351a02ea84267cea39 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 28 Jul 2023 11:00:42 +0200 Subject: [PATCH 132/224] NUMAHWPolicy: Added --- common/CMakeLists.txt | 11 ++- common/CUDAWrapper.cpp | 2 +- common/CUDAWrapper.cu | 2 +- common/CUDAWrapper.h | 2 +- common/NUMAHWPolicy.cpp | 119 +++++++++++++++++++++++++++++ common/NUMAHWPolicy.h | 40 ++++++++++ receiver/CMakeLists.txt | 14 ---- receiver/JFJochReceiver.cpp | 37 +++++---- receiver/JFJochReceiver.h | 19 +++-- receiver/JFJochReceiverService.cpp | 16 +++- receiver/JFJochReceiverService.h | 6 ++ receiver/JFJochReceiverTest.cpp | 16 ++-- receiver/JFJochReceiverTest.h | 9 ++- receiver/jfjoch_action_test.cpp | 9 ++- receiver/jfjoch_receiver.cpp | 2 +- 15 files changed, 246 insertions(+), 58 deletions(-) create mode 100644 common/NUMAHWPolicy.cpp create mode 100644 common/NUMAHWPolicy.h diff --git a/common/CMakeLists.txt b/common/CMakeLists.txt index b2e7e530..d7d84cfd 100644 --- a/common/CMakeLists.txt +++ b/common/CMakeLists.txt @@ -46,7 +46,9 @@ ADD_LIBRARY( CommonFunctions STATIC DetectorSetup.h DetectorSetup.cpp ZeroCopyReturnValue.h Histogram.h DiffractionGeometry.h ROIFilter.h CUDAWrapper.cpp - CUDAWrapper.h) + CUDAWrapper.h + NUMAHWPolicy.cpp + NUMAHWPolicy.h) TARGET_LINK_LIBRARIES(CommonFunctions Compression FrameSerialize libzmq JFCalibration JFJochProtoBuf -lrt) @@ -55,7 +57,10 @@ IF (CMAKE_CUDA_COMPILER) TARGET_LINK_LIBRARIES(CommonFunctions ${CUDART_LIBRARY} ${CMAKE_DL_LIBS} rt) ENDIF() -IF(HAS_NUMAIF AND NUMA_LIBRARY) - TARGET_COMPILE_DEFINITIONS(CommonFunctions PRIVATE -DJFJOCH_USE_NUMA) +IF(HAS_NUMAIF AND HAS_NUMA_H AND NUMA_LIBRARY) + TARGET_COMPILE_DEFINITIONS(CommonFunctions PUBLIC -DJFJOCH_USE_NUMA) TARGET_LINK_LIBRARIES(CommonFunctions ${NUMA_LIBRARY}) + MESSAGE(STATUS "NUMA memory/CPU pinning enabled") +ELSE() + MESSAGE(WARNING "NUMA memory/CPU pinning disabled") ENDIF() diff --git a/common/CUDAWrapper.cpp b/common/CUDAWrapper.cpp index ead14de6..9b5ff35d 100644 --- a/common/CUDAWrapper.cpp +++ b/common/CUDAWrapper.cpp @@ -9,6 +9,6 @@ int32_t get_gpu_count() { return 0; } -void set_gpu_count(int32_t dev_id) {} +void set_gpu(int32_t dev_id) {} #endif diff --git a/common/CUDAWrapper.cu b/common/CUDAWrapper.cu index df4108fb..8a47b847 100644 --- a/common/CUDAWrapper.cu +++ b/common/CUDAWrapper.cu @@ -15,7 +15,7 @@ int32_t get_gpu_count() { return device_count; } -void set_gpu_count(int32_t dev_id) { +void set_gpu(int32_t dev_id) { auto dev_count = get_gpu_count(); if ((dev_id < 0) || (dev_id >= dev_count)) diff --git a/common/CUDAWrapper.h b/common/CUDAWrapper.h index 61865da5..4297ed1f 100644 --- a/common/CUDAWrapper.h +++ b/common/CUDAWrapper.h @@ -7,6 +7,6 @@ #include int32_t get_gpu_count(); -void set_gpu_count(int32_t dev_id); +void set_gpu(int32_t dev_id); #endif //JUNGFRAUJOCH_CUDAWRAPPER_H diff --git a/common/NUMAHWPolicy.cpp b/common/NUMAHWPolicy.cpp new file mode 100644 index 00000000..42043e95 --- /dev/null +++ b/common/NUMAHWPolicy.cpp @@ -0,0 +1,119 @@ +// Copyright (2019-2023) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#include "NUMAHWPolicy.h" + +#include "../common/CUDAWrapper.h" +#include "JFJochException.h" + +#ifdef JFJOCH_USE_NUMA +#include +#endif + +NUMAHWPolicy::NUMAHWPolicy(const std::string &policy) : name(policy) { + if ((policy.empty()) || (policy == "none")) { + name = "none"; + } else if (policy == "n2g2") { + bindings.emplace_back(NUMABinding{.cpu_node = 0, .mem_node = 0, .gpu = 0}); + bindings.emplace_back(NUMABinding{.cpu_node = 1, .mem_node = 1, .gpu = 1}); + } else if (policy == "n8g4") { + for (int32_t i = 0; i < 8; i++) + bindings.emplace_back(NUMABinding{.cpu_node = i, .mem_node = i, .gpu = i/2}); + } else if (policy == "n8g4_hbm") { + for (int32_t i = 0; i < 8; i++) + bindings.emplace_back(NUMABinding{.cpu_node = i, .mem_node = i + 8, .gpu = i / 2}); + } else if (policy == "g2") { + bindings.emplace_back(NUMABinding{.cpu_node = -1, .mem_node = -1, .gpu = 0}); + bindings.emplace_back(NUMABinding{.cpu_node = -1, .mem_node = -1, .gpu = 1}); + } else if (policy == "g4") { + bindings.emplace_back(NUMABinding{.cpu_node = -1, .mem_node = -1, .gpu = 0}); + bindings.emplace_back(NUMABinding{.cpu_node = -1, .mem_node = -1, .gpu = 1}); + bindings.emplace_back(NUMABinding{.cpu_node = -1, .mem_node = -1, .gpu = 2}); + bindings.emplace_back(NUMABinding{.cpu_node = -1, .mem_node = -1, .gpu = 3}); + } else + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Unknown NUMA policy"); +} + +NUMAHWPolicy::NUMAHWPolicy(const NUMAHWPolicy &other) : bindings(other.bindings), name(other.name), curr_thread(0) {} + +NUMAHWPolicy &NUMAHWPolicy::operator=(const NUMAHWPolicy &other) { + bindings = other.bindings; + name = other.name; + curr_thread = 0; + return *this; +} + +NUMABinding NUMAHWPolicy::GetBinding(uint32_t thread) { + if (bindings.empty()) + return NUMABinding{.cpu_node = -1, .mem_node = -1, .gpu = -1}; + else + return bindings.at(thread % bindings.size()); +} + +NUMABinding NUMAHWPolicy::GetBinding() { + return GetBinding(curr_thread++); +} + +void NUMAHWPolicy::Bind() { + Bind(GetBinding()); +} + +void NUMAHWPolicy::Bind(uint32_t thread) { + Bind(GetBinding(thread)); +} + +void NUMAHWPolicy::Bind(const NUMABinding &binding) { + RunOnNode(binding.cpu_node); + MemOnNode(binding.mem_node); + SelectGPU(binding.gpu); +} + +void NUMAHWPolicy::RunOnNode(int32_t cpu_node) { +#ifdef JFJOCH_USE_NUMA + if (numa_available() != -1) { + auto max_nodes = numa_num_configured_nodes(); + + if (cpu_node >= 0) { + if (cpu_node < max_nodes) + numa_run_on_node(cpu_node); + else + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "CPU NUMA node out of bounds"); + } + } +#endif +} + +void NUMAHWPolicy::MemOnNode(int32_t mem_node) { +#ifdef JFJOCH_USE_NUMA + if (numa_available() != -1) { + auto max_nodes = numa_num_configured_nodes(); + + if (mem_node >= 0) { + if (mem_node < max_nodes) { + struct bitmask *mask = numa_allocate_nodemask(); + numa_bitmask_setbit(mask, mem_node); + numa_set_membind(mask); + numa_bitmask_free(mask); + } else + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Memory NUMA node out of bounds"); + } + } +#endif +} + +void NUMAHWPolicy::SelectGPU(int32_t gpu) { +#ifdef JFJOCH_USE_CUDA + if (gpu > 0) { + if (gpu < get_gpu_count()) + set_gpu(gpu); + else + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "GPU device out of bounds"); + } +#endif +} + +const std::string &NUMAHWPolicy::GetName() const { + return name; +} + + diff --git a/common/NUMAHWPolicy.h b/common/NUMAHWPolicy.h new file mode 100644 index 00000000..446b66a1 --- /dev/null +++ b/common/NUMAHWPolicy.h @@ -0,0 +1,40 @@ +// Copyright (2019-2023) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#ifndef JUNGFRAUJOCH_NUMAHWPOLICY_H +#define JUNGFRAUJOCH_NUMAHWPOLICY_H + +#include +#include +#include +#include + +struct NUMABinding { + int32_t cpu_node; + int32_t mem_node; + int32_t gpu; +}; + +class NUMAHWPolicy { + std::string name; + std::vector bindings; + std::atomic curr_thread = 0; +public: + NUMAHWPolicy() = default; + explicit NUMAHWPolicy(const std::string& policy); + NUMAHWPolicy(const NUMAHWPolicy& other); + NUMAHWPolicy& operator=(const NUMAHWPolicy& other); + NUMABinding GetBinding(uint32_t thread); + NUMABinding GetBinding(); // round-robin + + const std::string &GetName() const; + + void Bind(uint32_t thread); + void Bind(); // round-robin + static void Bind(const NUMABinding &binding); + static void RunOnNode(int32_t cpu_node); + static void MemOnNode(int32_t mem_node); + static void SelectGPU(int32_t gpu); +}; + +#endif //JUNGFRAUJOCH_NUMAHWPOLICY_H diff --git a/receiver/CMakeLists.txt b/receiver/CMakeLists.txt index acf4ecea..90cae64f 100644 --- a/receiver/CMakeLists.txt +++ b/receiver/CMakeLists.txt @@ -29,14 +29,6 @@ ADD_EXECUTABLE(jfjoch_lxsocket_test jfjoch_lxsocket_test.cpp) TARGET_LINK_LIBRARIES(jfjoch_lxsocket_test JungfraujochHost) INSTALL(TARGETS jfjoch_lxsocket_test RUNTIME) -IF(HAS_NUMAIF AND HAS_NUMA_H AND NUMA_LIBRARY) - TARGET_COMPILE_DEFINITIONS(JungfraujochHost PUBLIC -DJFJOCH_USE_NUMA) - TARGET_LINK_LIBRARIES(JungfraujochHost ${NUMA_LIBRARY}) - MESSAGE(STATUS "NUMA memory/CPU pinning enabled") -ELSE() - MESSAGE(WARNING "NUMA memory/CPU pinning disabled") -ENDIF() - ADD_EXECUTABLE(jfjoch_pcie_status jfjoch_pcie_status.cpp) TARGET_LINK_LIBRARIES(jfjoch_pcie_status JungfraujochHost) INSTALL(TARGETS jfjoch_pcie_status RUNTIME) @@ -60,12 +52,6 @@ ADD_LIBRARY(JFJochReceiver STATIC TARGET_LINK_LIBRARIES(JFJochReceiver ImageAnalysis JungfraujochHost CommonFunctions HLSSimulation) -IF(HAS_NUMA_H AND NUMA_LIBRARY) - TARGET_COMPILE_DEFINITIONS(JFJochReceiver PRIVATE -DJFJOCH_USE_NUMA_H) - TARGET_LINK_LIBRARIES(JFJochReceiver ${NUMA_LIBRARY}) - MESSAGE(STATUS "JFJochReceiver compiled with NUMA thread pinning") -ENDIF() - ADD_EXECUTABLE(jfjoch_receiver jfjoch_receiver.cpp) TARGET_LINK_LIBRARIES(jfjoch_receiver JFJochReceiver) INSTALL(TARGETS jfjoch_receiver RUNTIME) diff --git a/receiver/JFJochReceiver.cpp b/receiver/JFJochReceiver.cpp index d42da4b5..2c5b4cff 100644 --- a/receiver/JFJochReceiver.cpp +++ b/receiver/JFJochReceiver.cpp @@ -10,10 +10,6 @@ #include "../image_analysis/IndexerWrapper.h" #include "../common/DiffractionGeometry.h" -#ifdef JFJOCH_USE_NUMA -#include -#endif - inline std::string time_UTC(const std::chrono::time_point &input) { auto time_ms = std::chrono::duration_cast(input.time_since_epoch()).count(); @@ -30,7 +26,8 @@ JFJochReceiver::JFJochReceiver(const JFJochProtoBuf::ReceiverInput &settings, Logger &in_logger, int64_t in_forward_and_sum_nthreads, int64_t in_send_buffer_count, ZMQPreviewPublisher* in_preview_publisher, - ZMQPreviewPublisher* in_preview_publisher_indexed) : + ZMQPreviewPublisher* in_preview_publisher_indexed, + const NUMAHWPolicy &in_numa_policy) : experiment(settings.jungfraujoch_settings()), acquisition_device(in_aq_device), logger(in_logger), @@ -44,7 +41,8 @@ JFJochReceiver::JFJochReceiver(const JFJochProtoBuf::ReceiverInput &settings, frame_transformation_ready((experiment.GetImageNum() > 0) ? frame_transformation_nthreads : 0), send_buffer_count(in_send_buffer_count), send_buffer(send_buffer_size * send_buffer_count), - indexing_solution_per_file(experiment.GetDataFileCount()) + indexing_solution_per_file(experiment.GetDataFileCount()), + numa_policy(in_numa_policy) { if (settings.has_calibration()) { calib.emplace(settings.calibration()); @@ -77,8 +75,10 @@ JFJochReceiver::JFJochReceiver(const JFJochProtoBuf::ReceiverInput &settings, preview_stride = experiment.GetPreviewStride(); spotfinder_stride = experiment.GetSpotFindingStride(); + logger.Info("NUMA policy: {}", numa_policy.GetName()); logger.Info("Image stride for data analysis: preview {}, spot finding/radial integration {}", preview_stride, spotfinder_stride); + if (experiment.GetDetectorMode() == DetectorMode::Conversion) { if (preview_publisher != nullptr) preview_publisher->Start(experiment, calib.value()); @@ -237,7 +237,11 @@ JFJochReceiver::JFJochReceiver(const JFJochProtoBuf::ReceiverInput &settings, } void JFJochReceiver::AcquireThread(uint16_t data_stream) { - PinThreadToDevice(data_stream); + try { + NUMAHWPolicy::RunOnNode(acquisition_device[data_stream]->GetNUMANode()); + } catch (const JFJochException &e) { + logger.Error("HW bind error {}", e.what()); + } try { frame_transformation_ready.wait(); @@ -265,7 +269,11 @@ void JFJochReceiver::AcquireThread(uint16_t data_stream) { } void JFJochReceiver::MeasurePedestalThread(uint16_t data_stream, uint16_t module_number, uint16_t storage_cell) { - PinThreadToDevice(data_stream); + try { + NUMAHWPolicy::RunOnNode(acquisition_device[data_stream]->GetNUMANode()); + } catch (const JFJochException &e) { + logger.Error("HW bind error {}", e.what()); + } JFPedestalCalc pedestal_calc(experiment); @@ -354,6 +362,12 @@ void JFJochReceiver::MiniSummationThread(int d, int m, size_t image_number, bool } void JFJochReceiver::FrameTransformationThread() { + try { + numa_policy.Bind(); + } catch (const JFJochException &e) { + logger.Error("HW bind error {}", e.what()); + } + FrameTransformation transformation(experiment); std::unique_ptr spot_finder; @@ -785,13 +799,6 @@ void JFJochReceiver::PrepareConversionOnCPU() { experiment.GetPhotonEnergy_keV()); } -void JFJochReceiver::PinThreadToDevice(uint16_t data_stream) { -#ifdef JFJOCH_USE_NUMA - if (numa_available() != -1) - numa_run_on_node(acquisition_device[data_stream]->GetNUMANode()); -#endif -} - void JFJochReceiver::UpdateMaxImage(int64_t image_number) { std::unique_lock ul(max_image_number_sent_mutex); if (image_number > max_image_number_sent) diff --git a/receiver/JFJochReceiver.h b/receiver/JFJochReceiver.h index 2744d05b..438ad71c 100644 --- a/receiver/JFJochReceiver.h +++ b/receiver/JFJochReceiver.h @@ -11,23 +11,24 @@ #include #include +#include "AcquisitionDevice.h" + #include "../common/DiffractionExperiment.h" #include "../common/JFJochException.h" #include "../common/FrameTransformation.h" -#include "../image_analysis/StrongPixelSet.h" -#include "../jungfrau/JFCalibration.h" #include "../common/ImagePusher.h" - -#include "AcquisitionDevice.h" #include "../common/Logger.h" #include "../common/ThreadSafeFIFO.h" #include "../common/ZMQPreviewPublisher.h" +#include "../common/NUMAHWPolicy.h" +#include "../common/StatusVector.h" +#include "../common/Histogram.h" +#include "../image_analysis/StrongPixelSet.h" #include "../image_analysis/RadialIntegrationMapping.h" #include "../image_analysis/RadialIntegrationProfile.h" -#include "../common/StatusVector.h" -#include "../common/Histogram.h" +#include "../jungfrau/JFCalibration.h" #include "../jungfrau/JFConversionFixedPoint.h" class JFJochReceiver { @@ -101,7 +102,8 @@ class JFJochReceiver { std::vector send_buffer; std::vector send_buffer_zero_copy_ret_val; - void PinThreadToDevice(uint16_t data_stream); + NUMAHWPolicy numa_policy; + void PrepareConversionOnCPU(); void AcquireThread(uint16_t data_stream); void FrameTransformationThread(); @@ -123,7 +125,8 @@ public: Logger &logger, int64_t forward_and_sum_nthreads, int64_t send_buffer_count, ZMQPreviewPublisher* preview_publisher, - ZMQPreviewPublisher* preview_publisher_indexed); + ZMQPreviewPublisher* preview_publisher_indexed, + const NUMAHWPolicy &numa_policy); ~JFJochReceiver(); JFJochReceiver(const JFJochReceiver &other) = delete; JFJochReceiver& operator=(const JFJochReceiver &other) = delete; diff --git a/receiver/JFJochReceiverService.cpp b/receiver/JFJochReceiverService.cpp index b7263eb5..2116605a 100644 --- a/receiver/JFJochReceiverService.cpp +++ b/receiver/JFJochReceiverService.cpp @@ -22,7 +22,8 @@ grpc::Status JFJochReceiverService::Start(grpc::ServerContext *context, const JF receiver.reset(); receiver = std::make_unique(*request, aq_devices, image_pusher, logger, nthreads, send_buffer_count, - preview_publisher, preview_publisher_indexed); + preview_publisher, preview_publisher_indexed, + numa_policy); try { // Don't want to stop receiver->SetDataProcessingSettings(data_processing_settings); @@ -119,6 +120,16 @@ JFJochReceiverService& JFJochReceiverService::PreviewPublisherIndexed(ZMQPreview return *this; } +JFJochReceiverService &JFJochReceiverService::NUMAPolicy(const NUMAHWPolicy &policy) { + numa_policy = policy; + return *this; +} + +JFJochReceiverService &JFJochReceiverService::NUMAPolicy(const std::string &policy) { + numa_policy = NUMAHWPolicy(policy); + return *this; +} + grpc::Status JFJochReceiverService::GetStatus(grpc::ServerContext *context, const JFJochProtoBuf::Empty *request, JFJochProtoBuf::ReceiverStatus *response) { // FPGA status can be polled outside the state mutex @@ -196,4 +207,5 @@ grpc::Status JFJochReceiverService::GetNetworkConfig(grpc::ServerContext *contex dev_net_cfg->set_udp_port(aq->GetUDPPort()); } return grpc::Status::OK; -} \ No newline at end of file +} + diff --git a/receiver/JFJochReceiverService.h b/receiver/JFJochReceiverService.h index abef96ac..6b5f6092 100644 --- a/receiver/JFJochReceiverService.h +++ b/receiver/JFJochReceiverService.h @@ -6,9 +6,13 @@ #include "JFJochReceiver.h" #include "jfjoch.grpc.pb.h" + #include +#include "../common/NUMAHWPolicy.h" + class JFJochReceiverService final : public JFJochProtoBuf::gRPC_JFJochReceiver::Service { + NUMAHWPolicy numa_policy; std::unique_ptr receiver; std::vector &aq_devices; @@ -35,6 +39,8 @@ public: JFJochReceiverService& PreviewPublisherIndexed(ZMQPreviewPublisher *in_preview_writer); JFJochReceiverService& NumThreads(int64_t input); JFJochReceiverService& SendBufferCount(int64_t input); + JFJochReceiverService& NUMAPolicy(const NUMAHWPolicy& policy); + JFJochReceiverService& NUMAPolicy(const std::string& policy); grpc::Status Start(grpc::ServerContext* context, const JFJochProtoBuf::ReceiverInput* request, JFJochProtoBuf::Empty* response) override; diff --git a/receiver/JFJochReceiverTest.cpp b/receiver/JFJochReceiverTest.cpp index 39f44fa9..62f6659f 100644 --- a/receiver/JFJochReceiverTest.cpp +++ b/receiver/JFJochReceiverTest.cpp @@ -12,7 +12,8 @@ JFJochProtoBuf::ReceiverOutput RunJFJochReceiverTest(std::vector> &aq_devices, const DiffractionExperiment &x, uint16_t nthreads, bool abort, - bool verbose, ZMQPreviewPublisher *in_preview_writer) { + bool verbose, ZMQPreviewPublisher *in_preview_writer, + const std::string &numa_policy) { std::vector tmp_aq_devices; for (const auto &i: aq_devices) tmp_aq_devices.emplace_back(i.get()); return JFJochReceiverTest(output, logger, tmp_aq_devices, x, nthreads, - abort, verbose, in_preview_writer); + abort, verbose, in_preview_writer, numa_policy); } static JFCalibration GeneratePedestalCalibration(const DiffractionExperiment &x) { @@ -86,7 +87,8 @@ static JFCalibration GeneratePedestalCalibration(const DiffractionExperiment &x) bool JFJochReceiverTest(JFJochProtoBuf::ReceiverOutput &output, Logger &logger, std::vector &aq_devices, const DiffractionExperiment &x, uint16_t nthreads, bool abort, - bool verbose, ZMQPreviewPublisher *in_preview_writer) { + bool verbose, ZMQPreviewPublisher *in_preview_writer, + const std::string &numa_policy) { std::vector raw_expected_image(RAW_MODULE_SIZE * x.GetModulesNum()); for (int i = 0; i < x.GetDataStreamsNum(); i++) { @@ -112,7 +114,7 @@ bool JFJochReceiverTest(JFJochProtoBuf::ReceiverOutput &output, Logger &logger, TestImagePusher pusher(image_number); output = RunJFJochReceiverTest(aq_devices, pusher, x, logger, calib, nthreads, abort, - in_preview_writer); + in_preview_writer, numa_policy); bool no_errors = true; diff --git a/receiver/JFJochReceiverTest.h b/receiver/JFJochReceiverTest.h index 90aaf6de..f36aaa5b 100644 --- a/receiver/JFJochReceiverTest.h +++ b/receiver/JFJochReceiverTest.h @@ -9,16 +9,19 @@ JFJochProtoBuf::ReceiverOutput RunJFJochReceiverTest(std::vector &aq_devices, ImagePusher &pusher, const DiffractionExperiment &x, Logger &logger, JFCalibration &calib, uint16_t nthreads, bool abort = false, - ZMQPreviewPublisher *in_preview_writer = nullptr); + ZMQPreviewPublisher *in_preview_writer = nullptr, + const std::string &numa_policy = ""); bool JFJochReceiverTest(JFJochProtoBuf::ReceiverOutput &output, Logger &logger, std::vector &aq_devices, const DiffractionExperiment &x, uint16_t nthreads, bool abort = false, - bool verbose = true, ZMQPreviewPublisher *in_preview_writer = nullptr); + bool verbose = true, ZMQPreviewPublisher *in_preview_writer = nullptr, + const std::string &numa_policy = ""); bool JFJochReceiverTest(JFJochProtoBuf::ReceiverOutput &output, Logger &logger, std::vector> &aq_devices, const DiffractionExperiment &x, uint16_t nthreads, bool abort = false, - bool verbose = true, ZMQPreviewPublisher *in_preview_writer = nullptr); + bool verbose = true, ZMQPreviewPublisher *in_preview_writer = nullptr, + const std::string &numa_policy = ""); #endif //JUNGFRAUJOCH_JFJOCHRECEIVERTEST_H diff --git a/receiver/jfjoch_action_test.cpp b/receiver/jfjoch_action_test.cpp index 9e76402d..9c7244bf 100644 --- a/receiver/jfjoch_action_test.cpp +++ b/receiver/jfjoch_action_test.cpp @@ -20,6 +20,7 @@ void print_usage(Logger &logger) { logger.Info(" -i number of images"); logger.Info(" -p data processing period"); logger.Info(" -N number of image processing threads"); + logger.Info(" -P NUMA Policy (none|n2g2|n8g4|n8g4_hbm), none is default"); } int main(int argc, char **argv) { @@ -36,12 +37,13 @@ int main(int argc, char **argv) { bool use_mock_device = false; bool nonblocking_mode = true; bool verbose = false; + std::string numa_policy_name = ""; if (argc == 1) print_usage(logger); int opt; - while ((opt = getopt(argc, argv, "s:i:m:p:N:CMBv")) != -1) { + while ((opt = getopt(argc, argv, "s:i:m:p:N:P:CMBv")) != -1) { switch (opt) { case 'C': conversion_on_cpu = true; @@ -70,6 +72,9 @@ int main(int argc, char **argv) { case 'v': verbose = true; break; + case 'P': + numa_policy_name = std::string(optarg); + break; default: /* '?' */ print_usage(logger); exit(EXIT_FAILURE); @@ -142,7 +147,7 @@ int main(int argc, char **argv) { bool ret; std::thread run_thread([&] { try { - ret = JFJochReceiverTest(output, logger, aq_devices, x, nthreads, false, verbose); + ret = JFJochReceiverTest(output, logger, aq_devices, x, nthreads, false, verbose, nullptr, numa_policy_name); } catch (std::exception &e) { logger.Error(e.what()); ret = false; diff --git a/receiver/jfjoch_receiver.cpp b/receiver/jfjoch_receiver.cpp index 1e1acd20..a20994f8 100644 --- a/receiver/jfjoch_receiver.cpp +++ b/receiver/jfjoch_receiver.cpp @@ -154,7 +154,7 @@ int main(int argc, char **argv) { if (input.contains("preview_indexed_zmq_addr")) { preview_indexed = std::make_unique(context, input["preview_indexed_zmq_addr"]); - service.PreviewPublisher(preview_indexed.get()); + service.PreviewPublisherIndexed(preview_indexed.get()); logger.Info("Preview available for indexed frames on ZMQ addr " + input["preview_indexed_zmq_addr"].get()); } From 60ab2a081d6fdd86776921ceb34e194b79c69a46 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 28 Jul 2023 11:17:34 +0200 Subject: [PATCH 133/224] jfjoch_action_test - minor fix --- receiver/jfjoch_action_test.cpp | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/receiver/jfjoch_action_test.cpp b/receiver/jfjoch_action_test.cpp index 9c7244bf..58a31434 100644 --- a/receiver/jfjoch_action_test.cpp +++ b/receiver/jfjoch_action_test.cpp @@ -104,11 +104,6 @@ int main(int argc, char **argv) { logger.Verbose(verbose); - if (nstreams > dev_name.size()) { - logger.Error("Only {} data streams allowed on this platform", dev_name.size()); - exit(EXIT_FAILURE); - } - std::vector> pcie_devices; std::vector> mock_devices; std::vector aq_devices; @@ -129,6 +124,11 @@ int main(int argc, char **argv) { } } else { + if (nstreams > dev_name.size()) { + logger.Error("Only {} data streams allowed on this platform", dev_name.size()); + exit(EXIT_FAILURE); + } + for (int i = 0; i < nstreams; i++) { pcie_devices.push_back(std::make_unique(dev_name[i], i)); pcie_devices[i]->SetCustomInternalGeneratorFrame(input); From 45cdc11b73c315a2c9ff6d6e7939a6d8caf59a04 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 28 Jul 2023 11:42:06 +0200 Subject: [PATCH 134/224] CMake - fix compile definition --- common/CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/CMakeLists.txt b/common/CMakeLists.txt index d7d84cfd..96eae103 100644 --- a/common/CMakeLists.txt +++ b/common/CMakeLists.txt @@ -58,7 +58,7 @@ IF (CMAKE_CUDA_COMPILER) ENDIF() IF(HAS_NUMAIF AND HAS_NUMA_H AND NUMA_LIBRARY) - TARGET_COMPILE_DEFINITIONS(CommonFunctions PUBLIC -DJFJOCH_USE_NUMA) + TARGET_COMPILE_DEFINITIONS(CommonFunctions PUBLIC JFJOCH_USE_NUMA) TARGET_LINK_LIBRARIES(CommonFunctions ${NUMA_LIBRARY}) MESSAGE(STATUS "NUMA memory/CPU pinning enabled") ELSE() From 45336015c541ecf35045f9c7cf3c80820ff6d608 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 28 Jul 2023 11:43:15 +0200 Subject: [PATCH 135/224] CMake - fix compile definition --- CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 05c5c1ad..09362380 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -18,7 +18,7 @@ SET(CMAKE_CUDA_FLAGS_RELEASE "-O3") IF (CMAKE_CUDA_COMPILER) ENABLE_LANGUAGE(CUDA) MESSAGE(STATUS "CUDA VERSION: ${CMAKE_CUDA_COMPILER_VERSION}") - ADD_COMPILE_DEFINITIONS(-DJFJOCH_USE_CUDA) + ADD_COMPILE_DEFINITIONS(JFJOCH_USE_CUDA) FIND_LIBRARY(CUDART_LIBRARY cudart_static PATHS ${CMAKE_CUDA_IMPLICIT_LINK_DIRECTORIES} REQUIRED) ENDIF() From d996ca42c9140264ee2385f0129054e5a23f0523 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 4 Aug 2023 09:31:18 +0200 Subject: [PATCH 136/224] NUMAHWPolicy: Add more policies for 2-node system --- common/NUMAHWPolicy.cpp | 10 ++++++++++ receiver/jfjoch_action_test.cpp | 2 +- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/common/NUMAHWPolicy.cpp b/common/NUMAHWPolicy.cpp index 42043e95..e3127452 100644 --- a/common/NUMAHWPolicy.cpp +++ b/common/NUMAHWPolicy.cpp @@ -16,6 +16,16 @@ NUMAHWPolicy::NUMAHWPolicy(const std::string &policy) : name(policy) { } else if (policy == "n2g2") { bindings.emplace_back(NUMABinding{.cpu_node = 0, .mem_node = 0, .gpu = 0}); bindings.emplace_back(NUMABinding{.cpu_node = 1, .mem_node = 1, .gpu = 1}); + } else if (policy == "n2g4") { + bindings.emplace_back(NUMABinding{.cpu_node = 0, .mem_node = 0, .gpu = 0}); + bindings.emplace_back(NUMABinding{.cpu_node = 1, .mem_node = 1, .gpu = 2}); + bindings.emplace_back(NUMABinding{.cpu_node = 0, .mem_node = 0, .gpu = 1}); + bindings.emplace_back(NUMABinding{.cpu_node = 1, .mem_node = 1, .gpu = 3}); + } else if (policy == "n2g4_hbm") { + bindings.emplace_back(NUMABinding{.cpu_node = 0, .mem_node = 2, .gpu = 0}); + bindings.emplace_back(NUMABinding{.cpu_node = 1, .mem_node = 3, .gpu = 2}); + bindings.emplace_back(NUMABinding{.cpu_node = 0, .mem_node = 2, .gpu = 1}); + bindings.emplace_back(NUMABinding{.cpu_node = 1, .mem_node = 3, .gpu = 3}); } else if (policy == "n8g4") { for (int32_t i = 0; i < 8; i++) bindings.emplace_back(NUMABinding{.cpu_node = i, .mem_node = i, .gpu = i/2}); diff --git a/receiver/jfjoch_action_test.cpp b/receiver/jfjoch_action_test.cpp index 58a31434..3c792463 100644 --- a/receiver/jfjoch_action_test.cpp +++ b/receiver/jfjoch_action_test.cpp @@ -37,7 +37,7 @@ int main(int argc, char **argv) { bool use_mock_device = false; bool nonblocking_mode = true; bool verbose = false; - std::string numa_policy_name = ""; + std::string numa_policy_name; if (argc == 1) print_usage(logger); From 37afbce8029c7c55947aa2087fe5b2623a7b4984 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 4 Aug 2023 12:46:06 +0200 Subject: [PATCH 137/224] MockAcquisitionDevice: Add NUMA node option --- receiver/MockAcquisitionDevice.cpp | 5 +++-- receiver/MockAcquisitionDevice.h | 3 ++- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/receiver/MockAcquisitionDevice.cpp b/receiver/MockAcquisitionDevice.cpp index 71cd9d5c..9eb9d713 100644 --- a/receiver/MockAcquisitionDevice.cpp +++ b/receiver/MockAcquisitionDevice.cpp @@ -33,10 +33,11 @@ void MockAcquisitionDevice::Cancel() { } } -MockAcquisitionDevice::MockAcquisitionDevice(uint16_t data_stream, size_t in_frame_buffer_size_modules) +MockAcquisitionDevice::MockAcquisitionDevice(uint16_t data_stream, size_t in_frame_buffer_size_modules, + int16_t in_numa_node) : AcquisitionDevice(data_stream), internal_pkt_gen_frame(RAW_MODULE_SIZE), internal_pkt_gen_frame_conv(RAW_MODULE_SIZE) { max_modules = 16; - MapBuffersStandard(in_frame_buffer_size_modules, 1, -1); + MapBuffersStandard(in_frame_buffer_size_modules, 1, in_numa_node); max_handle = in_frame_buffer_size_modules; for (int i = 0; i < RAW_MODULE_SIZE; i++) { diff --git a/receiver/MockAcquisitionDevice.h b/receiver/MockAcquisitionDevice.h index c53d4d2b..68431f5a 100644 --- a/receiver/MockAcquisitionDevice.h +++ b/receiver/MockAcquisitionDevice.h @@ -24,7 +24,8 @@ class MockAcquisitionDevice : public AcquisitionDevice { void MeasureThread(); void InternalPacketGeneratorThread(uint32_t nmodules, uint32_t nframes); public: - MockAcquisitionDevice(uint16_t data_stream, size_t in_frame_buffer_size_modules); + MockAcquisitionDevice(uint16_t data_stream, size_t in_frame_buffer_size_modules, + int16_t numa_node = -1); void AddModule(uint64_t frame, uint16_t module_number, const uint16_t *data); void Terminate(); std::string GetMACAddress() const override; From 7d945c8195098c2b2a444f0655a9402accef2ca0 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 4 Aug 2023 12:46:58 +0200 Subject: [PATCH 138/224] JFJochReceiver: send buffer is pointer with more flexibility --- receiver/JFJochReceiver.cpp | 340 +++++++++++++++++++----------------- receiver/JFJochReceiver.h | 2 +- 2 files changed, 176 insertions(+), 166 deletions(-) diff --git a/receiver/JFJochReceiver.cpp b/receiver/JFJochReceiver.cpp index 2c5b4cff..da3d989b 100644 --- a/receiver/JFJochReceiver.cpp +++ b/receiver/JFJochReceiver.cpp @@ -40,200 +40,209 @@ JFJochReceiver::JFJochReceiver(const JFJochProtoBuf::ReceiverInput &settings, data_acquisition_ready(ndatastreams), frame_transformation_ready((experiment.GetImageNum() > 0) ? frame_transformation_nthreads : 0), send_buffer_count(in_send_buffer_count), - send_buffer(send_buffer_size * send_buffer_count), indexing_solution_per_file(experiment.GetDataFileCount()), numa_policy(in_numa_policy) { - if (settings.has_calibration()) { - calib.emplace(settings.calibration()); - one_byte_mask = calib->CalculateOneByteMask(experiment); - } else { - one_byte_mask.resize(experiment.GetPixelsNum()); - for (auto &i: one_byte_mask) i = 1; - } + send_buffer = (uint8_t *) calloc(send_buffer_size, send_buffer_count); - for (uint32_t i = 0; i < send_buffer_count; i++) { - send_buffer_avail.Put(i); - send_buffer_zero_copy_ret_val.emplace_back(send_buffer_avail, i); - } - - if (experiment.GetConversionOnCPU()) - PrepareConversionOnCPU(); - - if (!experiment.CheckGitSha1Consistent()) - logger.Warning(experiment.CheckGitSha1Msg()); - - push_images_to_writer = (experiment.GetImageNum() > 0) && (!experiment.GetFilePrefix().empty()); - - if (acquisition_device.size() < ndatastreams) - throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, - "Number of acquisition devices has to match data streams"); - if (frame_transformation_nthreads <= 0) - throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, - "Number of threads must be more than zero"); - - preview_stride = experiment.GetPreviewStride(); - spotfinder_stride = experiment.GetSpotFindingStride(); - - logger.Info("NUMA policy: {}", numa_policy.GetName()); - logger.Info("Image stride for data analysis: preview {}, spot finding/radial integration {}", - preview_stride, spotfinder_stride); - - if (experiment.GetDetectorMode() == DetectorMode::Conversion) { - if (preview_publisher != nullptr) - preview_publisher->Start(experiment, calib.value()); - if (preview_publisher_indexed != nullptr) - preview_publisher_indexed->Start(experiment, calib.value()); - - if (!GPUImageAnalysis::GPUPresent()) - logger.Info("GPU support missing"); - - rad_int_mapping = std::make_unique(experiment, one_byte_mask.data()); - rad_int_profile = std::make_unique(*rad_int_mapping, experiment); - rad_int_corr = CalcRadIntCorr(experiment); - - for (int i = 0; i < experiment.GetDataFileCount(); i++) - rad_int_profile_per_file.emplace_back(std::make_unique(*rad_int_mapping, experiment)); - - spot_finder_mask = calib->CalculateOneByteMask(experiment); - } - - for (int d = 0; d < ndatastreams; d++) { - if (calib) - acquisition_device[d]->InitializeCalibration(experiment, calib.value()); - acquisition_device[d]->PrepareAction(experiment); - - logger.Debug("Acquisition device {} prepared", d); - } - - for (int d = 0; d < ndatastreams; d++) - data_acquisition_futures.emplace_back(std::async(std::launch::async, &JFJochReceiver::AcquireThread, - this, d)); - - logger.Info("Data acquisition devices ready"); - - if ((experiment.GetDetectorMode() == DetectorMode::PedestalG0) - || (experiment.GetDetectorMode() == DetectorMode::PedestalG1) - || (experiment.GetDetectorMode() == DetectorMode::PedestalG2)) { - - if (experiment.GetImageNum() > 0) { - throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, - "Saving and calculating pedestal is not supported for the time being"); + try { + if (settings.has_calibration()) { + calib.emplace(settings.calibration()); + one_byte_mask = calib->CalculateOneByteMask(experiment); + } else { + one_byte_mask.resize(experiment.GetPixelsNum()); + for (auto &i: one_byte_mask) i = 1; } - if (experiment.GetDetectorMode() == DetectorMode::PedestalG0) { - pedestal_result.resize(experiment.GetModulesNum() * experiment.GetStorageCellNumber()); - for (int s = 0; s < experiment.GetStorageCellNumber(); s++) { + for (uint32_t i = 0; i < send_buffer_count; i++) { + send_buffer_avail.Put(i); + send_buffer_zero_copy_ret_val.emplace_back(send_buffer_avail, i); + } + + if (experiment.GetConversionOnCPU()) + PrepareConversionOnCPU(); + + if (!experiment.CheckGitSha1Consistent()) + logger.Warning(experiment.CheckGitSha1Msg()); + + push_images_to_writer = (experiment.GetImageNum() > 0) && (!experiment.GetFilePrefix().empty()); + + if (acquisition_device.size() < ndatastreams) + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, + "Number of acquisition devices has to match data streams"); + if (frame_transformation_nthreads <= 0) + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, + "Number of threads must be more than zero"); + + preview_stride = experiment.GetPreviewStride(); + spotfinder_stride = experiment.GetSpotFindingStride(); + + logger.Info("NUMA policy: {}", numa_policy.GetName()); + logger.Info("Image stride for data analysis: preview {}, spot finding/radial integration {}", + preview_stride, spotfinder_stride); + + if (experiment.GetDetectorMode() == DetectorMode::Conversion) { + if (preview_publisher != nullptr) + preview_publisher->Start(experiment, calib.value()); + if (preview_publisher_indexed != nullptr) + preview_publisher_indexed->Start(experiment, calib.value()); + + if (!GPUImageAnalysis::GPUPresent()) + logger.Info("GPU support missing"); + + rad_int_mapping = std::make_unique(experiment, one_byte_mask.data()); + rad_int_profile = std::make_unique(*rad_int_mapping, experiment); + rad_int_corr = CalcRadIntCorr(experiment); + + for (int i = 0; i < experiment.GetDataFileCount(); i++) + rad_int_profile_per_file.emplace_back( + std::make_unique(*rad_int_mapping, experiment)); + + spot_finder_mask = calib->CalculateOneByteMask(experiment); + } + + for (int d = 0; d < ndatastreams; d++) { + if (calib) + acquisition_device[d]->InitializeCalibration(experiment, calib.value()); + acquisition_device[d]->PrepareAction(experiment); + + logger.Debug("Acquisition device {} prepared", d); + } + + for (int d = 0; d < ndatastreams; d++) + data_acquisition_futures.emplace_back(std::async(std::launch::async, &JFJochReceiver::AcquireThread, + this, d)); + + logger.Info("Data acquisition devices ready"); + + if ((experiment.GetDetectorMode() == DetectorMode::PedestalG0) + || (experiment.GetDetectorMode() == DetectorMode::PedestalG1) + || (experiment.GetDetectorMode() == DetectorMode::PedestalG2)) { + + if (experiment.GetImageNum() > 0) { + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, + "Saving and calculating pedestal is not supported for the time being"); + } + + if (experiment.GetDetectorMode() == DetectorMode::PedestalG0) { + pedestal_result.resize(experiment.GetModulesNum() * experiment.GetStorageCellNumber()); + for (int s = 0; s < experiment.GetStorageCellNumber(); s++) { + for (int d = 0; d < ndatastreams; d++) { + for (int m = 0; m < experiment.GetModulesNum(d); m++) { + auto handle = std::async(std::launch::async, &JFJochReceiver::MeasurePedestalThread, this, + d, m, + s); + frame_transformation_futures.emplace_back(std::move(handle)); + } + } + } + } else { + pedestal_result.resize(experiment.GetModulesNum()); for (int d = 0; d < ndatastreams; d++) { for (int m = 0; m < experiment.GetModulesNum(d); m++) { auto handle = std::async(std::launch::async, &JFJochReceiver::MeasurePedestalThread, this, d, m, - s); + 0); frame_transformation_futures.emplace_back(std::move(handle)); } } } - } else { - pedestal_result.resize(experiment.GetModulesNum()); - for (int d = 0; d < ndatastreams; d++) { - for (int m = 0; m < experiment.GetModulesNum(d); m++) { - auto handle = std::async(std::launch::async, &JFJochReceiver::MeasurePedestalThread, this, d, m, 0); - frame_transformation_futures.emplace_back(std::move(handle)); - } - } + + logger.Info("Pedestal threads ready"); } - logger.Info("Pedestal threads ready"); - } + if (experiment.GetImageNum() > 0) { + logger.Info("Data file count {}", experiment.GetDataFileCount()); - if (experiment.GetImageNum() > 0) { - logger.Info("Data file count {}", experiment.GetDataFileCount()); + if (push_images_to_writer) { + StartMessage message{}; + experiment.FillMessage(message); + message.arm_date = time_UTC(std::chrono::system_clock::now()); - if (push_images_to_writer) { - StartMessage message{}; - experiment.FillMessage(message); - message.arm_date = time_UTC(std::chrono::system_clock::now()); + JFJochBitShuffleCompressor compressor(CompressionAlgorithm::BSHUF_LZ4); + std::vector pixel_mask; + std::vector > pedestal; - JFJochBitShuffleCompressor compressor(CompressionAlgorithm::BSHUF_LZ4); - std::vector pixel_mask; - std::vector > pedestal; + if (calib) { + size_t xpixel = experiment.GetXPixelsNum(); + size_t ypixel = experiment.GetYPixelsNum(); - if (calib) { - size_t xpixel = experiment.GetXPixelsNum(); - size_t ypixel = experiment.GetYPixelsNum(); + pixel_mask = compressor.Compress(calib->CalculateNexusMask(experiment, 0)); + message.AddPixelMask(CBORImage{ + .data = pixel_mask.data(), + .size = pixel_mask.size(), + .xpixel = (size_t) xpixel, + .ypixel = (size_t) ypixel, + .pixel_depth_bytes = 4, + .pixel_is_signed = false, + .pixel_is_float = false, + .algorithm = CompressionAlgorithm::BSHUF_LZ4, + .channel = "sc0" + }); + if (experiment.GetSaveCalibration()) { + for (int sc = 0; sc < experiment.GetStorageCellNumber(); sc++) { + for (int gain = 0; gain < 3; gain++) { + auto tmp = compressor.Compress(calib->GetPedestal(gain, sc)); + pedestal.emplace_back(tmp); + std::string channel = "pedestal_G" + std::to_string(gain); - pixel_mask = compressor.Compress(calib->CalculateNexusMask(experiment, 0)); - message.AddPixelMask(CBORImage{ - .data = pixel_mask.data(), - .size = pixel_mask.size(), - .xpixel = (size_t) xpixel, - .ypixel = (size_t) ypixel, - .pixel_depth_bytes = 4, - .pixel_is_signed = false, - .pixel_is_float = false, - .algorithm = CompressionAlgorithm::BSHUF_LZ4, - .channel = "sc0" - }); - if (experiment.GetSaveCalibration()) { - for (int sc = 0; sc < experiment.GetStorageCellNumber(); sc++) { - for (int gain = 0; gain < 3; gain++) { - auto tmp = compressor.Compress(calib->GetPedestal(gain, sc)); - pedestal.emplace_back(tmp); - std::string channel = "pedestal_G" + std::to_string(gain); + if (experiment.GetStorageCellNumber() > 1) + channel += "_sc" + std::to_string(sc); - if (experiment.GetStorageCellNumber() > 1) - channel += "_sc" + std::to_string(sc); + CBORImage image{ + .data = pedestal.at(pedestal.size() - 1).data(), + .size = pedestal.at(pedestal.size() - 1).size(), + .xpixel = (size_t) xpixel, + .ypixel = (size_t) ypixel, + .pixel_depth_bytes = 2, + .pixel_is_signed = false, + .pixel_is_float = false, + .algorithm = CompressionAlgorithm::BSHUF_LZ4, + .channel = channel + }; - CBORImage image{ - .data = pedestal.at(pedestal.size() - 1).data(), - .size = pedestal.at(pedestal.size() - 1).size(), - .xpixel = (size_t) xpixel, - .ypixel = (size_t) ypixel, - .pixel_depth_bytes = 2, - .pixel_is_signed = false, - .pixel_is_float = false, - .algorithm = CompressionAlgorithm::BSHUF_LZ4, - .channel = channel - }; - - message.AddCalibration(image); + message.AddCalibration(image); + } } } } + + if (rad_int_mapping) { + message.rad_int_bin_number = rad_int_mapping->GetBinNumber(); + message.rad_int_bin_to_q = rad_int_mapping->GetBinToQ(); + message.rad_int_solid_angle_corr = rad_int_mapping->GetSolidAngleCorr(); + } else + message.rad_int_bin_number = 0; + + image_pusher.StartDataCollection(message); } - if (rad_int_mapping) { - message.rad_int_bin_number = rad_int_mapping->GetBinNumber(); - message.rad_int_bin_to_q = rad_int_mapping->GetBinToQ(); - message.rad_int_solid_angle_corr = rad_int_mapping->GetSolidAngleCorr(); - } else - message.rad_int_bin_number = 0; + for (int i = 0; i < experiment.GetImageNum(); i++) + images_to_go.Put(i); - image_pusher.StartDataCollection(message); + // Setup frames summation and forwarding + for (int i = 0; i < frame_transformation_nthreads; i++) { + auto handle = std::async(std::launch::async, &JFJochReceiver::FrameTransformationThread, this); + frame_transformation_futures.emplace_back(std::move(handle)); + } + + logger.Info("Image compression/forwarding threads started"); + + frame_transformation_ready.wait(); + logger.Info("Image compression/forwarding threads ready"); } - for (int i = 0; i < experiment.GetImageNum(); i++) - images_to_go.Put(i); + data_acquisition_ready.wait(); - // Setup frames summation and forwarding - for (int i = 0; i < frame_transformation_nthreads; i++) { - auto handle = std::async(std::launch::async, &JFJochReceiver::FrameTransformationThread, this); - frame_transformation_futures.emplace_back(std::move(handle)); - } + logger.Info("Acquisition devices ready"); - logger.Info("Image compression/forwarding threads started"); + start_time = std::chrono::system_clock::now(); + logger.Info("Receiving data started"); - frame_transformation_ready.wait(); - logger.Info("Image compression/forwarding threads ready"); + measurement = std::async(std::launch::async, &JFJochReceiver::FinalizeMeasurement, this); + } catch (...) { + free(send_buffer); + throw; } - - data_acquisition_ready.wait(); - - logger.Info("Acquisition devices ready"); - - start_time = std::chrono::system_clock::now(); - logger.Info("Receiving data started"); - - measurement = std::async(std::launch::async, &JFJochReceiver::FinalizeMeasurement, this); } void JFJochReceiver::AcquireThread(uint16_t data_stream) { @@ -323,11 +332,11 @@ void JFJochReceiver::MeasurePedestalThread(uint16_t data_stream, uint16_t module pedestal_result[offset].SetCollectionTime(start_time.time_since_epoch().count() / 1e9); } catch (const JFJochException &e) { Cancel(e); } logger.Info("Pedestal calculation thread for data stream {} module {} storage cell {} -> header {} done", - data_stream, module_number, storage_cell, storage_cell_header); + data_stream, module_number, storage_cell, storage_cell_header); } void JFJochReceiver::MiniSummationThread(int d, int m, size_t image_number, bool &send_image, - FrameTransformation &transformation, DataMessage &message) { + FrameTransformation &transformation, DataMessage &message) { for (int j = 0; j < experiment.GetSummation(); j++) { size_t frame_number = image_number * experiment.GetSummation() + j; acquisition_device[d]->Counters().WaitForFrame(frame_number + 2); @@ -370,7 +379,7 @@ void JFJochReceiver::FrameTransformationThread() { FrameTransformation transformation(experiment); - std::unique_ptr spot_finder; + std::unique_ptr spot_finder; try { if (rad_int_mapping) { @@ -542,7 +551,7 @@ void JFJochReceiver::FrameTransformationThread() { if (image_number % experiment.GetDataFileCount() < rad_int_profile_per_file.size()) rad_int_profile_per_file[image_number % experiment.GetDataFileCount()] ->Add(spot_finder->GetRadialIntegrationSum(), - spot_finder->GetRadialIntegrationCount()); + spot_finder->GetRadialIntegrationCount()); } if (send_preview) @@ -554,7 +563,7 @@ void JFJochReceiver::FrameTransformationThread() { message.receiver_available_send_buffers = GetAvailableSendBuffers(); auto send_buffer_handle = send_buffer_avail.GetBlocking(); - auto ptr = send_buffer.data() + send_buffer_size * send_buffer_handle; + auto ptr = send_buffer + send_buffer_size * send_buffer_handle; JFJochFrameSerializer serializer(ptr, send_buffer_size); PrepareCBORImage(message, experiment, nullptr, 0); serializer.SerializeImage(message); @@ -726,6 +735,7 @@ void JFJochReceiver::StopReceiver() { JFJochReceiver::~JFJochReceiver() { if (measurement.valid()) measurement.get(); + free(send_buffer); } JFJochProtoBuf::DataProcessingSettings JFJochReceiver::GetDataProcessingSettings() { diff --git a/receiver/JFJochReceiver.h b/receiver/JFJochReceiver.h index 438ad71c..4f1ce8c1 100644 --- a/receiver/JFJochReceiver.h +++ b/receiver/JFJochReceiver.h @@ -99,7 +99,7 @@ class JFJochReceiver { const size_t send_buffer_count; ThreadSafeFIFO send_buffer_avail; - std::vector send_buffer; + uint8_t *send_buffer; std::vector send_buffer_zero_copy_ret_val; NUMAHWPolicy numa_policy; From ca5def57ec49120b9ba6784c566bba30cedfd64f Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 4 Aug 2023 12:52:38 +0200 Subject: [PATCH 139/224] jfjoch_action_test: Enable pinning modes for mock acquisition device --- receiver/jfjoch_action_test.cpp | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/receiver/jfjoch_action_test.cpp b/receiver/jfjoch_action_test.cpp index 3c792463..8e53159e 100644 --- a/receiver/jfjoch_action_test.cpp +++ b/receiver/jfjoch_action_test.cpp @@ -15,6 +15,8 @@ void print_usage(Logger &logger) { logger.Info(" -M use mock device"); logger.Info(" -B blocking mode (FPGA)"); logger.Info(" -v verbose"); + logger.Info(" -H mock aq. dev. with HBM (DL380 with Intel MAX only)"); + logger.Info(" -D mock aq. dev. with DDR (2 NUMA node machines only)"); logger.Info(" -s number of data streams (acquisition devices)"); logger.Info(" -m number of modules per data stream"); logger.Info(" -i number of images"); @@ -38,6 +40,8 @@ int main(int argc, char **argv) { bool nonblocking_mode = true; bool verbose = false; std::string numa_policy_name; + bool use_hbm_for_aq_dev = false; + bool use_ddr_for_aq_dev = false; if (argc == 1) print_usage(logger); @@ -75,6 +79,12 @@ int main(int argc, char **argv) { case 'P': numa_policy_name = std::string(optarg); break; + case 'H': + use_hbm_for_aq_dev = true; + break; + case 'D': + use_ddr_for_aq_dev = true; + break; default: /* '?' */ print_usage(logger); exit(EXIT_FAILURE); @@ -116,8 +126,19 @@ int main(int argc, char **argv) { if (nmodules > 1) { logger.Warning("Conversion results will be wrong with more than 1 module per stream"); } + for (int i = 0; i < nstreams; i++) { - mock_devices.push_back(std::make_unique(i, 1024)); + int16_t numa_node = -1; + + if (use_hbm_for_aq_dev) + numa_node = 2 + (i % 2); + else if (use_ddr_for_aq_dev) + numa_node = i % 2; + + if (numa_node != -1) + logger.Info("Pinning stream {} to NUMA node {}", i, numa_node); + + mock_devices.push_back(std::make_unique(i, 1024, numa_node)); mock_devices[i]->SetCustomInternalGeneratorFrame(input); mock_devices[i]->EnableLogging(&logger); aq_devices.push_back(mock_devices[i].get()); From f4b01ed62a60362ac1c229a1cb96f9338333a796 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 4 Aug 2023 12:55:35 +0200 Subject: [PATCH 140/224] jfjoch_action_test: Fix --- receiver/jfjoch_action_test.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/receiver/jfjoch_action_test.cpp b/receiver/jfjoch_action_test.cpp index 8e53159e..e8509b65 100644 --- a/receiver/jfjoch_action_test.cpp +++ b/receiver/jfjoch_action_test.cpp @@ -47,7 +47,7 @@ int main(int argc, char **argv) { print_usage(logger); int opt; - while ((opt = getopt(argc, argv, "s:i:m:p:N:P:CMBv")) != -1) { + while ((opt = getopt(argc, argv, "s:i:m:p:N:P:CMBvHD")) != -1) { switch (opt) { case 'C': conversion_on_cpu = true; From defa97c88ba1be856e7c80ae91394a882ca0678c Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 4 Aug 2023 13:02:55 +0200 Subject: [PATCH 141/224] JFJochReceiver: Use malloc (no need to init to zero) --- receiver/JFJochReceiver.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/receiver/JFJochReceiver.cpp b/receiver/JFJochReceiver.cpp index da3d989b..80e7fb6a 100644 --- a/receiver/JFJochReceiver.cpp +++ b/receiver/JFJochReceiver.cpp @@ -43,7 +43,7 @@ JFJochReceiver::JFJochReceiver(const JFJochProtoBuf::ReceiverInput &settings, indexing_solution_per_file(experiment.GetDataFileCount()), numa_policy(in_numa_policy) { - send_buffer = (uint8_t *) calloc(send_buffer_size, send_buffer_count); + send_buffer = (uint8_t *) malloc(send_buffer_size * send_buffer_count); try { if (settings.has_calibration()) { From 9144058f0c33e7a977ddea7cb088234d467b0781 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 4 Aug 2023 15:47:32 +0200 Subject: [PATCH 142/224] JFJochCompressor: Use Kal's bitshuffle compressor --- compression/CMakeLists.txt | 2 ++ compression/JFJochCompressor.cpp | 4 ++-- compression/JFJochCompressor.h | 3 +++ 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/compression/CMakeLists.txt b/compression/CMakeLists.txt index e2fc0669..42f0415c 100644 --- a/compression/CMakeLists.txt +++ b/compression/CMakeLists.txt @@ -4,6 +4,8 @@ ADD_LIBRARY(Compression STATIC bitshuffle/bitshuffle.c bitshuffle/bitshuffle_core.c bitshuffle/iochain.c + bitshuffle_dectris/src/bitshuffle.c + bitshuffle_dectris/src/bitshuffle.h JFJochZstdCompressor.cpp JFJochZstdCompressor.h JFJochCompressor.cpp diff --git a/compression/JFJochCompressor.cpp b/compression/JFJochCompressor.cpp index 1263f251..543fb9cc 100644 --- a/compression/JFJochCompressor.cpp +++ b/compression/JFJochCompressor.cpp @@ -6,6 +6,7 @@ #include #include #include +#include #include #include @@ -22,8 +23,7 @@ JFJochBitShuffleCompressor::JFJochBitShuffleCompressor(CompressionAlgorithm in_a size_t JFJochBitShuffleCompressor::CompressBlock(char *dest, const char *source, size_t nelements, size_t elem_size) { // Assert nelements < block_size const char *src_ptr; - - int64_t bshuf_ret = bshuf_trans_bit_elem(source, tmp_space.data(), nelements, elem_size); + int64_t bshuf_ret = bitshuf_encode_block(tmp_space.data(), source, scratch, nelements, elem_size); if (bshuf_ret < 0) throw JFJochException(JFJochExceptionCategory::Compression, "bshuf_trans_bit_elem error"); src_ptr = tmp_space.data(); diff --git a/compression/JFJochCompressor.h b/compression/JFJochCompressor.h index 43300cd5..0a2b5828 100644 --- a/compression/JFJochCompressor.h +++ b/compression/JFJochCompressor.h @@ -18,6 +18,7 @@ class JFJochBitShuffleCompressor { JFJochZstdCompressor zstd_compressor; CompressionAlgorithm algorithm; std::vector tmp_space; + size_t CompressBlock(char *dest, const char * source, size_t nelements, size_t elem_size); public: constexpr static const size_t DefaultBlockSize = 4096; @@ -38,6 +39,8 @@ public: } size_t Compress(char *dest, const char* source, size_t nelements, size_t elem_size); +private: + char scratch[DefaultBlockSize * sizeof(uint64_t)]; }; template std::vector bitshuffle(const std::vector &input, size_t block_size) { From 767dc8e1b3edf8bc0db9bb0deee351d32e027de9 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 4 Aug 2023 16:03:45 +0200 Subject: [PATCH 143/224] JFJochCompressor: Use Kal's bitshuffle compressor --- .gitmodules | 3 +++ compression/CMakeLists.txt | 4 ++-- compression/JFJochCompressor.cpp | 2 +- compression/bitshuffle_hperf | 1 + 4 files changed, 7 insertions(+), 3 deletions(-) create mode 160000 compression/bitshuffle_hperf diff --git a/.gitmodules b/.gitmodules index 03b3076b..abbb89b9 100644 --- a/.gitmodules +++ b/.gitmodules @@ -11,3 +11,6 @@ path = detector_control/slsDetectorPackage url = https://github.com/slsdetectorgroup/slsDetectorPackage branch = "developer" +[submodule "compression/bitshuffle_hperf"] + path = compression/bitshuffle_hperf + url = https://github.com/kalcutter/bitshuffle diff --git a/compression/CMakeLists.txt b/compression/CMakeLists.txt index 42f0415c..fd1ca7c1 100644 --- a/compression/CMakeLists.txt +++ b/compression/CMakeLists.txt @@ -4,8 +4,8 @@ ADD_LIBRARY(Compression STATIC bitshuffle/bitshuffle.c bitshuffle/bitshuffle_core.c bitshuffle/iochain.c - bitshuffle_dectris/src/bitshuffle.c - bitshuffle_dectris/src/bitshuffle.h + bitshuffle_hperf/src/bitshuffle.c + bitshuffle_hperf/src/bitshuffle.h JFJochZstdCompressor.cpp JFJochZstdCompressor.h JFJochCompressor.cpp diff --git a/compression/JFJochCompressor.cpp b/compression/JFJochCompressor.cpp index 543fb9cc..fcc7d8bb 100644 --- a/compression/JFJochCompressor.cpp +++ b/compression/JFJochCompressor.cpp @@ -6,7 +6,7 @@ #include #include #include -#include +#include #include #include diff --git a/compression/bitshuffle_hperf b/compression/bitshuffle_hperf new file mode 160000 index 00000000..be844a76 --- /dev/null +++ b/compression/bitshuffle_hperf @@ -0,0 +1 @@ +Subproject commit be844a76f4d4ed3927fcb240a36c6d52bb3908a3 From 875fbb77a78807357d2d06170ae78a96cd347e97 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 4 Aug 2023 21:30:14 +0200 Subject: [PATCH 144/224] JFJochConversionFixedPoint: Use __restrict qualifier --- jungfrau/JFConversionFixedPoint.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/jungfrau/JFConversionFixedPoint.cpp b/jungfrau/JFConversionFixedPoint.cpp index e9eb83e1..dc218d23 100644 --- a/jungfrau/JFConversionFixedPoint.cpp +++ b/jungfrau/JFConversionFixedPoint.cpp @@ -62,7 +62,7 @@ inline int32_t jf_round(int32_t in) { return in - half; } -void JFConversionFixedPoint::ConvertModule(int16_t *dest, const uint16_t *source) { +void JFConversionFixedPoint::ConvertModule(int16_t *__restrict dest, const uint16_t *source) { auto gain_g0_aligned = std::assume_aligned<64>(gain_g0); auto gain_g1_aligned = std::assume_aligned<64>(gain_g1); auto gain_g2_aligned = std::assume_aligned<64>(gain_g2); From 184d1361581022bef7691b318381aa9968c1524c Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 4 Aug 2023 21:41:07 +0200 Subject: [PATCH 145/224] JFJochReceiver: Prepare to have fixed_point_conversion locally --- receiver/JFJochReceiver.cpp | 29 +++++++++++++++++------------ receiver/JFJochReceiver.h | 5 +++-- 2 files changed, 20 insertions(+), 14 deletions(-) diff --git a/receiver/JFJochReceiver.cpp b/receiver/JFJochReceiver.cpp index 80e7fb6a..70630ac0 100644 --- a/receiver/JFJochReceiver.cpp +++ b/receiver/JFJochReceiver.cpp @@ -60,7 +60,7 @@ JFJochReceiver::JFJochReceiver(const JFJochProtoBuf::ReceiverInput &settings, } if (experiment.GetConversionOnCPU()) - PrepareConversionOnCPU(); + PrepareConversionOnCPU(fixed_point_conversion); if (!experiment.CheckGitSha1Consistent()) logger.Warning(experiment.CheckGitSha1Msg()); @@ -336,7 +336,8 @@ void JFJochReceiver::MeasurePedestalThread(uint16_t data_stream, uint16_t module } void JFJochReceiver::MiniSummationThread(int d, int m, size_t image_number, bool &send_image, - FrameTransformation &transformation, DataMessage &message) { + FrameTransformation &transformation, DataMessage &message, + std::vector &conversion) { for (int j = 0; j < experiment.GetSummation(); j++) { size_t frame_number = image_number * experiment.GetSummation() + j; acquisition_device[d]->Counters().WaitForFrame(frame_number + 2); @@ -360,7 +361,7 @@ void JFJochReceiver::MiniSummationThread(int d, int m, size_t image_number, bool src = acquisition_device[d]->GetErrorFrameBuffer(); if (experiment.GetConversionOnCPU()) { - auto &conv = fixed_point_conversion.at(experiment.GetFirstModuleOfDataStream(d) + m); + auto &conv = conversion.at(experiment.GetFirstModuleOfDataStream(d) + m); transformation.ProcessModule(conv, src, m, d); } else transformation.ProcessModule(src, m, d); @@ -371,12 +372,16 @@ void JFJochReceiver::MiniSummationThread(int d, int m, size_t image_number, bool } void JFJochReceiver::FrameTransformationThread() { + std::vector *conversion = nullptr; + try { numa_policy.Bind(); } catch (const JFJochException &e) { logger.Error("HW bind error {}", e.what()); } + conversion = &fixed_point_conversion; + FrameTransformation transformation(experiment); std::unique_ptr spot_finder; @@ -444,7 +449,7 @@ void JFJochReceiver::FrameTransformationThread() { mini_summation_threads.emplace_back(std::async(std::launch::async, &JFJochReceiver::MiniSummationThread, this, d, m, image_number, std::ref(send_image), std::ref(transformation), - std::ref(message))); + std::ref(message), std::ref(*conversion))); message.receiver_aq_dev_delay = max_delay; } else { for (int j = 0; j < experiment.GetSummation(); j++) { @@ -473,7 +478,7 @@ void JFJochReceiver::FrameTransformationThread() { src = acquisition_device[d]->GetErrorFrameBuffer(); if (experiment.GetConversionOnCPU()) { - auto &conv = fixed_point_conversion.at(experiment.GetFirstModuleOfDataStream(d) + m); + auto &conv = conversion->at(experiment.GetFirstModuleOfDataStream(d) + m); transformation.ProcessModule(conv, src, m, d); } else transformation.ProcessModule(src, m, d); @@ -791,7 +796,7 @@ JFJochProtoBuf::RadialIntegrationProfiles JFJochReceiver::GetRadialIntegrationPr return ret; } -void JFJochReceiver::PrepareConversionOnCPU() { +void JFJochReceiver::PrepareConversionOnCPU(std::vector &conv) { if (experiment.GetStorageCellNumber() != 1) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "CPU conversion currently doesn't support storage cells"); @@ -800,13 +805,13 @@ void JFJochReceiver::PrepareConversionOnCPU() { throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Calibration not provided"); - fixed_point_conversion.resize(experiment.GetModulesNum()); + conv.resize(experiment.GetModulesNum()); for (int i = 0 ; i < experiment.GetModulesNum(); i++) - fixed_point_conversion[i].Setup(calib->GainCalibration(i), - calib->Pedestal(i, 0, 0), - calib->Pedestal(i, 1, 0), - calib->Pedestal(i, 2, 0), - experiment.GetPhotonEnergy_keV()); + conv[i].Setup(calib->GainCalibration(i), + calib->Pedestal(i, 0, 0), + calib->Pedestal(i, 1, 0), + calib->Pedestal(i, 2, 0), + experiment.GetPhotonEnergy_keV()); } void JFJochReceiver::UpdateMaxImage(int64_t image_number) { diff --git a/receiver/JFJochReceiver.h b/receiver/JFJochReceiver.h index 4f1ce8c1..53f556f9 100644 --- a/receiver/JFJochReceiver.h +++ b/receiver/JFJochReceiver.h @@ -104,12 +104,13 @@ class JFJochReceiver { NUMAHWPolicy numa_policy; - void PrepareConversionOnCPU(); + void PrepareConversionOnCPU(std::vector &conv); void AcquireThread(uint16_t data_stream); void FrameTransformationThread(); void MeasurePedestalThread(uint16_t data_stream, uint16_t module_number, uint16_t storage_cell); void MiniSummationThread(int d, int m, size_t image_number, bool &send_image, - FrameTransformation &transformation, DataMessage &message); + FrameTransformation &transformation, DataMessage &message, + std::vector &conversion); void Cancel(const JFJochException &e); void FinalizeMeasurement(); JFJochProtoBuf::DataProcessingSettings GetDataProcessingSettings(); From ac5052073ef2e3f2a20a46bff56371d9d3320332 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 5 Aug 2023 15:23:45 +0200 Subject: [PATCH 146/224] JFJochReceiver: Option for local conversion --- receiver/CMakeLists.txt | 5 +++++ receiver/JFJochReceiver.cpp | 16 +++++++++++++--- 2 files changed, 18 insertions(+), 3 deletions(-) diff --git a/receiver/CMakeLists.txt b/receiver/CMakeLists.txt index 90cae64f..3f0f2feb 100644 --- a/receiver/CMakeLists.txt +++ b/receiver/CMakeLists.txt @@ -52,6 +52,11 @@ ADD_LIBRARY(JFJochReceiver STATIC TARGET_LINK_LIBRARIES(JFJochReceiver ImageAnalysis JungfraujochHost CommonFunctions HLSSimulation) +SET(JFJOCH_RECV_CONVERSION_LOCAL ON CACHE BOOL "Jungfraujoch receiver uses conversion locally per thread") +IF(JFJOCH_RECV_CONVERSION_LOCAL) + TARGET_COMPILE_DEFINITIONS(JFJochReceiver PRIVATE -DJFJOCH_RECV_CONVERSION_LOCAL) +ENDIF() + ADD_EXECUTABLE(jfjoch_receiver jfjoch_receiver.cpp) TARGET_LINK_LIBRARIES(jfjoch_receiver JFJochReceiver) INSTALL(TARGETS jfjoch_receiver RUNTIME) diff --git a/receiver/JFJochReceiver.cpp b/receiver/JFJochReceiver.cpp index 70630ac0..0c9cae83 100644 --- a/receiver/JFJochReceiver.cpp +++ b/receiver/JFJochReceiver.cpp @@ -59,8 +59,9 @@ JFJochReceiver::JFJochReceiver(const JFJochProtoBuf::ReceiverInput &settings, send_buffer_zero_copy_ret_val.emplace_back(send_buffer_avail, i); } - if (experiment.GetConversionOnCPU()) - PrepareConversionOnCPU(fixed_point_conversion); +#ifndef JFJOCH_RECV_CONVERSION_LOCAL + PrepareConversionOnCPU(fixed_point_conversion); +#endif if (!experiment.CheckGitSha1Consistent()) logger.Warning(experiment.CheckGitSha1Msg()); @@ -380,7 +381,13 @@ void JFJochReceiver::FrameTransformationThread() { logger.Error("HW bind error {}", e.what()); } +#ifdef JFJOCH_RECV_CONVERSION_LOCAL + std::vector v; + PrepareConversionOnCPU(v); + conversion = &v; +#else conversion = &fixed_point_conversion; +#endif FrameTransformation transformation(experiment); @@ -797,6 +804,9 @@ JFJochProtoBuf::RadialIntegrationProfiles JFJochReceiver::GetRadialIntegrationPr } void JFJochReceiver::PrepareConversionOnCPU(std::vector &conv) { + if (!experiment.GetConversionOnCPU()) + return; + if (experiment.GetStorageCellNumber() != 1) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "CPU conversion currently doesn't support storage cells"); @@ -828,4 +838,4 @@ void JFJochReceiver::UpdateMaxDelay(int64_t delay) { float JFJochReceiver::GetAvailableSendBuffers() const { return static_cast(send_buffer_avail.Size()) / static_cast(send_buffer_count); -} \ No newline at end of file +} From 8035a86db1e9c859d432735d181b02b0ead6a8b4 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sun, 6 Aug 2023 22:06:44 +0200 Subject: [PATCH 147/224] CompressionBenchmark: Add multi-thread option --- tools/CompressionBenchmark.cpp | 62 +++++++++++++++++++++++----------- 1 file changed, 42 insertions(+), 20 deletions(-) diff --git a/tools/CompressionBenchmark.cpp b/tools/CompressionBenchmark.cpp index fcf37e21..903922d5 100644 --- a/tools/CompressionBenchmark.cpp +++ b/tools/CompressionBenchmark.cpp @@ -2,6 +2,7 @@ // SPDX-License-Identifier: GPL-3.0-or-later #include +#include #include "bitshuffle/bitshuffle_core.h" #include "zstd/lib/zstd.h" @@ -10,23 +11,40 @@ #include "../common/RawToConvertedGeometry.h" #include "JFJochDecompress.h" -std::string CheckCompression(const DiffractionExperiment &x, size_t nimages, const std::vector &image) { +double CheckCompressionThread(const DiffractionExperiment &x, + int32_t nimages, int32_t stride, + const std::vector &image, + std::vector &output) { + double ret = 0; + + FrameTransformation transformation(x); + for (int i = 0; i < nimages; i += stride) { + for (int j = 0; j < x.GetModulesNum(); j++ ) { + transformation.ProcessModule(image.data() + (j + i * x.GetModulesNum()) * RAW_MODULE_SIZE, j, 0); + } + transformation.Pack(); + ret += transformation.SaveCompressedImage(output.data() + i * x.GetMaxCompressedSize()); + } + return ret; +} + +std::string CheckCompression(const DiffractionExperiment &x, int32_t nimages, const std::vector &image, uint16_t nthreads) { double original_size = nimages * x.GetModulesNum() * RAW_MODULE_SIZE * x.GetPixelDepth(); - FrameTransformation transformation(x); std::vector output(nimages * x.GetMaxCompressedSize()); double compressed_size = 0; auto start_time = std::chrono::system_clock::now(); - for (int i = 0; i < nimages; i++) { - for (int j = 0; j < x.GetModulesNum(); j++ ) { - transformation.ProcessModule(image.data() + (j + i * x.GetModulesNum()) * RAW_MODULE_SIZE, j, 0); - } - transformation.Pack(); - compressed_size += transformation.SaveCompressedImage(output.data() + i * x.GetMaxCompressedSize()); - } + std::vector> futures; + + for (int i = 0; i < nthreads; i++) + futures.emplace_back(std::async(std::launch::async, &CheckCompressionThread, std::ref(x), nimages, nthreads, + std::ref(image), std::ref(output))); + + for (int i = 0; i < nthreads; i++) + compressed_size += futures[i].get(); auto end_time = std::chrono::system_clock::now(); auto elapsed = std::chrono::duration_cast(end_time - start_time); @@ -73,11 +91,15 @@ int main(int argc, char **argv) { RegisterHDF5Filter(); - if (argc != 2) { - std::cout << "Usage: ./CompressionBenchmark " << std::endl; + if ((argc != 2) && (argc != 3)) { + std::cout << "Usage: ./CompressionBenchmark {}" << std::endl; exit(EXIT_FAILURE); } + uint32_t nthreads = 1; + if (argc == 3) + nthreads = atol(argv[2]); + HDF5ReadOnlyFile data(argv[1]); HDF5DataSet dataset(data, "/entry/data/data"); @@ -133,19 +155,19 @@ int main(int argc, char **argv) { x.MaskChipEdges(false); x.Compression(JFJochProtoBuf::NO_COMPRESSION); - std::cout << "None (geom transform) " << CheckCompression(x, nimages, image); + std::cout << "None (geom transform) " << CheckCompression(x, nimages, image, nthreads); x.Compression(JFJochProtoBuf::BSHUF_LZ4); - std::cout << "BSHUF/LZ4 " << CheckCompression(x, nimages, image); + std::cout << "BSHUF/LZ4 " << CheckCompression(x, nimages, image, nthreads); x.Compression(JFJochProtoBuf::BSHUF_ZSTD); - std::cout << "BSHUF/ZSTD (0) " << CheckCompression(x, nimages, image); + std::cout << "BSHUF/ZSTD (0) " << CheckCompression(x, nimages, image, nthreads); x.Compression(JFJochProtoBuf::BSHUF_ZSTD_RLE); - std::cout << "BSHUF/ZSTD (RLE) " << CheckCompression(x, nimages, image); + std::cout << "BSHUF/ZSTD (RLE) " << CheckCompression(x, nimages, image, nthreads); x.Compression(JFJochProtoBuf::NO_COMPRESSION); - std::cout << "None (geom transform) " << CheckCompression(x, nimages, image); + std::cout << "None (geom transform) " << CheckCompression(x, nimages, image, nthreads); std::cout << std::endl << std::endl << "Decompression" << std::endl << std::endl; @@ -163,14 +185,14 @@ int main(int argc, char **argv) { x.Binning2x2(true); x.Compression(JFJochProtoBuf::NO_COMPRESSION); - std::cout << "None (geom transform) " << CheckCompression(x, nimages, image); + std::cout << "None (geom transform) " << CheckCompression(x, nimages, image, nthreads); x.Compression(JFJochProtoBuf::BSHUF_LZ4); - std::cout << "BSHUF/LZ4 " << CheckCompression(x, nimages, image); + std::cout << "BSHUF/LZ4 " << CheckCompression(x, nimages, image, nthreads); x.Compression(JFJochProtoBuf::BSHUF_ZSTD); - std::cout << "BSHUF/ZSTD (0) " << CheckCompression(x, nimages, image); + std::cout << "BSHUF/ZSTD (0) " << CheckCompression(x, nimages, image, nthreads); x.Compression(JFJochProtoBuf::BSHUF_ZSTD_RLE); - std::cout << "BSHUF/ZSTD (RLE) " << CheckCompression(x, nimages, image); + std::cout << "BSHUF/ZSTD (RLE) " << CheckCompression(x, nimages, image, nthreads); } \ No newline at end of file From 6f6d7659326c5f8e53a0f38a596abd74c41949be Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sun, 6 Aug 2023 22:19:21 +0200 Subject: [PATCH 148/224] CompressionBenchmark: Increase number of images --- tools/CompressionBenchmark.cpp | 35 ++++++++++++++++++++++------------ 1 file changed, 23 insertions(+), 12 deletions(-) diff --git a/tools/CompressionBenchmark.cpp b/tools/CompressionBenchmark.cpp index 903922d5..3dd4e101 100644 --- a/tools/CompressionBenchmark.cpp +++ b/tools/CompressionBenchmark.cpp @@ -91,15 +91,24 @@ int main(int argc, char **argv) { RegisterHDF5Filter(); - if ((argc != 2) && (argc != 3)) { + if ((argc != 2) && (argc != 3) && (argc != 4)) { std::cout << "Usage: ./CompressionBenchmark {}" << std::endl; exit(EXIT_FAILURE); } uint32_t nthreads = 1; - if (argc == 3) + if (argc >= 3) nthreads = atol(argv[2]); + uint64_t nimages = 25; + if (argc == 4) + nimages = atol(argv[3]); + + if ((nthreads <= 0) || (nimages <= 0)) { + std::cerr << "Error in input parameters" << std::endl; + exit(EXIT_FAILURE); + } + HDF5ReadOnlyFile data(argv[1]); HDF5DataSet dataset(data, "/entry/data/data"); @@ -120,34 +129,36 @@ int main(int argc, char **argv) { exit(EXIT_FAILURE); } - uint64_t nimages = file_space.GetDimensions()[0]; - std::cout << "Number of images in the dataset: " << nimages << std::endl; - if (nimages > 200) { - nimages = 200; - std::cout << "Using only " << nimages << " images" << std::endl; - + uint64_t nimages_dataset = file_space.GetDimensions()[0]; + std::cout << "Number of images in the dataset: " << nimages_dataset << std::endl; + if (nimages_dataset > 200) { + nimages_dataset = 200; + std::cout << "Using only " << nimages_dataset << " images" << std::endl; } x.Mode(DetectorMode::Conversion); - std::vector image_conv ( nimages * file_space.GetDimensions()[1] * file_space.GetDimensions()[2]); + std::vector image_conv ( nimages_dataset * file_space.GetDimensions()[1] * file_space.GetDimensions()[2]); + std::vector start = {0,0,0}; - std::vector dim = {nimages, file_space.GetDimensions()[1], file_space.GetDimensions()[2]}; + std::vector dim = {nimages_dataset, file_space.GetDimensions()[1], file_space.GetDimensions()[2]}; auto start_time = std::chrono::system_clock::now(); dataset.ReadVector(image_conv, start, dim); auto end_time = std::chrono::system_clock::now(); auto elapsed = std::chrono::duration_cast(end_time - start_time); - std::cout << "Images loaded " << elapsed.count() / nimages << " ms/image " + std::cout << "Images loaded " << elapsed.count() / nimages_dataset << " ms/image " << (image_conv.size() * sizeof(uint16_t)) / (1000.0 * elapsed.count()) << " MB/s" << std::endl; + + std::cout << "Images to benchmark " << nimages << std::endl << "Threads: " << nthreads << std::endl << std::endl; std::vector image( nimages * x.GetModulesNum() * RAW_MODULE_SIZE); for (int i = 0; i < nimages; i++) { ConvertedToRawGeometry(x, image.data() + i * RAW_MODULE_SIZE * x.GetModulesNum(), - image_conv.data() + i * file_space.GetDimensions()[1] * file_space.GetDimensions()[2]); + image_conv.data() + (i % nimages_dataset) * file_space.GetDimensions()[1] * file_space.GetDimensions()[2]); } auto image_shuffled = bitshuffle(image, 4096); From 28675fb3bea9411addc405d3dd7af3cb53071aab Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sun, 6 Aug 2023 22:41:04 +0200 Subject: [PATCH 149/224] CompressionBenchmark: Repeat tes --- tools/CompressionBenchmark.cpp | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/tools/CompressionBenchmark.cpp b/tools/CompressionBenchmark.cpp index 3dd4e101..b003faa7 100644 --- a/tools/CompressionBenchmark.cpp +++ b/tools/CompressionBenchmark.cpp @@ -166,19 +166,26 @@ int main(int argc, char **argv) { x.MaskChipEdges(false); x.Compression(JFJochProtoBuf::NO_COMPRESSION); - std::cout << "None (geom transform) " << CheckCompression(x, nimages, image, nthreads); + for (int i = 0; i < 3; i++) + CheckCompression(x, nimages, image, nthreads); - x.Compression(JFJochProtoBuf::BSHUF_LZ4); - std::cout << "BSHUF/LZ4 " << CheckCompression(x, nimages, image, nthreads); + for (int i = 0; i <3; i++) { + x.Compression(JFJochProtoBuf::NO_COMPRESSION).Mode(DetectorMode::Raw); + std::cout << "None (memcpy) " << CheckCompression(x, nimages, image, nthreads); + x.Compression(JFJochProtoBuf::NO_COMPRESSION).Mode(DetectorMode::Conversion); - x.Compression(JFJochProtoBuf::BSHUF_ZSTD); - std::cout << "BSHUF/ZSTD (0) " << CheckCompression(x, nimages, image, nthreads); + std::cout << "None (geom transform) " << CheckCompression(x, nimages, image, nthreads); - x.Compression(JFJochProtoBuf::BSHUF_ZSTD_RLE); - std::cout << "BSHUF/ZSTD (RLE) " << CheckCompression(x, nimages, image, nthreads); + x.Compression(JFJochProtoBuf::BSHUF_LZ4); + std::cout << "BSHUF/LZ4 " << CheckCompression(x, nimages, image, nthreads); - x.Compression(JFJochProtoBuf::NO_COMPRESSION); - std::cout << "None (geom transform) " << CheckCompression(x, nimages, image, nthreads); + x.Compression(JFJochProtoBuf::BSHUF_ZSTD); + std::cout << "BSHUF/ZSTD (0) " << CheckCompression(x, nimages, image, nthreads); + + x.Compression(JFJochProtoBuf::BSHUF_ZSTD_RLE); + std::cout << "BSHUF/ZSTD (RLE) " << CheckCompression(x, nimages, image, nthreads); + std::cout << std::endl; + } std::cout << std::endl << std::endl << "Decompression" << std::endl << std::endl; From 2eac43b92588c8efd01851623227d4582d05a58b Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 8 Aug 2023 10:20:26 +0200 Subject: [PATCH 150/224] RadialIntegration: Enable pixel splitting with CPU based routine --- image_analysis/RadialIntegration.cpp | 67 +++++++++++++++------ image_analysis/RadialIntegration.h | 22 ++++--- image_analysis/RadialIntegrationMapping.cpp | 11 +++- image_analysis/RadialIntegrationMapping.h | 1 + tests/RadialIntegrationTest.cpp | 28 +++++++++ tools/DataAnalysisPerfTest.cpp | 38 ++++++++---- 6 files changed, 126 insertions(+), 41 deletions(-) diff --git a/image_analysis/RadialIntegration.cpp b/image_analysis/RadialIntegration.cpp index 7118af15..73895449 100644 --- a/image_analysis/RadialIntegration.cpp +++ b/image_analysis/RadialIntegration.cpp @@ -4,12 +4,24 @@ #include "RadialIntegration.h" #include "../common/JFJochException.h" -RadialIntegration::RadialIntegration(const std::vector& in_mapping, uint16_t in_nbins) : - pixel_to_bin(in_mapping), nbins(in_nbins), sum(in_nbins, 0), count(in_nbins, 0) -{} +RadialIntegration::RadialIntegration(const std::vector& in_mapping, uint32_t in_nbins, uint32_t in_pixel_split) : + pixel_to_bin(in_mapping), nbins(in_nbins), sum(in_nbins, 0), count(in_nbins, 0), coeff(in_mapping.size(), 1.0f), + pixel_split(in_pixel_split) +{ + if (pixel_split == 1) + pixel_spit_weight = 1.0f; + else if (pixel_split == 4) { + pixel_spit_weight = 0.25f; + if (pixel_to_bin.size() % 4 != 0) + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, + "With pixel split of 4 input array must be of size multiple of 4"); + } else + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, + "Only pixel split of 1 and 4 allowed at the moment for radial integration"); +} -RadialIntegration::RadialIntegration(const RadialIntegrationMapping &mapping) : - RadialIntegration(mapping.GetPixelToBinMapping(), mapping.GetBinNumber()) +RadialIntegration::RadialIntegration(const RadialIntegrationMapping &mapping, uint32_t in_pixel_split) : + RadialIntegration(mapping.GetPixelToBinMapping(), mapping.GetBinNumber(), in_pixel_split) {} void RadialIntegration::Clear() { @@ -20,17 +32,34 @@ void RadialIntegration::Clear() { i = 0; } -void RadialIntegration::Process(const int16_t *data, size_t npixel) { - if (npixel != pixel_to_bin.size()) +void RadialIntegration::Process(const int16_t *__restrict data, size_t npixel) { + if (npixel != pixel_to_bin.size() / pixel_split) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Mismatch in size of pixel-to-bin mapping and image"); - for (int i = 0; i < npixel; i++) { - auto bin = pixel_to_bin[i]; - auto value = data[i]; - if ((value > INT16_MIN + 4) && (value < INT16_MAX - 4) && (bin < nbins)) { - sum[bin] += value; - count[bin] += 1; + if (pixel_split == 1) { + for (int i = 0; i < npixel; i++) { + auto value = data[i]; + if ((value > INT16_MIN + 4) && (value < INT16_MAX - 4)) { + auto bin = pixel_to_bin[i]; + if (bin < nbins) { + sum[bin] += coeff[i] * value; + count[bin] += 1.0f; + } + } + } + } else if (pixel_split == 4) { + for (int i = 0; i < npixel; i++) { + auto value = data[i]; + if ((value > INT16_MIN + 4) && (value < INT16_MAX - 4)) { + for (int p = 0; p < 4; p++) { + auto bin = pixel_to_bin[i * pixel_split + p]; + if (bin < nbins) { + sum[bin] += coeff[i] * value * 0.25f; + count[bin] += 0.25f; + } + } + } } } } @@ -51,19 +80,19 @@ void RadialIntegration::GetResult(std::vector &result) const { } } -const std::vector &RadialIntegration::GetSum() const { +const std::vector &RadialIntegration::GetSum() const { return sum; } -const std::vector &RadialIntegration::GetCount() const { +const std::vector &RadialIntegration::GetCount() const { return count; } -float RadialIntegration::GetRangeValue(uint16_t min_bin, uint16_t max_bin) { - int64_t ret_sum = 0; - int64_t ret_count = 0; +float RadialIntegration::GetRangeValue(uint32_t min_bin, uint32_t max_bin) { + float ret_sum = 0; + float ret_count = 0; - for (int i = std::min(nbins,min_bin); i <= std::min((uint16_t)(nbins-1),max_bin); i++) { + for (int i = std::min(nbins,min_bin); i <= std::min(nbins-1,max_bin); i++) { ret_sum += sum[i]; ret_count += count[i]; } diff --git a/image_analysis/RadialIntegration.h b/image_analysis/RadialIntegration.h index 80f18bbb..d77ddb88 100644 --- a/image_analysis/RadialIntegration.h +++ b/image_analysis/RadialIntegration.h @@ -12,20 +12,24 @@ #include "RadialIntegrationMapping.h" class RadialIntegration { - const std::vector& pixel_to_bin; - const uint16_t nbins; - std::vector sum; - std::vector count; + const std::vector pixel_to_bin; + const std::vector coeff; + const uint32_t nbins; + const uint32_t pixel_split; + float pixel_spit_weight; + float one_over_pixel_spit_weight; + std::vector sum; + std::vector count; public: - RadialIntegration(const RadialIntegrationMapping& mapping); - RadialIntegration(const std::vector& mapping, uint16_t nbins); + RadialIntegration(const RadialIntegrationMapping& mapping, uint32_t pixel_split = 1); + RadialIntegration(const std::vector& mapping, uint32_t nbins, uint32_t pixel_split = 1); void Clear(); void Process(const int16_t *data, size_t npixel); void ProcessOneImage(const int16_t *data, size_t npixel); // Process + Clear void GetResult(std::vector &result) const; - [[nodiscard]] float GetRangeValue(uint16_t min_bin, uint16_t max_bin); - [[nodiscard]] const std::vector& GetSum() const; - [[nodiscard]] const std::vector& GetCount() const; + [[nodiscard]] float GetRangeValue(uint32_t min_bin, uint32_t max_bin); + [[nodiscard]] const std::vector& GetSum() const; + [[nodiscard]] const std::vector& GetCount() const; }; diff --git a/image_analysis/RadialIntegrationMapping.cpp b/image_analysis/RadialIntegrationMapping.cpp index d7c2f883..2c65c887 100644 --- a/image_analysis/RadialIntegrationMapping.cpp +++ b/image_analysis/RadialIntegrationMapping.cpp @@ -79,4 +79,13 @@ const std::vector &RadialIntegrationMapping::GetSolidAngleCorr() const { double RadialIntegrationMapping::QToBin(double q) const { return std::min(static_cast(max_bin_number), std::max(0.0, (q - low_q) / q_spacing)); -} \ No newline at end of file +} + +std::vector RadialIntegrationMapping::GetPixelToBinMappingSplitTo4() const { + std::vector ret(pixel_to_bin.size() * 4); + for (int i = 0; i < pixel_to_bin.size(); i++) { + for (int j = 0; j < 4; j++) + ret[i * 4 + j] = pixel_to_bin[i]; + } + return ret; +} diff --git a/image_analysis/RadialIntegrationMapping.h b/image_analysis/RadialIntegrationMapping.h index 4c185b19..fb948591 100644 --- a/image_analysis/RadialIntegrationMapping.h +++ b/image_analysis/RadialIntegrationMapping.h @@ -17,6 +17,7 @@ public: RadialIntegrationMapping(const DiffractionExperiment& experiment, const uint8_t *one_byte_mask = nullptr); [[nodiscard]] uint16_t GetBinNumber() const; [[nodiscard]] const std::vector &GetPixelToBinMapping() const; + [[nodiscard]] std::vector GetPixelToBinMappingSplitTo4() const; [[nodiscard]] const std::vector &GetBinToQ() const; [[nodiscard]] const std::vector &GetSolidAngleCorr() const; [[nodiscard]] double QToBin(double q) const; diff --git a/tests/RadialIntegrationTest.cpp b/tests/RadialIntegrationTest.cpp index 1a816904..02e8e91b 100644 --- a/tests/RadialIntegrationTest.cpp +++ b/tests/RadialIntegrationTest.cpp @@ -133,6 +133,34 @@ TEST_CASE("RadialIntegration_Process","[RadialIntegration]") { REQUIRE(radial.GetSum()[1] == 6+2); } +TEST_CASE("RadialIntegration_Process_PxlSplit4","[RadialIntegration]") { + std::vector pixel_to_bin = {0, 1, 2, 3, 2, 2, 1, 4, 0, 0, 0, 0, 5, 5, 5, 5}; + std::vector test_image = {5, 7, INT16_MIN, 123}; + std::vector result; + + RadialIntegration radial(pixel_to_bin, 5, 4); + radial.ProcessOneImage(test_image.data(), 4); + + REQUIRE(radial.GetCount().size() == 5); + REQUIRE(radial.GetSum().size() == 5); + + float count = 0; + for (const auto &i: radial.GetCount()) + count += i; + REQUIRE(count == Approx(2.0f)); + + REQUIRE(radial.GetCount()[0] == Approx(0.25f)); + REQUIRE(radial.GetCount()[1] == Approx(0.5f)); + REQUIRE(radial.GetCount()[2] == Approx(0.75f)); + REQUIRE(radial.GetCount()[3] == Approx(0.25f)); + REQUIRE(radial.GetCount()[4] == Approx(0.25f)); + + REQUIRE(radial.GetSum()[0] == Approx(5 * 0.25f)); + REQUIRE(radial.GetSum()[1] == Approx(5 * 0.25f + 7 * 0.25f)); + REQUIRE(radial.GetSum()[2] == Approx(5 * 0.25f + 7 * 0.5f)); + REQUIRE(radial.GetSum()[4] == Approx(7 * 0.25f)); +} + TEST_CASE("RadialIntegration_GetResult","[RadialIntegration]") { std::vector pixel_to_bin = {0,1,2,4,3,1,2,3}; std::vector test_image = {7,6,5,4,3,2,1,0}; diff --git a/tools/DataAnalysisPerfTest.cpp b/tools/DataAnalysisPerfTest.cpp index d3c2ac3e..499bde6d 100644 --- a/tools/DataAnalysisPerfTest.cpp +++ b/tools/DataAnalysisPerfTest.cpp @@ -45,7 +45,7 @@ auto TestAll(const DiffractionExperiment &experiment, const JFJochProtoBuf::Data auto elapsed = std::chrono::duration_cast(end_time - start_time); std::ostringstream strstream; - logger.Info("{:20s} {:8.1f} ms/image", "Full", + logger.Info("{:30s} {:8.1f} ms/image", "Full", elapsed.count() / (1000.0 * (double) nimages)); return strstream.str(); @@ -85,7 +85,7 @@ auto TestAllWithROI(const DiffractionExperiment &experiment, const JFJochProtoBu auto elapsed = std::chrono::duration_cast(end_time - start_time); std::ostringstream strstream; - logger.Info("{:20s} {:8.1f} ms/image", "Full+ROI", + logger.Info("{:30s} {:8.1f} ms/image", "Full+ROI", elapsed.count() / (1000.0 * (double) nimages)); return strstream.str(); @@ -127,7 +127,7 @@ void TestIndexing() { auto end_time = std::chrono::system_clock::now(); auto elapsed = std::chrono::duration_cast(end_time - start_time); - logger.Info("Fast feedback index. {:8.1f} ms/image", elapsed.count() / (1000.0 * nexec)); + logger.Info("{:30s} {:8.1f} ms/image", "Fast feedback index.", elapsed.count() / (1000.0 * nexec)); } } @@ -149,7 +149,7 @@ auto TestSpotFinder(const DiffractionExperiment &experiment, const JFJochProtoBu auto elapsed = std::chrono::duration_cast(end_time - start_time); std::ostringstream strstream; - logger.Info("{:20s} {:8.1f} ms/image {:5d} spots", "Spot finding", + logger.Info("{:30s} {:8.1f} ms/image {:5d} spots", "Spot finding", elapsed.count() / (1000.0 * (double) nimages), spots.size()); return strstream.str(); @@ -173,7 +173,7 @@ auto TestSpotFinderWithoutCopyToDevice(const DiffractionExperiment &experiment, auto elapsed = std::chrono::duration_cast(end_time - start_time); std::ostringstream strstream; - logger.Info("{:20s} {:8.1f} ms/image {:5d} spots", "Spot finding", + logger.Info("{:30s} {:8.1f} ms/image {:5d} spots", "Spot finding", elapsed.count() / (1000.0 * (double) nimages), spots.size()); return strstream.str(); @@ -237,18 +237,29 @@ auto TestRadialIntegrationGPUWithoutCopyToDevice(const DiffractionExperiment &x, } -auto TestRadialIntegration(const DiffractionExperiment &experiment, const JFJochProtoBuf::DataProcessingSettings &settings, - int16_t* image, size_t nimages) { +auto TestRadialIntegration(const DiffractionExperiment &experiment, + const JFJochProtoBuf::DataProcessingSettings &settings, + int16_t* image, size_t nimages, + uint32_t pixel_split = 1) { uint32_t nredo = 20; RadialIntegrationMapping mapping(experiment); - RadialIntegration integration(mapping); + std::unique_ptr integration; + + if (pixel_split == 1) { + integration = std::make_unique(mapping); + } else { + integration = std::make_unique(mapping.GetPixelToBinMappingSplitTo4(), + mapping.GetBinNumber(), + 4); + } + std::vector result; auto start_time = std::chrono::system_clock::now(); for (int redo = 0; redo < nredo; redo++) { for (int i = 0; i < nimages; i++) { - integration.ProcessOneImage(image + i * experiment.GetPixelsNum(), experiment.GetPixelsNum()); + integration->ProcessOneImage(image + i * experiment.GetPixelsNum(), experiment.GetPixelsNum()); //integration.GetResult(result); } } @@ -332,14 +343,17 @@ int main(int argc, char **argv) { TestSpotFinder(x, settings, local_peakfinder_gpu,image_conv.data(), nimages); } - logger.Info("{:20s} {:8.1f} ms/image", "Radial int. (GPU)", TestRadialIntegrationGPU(x, settings, + logger.Info("{:30s} {:8.1f} ms/image", "Radial int. (GPU)", TestRadialIntegrationGPU(x, settings, image_conv.data(), nimages)); - logger.Info("{:20s} {:8.1f} ms/image", "Radial int. (GPU/nocopy)", TestRadialIntegrationGPUWithoutCopyToDevice(x, settings, + logger.Info("{:30s} {:8.1f} ms/image", "Radial int. (GPU/nocpy)", TestRadialIntegrationGPUWithoutCopyToDevice(x, settings, image_conv.data(), nimages)); - logger.Info("{:20s} {:8.1f} ms/image", "Radial int. (CPU)", TestRadialIntegration(x, settings, + logger.Info("{:30s} {:8.1f} ms/image", "Radial int. (CPU)", TestRadialIntegration(x, settings, image_conv.data(), nimages)); + logger.Info("{:30s} {:8.1f} ms/image", "Radial int. pxlspl 2 (CPU)", TestRadialIntegration(x, settings, + image_conv.data(), nimages, 4)); + TestIndexing(); logger.Info("Full package"); From 6d130926b0d3ca95df97242ebc680367bda5873b Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 8 Aug 2023 10:47:50 +0200 Subject: [PATCH 151/224] RadialIntegrationCPUTest: Added multi-threaded test for CPU radial integration --- tools/CMakeLists.txt | 3 + tools/RadialIntegrationCPUTest.cpp | 89 ++++++++++++++++++++++++++++++ 2 files changed, 92 insertions(+) create mode 100644 tools/RadialIntegrationCPUTest.cpp diff --git a/tools/CMakeLists.txt b/tools/CMakeLists.txt index f57b58b6..6c3ad3c0 100644 --- a/tools/CMakeLists.txt +++ b/tools/CMakeLists.txt @@ -13,6 +13,9 @@ target_link_libraries(HDF5DatasetWriteTest JFJochWriter CommonFunctions) ADD_EXECUTABLE(DataAnalysisPerfTest DataAnalysisPerfTest.cpp) TARGET_LINK_LIBRARIES(DataAnalysisPerfTest ImageAnalysis JFJochWriter CommonFunctions) +ADD_EXECUTABLE(RadialIntegrationCPUTest RadialIntegrationCPUTest.cpp) +TARGET_LINK_LIBRARIES(RadialIntegrationCPUTest ImageAnalysis JFJochWriter CommonFunctions) + ADD_EXECUTABLE(PreviewTest PreviewTest.cpp) TARGET_LINK_LIBRARIES(PreviewTest JFJochWriter CommonFunctions) diff --git a/tools/RadialIntegrationCPUTest.cpp b/tools/RadialIntegrationCPUTest.cpp new file mode 100644 index 00000000..b9442f9f --- /dev/null +++ b/tools/RadialIntegrationCPUTest.cpp @@ -0,0 +1,89 @@ +// Copyright (2019-2022) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#include + +#include "../image_analysis/RadialIntegration.h" +#include "../common/Logger.h" +#include "../writer/HDF5Objects.h" + +Logger logger{"RadialIntegrationCPUTest"}; + +void RunRadialIntegrationThread(RadialIntegration* integration, + int16_t* image, size_t nimages, + size_t image0, size_t stride, + size_t npixel) { + for (size_t i = image0; i < nimages; i += stride) + integration->ProcessOneImage(image + i * npixel, npixel); +} + +auto TestRadialIntegration(const DiffractionExperiment &experiment, + int16_t* image, size_t nimages, + uint32_t nthreads, + uint32_t pixel_split) { + uint32_t nredo = 5; + RadialIntegrationMapping mapping(experiment); + std::unique_ptr integration; + + if (pixel_split == 1) + integration = std::make_unique(mapping); + else + integration = std::make_unique(mapping.GetPixelToBinMappingSplitTo4(), + mapping.GetBinNumber(), 4); + + std::vector result; + + auto start_time = std::chrono::system_clock::now(); + for (int redo = 0; redo < nredo; redo++) { + std::vector> futures; + for (int i = 0; i < nthreads; i++) { + futures.emplace_back(std::async(std::launch::async, &RunRadialIntegrationThread, + integration.get(), image, nimages, + i, nthreads, + experiment.GetPixelsNum())); + } + for (auto &f: futures) + f.get(); + } + auto end_time = std::chrono::system_clock::now(); + auto elapsed = std::chrono::duration_cast(end_time - start_time); + + return elapsed.count() / (1000.0 * (double) nimages * nredo); +} + +int main(int argc, char **argv) { + if (argc > 3) { + logger.Info("Usage: ./DataAnalysisPerfTest {} {}"); + exit(EXIT_FAILURE); + } + + uint32_t nthreads = 1; + if (argc >= 2) + nthreads = atol(argv[1]); + + uint64_t nimages = 100; + if (argc == 3) + nimages = atol(argv[2]); + + if ((nthreads <= 0) || (nimages <= 0)) { + std::cerr << "Error in input parameters" << std::endl; + exit(EXIT_FAILURE); + } + + DiffractionExperiment x(DetectorGeometry(8, 2, 8, 36)); + + logger.Info("Number of threads: {}", nthreads); + logger.Info("Number of images in the dataset: {}", nimages); + + x.Mode(DetectorMode::Conversion); + + std::vector image_conv ( nimages * x.GetPixelsNum(), 30); + + x.BeamX_pxl(1090).BeamY_pxl(1136).DetectorDistance_mm(75).PhotonEnergy_keV(WVL_1A_IN_KEV); + std::vector one_byte_mask(x.GetPixelsNum(), 1); + + logger.Info("{:30s} {:8.1f} ms/image", "Radial int. pxlspl 1 (CPU)", + TestRadialIntegration(x, image_conv.data(), nimages, nthreads, 1)); + logger.Info("{:30s} {:8.1f} ms/image", "Radial int. pxlspl 2 (CPU)", + TestRadialIntegration(x, image_conv.data(), nimages, nthreads, 4)); +} From 5df72a4d54e5329bda4e7aeb5b7e714f6759e810 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 8 Aug 2023 10:48:12 +0200 Subject: [PATCH 152/224] CompressionBenchmark: Fix minor issue in assigning images for analysis --- tools/CompressionBenchmark.cpp | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/tools/CompressionBenchmark.cpp b/tools/CompressionBenchmark.cpp index b003faa7..5bb92f83 100644 --- a/tools/CompressionBenchmark.cpp +++ b/tools/CompressionBenchmark.cpp @@ -12,13 +12,15 @@ #include "JFJochDecompress.h" double CheckCompressionThread(const DiffractionExperiment &x, - int32_t nimages, int32_t stride, + int32_t nimages, + int32_t image0, + int32_t stride, const std::vector &image, std::vector &output) { double ret = 0; FrameTransformation transformation(x); - for (int i = 0; i < nimages; i += stride) { + for (int32_t i = image0; i < nimages; i += stride) { for (int j = 0; j < x.GetModulesNum(); j++ ) { transformation.ProcessModule(image.data() + (j + i * x.GetModulesNum()) * RAW_MODULE_SIZE, j, 0); } @@ -40,7 +42,8 @@ std::string CheckCompression(const DiffractionExperiment &x, int32_t nimages, co std::vector> futures; for (int i = 0; i < nthreads; i++) - futures.emplace_back(std::async(std::launch::async, &CheckCompressionThread, std::ref(x), nimages, nthreads, + futures.emplace_back(std::async(std::launch::async, &CheckCompressionThread, std::ref(x), + nimages, i, nthreads, std::ref(image), std::ref(output))); for (int i = 0; i < nthreads; i++) From 06ca7be10db3a9b343f62d7ccfb5467c58b21312 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 8 Aug 2023 10:54:20 +0200 Subject: [PATCH 153/224] RadialIntegrationCPUTest: Fix --- tools/RadialIntegrationCPUTest.cpp | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/tools/RadialIntegrationCPUTest.cpp b/tools/RadialIntegrationCPUTest.cpp index b9442f9f..01d0458c 100644 --- a/tools/RadialIntegrationCPUTest.cpp +++ b/tools/RadialIntegrationCPUTest.cpp @@ -9,12 +9,16 @@ Logger logger{"RadialIntegrationCPUTest"}; -void RunRadialIntegrationThread(RadialIntegration* integration, +void RunRadialIntegrationThread(const std::vector& mapping, + uint32_t nbins, uint32_t pixel_split, int16_t* image, size_t nimages, size_t image0, size_t stride, size_t npixel) { + + RadialIntegration integration(mapping, nbins, pixel_split); + for (size_t i = image0; i < nimages; i += stride) - integration->ProcessOneImage(image + i * npixel, npixel); + integration.ProcessOneImage(image + i * npixel, npixel); } auto TestRadialIntegration(const DiffractionExperiment &experiment, @@ -23,13 +27,6 @@ auto TestRadialIntegration(const DiffractionExperiment &experiment, uint32_t pixel_split) { uint32_t nredo = 5; RadialIntegrationMapping mapping(experiment); - std::unique_ptr integration; - - if (pixel_split == 1) - integration = std::make_unique(mapping); - else - integration = std::make_unique(mapping.GetPixelToBinMappingSplitTo4(), - mapping.GetBinNumber(), 4); std::vector result; @@ -37,10 +34,19 @@ auto TestRadialIntegration(const DiffractionExperiment &experiment, for (int redo = 0; redo < nredo; redo++) { std::vector> futures; for (int i = 0; i < nthreads; i++) { + if (pixel_split == 1) futures.emplace_back(std::async(std::launch::async, &RunRadialIntegrationThread, - integration.get(), image, nimages, + std::ref(mapping.GetPixelToBinMapping()), mapping.GetBinNumber(), 1, + image, nimages, i, nthreads, experiment.GetPixelsNum())); + else + futures.emplace_back(std::async(std::launch::async, &RunRadialIntegrationThread, + mapping.GetPixelToBinMappingSplitTo4(), mapping.GetBinNumber(), 4, + image, nimages, + i, nthreads, + experiment.GetPixelsNum())); + } for (auto &f: futures) f.get(); From 104ec86af4c58ac3074a55abdf95b976dbb70c3d Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 8 Aug 2023 11:13:14 +0200 Subject: [PATCH 154/224] RadialIntegration: Minor improvements --- image_analysis/RadialIntegration.cpp | 31 +++++++++++++++++++++------- image_analysis/RadialIntegration.h | 6 +++--- 2 files changed, 26 insertions(+), 11 deletions(-) diff --git a/image_analysis/RadialIntegration.cpp b/image_analysis/RadialIntegration.cpp index 73895449..4ec71cdb 100644 --- a/image_analysis/RadialIntegration.cpp +++ b/image_analysis/RadialIntegration.cpp @@ -5,25 +5,38 @@ #include "../common/JFJochException.h" RadialIntegration::RadialIntegration(const std::vector& in_mapping, uint32_t in_nbins, uint32_t in_pixel_split) : - pixel_to_bin(in_mapping), nbins(in_nbins), sum(in_nbins, 0), count(in_nbins, 0), coeff(in_mapping.size(), 1.0f), + pixel_to_bin(in_mapping), nbins(in_nbins), sum(in_nbins, 0), count(in_nbins, 0), pixel_split(in_pixel_split) { - if (pixel_split == 1) - pixel_spit_weight = 1.0f; - else if (pixel_split == 4) { - pixel_spit_weight = 0.25f; + + if (pixel_split == 4) { if (pixel_to_bin.size() % 4 != 0) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "With pixel split of 4 input array must be of size multiple of 4"); - } else + } else if (pixel_split != 1) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Only pixel split of 1 and 4 allowed at the moment for radial integration"); + + coeff = (float *) std::aligned_alloc(64, in_mapping.size() * sizeof(float)); + for (int i = 0; i < in_mapping.size(); i++) + coeff[i] = 1.0f; } RadialIntegration::RadialIntegration(const RadialIntegrationMapping &mapping, uint32_t in_pixel_split) : RadialIntegration(mapping.GetPixelToBinMapping(), mapping.GetBinNumber(), in_pixel_split) {} +RadialIntegration::~RadialIntegration() { + std::free(coeff); +} + +void RadialIntegration::LoadRadialIntegrationCorr(const std::vector &v) { + if (v.size() != pixel_to_bin.size() * pixel_split) + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, + "Mismatch in size of pixel-to-bin mapping and correction"); + memcpy(coeff, v.data(), pixel_to_bin.size() * pixel_split * sizeof(float)); +} + void RadialIntegration::Clear() { for (auto &i : sum) i = 0; @@ -37,13 +50,15 @@ void RadialIntegration::Process(const int16_t *__restrict data, size_t npixel) { throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Mismatch in size of pixel-to-bin mapping and image"); + auto coeff_aligned = std::assume_aligned<64>(coeff); + if (pixel_split == 1) { for (int i = 0; i < npixel; i++) { auto value = data[i]; if ((value > INT16_MIN + 4) && (value < INT16_MAX - 4)) { auto bin = pixel_to_bin[i]; if (bin < nbins) { - sum[bin] += coeff[i] * value; + sum[bin] += coeff_aligned[i] * value; count[bin] += 1.0f; } } @@ -55,7 +70,7 @@ void RadialIntegration::Process(const int16_t *__restrict data, size_t npixel) { for (int p = 0; p < 4; p++) { auto bin = pixel_to_bin[i * pixel_split + p]; if (bin < nbins) { - sum[bin] += coeff[i] * value * 0.25f; + sum[bin] += coeff_aligned[i * pixel_split + p] * value * 0.25f; count[bin] += 0.25f; } } diff --git a/image_analysis/RadialIntegration.h b/image_analysis/RadialIntegration.h index d77ddb88..47e4bd41 100644 --- a/image_analysis/RadialIntegration.h +++ b/image_analysis/RadialIntegration.h @@ -13,20 +13,20 @@ class RadialIntegration { const std::vector pixel_to_bin; - const std::vector coeff; + float *coeff; const uint32_t nbins; const uint32_t pixel_split; - float pixel_spit_weight; - float one_over_pixel_spit_weight; std::vector sum; std::vector count; public: RadialIntegration(const RadialIntegrationMapping& mapping, uint32_t pixel_split = 1); RadialIntegration(const std::vector& mapping, uint32_t nbins, uint32_t pixel_split = 1); + ~RadialIntegration(); void Clear(); void Process(const int16_t *data, size_t npixel); void ProcessOneImage(const int16_t *data, size_t npixel); // Process + Clear void GetResult(std::vector &result) const; + void LoadRadialIntegrationCorr(const std::vector &v); [[nodiscard]] float GetRangeValue(uint32_t min_bin, uint32_t max_bin); [[nodiscard]] const std::vector& GetSum() const; [[nodiscard]] const std::vector& GetCount() const; From 480161ad7d12e00a6ccb34e680c6c3b33cfbe150 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 8 Aug 2023 11:20:06 +0200 Subject: [PATCH 155/224] RadialIntegration: Increase reporting precision --- tools/RadialIntegrationCPUTest.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/RadialIntegrationCPUTest.cpp b/tools/RadialIntegrationCPUTest.cpp index 01d0458c..233995a7 100644 --- a/tools/RadialIntegrationCPUTest.cpp +++ b/tools/RadialIntegrationCPUTest.cpp @@ -88,8 +88,8 @@ int main(int argc, char **argv) { x.BeamX_pxl(1090).BeamY_pxl(1136).DetectorDistance_mm(75).PhotonEnergy_keV(WVL_1A_IN_KEV); std::vector one_byte_mask(x.GetPixelsNum(), 1); - logger.Info("{:30s} {:8.1f} ms/image", "Radial int. pxlspl 1 (CPU)", + logger.Info("{:30s} {:8.2f} ms/image", "Radial int. pxlspl 1 (CPU)", TestRadialIntegration(x, image_conv.data(), nimages, nthreads, 1)); - logger.Info("{:30s} {:8.1f} ms/image", "Radial int. pxlspl 2 (CPU)", + logger.Info("{:30s} {:8.2f} ms/image", "Radial int. pxlspl 2 (CPU)", TestRadialIntegration(x, image_conv.data(), nimages, nthreads, 4)); } From 91c94f77d62cd1c7d6955cbceab9a3985948ffce Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 8 Aug 2023 11:25:54 +0200 Subject: [PATCH 156/224] RadialIntegration: Remove RadialIntegration preparation from timed loop --- tools/RadialIntegrationCPUTest.cpp | 25 +++++++++---------------- 1 file changed, 9 insertions(+), 16 deletions(-) diff --git a/tools/RadialIntegrationCPUTest.cpp b/tools/RadialIntegrationCPUTest.cpp index 233995a7..b8637918 100644 --- a/tools/RadialIntegrationCPUTest.cpp +++ b/tools/RadialIntegrationCPUTest.cpp @@ -9,14 +9,10 @@ Logger logger{"RadialIntegrationCPUTest"}; -void RunRadialIntegrationThread(const std::vector& mapping, - uint32_t nbins, uint32_t pixel_split, +void RunRadialIntegrationThread(RadialIntegration &integration, int16_t* image, size_t nimages, size_t image0, size_t stride, size_t npixel) { - - RadialIntegration integration(mapping, nbins, pixel_split); - for (size_t i = image0; i < nimages; i += stride) integration.ProcessOneImage(image + i * npixel, npixel); } @@ -29,24 +25,21 @@ auto TestRadialIntegration(const DiffractionExperiment &experiment, RadialIntegrationMapping mapping(experiment); std::vector result; + std::vector integration; + for (int i = 0; i < nthreads; i++) { + if (pixel_split == 1) + integration.emplace_back(mapping); + else + integration.emplace_back(mapping.GetPixelToBinMappingSplitTo4(), mapping.GetBinNumber(), 4); + } auto start_time = std::chrono::system_clock::now(); for (int redo = 0; redo < nredo; redo++) { std::vector> futures; for (int i = 0; i < nthreads; i++) { - if (pixel_split == 1) futures.emplace_back(std::async(std::launch::async, &RunRadialIntegrationThread, - std::ref(mapping.GetPixelToBinMapping()), mapping.GetBinNumber(), 1, - image, nimages, - i, nthreads, + std::ref(integration[i]), image, nimages, i, nthreads, experiment.GetPixelsNum())); - else - futures.emplace_back(std::async(std::launch::async, &RunRadialIntegrationThread, - mapping.GetPixelToBinMappingSplitTo4(), mapping.GetBinNumber(), 4, - image, nimages, - i, nthreads, - experiment.GetPixelsNum())); - } for (auto &f: futures) f.get(); From 4159fc7b6d64d726a3fbcf160370f76cf2b07b14 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 8 Aug 2023 11:28:16 +0200 Subject: [PATCH 157/224] RadialIntegration: Use pointer to transfer integration to the sub-thread --- tools/RadialIntegrationCPUTest.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tools/RadialIntegrationCPUTest.cpp b/tools/RadialIntegrationCPUTest.cpp index b8637918..0d853dcb 100644 --- a/tools/RadialIntegrationCPUTest.cpp +++ b/tools/RadialIntegrationCPUTest.cpp @@ -9,12 +9,12 @@ Logger logger{"RadialIntegrationCPUTest"}; -void RunRadialIntegrationThread(RadialIntegration &integration, +void RunRadialIntegrationThread(RadialIntegration *integration, int16_t* image, size_t nimages, size_t image0, size_t stride, size_t npixel) { for (size_t i = image0; i < nimages; i += stride) - integration.ProcessOneImage(image + i * npixel, npixel); + integration->ProcessOneImage(image + i * npixel, npixel); } auto TestRadialIntegration(const DiffractionExperiment &experiment, @@ -38,7 +38,7 @@ auto TestRadialIntegration(const DiffractionExperiment &experiment, std::vector> futures; for (int i = 0; i < nthreads; i++) { futures.emplace_back(std::async(std::launch::async, &RunRadialIntegrationThread, - std::ref(integration[i]), image, nimages, i, nthreads, + &integration[i], image, nimages, i, nthreads, experiment.GetPixelsNum())); } for (auto &f: futures) From 6006850c40d4850e216c8d62071f0a0549241fd7 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 8 Aug 2023 11:32:27 +0200 Subject: [PATCH 158/224] RadialIntegration: Don't keep RadialIntegration on stack --- image_analysis/RadialIntegration.cpp | 6 +++++- tools/RadialIntegrationCPUTest.cpp | 9 +++++---- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/image_analysis/RadialIntegration.cpp b/image_analysis/RadialIntegration.cpp index 4ec71cdb..8502cb27 100644 --- a/image_analysis/RadialIntegration.cpp +++ b/image_analysis/RadialIntegration.cpp @@ -18,6 +18,10 @@ RadialIntegration::RadialIntegration(const std::vector& in_mapping, ui "Only pixel split of 1 and 4 allowed at the moment for radial integration"); coeff = (float *) std::aligned_alloc(64, in_mapping.size() * sizeof(float)); + if (coeff == nullptr) + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, + "Memory allocation error"); + for (int i = 0; i < in_mapping.size(); i++) coeff[i] = 1.0f; } @@ -50,7 +54,7 @@ void RadialIntegration::Process(const int16_t *__restrict data, size_t npixel) { throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Mismatch in size of pixel-to-bin mapping and image"); - auto coeff_aligned = std::assume_aligned<64>(coeff); + const auto coeff_aligned = std::assume_aligned<64>(coeff); if (pixel_split == 1) { for (int i = 0; i < npixel; i++) { diff --git a/tools/RadialIntegrationCPUTest.cpp b/tools/RadialIntegrationCPUTest.cpp index 0d853dcb..f75693e8 100644 --- a/tools/RadialIntegrationCPUTest.cpp +++ b/tools/RadialIntegrationCPUTest.cpp @@ -25,12 +25,13 @@ auto TestRadialIntegration(const DiffractionExperiment &experiment, RadialIntegrationMapping mapping(experiment); std::vector result; - std::vector integration; + std::vector> integration; for (int i = 0; i < nthreads; i++) { if (pixel_split == 1) - integration.emplace_back(mapping); + integration.emplace_back(std::make_unique(mapping)); else - integration.emplace_back(mapping.GetPixelToBinMappingSplitTo4(), mapping.GetBinNumber(), 4); + integration.emplace_back(std::make_unique(mapping.GetPixelToBinMappingSplitTo4(), + mapping.GetBinNumber(), 4)); } auto start_time = std::chrono::system_clock::now(); @@ -38,7 +39,7 @@ auto TestRadialIntegration(const DiffractionExperiment &experiment, std::vector> futures; for (int i = 0; i < nthreads; i++) { futures.emplace_back(std::async(std::launch::async, &RunRadialIntegrationThread, - &integration[i], image, nimages, i, nthreads, + integration[i].get(), image, nimages, i, nthreads, experiment.GetPixelsNum())); } for (auto &f: futures) From 3e406f0f461accb0d3d4adac18aeacd4df5436f2 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 12 Aug 2023 12:05:53 +0200 Subject: [PATCH 159/224] FPGA: URAM read latency reduced to 2 --- fpga/scripts/bd_pcie.tcl | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index ff893f00..7fe56d65 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -271,7 +271,7 @@ proc create_hier_cell_gain_uram_0 { parentCell nameHier } { set axi_bram_ctrl_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_0 ] set_property -dict [ list \ CONFIG.DATA_WIDTH {256} \ - CONFIG.READ_LATENCY {3} \ + CONFIG.READ_LATENCY {2} \ ] $axi_bram_ctrl_0 # Create instance: axi_register_slice_0, and set properties @@ -298,8 +298,8 @@ proc create_hier_cell_gain_uram_0 { parentCell nameHier } { CONFIG.Port_B_Clock {100} \ CONFIG.Port_B_Enable_Rate {100} \ CONFIG.Port_B_Write_Rate {50} \ - CONFIG.READ_LATENCY_A {3} \ - CONFIG.READ_LATENCY_B {3} \ + CONFIG.READ_LATENCY_A {2} \ + CONFIG.READ_LATENCY_B {2} \ CONFIG.Use_RSTB_Pin {true} \ ] $blk_mem_gen_0 From 2a5741931d07feab75caafe2c00cf805c4880638 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 12 Aug 2023 12:09:38 +0200 Subject: [PATCH 160/224] FPGAIntegrationTest: Use blocking mode for internal_packet_generator test --- tests/FPGAIntegrationTest.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index cefc10a2..609a4951 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -20,7 +20,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator", "[FPGA][Full]") { x.UseInternalPacketGenerator(true).ImagesPerTrigger(4).PedestalG0Frames(0); HLSSimulatedDevice test(0, 64); - + test.SetFPGANonBlockingMode(false); REQUIRE_NOTHROW(test.StartAction(x)); REQUIRE_NOTHROW(test.WaitForActionComplete()); From ad5030334a93a5412725ece5dcebdd44dc75c730 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 14 Aug 2023 21:55:27 +0200 Subject: [PATCH 161/224] FPGA: Add 1 stream design --- fpga/CMakeLists.txt | 5 + fpga/scripts/bd_pcie_1stream.tcl | 470 +++++++++++++++++++++ fpga/scripts/build_pcie_design_1stream.tcl | 65 +++ 3 files changed, 540 insertions(+) create mode 100644 fpga/scripts/bd_pcie_1stream.tcl create mode 100644 fpga/scripts/build_pcie_design_1stream.tcl diff --git a/fpga/CMakeLists.txt b/fpga/CMakeLists.txt index 5befc498..0baf14c3 100644 --- a/fpga/CMakeLists.txt +++ b/fpga/CMakeLists.txt @@ -27,4 +27,9 @@ IF(VIVADO_HLS AND VIVADO) COMMAND ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_SOURCE_DIR}/scripts/build_pcie_design.tcl COMMAND ${CMAKE_COMMAND} -E env FLOW=pcie VIV_PROJECT_PATH=${CMAKE_CURRENT_BINARY_DIR}/vivado/jfjoch_pcie.xpr ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_BINARY_DIR}/action/scripts/synth_and_impl.tcl ) + + ADD_CUSTOM_TARGET(action_pcie_1stream DEPENDS action/hw/hdl/action_config.v hls + COMMAND ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_SOURCE_DIR}/scripts/build_pcie_design_1stream.tcl + COMMAND ${CMAKE_COMMAND} -E env FLOW=pcie VIV_PROJECT_PATH=${CMAKE_CURRENT_BINARY_DIR}/vivado/jfjoch_pcie.xpr ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_BINARY_DIR}/action/scripts/synth_and_impl.tcl + ) ENDIF() diff --git a/fpga/scripts/bd_pcie_1stream.tcl b/fpga/scripts/bd_pcie_1stream.tcl new file mode 100644 index 00000000..f3a53246 --- /dev/null +++ b/fpga/scripts/bd_pcie_1stream.tcl @@ -0,0 +1,470 @@ +## Copyright (2019-2022) Paul Scherrer Institute +## SPDX-License-Identifier: CERN-OHL-S-2.0 + +################################################################ +# This is a generated script based on design: jfjoch_pcie +# +# Though there are limitations about the generated script, +# the main purpose of this utility is to make learning +# IP Integrator Tcl commands easier. +################################################################ + +namespace eval _tcl { +proc get_script_folder {} { + set script_path [file normalize [info script]] + set script_folder [file dirname $script_path] + return $script_folder +} +} +variable script_folder +set script_folder [_tcl::get_script_folder] + +################################################################ +# Check if script is running in correct Vivado version. +################################################################ +set scripts_vivado_version 2022.1 +set current_vivado_version [version -short] + +if { [string first $scripts_vivado_version $current_vivado_version] == -1 } { + puts "" + catch {common::send_gid_msg -ssname BD::TCL -id 2041 -severity "ERROR" "This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."} + + return 1 +} + +################################################################ +# START +################################################################ + +# To test this script, run the following commands from Vivado Tcl console: +# source jfjoch_pcie_script.tcl + + +# The design that will be created by this Tcl script contains the following +# module references: +# gen_xdma_descriptor, action_config, check_eth_busy, resetn_sync + +# Please add the sources of those modules before sourcing this Tcl script. + +# If there is no project opened, this script will create a +# project, but make sure you do not have an existing project +# <./myproj/project_1.xpr> in the current working folder. + +set list_projs [get_projects -quiet] +if { $list_projs eq "" } { + create_project project_1 myproj -part xcvu35p-fsvh2104-2-e +} + + +# CHANGE DESIGN NAME HERE +variable design_name +set design_name jfjoch_pcie + +# If you do not already have an existing IP Integrator design open, +# you can create a design using the following command: +# create_bd_design $design_name + +# Creating design if needed +set errMsg "" +set nRet 0 + +set cur_design [current_bd_design -quiet] +set list_cells [get_bd_cells -quiet] + +if { ${design_name} eq "" } { + # USE CASES: + # 1) Design_name not set + + set errMsg "Please set the variable to a non-empty value." + set nRet 1 + +} elseif { ${cur_design} ne "" && ${list_cells} eq "" } { + # USE CASES: + # 2): Current design opened AND is empty AND names same. + # 3): Current design opened AND is empty AND names diff; design_name NOT in project. + # 4): Current design opened AND is empty AND names diff; design_name exists in project. + + if { $cur_design ne $design_name } { + common::send_gid_msg -ssname BD::TCL -id 2001 -severity "INFO" "Changing value of from <$design_name> to <$cur_design> since current design is empty." + set design_name [get_property NAME $cur_design] + } + common::send_gid_msg -ssname BD::TCL -id 2002 -severity "INFO" "Constructing design in IPI design <$cur_design>..." + +} elseif { ${cur_design} ne "" && $list_cells ne "" && $cur_design eq $design_name } { + # USE CASES: + # 5) Current design opened AND has components AND same names. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 1 +} elseif { [get_files -quiet ${design_name}.bd] ne "" } { + # USE CASES: + # 6) Current opened design, has components, but diff names, design_name exists in project. + # 7) No opened design, design_name exists in project. + + set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." + set nRet 2 + +} else { + # USE CASES: + # 8) No opened design, design_name not in project. + # 9) Current opened design, has components, but diff names, design_name not in project. + + common::send_gid_msg -ssname BD::TCL -id 2003 -severity "INFO" "Currently there is no design <$design_name> in project, so creating one..." + + create_bd_design $design_name + + common::send_gid_msg -ssname BD::TCL -id 2004 -severity "INFO" "Making design <$design_name> as current_bd_design." + current_bd_design $design_name + +} + +common::send_gid_msg -ssname BD::TCL -id 2005 -severity "INFO" "Currently the variable is equal to \"$design_name\"." + +if { $nRet != 0 } { + catch {common::send_gid_msg -ssname BD::TCL -id 2006 -severity "ERROR" $errMsg} + return $nRet +} + +set bCheckIPsPassed 1 +################################################################## +# CHECK IPs +################################################################## +set bCheckIPs 1 +if { $bCheckIPs == 1 } { + set list_check_ips "\ +xilinx.com:ip:axi_intc:4.1\ +xilinx.com:ip:axi_quad_spi:3.2\ +xilinx.com:ip:clk_wiz:6.0\ +xilinx.com:ip:cms_subsystem:4.0\ +xilinx.com:ip:xlconstant:1.1\ +xilinx.com:ip:proc_sys_reset:5.0\ +xilinx.com:ip:smartconnect:1.0\ +xilinx.com:ip:xlconcat:2.1\ +xilinx.com:ip:axi_protocol_converter:2.1\ +xilinx.com:ip:axi_register_slice:2.1\ +xilinx.com:ip:hbm:1.0\ +xilinx.com:ip:util_vector_logic:2.0\ +xilinx.com:ip:axi_bram_ctrl:4.1\ +xilinx.com:ip:axis_data_fifo:2.0\ +xilinx.com:ip:axis_register_slice:1.1\ +xilinx.com:ip:blk_mem_gen:8.4\ +psi.ch:hls:data_collection_fsm:1.0\ +psi.ch:hls:host_writer:1.0\ +psi.ch:hls:internal_packet_generator:1.0\ +psi.ch:hls:jf_conversion:1.0\ +psi.ch:hls:load_calibration:1.0\ +xilinx.com:ip:mailbox:2.1\ +psi.ch:hls:timer_hbm:1.0\ +psi.ch:hls:timer_host:1.0\ +xilinx.com:ip:cmac_usplus:3.1\ +xilinx.com:ip:axi_firewall:1.2\ +xilinx.com:ip:axis_clock_converter:1.1\ +xilinx.com:ip:util_ds_buf:2.2\ +xilinx.com:ip:xdma:4.1\ +psi.ch:hls:arp:1.0\ +xilinx.com:ip:axis_switch:1.1\ +psi.ch:hls:ethernet:1.0\ +psi.ch:hls:icmp:1.0\ +psi.ch:hls:ipv4:1.0\ +psi.ch:hls:sls_detector:1.0\ +psi.ch:hls:udp:1.0\ +" + + set list_ips_missing "" + common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following IPs exist in the project's IP catalog: $list_check_ips ." + + foreach ip_vlnv $list_check_ips { + set ip_obj [get_ipdefs -all $ip_vlnv] + if { $ip_obj eq "" } { + lappend list_ips_missing $ip_vlnv + } + } + + if { $list_ips_missing ne "" } { + catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following IPs are not found in the IP Catalog:\n $list_ips_missing\n\nResolution: Please add the repository containing the IP(s) to the project." } + set bCheckIPsPassed 0 + } + +} + +################################################################## +# CHECK Modules +################################################################## +set bCheckModules 1 +if { $bCheckModules == 1 } { + set list_check_mods "\ +gen_xdma_descriptor\ +action_config\ +check_eth_busy\ +resetn_sync\ +" + + set list_mods_missing "" + common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following modules exist in the project's sources: $list_check_mods ." + + foreach mod_vlnv $list_check_mods { + if { [can_resolve_reference $mod_vlnv] == 0 } { + lappend list_mods_missing $mod_vlnv + } + } + + if { $list_mods_missing ne "" } { + catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following module(s) are not found in the project: $list_mods_missing" } + common::send_msg_id "BD_TCL-008" "INFO" "Please add source files for the missing module(s) above." + set bCheckIPsPassed 0 + } +} + +if { $bCheckIPsPassed != 1 } { + common::send_msg_id "BD_TCL-1003" "WARNING" "Will not continue with creation of design due to the error(s) above." + return 3 +} + +################################################################## +# DESIGN PROCs +################################################################## + +# Procedure to create entire design; Provide argument to make +# procedure reusable. If parentCell is "", will use root. +proc create_root_design { parentCell } { + + variable script_folder + variable design_name + + if { $parentCell eq "" } { + set parentCell [get_bd_cells /] + } + + # Get object for parentCell + set parentObj [get_bd_cells $parentCell] + if { $parentObj == "" } { + catch {common::send_gid_msg -ssname BD::TCL -id 2090 -severity "ERROR" "Unable to find parent cell <$parentCell>!"} + return + } + + # Make sure parentObj is hier blk + set parentType [get_property TYPE $parentObj] + if { $parentType ne "hier" } { + catch {common::send_gid_msg -ssname BD::TCL -id 2091 -severity "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} + return + } + + # Save current instance; Restore later + set oldCurInst [current_bd_instance .] + + # Set parent object as current + current_bd_instance $parentObj + + + # Create interface ports + set pcie0_mgt [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:pcie_7x_mgt_rtl:1.0 pcie0_mgt ] + + set pcie0_ref [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 pcie0_ref ] + + set qsfp0 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:gt_rtl:1.0 qsfp0 ] + + set qsfp0_ref [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 qsfp0_ref ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {161132812} \ + ] $qsfp0_ref + + set ref100 [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 ref100 ] + set_property -dict [ list \ + CONFIG.FREQ_HZ {100000000} \ + ] $ref100 + + set satellite_uart_0 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:uart_rtl:1.0 satellite_uart_0 ] + + + # Create ports + set hbm_cattrip [ create_bd_port -dir O -from 0 -to 0 hbm_cattrip ] + set pcie_perstn [ create_bd_port -dir I -type rst pcie_perstn ] + set qsfp0_led_busy [ create_bd_port -dir O -from 0 -to 0 qsfp0_led_busy ] + set qsfp0_led_conn [ create_bd_port -dir O -from 0 -to 0 qsfp0_led_conn ] + set satellite_gpio_0 [ create_bd_port -dir I -from 3 -to 0 -type intr satellite_gpio_0 ] + set_property -dict [ list \ + CONFIG.PortWidth {4} \ + CONFIG.SENSITIVITY {EDGE_RISING} \ + ] $satellite_gpio_0 + + # Create instance: axi_intc_0, and set properties + set axi_intc_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_intc:4.1 axi_intc_0 ] + set_property -dict [ list \ + CONFIG.C_IRQ_CONNECTION {1} \ + CONFIG.C_NUM_SW_INTR {2} \ + ] $axi_intc_0 + + # Create instance: axi_quad_spi_0, and set properties + set axi_quad_spi_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_quad_spi:3.2 axi_quad_spi_0 ] + set_property -dict [ list \ + CONFIG.C_FIFO_DEPTH {256} \ + CONFIG.C_SCK_RATIO {2} \ + CONFIG.C_SPI_MEMORY {2} \ + CONFIG.C_SPI_MODE {2} \ + CONFIG.C_USE_STARTUP {1} \ + CONFIG.C_USE_STARTUP_INT {1} \ + ] $axi_quad_spi_0 + + # Create instance: clk_wiz_0, and set properties + set clk_wiz_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:clk_wiz:6.0 clk_wiz_0 ] + set_property -dict [ list \ + CONFIG.CLKOUT1_JITTER {132.683} \ + CONFIG.CLKOUT1_REQUESTED_OUT_FREQ {50.000} \ + CONFIG.CLKOUT2_JITTER {115.831} \ + CONFIG.CLKOUT2_PHASE_ERROR {87.180} \ + CONFIG.CLKOUT2_USED {true} \ + CONFIG.CLKOUT3_JITTER {102.086} \ + CONFIG.CLKOUT3_PHASE_ERROR {87.180} \ + CONFIG.CLKOUT3_REQUESTED_OUT_FREQ {200.000} \ + CONFIG.CLKOUT3_USED {true} \ + CONFIG.MMCM_CLKOUT0_DIVIDE_F {24.000} \ + CONFIG.MMCM_CLKOUT1_DIVIDE {12} \ + CONFIG.MMCM_CLKOUT2_DIVIDE {6} \ + CONFIG.NUM_OUT_CLKS {3} \ + CONFIG.PRIM_SOURCE {Differential_clock_capable_pin} \ + CONFIG.RESET_PORT {reset} \ + CONFIG.RESET_TYPE {ACTIVE_HIGH} \ + CONFIG.USE_LOCKED {false} \ + CONFIG.USE_RESET {false} \ + ] $clk_wiz_0 + + # Create instance: cms_subsystem_0, and set properties + set cms_subsystem_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:cms_subsystem:4.0 cms_subsystem_0 ] + + # Create instance: hbm_infrastructure + create_hier_cell_hbm_infrastructure [current_bd_instance .] hbm_infrastructure + + # Create instance: jungfraujoch_0 + create_hier_cell_jungfraujoch [current_bd_instance .] jungfraujoch_0 + + # Create instance: mac_100g + create_hier_cell_mac_100g [current_bd_instance .] mac_100g + + # Create instance: one, and set properties + set one [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 one ] + + # Create instance: pcie_dma_0 + create_hier_cell_pcie_dma_0 [current_bd_instance .] pcie_dma_0 + + # Create instance: proc_sys_reset_pcie_0, and set properties + set proc_sys_reset_pcie_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 proc_sys_reset_pcie_0 ] + set_property -dict [ list \ + CONFIG.C_EXT_RST_WIDTH {1} \ + ] $proc_sys_reset_pcie_0 + + # Create instance: proc_sys_reset_refclk, and set properties + set proc_sys_reset_refclk [ create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 proc_sys_reset_refclk ] + set_property -dict [ list \ + CONFIG.C_EXT_RST_WIDTH {1} \ + ] $proc_sys_reset_refclk + + # Create instance: smartconnect_0, and set properties + set smartconnect_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_0 ] + set_property -dict [ list \ + CONFIG.NUM_CLKS {4} \ + CONFIG.NUM_MI {6} \ + CONFIG.NUM_SI {1} \ + ] $smartconnect_0 + + # Create instance: xlconcat_irq, and set properties + set xlconcat_irq [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconcat:2.1 xlconcat_irq ] + + # Create instance: zero, and set properties + set zero [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 zero ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + ] $zero + + # Create interface connections + connect_bd_intf_net -intf_net S_AXIS_100G_1 [get_bd_intf_pins jungfraujoch_0/eth_out] [get_bd_intf_pins mac_100g/s_axis_eth_out] + connect_bd_intf_net -intf_net cms_subsystem_0_satellite_uart [get_bd_intf_ports satellite_uart_0] [get_bd_intf_pins cms_subsystem_0/satellite_uart] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p0 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_0] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p0] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p1 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_1] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p1] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p2 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_2] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p2] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p3 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_3] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p3] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p4 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_4] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p4] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p5 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_5] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p5] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p6 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_6] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p6] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p7 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_7] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p7] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p8 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_8] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p8] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p9 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_9] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p9] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p10 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_10] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p10] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p11 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_11] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p11] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axis_c2h_data [get_bd_intf_pins jungfraujoch_0/m_axis_c2h_data] [get_bd_intf_pins pcie_dma_0/s_axis_c2h_data] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axis_c2h_datamover_cmd [get_bd_intf_pins jungfraujoch_0/m_axis_c2h_datamover_cmd] [get_bd_intf_pins pcie_dma_0/s_axis_c2h_cmd] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axis_h2c_datamover_cmd [get_bd_intf_pins jungfraujoch_0/m_axis_h2c_datamover_cmd] [get_bd_intf_pins pcie_dma_0/s_axis_h2c_cmd] + connect_bd_intf_net -intf_net mac_100g_1_M_AXIS_100G [get_bd_intf_pins jungfraujoch_0/eth_in] [get_bd_intf_pins mac_100g/m_axis_eth_in] + connect_bd_intf_net -intf_net mac_100g_1_qsfp0 [get_bd_intf_ports qsfp0] [get_bd_intf_pins mac_100g/qsfp] + connect_bd_intf_net -intf_net pcie0_ref_1 [get_bd_intf_ports pcie0_ref] [get_bd_intf_pins pcie_dma_0/pcie_refclk] + connect_bd_intf_net -intf_net pcie_dma_0_M_AXI [get_bd_intf_pins pcie_dma_0/m_axi_ctrl] [get_bd_intf_pins smartconnect_0/S00_AXI] + connect_bd_intf_net -intf_net pcie_dma_0_pcie0_mgt [get_bd_intf_ports pcie0_mgt] [get_bd_intf_pins pcie_dma_0/pcie_mgt] + connect_bd_intf_net -intf_net qsfp0_ref_1 [get_bd_intf_ports qsfp0_ref] [get_bd_intf_pins mac_100g/qsfp_ref] + connect_bd_intf_net -intf_net ref100_1 [get_bd_intf_ports ref100] [get_bd_intf_pins clk_wiz_0/CLK_IN1_D] + connect_bd_intf_net -intf_net s_axi_1 [get_bd_intf_pins jungfraujoch_0/s_axi] [get_bd_intf_pins smartconnect_0/M00_AXI] + connect_bd_intf_net -intf_net s_axi_2 [get_bd_intf_pins mac_100g/s_axi] [get_bd_intf_pins smartconnect_0/M02_AXI] + connect_bd_intf_net -intf_net s_axis_h2c_data_1 [get_bd_intf_pins jungfraujoch_0/s_axis_h2c_data] [get_bd_intf_pins pcie_dma_0/m_axis_h2c_data] + connect_bd_intf_net -intf_net smartconnect_0_M01_AXI [get_bd_intf_pins smartconnect_0/M01_AXI] [get_bd_intf_pins cms_subsystem_0/s_axi_ctrl] + connect_bd_intf_net -intf_net smartconnect_0_M03_AXI [get_bd_intf_pins axi_quad_spi_0/AXI_LITE] [get_bd_intf_pins smartconnect_0/M03_AXI] + connect_bd_intf_net -intf_net smartconnect_0_M04_AXI [get_bd_intf_pins axi_intc_0/s_axi] [get_bd_intf_pins smartconnect_0/M04_AXI] + connect_bd_intf_net -intf_net smartconnect_0_M05_AXI [get_bd_intf_pins pcie_dma_0/s_axi_dma_ctrl] [get_bd_intf_pins smartconnect_0/M05_AXI] + + # Create port connections + connect_bd_net -net axi_clk_1 [get_bd_pins pcie_dma_0/axi_aclk] [get_bd_pins proc_sys_reset_pcie_0/slowest_sync_clk] [get_bd_pins smartconnect_0/aclk3] + connect_bd_net -net axi_quad_spi_0_ip2intc_irpt [get_bd_pins axi_quad_spi_0/ip2intc_irpt] [get_bd_pins xlconcat_irq/In0] + connect_bd_net -net cms_subsystem_0_interrupt_host [get_bd_pins cms_subsystem_0/interrupt_host] [get_bd_pins xlconcat_irq/In1] + connect_bd_net -net hbm_infrastructure_hbm_temp_trip_1 [get_bd_ports hbm_cattrip] [get_bd_pins cms_subsystem_0/interrupt_hbm_cattrip] [get_bd_pins hbm_infrastructure/hbm_cattrip] + connect_bd_net -net hbm_infrastructure_hbm_temperature_1 [get_bd_pins cms_subsystem_0/hbm_temp_1] [get_bd_pins hbm_infrastructure/hbm_temperature_0] + connect_bd_net -net hbm_infrastructure_hbm_temperature_2 [get_bd_pins cms_subsystem_0/hbm_temp_2] [get_bd_pins hbm_infrastructure/hbm_temperature_1] + connect_bd_net -net mac_100g_eth_busy_n [get_bd_ports qsfp0_led_busy] [get_bd_pins mac_100g/eth_busy_n] + connect_bd_net -net mac_100g_stat_rx_aligned_n [get_bd_ports qsfp0_led_conn] [get_bd_pins mac_100g/stat_rx_aligned_n] + connect_bd_net -net net_refclk50 [get_bd_pins axi_intc_0/s_axi_aclk] [get_bd_pins axi_intc_1/s_axi_aclk] [get_bd_pins axi_quad_spi_0/s_axi_aclk] [get_bd_pins clk_wiz_0/clk_out1] [get_bd_pins cms_subsystem_0/aclk_ctrl] [get_bd_pins proc_sys_reset_refclk/slowest_sync_clk] [get_bd_pins proc_sys_reset_refclk1/slowest_sync_clk] [get_bd_pins smartconnect_0/aclk2] + connect_bd_net -net net_refclk100 [get_bd_pins axi_quad_spi_0/ext_spi_clk] [get_bd_pins clk_wiz_0/clk_out2] [get_bd_pins hbm_infrastructure/refclk100] [get_bd_pins mac_100g/refclk100] [get_bd_pins smartconnect_0/aclk1] + connect_bd_net -net net_refclk200 [get_bd_pins clk_wiz_0/clk_out3] [get_bd_pins hbm_infrastructure/axi_clk] [get_bd_pins jungfraujoch_0/axi_clk] [get_bd_pins mac_100g/axiclk] [get_bd_pins pcie_dma_0/refclk200] [get_bd_pins smartconnect_0/aclk] + connect_bd_net -net one_dout [get_bd_pins one/dout] [get_bd_pins cms_subsystem_0/aresetn_ctrl] [get_bd_pins proc_sys_reset_pcie_0/dcm_locked] [get_bd_pins proc_sys_reset_refclk/dcm_locked] + connect_bd_net -net pcie_dma_0_axi_aresetn [get_bd_pins pcie_dma_0/axi_aresetn] [get_bd_pins proc_sys_reset_pcie_0/ext_reset_in] [get_bd_pins proc_sys_reset_refclk/ext_reset_in] [get_bd_pins smartconnect_0/aresetn] + connect_bd_net -net pcie_perstn_1 [get_bd_ports pcie_perstn] [get_bd_pins pcie_dma_0/pcie_perstn] + connect_bd_net -net proc_sys_reset_pcie_0_interconnect_aresetn [get_bd_pins pcie_dma_0/axi_clk_resetn] [get_bd_pins proc_sys_reset_pcie_0/interconnect_aresetn] + connect_bd_net -net proc_sys_reset_refclk_peripheral_aresetn [get_bd_pins axi_intc_0/s_axi_aresetn] [get_bd_pins axi_quad_spi_0/s_axi_aresetn] [get_bd_pins hbm_infrastructure/axi_resetn] [get_bd_pins jungfraujoch_0/ap_rst_n] [get_bd_pins mac_100g/ap_rst_n] [get_bd_pins proc_sys_reset_refclk/peripheral_aresetn] + connect_bd_net -net resetn_1 [get_bd_pins jungfraujoch_0/axi_rst_n] [get_bd_pins mac_100g/resetn] [get_bd_pins pcie_dma_0/refclk200_resetn] [get_bd_pins proc_sys_reset_refclk/interconnect_aresetn] + connect_bd_net -net satellite_gpio_0_1 [get_bd_ports satellite_gpio_0] [get_bd_pins cms_subsystem_0/satellite_gpio] + connect_bd_net -net usr_irq_req_1 [get_bd_pins axi_intc_0/irq] [get_bd_pins pcie_dma_0/usr_irq_req] + connect_bd_net -net xlconcat_irq_dout [get_bd_pins axi_intc_0/intr] [get_bd_pins axi_intc_1/intr] [get_bd_pins xlconcat_irq/dout] + connect_bd_net -net zero_dout [get_bd_pins axi_quad_spi_0/usrcclkts] [get_bd_pins zero/dout] + + # Create address segments + assign_bd_address -offset 0x00010000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/action_config_0/s_axi/reg0] -force + assign_bd_address -offset 0x00020000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs mac_100g/cmac_usplus_0/s_axi/Reg] -force + assign_bd_address -offset 0x00030000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/mailbox_0/S0_AXI/Reg] -force + assign_bd_address -offset 0x00040000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs axi_quad_spi_0/AXI_LITE/Reg] -force + assign_bd_address -offset 0x00050000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs axi_intc_0/S_AXI/Reg] -force + assign_bd_address -offset 0x00060000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_0/S_AXI/Mem0] -force + assign_bd_address -offset 0x00070000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/axi_firewall_0/S_AXI_CTL/Control] -force + assign_bd_address -offset 0x00090000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/xdma_0/S_AXI_LITE/CTL0] -force + assign_bd_address -offset 0x000C0000 -range 0x00040000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs cms_subsystem_0/s_axi_ctrl/Mem] -force + + assign_bd_address + + set_property -dict [ list \ + CONFIG.CMAC_CORE_SELECT {CMACE4_X0Y3} \ + CONFIG.GT_GROUP_SELECT {X0Y24~X0Y27} \ + ] [get_bd_cells mac_100g/cmac_usplus_0] + + set_property -dict [list \ + CONFIG.MAX_MODULES_FPGA_PARAM {0x00000010} \ + CONFIG.DESIGN_NUMBER {0} \ + ] [get_bd_cells jungfraujoch_0/action_config_0] + + # Restore current instance + current_bd_instance $oldCurInst + + save_bd_design + validate_bd_design + save_bd_design +} +# End of create_root_design() + +################################################################## +# MAIN FLOW +################################################################## + +create_root_design "" diff --git a/fpga/scripts/build_pcie_design_1stream.tcl b/fpga/scripts/build_pcie_design_1stream.tcl new file mode 100644 index 00000000..ecb24369 --- /dev/null +++ b/fpga/scripts/build_pcie_design_1stream.tcl @@ -0,0 +1,65 @@ +## Copyright (2019-2022) Paul Scherrer Institute +## SPDX-License-Identifier: CERN-OHL-S-2.0 + +set origin_dir [file dirname [file normalize [info script]]] + +set project [create_project -force -part "xcu55c-fsvh2892-2L-e" "jfjoch_pcie" "vivado"] +current_project $project + +# Get the directory path for the new project +set proj_dir [get_property directory $project] + +set_property ip_repo_paths [concat [get_property ip_repo_paths [current_project]] "action/ip"] [current_project] + +update_ip_catalog + +# Create 'sources_1' fileset (if not found) +if {[string equal [get_filesets -quiet sources_1] ""]} { + create_fileset -srcset sources_1 +} +set source_set [get_filesets sources_1] + +set hdl_files [list \ + [file normalize "action/hw/hdl/action_config.v"] \ + [file normalize "action/hw/hdl/resetn_sync.v"] \ + [file normalize "action/hw/hdl/check_eth_busy.v"] \ + [file normalize "action/hw/hdl/gen_xdma_descriptor.v"] \ +] + +if { [llength $hdl_files] > 0 } { + add_files -norecurse -fileset $source_set $hdl_files +} + +if {[string equal [get_filesets -quiet constrs_1] ""]} { + create_fileset -constrset constrs_1 +} +set constraint_set [get_filesets constrs_1] + +# Add constraints files +# Put target .xdc as LAST in list +set constraint_files [list \ + [file normalize "$origin_dir/../xdc/pcie_u55c.xdc"] \ + [file normalize "$origin_dir/../xdc/pcie_timing.xdc"] \ +] + +add_files -norecurse -fileset $constraint_set $constraint_files +set_property "target_constrs_file" [lindex $constraint_files 0] $constraint_set + +source $origin_dir/network_stack.tcl +source $origin_dir/hbm_u55c.tcl +source $origin_dir/jfjoch.tcl +source $origin_dir/pcie_dma.tcl +source $origin_dir/mac_100g_pcie.tcl +source $origin_dir/bd_pcie_1stream.tcl >> build_pcie.log + +make_wrapper -files [get_files "vivado/jfjoch_pcie.srcs/sources_1/bd/jfjoch_pcie/jfjoch_pcie.bd"] -top >> make_wrapper.log +add_files -norecurse "vivado/jfjoch_pcie.gen/sources_1/bd/jfjoch_pcie/hdl/jfjoch_pcie_wrapper.v" +set_property top jfjoch_pcie_wrapper [current_fileset] +update_compile_order -fileset sources_1 + +set_property synth_checkpoint_mode None [get_files vivado/jfjoch_pcie.srcs/sources_1/bd/jfjoch_pcie/jfjoch_pcie.bd] +generate_target all [get_files vivado/jfjoch_pcie.srcs/sources_1/bd/jfjoch_pcie/jfjoch_pcie.bd] >> generate_target.log + +set_property flow {Vivado Synthesis 2022} [get_runs synth_1] +set_property strategy Flow_PerfOptimized_high [get_runs synth_1] +set_property strategy Performance_ExploreWithRemap [get_runs impl_1] From f66fc95ecc4b64c592c5765c5c135994dfaf376d Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 15 Aug 2023 14:39:04 +0200 Subject: [PATCH 162/224] FPGA: Use 250 Hz for 100 Gbit/s design + adjust TCL scripts --- .gitlab-ci.yml | 33 ++++++++++++++++++- fpga/CMakeLists.txt | 8 ++--- .../{bd_pcie_1stream.tcl => bd_pcie_100g.tcl} | 20 ++++++----- ...1stream.tcl => build_pcie_design_100g.tcl} | 2 +- 4 files changed, 48 insertions(+), 15 deletions(-) rename fpga/scripts/{bd_pcie_1stream.tcl => bd_pcie_100g.tcl} (98%) rename fpga/scripts/{build_pcie_design_1stream.tcl => build_pcie_design_100g.tcl} (97%) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 1654014a..841a4acf 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -186,7 +186,7 @@ test:x86:xia2.ssx: - xia2.ssx image=writing_test_master.h5 space_group=P43212 unit_cell=78.551,78.551,36.914,90.000,90.000,90.000 -synthesis:vivado_pcie: +synthesis:vivado_pcie_200g: stage: synthesis variables: GIT_SUBMODULE_STRATEGY: recursive @@ -216,3 +216,34 @@ synthesis:vivado_pcie: - cmake3 .. - make action_pcie needs: ["build:x86:gcc", "build:x86:vitis_hls", "test:x86:gcc"] + +synthesis:vivado_pcie_100g: + stage: synthesis + variables: + GIT_SUBMODULE_STRATEGY: recursive + CC: gcc + CXX: g++ + allow_failure: true + rules: + - if: '$CI_PIPELINE_SOURCE == "push"' + changes: + - fpga/hls/* + - fpga/hdl/* + - fpga/scripts/* + - fpga/xdc/* + - common/Definitions.h + tags: + - vivado + artifacts: + paths: + - build/fpga/*.mcs + - build/fpga/*.bit + expire_in: 1 week + script: + - source /opt/grpc/grpc.sh + - source /opt/Xilinx/Vivado/2022.1/settings64.sh + - mkdir -p build + - cd build + - cmake3 .. + - make action_pcie_100g + needs: ["build:x86:gcc", "build:x86:vitis_hls", "test:x86:gcc"] diff --git a/fpga/CMakeLists.txt b/fpga/CMakeLists.txt index 0baf14c3..b2d1d101 100644 --- a/fpga/CMakeLists.txt +++ b/fpga/CMakeLists.txt @@ -25,11 +25,11 @@ IF(VIVADO_HLS AND VIVADO) ADD_CUSTOM_TARGET(action_pcie DEPENDS action/hw/hdl/action_config.v hls COMMAND ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_SOURCE_DIR}/scripts/build_pcie_design.tcl - COMMAND ${CMAKE_COMMAND} -E env FLOW=pcie VIV_PROJECT_PATH=${CMAKE_CURRENT_BINARY_DIR}/vivado/jfjoch_pcie.xpr ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_BINARY_DIR}/action/scripts/synth_and_impl.tcl + COMMAND ${CMAKE_COMMAND} -E env FLOW=pcie_200gbit VIV_PROJECT_PATH=${CMAKE_CURRENT_BINARY_DIR}/vivado/jfjoch_pcie.xpr ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_BINARY_DIR}/action/scripts/synth_and_impl.tcl ) - ADD_CUSTOM_TARGET(action_pcie_1stream DEPENDS action/hw/hdl/action_config.v hls - COMMAND ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_SOURCE_DIR}/scripts/build_pcie_design_1stream.tcl - COMMAND ${CMAKE_COMMAND} -E env FLOW=pcie VIV_PROJECT_PATH=${CMAKE_CURRENT_BINARY_DIR}/vivado/jfjoch_pcie.xpr ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_BINARY_DIR}/action/scripts/synth_and_impl.tcl + ADD_CUSTOM_TARGET(action_pcie_100g DEPENDS action/hw/hdl/action_config.v hls + COMMAND ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_SOURCE_DIR}/scripts/build_pcie_design_100g.tcl + COMMAND ${CMAKE_COMMAND} -E env FLOW=pcie_100gbit VIV_PROJECT_PATH=${CMAKE_CURRENT_BINARY_DIR}/vivado/jfjoch_pcie.xpr ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_BINARY_DIR}/action/scripts/synth_and_impl.tcl ) ENDIF() diff --git a/fpga/scripts/bd_pcie_1stream.tcl b/fpga/scripts/bd_pcie_100g.tcl similarity index 98% rename from fpga/scripts/bd_pcie_1stream.tcl rename to fpga/scripts/bd_pcie_100g.tcl index f3a53246..b802b7a8 100644 --- a/fpga/scripts/bd_pcie_1stream.tcl +++ b/fpga/scripts/bd_pcie_100g.tcl @@ -308,18 +308,20 @@ proc create_root_design { parentCell } { # Create instance: clk_wiz_0, and set properties set clk_wiz_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:clk_wiz:6.0 clk_wiz_0 ] set_property -dict [ list \ - CONFIG.CLKOUT1_JITTER {132.683} \ + CONFIG.CLKOUT1_JITTER {151.636} \ + CONFIG.CLKOUT1_PHASE_ERROR {98.575} \ CONFIG.CLKOUT1_REQUESTED_OUT_FREQ {50.000} \ - CONFIG.CLKOUT2_JITTER {115.831} \ - CONFIG.CLKOUT2_PHASE_ERROR {87.180} \ + CONFIG.CLKOUT2_JITTER {130.958} \ + CONFIG.CLKOUT2_PHASE_ERROR {98.575} \ CONFIG.CLKOUT2_USED {true} \ - CONFIG.CLKOUT3_JITTER {102.086} \ - CONFIG.CLKOUT3_PHASE_ERROR {87.180} \ - CONFIG.CLKOUT3_REQUESTED_OUT_FREQ {200.000} \ + CONFIG.CLKOUT3_JITTER {110.209} \ + CONFIG.CLKOUT3_PHASE_ERROR {98.575} \ + CONFIG.CLKOUT3_REQUESTED_OUT_FREQ {250.000} \ CONFIG.CLKOUT3_USED {true} \ - CONFIG.MMCM_CLKOUT0_DIVIDE_F {24.000} \ - CONFIG.MMCM_CLKOUT1_DIVIDE {12} \ - CONFIG.MMCM_CLKOUT2_DIVIDE {6} \ + CONFIG.MMCM_CLKFBOUT_MULT_F {10.000} \ + CONFIG.MMCM_CLKOUT0_DIVIDE_F {20.000} \ + CONFIG.MMCM_CLKOUT1_DIVIDE {10} \ + CONFIG.MMCM_CLKOUT2_DIVIDE {4} \ CONFIG.NUM_OUT_CLKS {3} \ CONFIG.PRIM_SOURCE {Differential_clock_capable_pin} \ CONFIG.RESET_PORT {reset} \ diff --git a/fpga/scripts/build_pcie_design_1stream.tcl b/fpga/scripts/build_pcie_design_100g.tcl similarity index 97% rename from fpga/scripts/build_pcie_design_1stream.tcl rename to fpga/scripts/build_pcie_design_100g.tcl index ecb24369..2b621efd 100644 --- a/fpga/scripts/build_pcie_design_1stream.tcl +++ b/fpga/scripts/build_pcie_design_100g.tcl @@ -50,7 +50,7 @@ source $origin_dir/hbm_u55c.tcl source $origin_dir/jfjoch.tcl source $origin_dir/pcie_dma.tcl source $origin_dir/mac_100g_pcie.tcl -source $origin_dir/bd_pcie_1stream.tcl >> build_pcie.log +source $origin_dir/bd_pcie_100g.tcl >> build_pcie.log make_wrapper -files [get_files "vivado/jfjoch_pcie.srcs/sources_1/bd/jfjoch_pcie/jfjoch_pcie.bd"] -top >> make_wrapper.log add_files -norecurse "vivado/jfjoch_pcie.gen/sources_1/bd/jfjoch_pcie/hdl/jfjoch_pcie_wrapper.v" From 2a0e4b7d4aba7a41f17462d948e0b9a1344df876 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 15 Aug 2023 17:31:05 +0200 Subject: [PATCH 163/224] FPGA: Use 200 Hz for 100 Gbit/s design --- fpga/scripts/bd_pcie_100g.tcl | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) diff --git a/fpga/scripts/bd_pcie_100g.tcl b/fpga/scripts/bd_pcie_100g.tcl index b802b7a8..f3a53246 100644 --- a/fpga/scripts/bd_pcie_100g.tcl +++ b/fpga/scripts/bd_pcie_100g.tcl @@ -308,20 +308,18 @@ proc create_root_design { parentCell } { # Create instance: clk_wiz_0, and set properties set clk_wiz_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:clk_wiz:6.0 clk_wiz_0 ] set_property -dict [ list \ - CONFIG.CLKOUT1_JITTER {151.636} \ - CONFIG.CLKOUT1_PHASE_ERROR {98.575} \ + CONFIG.CLKOUT1_JITTER {132.683} \ CONFIG.CLKOUT1_REQUESTED_OUT_FREQ {50.000} \ - CONFIG.CLKOUT2_JITTER {130.958} \ - CONFIG.CLKOUT2_PHASE_ERROR {98.575} \ + CONFIG.CLKOUT2_JITTER {115.831} \ + CONFIG.CLKOUT2_PHASE_ERROR {87.180} \ CONFIG.CLKOUT2_USED {true} \ - CONFIG.CLKOUT3_JITTER {110.209} \ - CONFIG.CLKOUT3_PHASE_ERROR {98.575} \ - CONFIG.CLKOUT3_REQUESTED_OUT_FREQ {250.000} \ + CONFIG.CLKOUT3_JITTER {102.086} \ + CONFIG.CLKOUT3_PHASE_ERROR {87.180} \ + CONFIG.CLKOUT3_REQUESTED_OUT_FREQ {200.000} \ CONFIG.CLKOUT3_USED {true} \ - CONFIG.MMCM_CLKFBOUT_MULT_F {10.000} \ - CONFIG.MMCM_CLKOUT0_DIVIDE_F {20.000} \ - CONFIG.MMCM_CLKOUT1_DIVIDE {10} \ - CONFIG.MMCM_CLKOUT2_DIVIDE {4} \ + CONFIG.MMCM_CLKOUT0_DIVIDE_F {24.000} \ + CONFIG.MMCM_CLKOUT1_DIVIDE {12} \ + CONFIG.MMCM_CLKOUT2_DIVIDE {6} \ CONFIG.NUM_OUT_CLKS {3} \ CONFIG.PRIM_SOURCE {Differential_clock_capable_pin} \ CONFIG.RESET_PORT {reset} \ From f61ffc1533d7daf10791e847f08add0091b1f844 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 15 Aug 2023 21:53:32 +0200 Subject: [PATCH 164/224] FPGA: Update README.md --- fpga/README.md | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/fpga/README.md b/fpga/README.md index 907b46e6..30554051 100644 --- a/fpga/README.md +++ b/fpga/README.md @@ -31,7 +31,7 @@ make hls ``` ## Synthesis -Create PCIe bitstream: +Create PCIe bitstream with 2 data stream (200 Gbit/s) and bifurcated 2 x Gen4x8 PCIe design: ``` mkdir build cd build @@ -39,6 +39,14 @@ cmake3 .. make action_pcie ``` +Create PCIe bitstream with 1 data stream (100 Gbit/s) and single Gen4x8 PCIe interface: +``` +mkdir build +cd build +cmake3 .. +make action_pcie_100g +``` + ## Hardware verification To test that FPGA board is working properly without access to a JUNGFRAU detector, you can use `jfjoch_action_test` tool. From caf950f99f51cb5efeda2749eab55650976a9fbc Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 6 Sep 2023 08:19:03 +0200 Subject: [PATCH 165/224] FPGA: Internal packet generator uses external memory to store image, and this memory is accessible via PCIe BAR --- fpga/hls/hls_jfjoch.h | 1 + fpga/hls/internal_packet_generator.cpp | 10 ++---- fpga/scripts/bd_pcie.tcl | 6 ++-- fpga/scripts/bd_pcie_100g.tcl | 4 +-- fpga/scripts/jfjoch.tcl | 49 +++++++++++++++++++++----- receiver/HLSSimulatedDevice.cpp | 9 +++-- receiver/HLSSimulatedDevice.h | 3 +- 7 files changed, 58 insertions(+), 24 deletions(-) diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index 887a25f2..58c3f845 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -115,6 +115,7 @@ void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, uint64_t &counter); void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, hls::stream > &addr_in, hls::stream > &addr_out, + ap_uint<512> module_cache[RAW_MODULE_SIZE * sizeof(uint16_t) / 512 * 8], volatile ap_uint<1> &in_cancel); template ap_uint pack32(ap_int in[32]) { diff --git a/fpga/hls/internal_packet_generator.cpp b/fpga/hls/internal_packet_generator.cpp index 65f0316b..49795a04 100644 --- a/fpga/hls/internal_packet_generator.cpp +++ b/fpga/hls/internal_packet_generator.cpp @@ -6,24 +6,20 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, hls::stream > &addr_in, hls::stream > &addr_out, + ap_uint<512> module_cache[RAW_MODULE_SIZE * sizeof(uint16_t) / 512 * 8], volatile ap_uint<1> &in_cancel) { #pragma HLS INTERFACE ap_ctrl_none port=return #pragma HLS INTERFACE register both axis port=data_in #pragma HLS INTERFACE register both axis port=data_out #pragma HLS INTERFACE register both axis port=addr_in #pragma HLS INTERFACE register both axis port=addr_out +#pragma HLS INTERFACE bram port=module_cache storage_type=ram_1p + #pragma HLS INTERFACE ap_none register port=in_cancel packet_512_t packet_in; packet_512_t packet_out; -#ifdef __SYNTHESIS__ - ap_uint<512> module_cache[RAW_MODULE_SIZE * 2 / 64]; -#pragma HLS RESOURCE variable=module_cache core=RAM_2P_URAM latency=3 -#else - std::vector > module_cache(RAW_MODULE_SIZE * 2 / 64); -#endif - // Read and forward packet #0 data_in >> packet_in; ap_uint<5> modules = ACT_REG_NMODULES(packet_in.data); diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index 7fe56d65..e35a86c0 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -640,19 +640,21 @@ proc create_root_design { parentCell } { assign_bd_address -offset 0x00030000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/mailbox_0/S0_AXI/Reg] -force assign_bd_address -offset 0x00040000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs axi_quad_spi_0/AXI_LITE/Reg] -force assign_bd_address -offset 0x00050000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs axi_intc_0/S_AXI/Reg] -force - assign_bd_address -offset 0x00060000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_0/S_AXI/Mem0] -force + assign_bd_address -offset 0x00060000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_calibration_addr/S_AXI/Mem0] -force assign_bd_address -offset 0x00070000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/axi_firewall_0/S_AXI_CTL/Control] -force assign_bd_address -offset 0x00090000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/xdma_0/S_AXI_LITE/CTL0] -force assign_bd_address -offset 0x000C0000 -range 0x00040000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs cms_subsystem_0/s_axi_ctrl/Mem] -force + assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator/S_AXI/Mem0] -force assign_bd_address -offset 0x00010000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_1/action_config_0/s_axi/reg0] -force assign_bd_address -offset 0x00020000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs mac_100g_1/cmac_usplus_0/s_axi/Reg] -force assign_bd_address -offset 0x00030000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_1/mailbox_0/S0_AXI/Reg] -force assign_bd_address -offset 0x00050000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs axi_intc_1/S_AXI/Reg] -force - assign_bd_address -offset 0x00060000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_1/axi_bram_ctrl_0/S_AXI/Mem0] -force + assign_bd_address -offset 0x00060000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_1/axi_bram_ctrl_calibration_addr/S_AXI/Mem0] -force assign_bd_address -offset 0x00070000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_1/axi_firewall_0/S_AXI_CTL/Control] -force assign_bd_address -offset 0x00090000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_1/xdma_0/S_AXI_LITE/CTL0] -force assign_bd_address -offset 0x000C0000 -range 0x00040000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs cms_subsystem_0/s_axi_ctrl/Mem] -force + assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_1/axi_bram_ctrl_internal_packet_generator/S_AXI/Mem0] -force assign_bd_address -offset 0x00000000 -range 0x00200000 -target_address_space [get_bd_addr_spaces jungfraujoch_1/jf_conversion_0/Data_m_axi_d_hbm_p0] [get_bd_addr_segs gain_uram_0/axi_bram_ctrl_0/S_AXI/Mem0] -force assign_bd_address -offset 0x00000000 -range 0x00200000 -target_address_space [get_bd_addr_spaces jungfraujoch_1/jf_conversion_0/Data_m_axi_d_hbm_p1] [get_bd_addr_segs gain_uram_1/axi_bram_ctrl_0/S_AXI/Mem0] -force diff --git a/fpga/scripts/bd_pcie_100g.tcl b/fpga/scripts/bd_pcie_100g.tcl index f3a53246..f280b43a 100644 --- a/fpga/scripts/bd_pcie_100g.tcl +++ b/fpga/scripts/bd_pcie_100g.tcl @@ -437,11 +437,11 @@ proc create_root_design { parentCell } { assign_bd_address -offset 0x00030000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/mailbox_0/S0_AXI/Reg] -force assign_bd_address -offset 0x00040000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs axi_quad_spi_0/AXI_LITE/Reg] -force assign_bd_address -offset 0x00050000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs axi_intc_0/S_AXI/Reg] -force - assign_bd_address -offset 0x00060000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_0/S_AXI/Mem0] -force + assign_bd_address -offset 0x00060000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_calibration_addr/S_AXI/Mem0] -force assign_bd_address -offset 0x00070000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/axi_firewall_0/S_AXI_CTL/Control] -force assign_bd_address -offset 0x00090000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/xdma_0/S_AXI_LITE/CTL0] -force assign_bd_address -offset 0x000C0000 -range 0x00040000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs cms_subsystem_0/s_axi_ctrl/Mem] -force - + assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator/S_AXI/Mem0] -force assign_bd_address set_property -dict [ list \ diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index 570e7215..cf859ec1 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -91,13 +91,22 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { return 1 } - # Create instance: axi_bram_ctrl_0, and set properties - set axi_bram_ctrl_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_0 ] + # Create instance: axi_bram_ctrl_calibration_addr, and set properties + set axi_bram_ctrl_calibration_addr [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_calibration_addr ] set_property -dict [ list \ CONFIG.PROTOCOL {AXI4LITE} \ CONFIG.READ_LATENCY {1} \ CONFIG.SINGLE_PORT_BRAM {1} \ - ] $axi_bram_ctrl_0 + ] $axi_bram_ctrl_calibration_addr + + # Create instance: axi_bram_ctrl_internal_packet_generator, and set properties + set axi_bram_ctrl_internal_packet_generator [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_internal_packet_generator ] + set_property -dict [ list \ + CONFIG.DATA_WIDTH {512} \ + CONFIG.PROTOCOL {AXI4} \ + CONFIG.READ_LATENCY {1} \ + CONFIG.SINGLE_PORT_BRAM {1} \ + ] $axi_bram_ctrl_internal_packet_generator # Create instance: axis_addr_fifo_0, and set properties set axis_addr_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_addr_fifo_0 ] @@ -303,6 +312,26 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { # Create instance: internal_packet_generator_0, and set properties set internal_packet_generator_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:internal_packet_generator:1.0 internal_packet_generator_0 ] + # Create instance: internal_packet_generator_uram, and set properties + set internal_packet_generator_uram [ create_bd_cell -type ip -vlnv xilinx.com:ip:blk_mem_gen:8.4 internal_packet_generator_uram ] + set_property -dict [ list \ + CONFIG.Assume_Synchronous_Clk {true} \ + CONFIG.EN_SAFETY_CKT {false} \ + CONFIG.Enable_B {Use_ENB_Pin} \ + CONFIG.Memory_Type {True_Dual_Port_RAM} \ + CONFIG.Operating_Mode_A {NO_CHANGE} \ + CONFIG.Operating_Mode_B {NO_CHANGE} \ + CONFIG.PRIM_type_to_Implement {URAM} \ + CONFIG.Port_A_Write_Rate {50} \ + CONFIG.Port_B_Clock {100} \ + CONFIG.Port_B_Enable_Rate {100} \ + CONFIG.Port_B_Write_Rate {50} \ + CONFIG.Read_Width_B {512} \ + CONFIG.Use_Byte_Write_Enable {true} \ + CONFIG.Use_RSTB_Pin {true} \ + CONFIG.Write_Width_B {512} \ + ] $internal_packet_generator_uram + # Create instance: jf_conversion_0, and set properties set jf_conversion_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:jf_conversion:1.0 jf_conversion_0 ] @@ -324,7 +353,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { set smartconnect_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_0 ] set_property -dict [ list \ CONFIG.NUM_CLKS {1} \ - CONFIG.NUM_MI {3} \ + CONFIG.NUM_MI {4} \ CONFIG.NUM_SI {1} \ ] $smartconnect_0 @@ -338,7 +367,8 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net Conn2 [get_bd_intf_pins eth_out] [get_bd_intf_pins network_stack/M00_AXIS] connect_bd_intf_net -intf_net Conn3 [get_bd_intf_pins eth_in] [get_bd_intf_pins network_stack/eth_in] connect_bd_intf_net -intf_net S_AXIS_1 [get_bd_intf_pins s_axis_h2c_data] [get_bd_intf_pins axis_data_fifo_h2c_data/S_AXIS] - connect_bd_intf_net -intf_net axi_bram_ctrl_0_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_0/BRAM_PORTA] [get_bd_intf_pins calibration_addr_bram/BRAM_PORTB] + connect_bd_intf_net -intf_net axi_bram_ctrl_0_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_calibration_addr/BRAM_PORTA] [get_bd_intf_pins calibration_addr_bram/BRAM_PORTB] + connect_bd_intf_net -intf_net axi_bram_ctrl_1_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator/BRAM_PORTA] [get_bd_intf_pins internal_packet_generator_uram/BRAM_PORTB] connect_bd_intf_net -intf_net axis_addr_fifo_0_M_AXIS [get_bd_intf_pins axis_addr_fifo_0/M_AXIS] [get_bd_intf_pins internal_packet_generator_0/addr_in] connect_bd_intf_net -intf_net axis_addr_fifo_2_M_AXIS [get_bd_intf_pins axis_addr_fifo_1/M_AXIS] [get_bd_intf_pins jf_conversion_0/addr_in] connect_bd_intf_net -intf_net axis_addr_fifo_3_M_AXIS [get_bd_intf_pins axis_addr_fifo_2/M_AXIS] [get_bd_intf_pins host_writer_0/addr_in] @@ -370,6 +400,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net host_writer_0_m_axis_completion [get_bd_intf_pins axis_work_completion_fifo_0/S_AXIS] [get_bd_intf_pins host_writer_0/m_axis_completion] connect_bd_intf_net -intf_net internal_packet_generator_0_addr_out [get_bd_intf_pins axis_register_slice_addr_0/S_AXIS] [get_bd_intf_pins internal_packet_generator_0/addr_out] connect_bd_intf_net -intf_net internal_packet_generator_0_data_out [get_bd_intf_pins axis_register_slice_data_0/S_AXIS] [get_bd_intf_pins internal_packet_generator_0/data_out] + connect_bd_intf_net -intf_net internal_packet_generator_0_module_cache_PORTA [get_bd_intf_pins internal_packet_generator_0/module_cache_PORTA] [get_bd_intf_pins internal_packet_generator_uram/BRAM_PORTA] connect_bd_intf_net -intf_net jf_conversion_0_addr_out [get_bd_intf_pins axis_register_slice_addr_1/S_AXIS] [get_bd_intf_pins jf_conversion_0/addr_out] connect_bd_intf_net -intf_net jf_conversion_0_data_out [get_bd_intf_pins axis_data_fifo_4/S_AXIS] [get_bd_intf_pins jf_conversion_0/data_out] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p0 [get_bd_intf_pins m_axi_d_hbm_p0] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p0] @@ -393,7 +424,8 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net s_axi_1 [get_bd_intf_pins s_axi] [get_bd_intf_pins smartconnect_0/S00_AXI] connect_bd_intf_net -intf_net smartconnect_0_M00_AXI [get_bd_intf_pins action_config_0/s_axi] [get_bd_intf_pins smartconnect_0/M00_AXI] connect_bd_intf_net -intf_net smartconnect_0_M01_AXI [get_bd_intf_pins mailbox_0/S0_AXI] [get_bd_intf_pins smartconnect_0/M01_AXI] - connect_bd_intf_net -intf_net smartconnect_0_M02_AXI [get_bd_intf_pins axi_bram_ctrl_0/S_AXI] [get_bd_intf_pins smartconnect_0/M02_AXI] + connect_bd_intf_net -intf_net smartconnect_0_M02_AXI [get_bd_intf_pins axi_bram_ctrl_calibration_addr/S_AXI] [get_bd_intf_pins smartconnect_0/M02_AXI] + connect_bd_intf_net -intf_net smartconnect_0_M03_AXI [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator/S_AXI] [get_bd_intf_pins smartconnect_0/M03_AXI] connect_bd_intf_net -intf_net timer_hbm_0_data_out [get_bd_intf_pins axis_data_fifo_3/S_AXIS] [get_bd_intf_pins timer_hbm_0/data_out] connect_bd_intf_net -intf_net timer_host_0_data_out [get_bd_intf_pins axis_register_slice_data_1/S_AXIS] [get_bd_intf_pins timer_host_0/data_out] @@ -408,7 +440,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net action_config_0_nmodules [get_bd_pins action_config_0/nmodules] [get_bd_pins data_collection_fsm_0/nmodules] connect_bd_net -net action_config_0_nstorage_cells [get_bd_pins action_config_0/nstorage_cells] [get_bd_pins data_collection_fsm_0/nstorage_cells] connect_bd_net -net action_config_0_one_over_energy [get_bd_pins action_config_0/one_over_energy] [get_bd_pins data_collection_fsm_0/one_over_energy] - connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_0/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins internal_packet_generator_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins timer_hbm_0/ap_clk] [get_bd_pins timer_host_0/ap_clk] + connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins internal_packet_generator_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins timer_hbm_0/ap_clk] [get_bd_pins timer_host_0/ap_clk] connect_bd_net -net axis_addr_fifo_2_almost_empty [get_bd_pins action_config_0/calib_addr_fifo_empty] [get_bd_pins axis_addr_fifo_1/almost_empty] connect_bd_net -net axis_addr_fifo_2_almost_full [get_bd_pins action_config_0/calib_addr_fifo_full] [get_bd_pins axis_addr_fifo_1/almost_full] connect_bd_net -net axis_addr_fifo_4_almost_empty [get_bd_pins action_config_0/last_addr_fifo_empty] [get_bd_pins axis_addr_fifo_2/almost_empty] @@ -431,7 +463,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net host_writer_0_err_reg_V [get_bd_pins action_config_0/host_writer_err] [get_bd_pins host_writer_0/err_reg] connect_bd_net -net host_writer_0_err_reg_V_ap_vld [get_bd_pins action_config_0/host_writer_err_valid] [get_bd_pins host_writer_0/err_reg_ap_vld] connect_bd_net -net host_writer_0_idle [get_bd_pins action_config_0/host_writer_idle] [get_bd_pins host_writer_0/idle] - connect_bd_net -net host_writer_0_packets_processed [get_bd_pins action_config_0/packets_processed] [get_bd_pins host_writer_0/packets_processed] connect_bd_net -net host_writer_0_packets_processed_ap_vld [get_bd_pins action_config_0/packets_processed_valid] [get_bd_pins host_writer_0/packets_processed_ap_vld] connect_bd_net -net mailbox_0_Interrupt_0 [get_bd_pins action_config_0/mailbox_interrupt_0] [get_bd_pins mailbox_0/Interrupt_0] @@ -449,7 +480,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net network_stack_packets_udp [get_bd_pins action_config_0/packets_udp] [get_bd_pins network_stack/packets_udp] connect_bd_net -net network_stack_packets_udp_ap_vld [get_bd_pins action_config_0/packets_udp_valid] [get_bd_pins network_stack/packets_udp_ap_vld] connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_addr_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_5/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_0/aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_0/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] - connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_0/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins internal_packet_generator_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins timer_hbm_0/ap_rst_n] [get_bd_pins timer_host_0/ap_rst_n] + connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins internal_packet_generator_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins timer_hbm_0/ap_rst_n] [get_bd_pins timer_host_0/ap_rst_n] connect_bd_net -net timer_hbm_0_counter [get_bd_pins action_config_0/stalls_hbm] [get_bd_pins timer_hbm_0/counter] connect_bd_net -net timer_hbm_0_counter_ap_vld [get_bd_pins action_config_0/stalls_hbm_valid] [get_bd_pins timer_hbm_0/counter_ap_vld] connect_bd_net -net timer_host_0_counter [get_bd_pins action_config_0/stalls_host] [get_bd_pins timer_host_0/counter] diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index 15a66f10..123ff56b 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -41,7 +41,7 @@ HLSSimulatedDevice::HLSSimulatedDevice(uint16_t data_stream, size_t in_frame_buf MapBuffersStandard(in_frame_buffer_size_modules, (3 + 3 * 16) * max_modules + 2, numa_node); - auto in_mem_location32 = (uint32_t *) in_mem_location; + auto in_mem_location32 = (uint32_t *) calibration_addr_bram; for (int i = 0; i < max_modules * (3 + 3 * 16) + 2; i++) { in_mem_location32[2 * i ] = ((uint64_t) buffer_device[i]) & UINT32_MAX; @@ -51,6 +51,8 @@ HLSSimulatedDevice::HLSSimulatedDevice(uint16_t data_stream, size_t in_frame_buf for (auto &i: hbm_memory) // i.resize(SIZE_OF_HBM_BLOCK_IN_BYTES); i.resize(32*1024*1024); // only 32 MiB instead of 256 MiB per HBM interface (should be more than enough for all the tests anyway) + + internal_packet_generator_uram.resize(RAW_MODULE_SIZE * sizeof(uint16_t) / 512 * 8); } void HLSSimulatedDevice::CreateFinalPacket(const DiffractionExperiment& experiment) { @@ -286,10 +288,11 @@ void HLSSimulatedDevice::HLSMainThread() { // Load external calibration hls_cores.emplace_back([&] { load_calibration(raw1, raw2, datamover_in.GetCtrlStream(), datamover_in.GetDataStream(), - in_mem_location); }); + calibration_addr_bram); }); // Generate internal packets - hls_cores.emplace_back([&] { internal_packet_generator(raw2, raw3, addr1, addr2, cancel_data_collection); }); + hls_cores.emplace_back([&] { internal_packet_generator(raw2, raw3, addr1, addr2, internal_packet_generator_uram.data(), + cancel_data_collection); }); // Timer procedure - count how many times pedestal_corr/gain_corr is not accepting input (to help track down latency issues) hls_cores.emplace_back([&] { timer_hbm(raw3, raw4, counter_hbm); }); diff --git a/receiver/HLSSimulatedDevice.h b/receiver/HLSSimulatedDevice.h index 770fda6c..4a9de4bd 100644 --- a/receiver/HLSSimulatedDevice.h +++ b/receiver/HLSSimulatedDevice.h @@ -22,6 +22,7 @@ class HLSSimulatedDevice : public FPGAAcquisitionDevice { volatile bool idle; std::vector hbm_memory[10]; + std::vector> internal_packet_generator_uram; hls::stream > work_request_stream; hls::stream > completion_stream; @@ -33,7 +34,7 @@ class HLSSimulatedDevice : public FPGAAcquisitionDevice { ap_uint<1> cancel_data_collection; volatile ap_uint<1> host_writer_idle; - uint64_t in_mem_location[LOAD_CALIBRATION_BRAM_SIZE]; + uint64_t calibration_addr_bram[LOAD_CALIBRATION_BRAM_SIZE]; void HW_ReadActionRegister(ActionConfig *job) override; void HW_WriteActionRegister(const ActionConfig *job) override; From 7904a03e4b3370f77e7e1746a1a2d2971d837064 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 6 Sep 2023 09:19:39 +0200 Subject: [PATCH 166/224] PCIe driver: add functions to load/save internal packet generator memory --- fpga/pcie_driver/jfjoch_drv.h | 17 ++++++---- fpga/pcie_driver/jfjoch_function.c | 8 +++++ fpga/pcie_driver/jfjoch_ioctl.c | 23 +++++++++++++ fpga/pcie_driver/jfjoch_ioctl.h | 2 ++ receiver/CMakeLists.txt | 4 +++ receiver/PCIExpressDevice.cpp | 6 ++++ receiver/PCIExpressDevice.h | 1 + receiver/jfjoch_pcie_read_int_packet_gen.cpp | 35 ++++++++++++++++++++ 8 files changed, 90 insertions(+), 6 deletions(-) create mode 100644 receiver/jfjoch_pcie_read_int_packet_gen.cpp diff --git a/fpga/pcie_driver/jfjoch_drv.h b/fpga/pcie_driver/jfjoch_drv.h index ee6c443c..181e5717 100644 --- a/fpga/pcie_driver/jfjoch_drv.h +++ b/fpga/pcie_driver/jfjoch_drv.h @@ -35,12 +35,13 @@ // Offset for BAR #0 for action configuration -#define ACTION_CONFIG_OFFSET (0x10000) -#define MAILBOX_OFFSET (0x30000) -#define CALIB_BRAM_OFFSET (0x60000) -#define CMS_OFFSET (0xC0000) -#define CMAC_OFFSET (0x20000) -#define PCIE_OFFSET (0x90000) +#define ACTION_CONFIG_OFFSET (0x010000) +#define MAILBOX_OFFSET (0x030000) +#define CALIB_BRAM_OFFSET (0x060000) +#define CMS_OFFSET (0x0C0000) +#define CMAC_OFFSET (0x020000) +#define PCIE_OFFSET (0x090000) +#define INT_PKT_GEN_OFFSET (0x100000) #define ADDR_CMS_CONTROL_REG 0x028018 #define ADDR_CMS_MB_RESETN_REG 0x020000 @@ -52,6 +53,8 @@ #define ADDR_CMS_HBM_TEMP1_INS_REG 0x028268 // in C #define ADDR_CMS_HBM_TEMP2_INS_REG 0x0282BC // in C +#define INT_PKT_GEN_FRAME_SIZE_BYTES (512U*1024U*2UL) + struct jfjoch_buf { dma_addr_t dma_address; void *kernel_address; @@ -100,6 +103,8 @@ void jfjoch_set_mac_addr(struct jfjoch_drvdata *drvdata, u64 *mac_addr); void jfjoch_get_mac_addr(struct jfjoch_drvdata *drvdata, u64 *mac_addr); void jfjoch_set_ipv4_addr(struct jfjoch_drvdata *drvdata, const u32 *addr); void jfjoch_get_ipv4_addr(struct jfjoch_drvdata *drvdata, u32 *addr); +void jfjoch_load_int_pkt_gen(struct jfjoch_drvdata *drvdata, char* output); +void jfjoch_save_int_pkt_gen(struct jfjoch_drvdata *drvdata, const char* input); u64 jfjoch_read_mac_addr(struct jfjoch_drvdata *drvdata); diff --git a/fpga/pcie_driver/jfjoch_function.c b/fpga/pcie_driver/jfjoch_function.c index 86475a8e..743afa96 100644 --- a/fpga/pcie_driver/jfjoch_function.c +++ b/fpga/pcie_driver/jfjoch_function.c @@ -85,6 +85,14 @@ int jfjoch_send_wr(struct jfjoch_drvdata *drvdata, u32 handle) { return 0; } +void jfjoch_load_int_pkt_gen(struct jfjoch_drvdata *drvdata, char* output) { + memcpy_fromio(output, drvdata->bar0 + INT_PKT_GEN_OFFSET, INT_PKT_GEN_FRAME_SIZE_BYTES); +} + +void jfjoch_save_int_pkt_gen(struct jfjoch_drvdata *drvdata, const char* input) { + memcpy_toio(drvdata->bar0 + INT_PKT_GEN_OFFSET, input, INT_PKT_GEN_FRAME_SIZE_BYTES); +} + int jfjoch_read_wc(struct jfjoch_drvdata *drvdata, u32 *output) { u32 rta; int i; diff --git a/fpga/pcie_driver/jfjoch_ioctl.c b/fpga/pcie_driver/jfjoch_ioctl.c index ac899287..bad7b9cc 100644 --- a/fpga/pcie_driver/jfjoch_ioctl.c +++ b/fpga/pcie_driver/jfjoch_ioctl.c @@ -11,6 +11,7 @@ long jfjoch_cdev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { struct ActionEnvParams env_params; u32 exchange[16]; int err; + void *tmp = NULL; switch (cmd) { case IOCTL_JFJOCH_START: @@ -96,6 +97,28 @@ long jfjoch_cdev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { case IOCTL_JFJOCH_DEFAULT_MAC: jfjoch_read_mac_addr(drvdata); return 0; + case IOCTL_JFJOCH_SET_INT_PKT: + tmp = vmalloc(INT_PKT_GEN_FRAME_SIZE_BYTES); + if (tmp == NULL) + return -ENOMEM; + if (copy_from_user(tmp, (char *) arg, INT_PKT_GEN_FRAME_SIZE_BYTES) != 0) { + vfree(tmp); + return -EFAULT; + } + jfjoch_save_int_pkt_gen(drvdata, tmp); + vfree(tmp); + return 0; + case IOCTL_JFJOCH_GET_INT_PKT: + tmp = vmalloc(INT_PKT_GEN_FRAME_SIZE_BYTES); + if (tmp == NULL) + return -ENOMEM; + jfjoch_load_int_pkt_gen(drvdata, tmp); + if (copy_to_user((char *) arg, tmp, INT_PKT_GEN_FRAME_SIZE_BYTES) != 0) { + vfree(tmp); + return -EFAULT; + } + vfree(tmp); + return 0; default: return -ENOTTY; } diff --git a/fpga/pcie_driver/jfjoch_ioctl.h b/fpga/pcie_driver/jfjoch_ioctl.h index 1fcdef6a..c85f70ef 100644 --- a/fpga/pcie_driver/jfjoch_ioctl.h +++ b/fpga/pcie_driver/jfjoch_ioctl.h @@ -33,5 +33,7 @@ #define IOCTL_JFJOCH_DEFAULT_MAC _IO (IOCTL_JFJOCH_MAGIC, 16) #define IOCTL_JFJOCH_SET_IPV4 _IOW(IOCTL_JFJOCH_MAGIC, 17, uint32_t) #define IOCTL_JFJOCH_GET_IPV4 _IOR(IOCTL_JFJOCH_MAGIC, 18, uint32_t) +#define IOCTL_JFJOCH_SET_INT_PKT _IOW(IOCTL_JFJOCH_MAGIC, 19, char *) +#define IOCTL_JFJOCH_GET_INT_PKT _IOR(IOCTL_JFJOCH_MAGIC, 20, char *) #endif //JUNGFRAUJOCH_JFJOCH_IOCTL_H diff --git a/receiver/CMakeLists.txt b/receiver/CMakeLists.txt index 3f0f2feb..999b8d4a 100644 --- a/receiver/CMakeLists.txt +++ b/receiver/CMakeLists.txt @@ -45,6 +45,10 @@ ADD_EXECUTABLE(jfjoch_pcie_clear_net_counters jfjoch_pcie_clear_net_counters.cpp TARGET_LINK_LIBRARIES(jfjoch_pcie_clear_net_counters JungfraujochHost) INSTALL(TARGETS jfjoch_pcie_clear_net_counters RUNTIME) +ADD_EXECUTABLE(jfjoch_pcie_read_int_packet_gen jfjoch_pcie_read_int_packet_gen.cpp) +TARGET_LINK_LIBRARIES(jfjoch_pcie_read_int_packet_gen JungfraujochHost) +INSTALL(TARGETS jfjoch_pcie_read_int_packet_gen RUNTIME) + ADD_LIBRARY(JFJochReceiver STATIC JFJochReceiverService.cpp JFJochReceiverService.h JFJochReceiverTest.cpp JFJochReceiverTest.h diff --git a/receiver/PCIExpressDevice.cpp b/receiver/PCIExpressDevice.cpp index aa96416e..89516472 100644 --- a/receiver/PCIExpressDevice.cpp +++ b/receiver/PCIExpressDevice.cpp @@ -201,3 +201,9 @@ std::string PCIExpressDevice::GetIPv4Address() const { "Failed getting MAC address", errno); return IPv4AddressToStr(tmp); } + +void PCIExpressDevice::HW_ReadInternalPacketGen(uint16_t *tmp) const { + if (ioctl(fd, IOCTL_JFJOCH_GET_INT_PKT, tmp) != 0) + throw JFJochException(JFJochExceptionCategory::PCIeError, + "Failed getting internal packet generator frame", errno); +} diff --git a/receiver/PCIExpressDevice.h b/receiver/PCIExpressDevice.h index c87e40d1..84ba403a 100644 --- a/receiver/PCIExpressDevice.h +++ b/receiver/PCIExpressDevice.h @@ -30,6 +30,7 @@ public: void Cancel() override; void HW_GetStatus(ActionStatus *status) const override; void HW_GetEnvParams(ActionEnvParams *status) const override; + void HW_ReadInternalPacketGen(uint16_t *tmp) const; uint32_t GetNumKernelBuffers() const; int32_t GetNUMANode() const override; diff --git a/receiver/jfjoch_pcie_read_int_packet_gen.cpp b/receiver/jfjoch_pcie_read_int_packet_gen.cpp new file mode 100644 index 00000000..c8130fe6 --- /dev/null +++ b/receiver/jfjoch_pcie_read_int_packet_gen.cpp @@ -0,0 +1,35 @@ +// Copyright (2019-2022) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#include + +#include "../common/JFJochException.h" +#include "PCIExpressDevice.h" +#include "../common/Logger.h" +#include + +int main(int argc, char **argv) { + Logger logger("jfjoch_pcie_read_int_packet_gen"); + + if (argc != 2) { + logger.Error("Usage: ./jfjoch_pcie_read_int_packet_gen "); + exit(EXIT_FAILURE); + } + logger.Info("Device {}", argv[1]); + std::cout << std::endl; + try { + PCIExpressDevice test(argv[1], 0); + + std::vector data(RAW_MODULE_SIZE*2); + + test.HW_ReadInternalPacketGen((uint16_t *) data.data()); + + std::ofstream file("out.bin", std::ios::binary); + file.write((char *) data.data(), data.size()); + file.close(); + + logger.Info("Done"); + } catch (const JFJochException &e) { + logger.ErrorException(e); + } +} \ No newline at end of file From 3aeb3e09ee55970cf80c46f86b73329c4405ba67 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 6 Sep 2023 11:57:16 +0200 Subject: [PATCH 167/224] FPGA: Do not load internal packet generator frame via DMA --- common/Definitions.h | 2 +- fpga/hls/internal_packet_generator.cpp | 7 ------- fpga/hls/load_calibration.cpp | 2 -- receiver/FPGAAcquisitionDevice.cpp | 3 --- receiver/FPGAAcquisitionDevice.h | 2 +- receiver/HLSSimulatedDevice.cpp | 5 ++--- receiver/HLSSimulatedDevice.h | 1 - receiver/PCIExpressDevice.cpp | 4 ++++ 8 files changed, 8 insertions(+), 18 deletions(-) diff --git a/common/Definitions.h b/common/Definitions.h index 549bf901..8951a8c2 100644 --- a/common/Definitions.h +++ b/common/Definitions.h @@ -50,7 +50,7 @@ // For FPGA #define ACTION_TYPE 0x52324158 -#define RELEASE_LEVEL 0x0038 +#define RELEASE_LEVEL 0x0039 #define MODE_CONV 0x0001L #define MODE_INTERNAL_PACKET_GEN 0x0002L diff --git a/fpga/hls/internal_packet_generator.cpp b/fpga/hls/internal_packet_generator.cpp index 49795a04..c7e82c81 100644 --- a/fpga/hls/internal_packet_generator.cpp +++ b/fpga/hls/internal_packet_generator.cpp @@ -34,13 +34,6 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, addr_in >> addr; addr_out << addr; - save_frame: - for (int i = 0; i < RAW_MODULE_SIZE * 2 / 64; i++) { -#pragma HLS PIPELINE II=1 - data_in >> packet_in; - module_cache[i] = packet_in.data; - } - if (conversion) { forward_gain: for (int i = 0; i < modules * (3 + storage_cells * 3) * (RAW_MODULE_SIZE * 2 / 64); i++) { diff --git a/fpga/hls/load_calibration.cpp b/fpga/hls/load_calibration.cpp index 6f99f169..5fda39a6 100644 --- a/fpga/hls/load_calibration.cpp +++ b/fpga/hls/load_calibration.cpp @@ -50,8 +50,6 @@ void load_calibration(STREAM_512 &data_in, STREAM_512 &data_out, ap_uint<1> conversion = (ACT_REG_MODE(packet_in.data) & MODE_CONV) ? 1 : 0; data_out << packet_in; - load_data(data_out, datamover_in_cmd, host_memory_in, in_mem_location[0], RAW_MODULE_SIZE * sizeof(int16_t) / 64); - if (conversion) { read_gain: for (int c = 0; c < 3; c++) { diff --git a/receiver/FPGAAcquisitionDevice.cpp b/receiver/FPGAAcquisitionDevice.cpp index 52f8beb0..281d966f 100644 --- a/receiver/FPGAAcquisitionDevice.cpp +++ b/receiver/FPGAAcquisitionDevice.cpp @@ -132,9 +132,6 @@ void FPGAAcquisitionDevice::Start(const DiffractionExperiment &experiment) { HW_WriteActionRegister(&cfg_in); HW_ReadActionRegister(&cfg_out); - if (experiment.IsUsingInternalPacketGen()) - memcpy(buffer_device[0], internal_pkt_gen_frame.data(), RAW_MODULE_SIZE * sizeof(uint16_t)); - if (cfg_out.mode != cfg_in.mode) throw JFJochException(JFJochExceptionCategory::AcquisitionDeviceError, "Mismatch between expected and actual values of configuration registers (mode)"); diff --git a/receiver/FPGAAcquisitionDevice.h b/receiver/FPGAAcquisitionDevice.h index dafbac36..9605245a 100644 --- a/receiver/FPGAAcquisitionDevice.h +++ b/receiver/FPGAAcquisitionDevice.h @@ -10,7 +10,6 @@ class FPGAAcquisitionDevice : public AcquisitionDevice { uint16_t data_collection_id = 0; bool fpga_non_blocking_mode = true; - std::vector internal_pkt_gen_frame; virtual void FPGA_StartAction() = 0; virtual void FPGA_EndAction() = 0; @@ -34,6 +33,7 @@ class FPGAAcquisitionDevice : public AcquisitionDevice { void StartSendingWorkRequests() override; void Start(const DiffractionExperiment &experiment) override; protected: + std::vector internal_pkt_gen_frame; explicit FPGAAcquisitionDevice(uint16_t data_stream); virtual void HW_GetStatus(ActionStatus *status) const = 0; virtual void HW_GetEnvParams(ActionEnvParams *status) const { diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index 123ff56b..86507c7f 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -51,8 +51,6 @@ HLSSimulatedDevice::HLSSimulatedDevice(uint16_t data_stream, size_t in_frame_buf for (auto &i: hbm_memory) // i.resize(SIZE_OF_HBM_BLOCK_IN_BYTES); i.resize(32*1024*1024); // only 32 MiB instead of 256 MiB per HBM interface (should be more than enough for all the tests anyway) - - internal_packet_generator_uram.resize(RAW_MODULE_SIZE * sizeof(uint16_t) / 512 * 8); } void HLSSimulatedDevice::CreateFinalPacket(const DiffractionExperiment& experiment) { @@ -291,7 +289,8 @@ void HLSSimulatedDevice::HLSMainThread() { calibration_addr_bram); }); // Generate internal packets - hls_cores.emplace_back([&] { internal_packet_generator(raw2, raw3, addr1, addr2, internal_packet_generator_uram.data(), + hls_cores.emplace_back([&] { internal_packet_generator(raw2, raw3, addr1, addr2, + reinterpret_cast *>(internal_pkt_gen_frame.data()), cancel_data_collection); }); // Timer procedure - count how many times pedestal_corr/gain_corr is not accepting input (to help track down latency issues) diff --git a/receiver/HLSSimulatedDevice.h b/receiver/HLSSimulatedDevice.h index 4a9de4bd..b2bf4e39 100644 --- a/receiver/HLSSimulatedDevice.h +++ b/receiver/HLSSimulatedDevice.h @@ -22,7 +22,6 @@ class HLSSimulatedDevice : public FPGAAcquisitionDevice { volatile bool idle; std::vector hbm_memory[10]; - std::vector> internal_packet_generator_uram; hls::stream > work_request_stream; hls::stream > completion_stream; diff --git a/receiver/PCIExpressDevice.cpp b/receiver/PCIExpressDevice.cpp index 89516472..5daebf42 100644 --- a/receiver/PCIExpressDevice.cpp +++ b/receiver/PCIExpressDevice.cpp @@ -93,6 +93,10 @@ bool PCIExpressDevice::HW_SendWorkRequest(uint32_t handle) { } void PCIExpressDevice::FPGA_StartAction() { + if (ioctl(fd, IOCTL_JFJOCH_SET_INT_PKT, internal_pkt_gen_frame.data()) != 0) + throw JFJochException(JFJochExceptionCategory::PCIeError, + "Failed loading internal packet generator frame", errno); + if (ioctl(fd, IOCTL_JFJOCH_START) != 0) throw JFJochException(JFJochExceptionCategory::PCIeError, "Failed starting action", errno); From da045c023b710eb9d787923b02bc63de1d3b7126 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 6 Sep 2023 12:35:44 +0200 Subject: [PATCH 168/224] Tests are adjusted to use blocking FPGA mode --- tests/FPGAIntegrationTest.cpp | 5 +++-- tests/JFJochReceiverIntegrationTest.cpp | 23 +++++++++++++++++------ 2 files changed, 20 insertions(+), 8 deletions(-) diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index 609a4951..7815f244 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -77,7 +77,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_custom_frame", "[FPGA][Ful HLSSimulatedDevice test(0, 64); test.SetCustomInternalGeneratorFrame(test_frame); - test.SetFPGANonBlockingMode(true); + test.SetFPGANonBlockingMode(false); REQUIRE_NOTHROW(test.StartAction(x)); REQUIRE_NOTHROW(test.WaitForActionComplete()); @@ -119,7 +119,7 @@ TEST_CASE("HLS_C_Simulation_check_raw", "[FPGA][Full]") { HLSSimulatedDevice test(0, 64); test.CreatePackets(x, 1, 5, 0, raw_frames.data(), true); test.CreateFinalPacket(x); - + test.SetFPGANonBlockingMode(false); REQUIRE_NOTHROW(test.StartAction(x)); REQUIRE_NOTHROW(test.WaitForActionComplete()); @@ -253,6 +253,7 @@ TEST_CASE("HLS_C_Simulation_check_lost_frame_raw", "[FPGA][Full]") { test.CreatePacketJF(x, 1, 0, 0, data, false); test.CreateFinalPacket(x); + test.SetFPGANonBlockingMode(false); REQUIRE_NOTHROW(test.StartAction(x)); REQUIRE_NOTHROW(test.WaitForActionComplete()); diff --git a/tests/JFJochReceiverIntegrationTest.cpp b/tests/JFJochReceiverIntegrationTest.cpp index 1d86bf77..c3868160 100644 --- a/tests/JFJochReceiverIntegrationTest.cpp +++ b/tests/JFJochReceiverIntegrationTest.cpp @@ -20,8 +20,9 @@ TEST_CASE("JFJochReceiverTest_Raw", "[JFJochReceiver]") { std::vector> aq_devices; for (int i = 0; i < x.GetDataStreamsNum(); i++) { - AcquisitionDevice *test; + HLSSimulatedDevice *test; test = new HLSSimulatedDevice(i, 64); + test->SetFPGANonBlockingMode(false); aq_devices.emplace_back(test); } @@ -51,9 +52,10 @@ TEST_CASE("JFJochReceiverTest_Conversion", "[JFJochReceiver]") { std::vector> aq_devices; for (int i = 0; i < x.GetDataStreamsNum(); i++) { - AcquisitionDevice *test; + HLSSimulatedDevice *test; test = new HLSSimulatedDevice(i, 64); test->EnableLogging(&logger); + test->SetFPGANonBlockingMode(false); aq_devices.emplace_back(test); } @@ -79,8 +81,9 @@ TEST_CASE("JFJochReceiverTest_Conversion_Bin2x2", "[JFJochReceiver]") { std::vector> aq_devices; for (int i = 0; i < x.GetDataStreamsNum(); i++) { - AcquisitionDevice *test; + HLSSimulatedDevice *test; test = new HLSSimulatedDevice(i, 64); + test->SetFPGANonBlockingMode(false); test->EnableLogging(&logger); aq_devices.emplace_back(test); } @@ -107,9 +110,10 @@ TEST_CASE("JFJochReceiverTest_ConversionOnCPU", "[JFJochReceiver]") { std::vector> aq_devices; for (int i = 0; i < x.GetDataStreamsNum(); i++) { - AcquisitionDevice *test; + HLSSimulatedDevice *test; test = new HLSSimulatedDevice(i, 64); test->EnableLogging(&logger); + test->SetFPGANonBlockingMode(false); aq_devices.emplace_back(test); } @@ -136,9 +140,10 @@ TEST_CASE("JFJochReceiverTest_ConversionOnCPU_Bin2x2", "[JFJochReceiver]") { std::vector> aq_devices; for (int i = 0; i < x.GetDataStreamsNum(); i++) { - AcquisitionDevice *test; + HLSSimulatedDevice *test; test = new HLSSimulatedDevice(i, 64); test->EnableLogging(&logger); + test->SetFPGANonBlockingMode(false); aq_devices.emplace_back(test); } @@ -167,9 +172,10 @@ TEST_CASE("JFJochReceiverTest_Conversion_StorageCell", "[JFJochReceiver]") { std::vector> aq_devices; for (int i = 0; i < x.GetDataStreamsNum(); i++) { - AcquisitionDevice *test; + HLSSimulatedDevice *test; test = new HLSSimulatedDevice(i, 64); test->EnableLogging(&logger); + test->SetFPGANonBlockingMode(false); aq_devices.emplace_back(test); } @@ -214,6 +220,7 @@ TEST_CASE("JFJochReceiverTest_PedestalG1", "[JFJochReceiver]") { test = new HLSSimulatedDevice(i, 64); test->CreatePackets(x, 1, nframes, 0, pedestal_in.data(), false); test->CreateFinalPacket(x); + test->SetFPGANonBlockingMode(false); aq_devices.emplace_back(test); } @@ -282,6 +289,7 @@ TEST_CASE("JFJochReceiverTest_PedestalG2_storage_cell", "[JFJochReceiver]") { pedestal_in.data() + j * RAW_MODULE_SIZE, false); } test->CreateFinalPacket(x); + test->SetFPGANonBlockingMode(false); aq_devices.emplace_back(test); } @@ -336,6 +344,7 @@ TEST_CASE("JFJochReceiverTest_PedestalG0", "[JFJochReceiver]") { test = new HLSSimulatedDevice(i, 64); test->CreatePackets(x, 1, nframes, 0, pedestal_in.data(), false); test->CreateFinalPacket(x); + test->SetFPGANonBlockingMode(false); aq_devices.emplace_back(test); } @@ -388,6 +397,7 @@ TEST_CASE("JFJochReceiverTest_PedestalG0_StorageCell", "[JFJochReceiver]") { test->CreatePackets(x, i*4+4, 1, 0, pedestal_in_3.data(), false); } test->CreateFinalPacket(x); + test->SetFPGANonBlockingMode(false); aq_devices.emplace_back(test); Logger logger("JFJochReceiverTest_PedestalG0_StorageCell"); @@ -469,6 +479,7 @@ TEST_CASE("JFJochReceiverTest_PacketLost_Raw", "[JFJochReceiver]") { test->CreatePackets(x, 4, 1, 1, frame_in.data(), false); test->CreateFinalPacket(x); + test->SetFPGANonBlockingMode(false); aq_devices.emplace_back(test); } Logger logger("JFJochReceiverTest_PacketLost_Raw"); From 1333ce9b294de237b843753333de024af6f7a31a Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 6 Sep 2023 12:36:14 +0200 Subject: [PATCH 169/224] FPGA: trigger synthesis --- fpga/hls/load_calibration.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fpga/hls/load_calibration.cpp b/fpga/hls/load_calibration.cpp index 5fda39a6..40598361 100644 --- a/fpga/hls/load_calibration.cpp +++ b/fpga/hls/load_calibration.cpp @@ -80,4 +80,4 @@ void load_calibration(STREAM_512 &data_in, STREAM_512 &data_out, data_in >> packet_in; } data_out << packet_in; -} \ No newline at end of file +} From 0434207882cc16d475cf155b21b8d477c0def36d Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 6 Sep 2023 18:16:44 +0200 Subject: [PATCH 170/224] FPGA: use full AXI for internal packet generator --- fpga/hls/internal_packet_generator.cpp | 7 +++--- fpga/scripts/bd_pcie.tcl | 4 +++- fpga/scripts/bd_pcie_100g.tcl | 3 ++- fpga/scripts/jfjoch.tcl | 30 +++++++++++++++++++------- 4 files changed, 31 insertions(+), 13 deletions(-) diff --git a/fpga/hls/internal_packet_generator.cpp b/fpga/hls/internal_packet_generator.cpp index c7e82c81..6f280deb 100644 --- a/fpga/hls/internal_packet_generator.cpp +++ b/fpga/hls/internal_packet_generator.cpp @@ -6,14 +6,15 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, hls::stream > &addr_in, hls::stream > &addr_out, - ap_uint<512> module_cache[RAW_MODULE_SIZE * sizeof(uint16_t) / 512 * 8], + ap_uint<512> *frame, volatile ap_uint<1> &in_cancel) { #pragma HLS INTERFACE ap_ctrl_none port=return #pragma HLS INTERFACE register both axis port=data_in #pragma HLS INTERFACE register both axis port=data_out #pragma HLS INTERFACE register both axis port=addr_in #pragma HLS INTERFACE register both axis port=addr_out -#pragma HLS INTERFACE bram port=module_cache storage_type=ram_1p +#pragma HLS INTERFACE m_axi port=frame bundle=frame depth=512 offset=off \ + max_read_burst_length=16 max_write_burst_length=16 latency=2 num_write_outstanding=8 num_read_outstanding=9 #pragma HLS INTERFACE ap_none register port=in_cancel @@ -59,7 +60,7 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, packet_out.user = 0; packet_out.id = 0; packet_out.last = (axis_packet == 127) ? 1 : 0; - packet_out.data = module_cache[i]; + packet_out.data = frame[i]; data_out << packet_out; } if (module_number == modules - 1) { diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index e35a86c0..2637e8ad 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -644,7 +644,8 @@ proc create_root_design { parentCell } { assign_bd_address -offset 0x00070000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/axi_firewall_0/S_AXI_CTL/Control] -force assign_bd_address -offset 0x00090000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/xdma_0/S_AXI_LITE/CTL0] -force assign_bd_address -offset 0x000C0000 -range 0x00040000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs cms_subsystem_0/s_axi_ctrl/Mem] -force - assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator/S_AXI/Mem0] -force + assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator_0/S_AXI/Mem0] -force + assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces jungfraujoch_0/internal_packet_generator_0/Data_m_axi_frame] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator_1/S_AXI/Mem0] -force assign_bd_address -offset 0x00010000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_1/action_config_0/s_axi/reg0] -force assign_bd_address -offset 0x00020000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs mac_100g_1/cmac_usplus_0/s_axi/Reg] -force @@ -655,6 +656,7 @@ proc create_root_design { parentCell } { assign_bd_address -offset 0x00090000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_1/xdma_0/S_AXI_LITE/CTL0] -force assign_bd_address -offset 0x000C0000 -range 0x00040000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs cms_subsystem_0/s_axi_ctrl/Mem] -force assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_1/axi_bram_ctrl_internal_packet_generator/S_AXI/Mem0] -force + assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces jungfraujoch_1/internal_packet_generator_0/Data_m_axi_frame] [get_bd_addr_segs jungfraujoch_1/axi_bram_ctrl_internal_packet_generator_1/S_AXI/Mem0] -force assign_bd_address -offset 0x00000000 -range 0x00200000 -target_address_space [get_bd_addr_spaces jungfraujoch_1/jf_conversion_0/Data_m_axi_d_hbm_p0] [get_bd_addr_segs gain_uram_0/axi_bram_ctrl_0/S_AXI/Mem0] -force assign_bd_address -offset 0x00000000 -range 0x00200000 -target_address_space [get_bd_addr_spaces jungfraujoch_1/jf_conversion_0/Data_m_axi_d_hbm_p1] [get_bd_addr_segs gain_uram_1/axi_bram_ctrl_0/S_AXI/Mem0] -force diff --git a/fpga/scripts/bd_pcie_100g.tcl b/fpga/scripts/bd_pcie_100g.tcl index f280b43a..d910915a 100644 --- a/fpga/scripts/bd_pcie_100g.tcl +++ b/fpga/scripts/bd_pcie_100g.tcl @@ -441,7 +441,8 @@ proc create_root_design { parentCell } { assign_bd_address -offset 0x00070000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/axi_firewall_0/S_AXI_CTL/Control] -force assign_bd_address -offset 0x00090000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/xdma_0/S_AXI_LITE/CTL0] -force assign_bd_address -offset 0x000C0000 -range 0x00040000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs cms_subsystem_0/s_axi_ctrl/Mem] -force - assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator/S_AXI/Mem0] -force + assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator_0/S_AXI/Mem0] -force + assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces jungfraujoch_0/internal_packet_generator_0/Data_m_axi_frame] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator_1/S_AXI/Mem0] -force assign_bd_address set_property -dict [ list \ diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index cf859ec1..ba039c77 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -90,6 +90,10 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { catch {common::send_gid_msg -ssname BD::TCL -id 2096 -severity "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} return 1 } + set_property -dict [ list \ + CONFIG.DESIGN_NUMBER {0} \ + CONFIG.MAX_MODULES_FPGA_PARAM {0x00000010} \ + ] $action_config_0 # Create instance: axi_bram_ctrl_calibration_addr, and set properties set axi_bram_ctrl_calibration_addr [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_calibration_addr ] @@ -99,14 +103,23 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { CONFIG.SINGLE_PORT_BRAM {1} \ ] $axi_bram_ctrl_calibration_addr - # Create instance: axi_bram_ctrl_internal_packet_generator, and set properties - set axi_bram_ctrl_internal_packet_generator [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_internal_packet_generator ] + # Create instance: axi_bram_ctrl_internal_packet_generator_0, and set properties + set axi_bram_ctrl_internal_packet_generator_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_internal_packet_generator_0 ] set_property -dict [ list \ CONFIG.DATA_WIDTH {512} \ CONFIG.PROTOCOL {AXI4} \ CONFIG.READ_LATENCY {1} \ CONFIG.SINGLE_PORT_BRAM {1} \ - ] $axi_bram_ctrl_internal_packet_generator + ] $axi_bram_ctrl_internal_packet_generator_0 + + # Create instance: axi_bram_ctrl_internal_packet_generator_1, and set properties + set axi_bram_ctrl_internal_packet_generator_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_internal_packet_generator_1 ] + set_property -dict [ list \ + CONFIG.DATA_WIDTH {512} \ + CONFIG.PROTOCOL {AXI4} \ + CONFIG.READ_LATENCY {1} \ + CONFIG.SINGLE_PORT_BRAM {1} \ + ] $axi_bram_ctrl_internal_packet_generator_1 # Create instance: axis_addr_fifo_0, and set properties set axis_addr_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_addr_fifo_0 ] @@ -368,7 +381,8 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net Conn3 [get_bd_intf_pins eth_in] [get_bd_intf_pins network_stack/eth_in] connect_bd_intf_net -intf_net S_AXIS_1 [get_bd_intf_pins s_axis_h2c_data] [get_bd_intf_pins axis_data_fifo_h2c_data/S_AXIS] connect_bd_intf_net -intf_net axi_bram_ctrl_0_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_calibration_addr/BRAM_PORTA] [get_bd_intf_pins calibration_addr_bram/BRAM_PORTB] - connect_bd_intf_net -intf_net axi_bram_ctrl_1_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator/BRAM_PORTA] [get_bd_intf_pins internal_packet_generator_uram/BRAM_PORTB] + connect_bd_intf_net -intf_net axi_bram_ctrl_internal_packet_generator_1_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_1/BRAM_PORTA] [get_bd_intf_pins internal_packet_generator_uram/BRAM_PORTB] + connect_bd_intf_net -intf_net axi_bram_ctrl_internal_packet_generator_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_0/BRAM_PORTA] [get_bd_intf_pins internal_packet_generator_uram/BRAM_PORTA] connect_bd_intf_net -intf_net axis_addr_fifo_0_M_AXIS [get_bd_intf_pins axis_addr_fifo_0/M_AXIS] [get_bd_intf_pins internal_packet_generator_0/addr_in] connect_bd_intf_net -intf_net axis_addr_fifo_2_M_AXIS [get_bd_intf_pins axis_addr_fifo_1/M_AXIS] [get_bd_intf_pins jf_conversion_0/addr_in] connect_bd_intf_net -intf_net axis_addr_fifo_3_M_AXIS [get_bd_intf_pins axis_addr_fifo_2/M_AXIS] [get_bd_intf_pins host_writer_0/addr_in] @@ -400,7 +414,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net host_writer_0_m_axis_completion [get_bd_intf_pins axis_work_completion_fifo_0/S_AXIS] [get_bd_intf_pins host_writer_0/m_axis_completion] connect_bd_intf_net -intf_net internal_packet_generator_0_addr_out [get_bd_intf_pins axis_register_slice_addr_0/S_AXIS] [get_bd_intf_pins internal_packet_generator_0/addr_out] connect_bd_intf_net -intf_net internal_packet_generator_0_data_out [get_bd_intf_pins axis_register_slice_data_0/S_AXIS] [get_bd_intf_pins internal_packet_generator_0/data_out] - connect_bd_intf_net -intf_net internal_packet_generator_0_module_cache_PORTA [get_bd_intf_pins internal_packet_generator_0/module_cache_PORTA] [get_bd_intf_pins internal_packet_generator_uram/BRAM_PORTA] + connect_bd_intf_net -intf_net internal_packet_generator_0_m_axi_frame [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_1/S_AXI] [get_bd_intf_pins internal_packet_generator_0/m_axi_frame] connect_bd_intf_net -intf_net jf_conversion_0_addr_out [get_bd_intf_pins axis_register_slice_addr_1/S_AXIS] [get_bd_intf_pins jf_conversion_0/addr_out] connect_bd_intf_net -intf_net jf_conversion_0_data_out [get_bd_intf_pins axis_data_fifo_4/S_AXIS] [get_bd_intf_pins jf_conversion_0/data_out] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p0 [get_bd_intf_pins m_axi_d_hbm_p0] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p0] @@ -425,7 +439,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net smartconnect_0_M00_AXI [get_bd_intf_pins action_config_0/s_axi] [get_bd_intf_pins smartconnect_0/M00_AXI] connect_bd_intf_net -intf_net smartconnect_0_M01_AXI [get_bd_intf_pins mailbox_0/S0_AXI] [get_bd_intf_pins smartconnect_0/M01_AXI] connect_bd_intf_net -intf_net smartconnect_0_M02_AXI [get_bd_intf_pins axi_bram_ctrl_calibration_addr/S_AXI] [get_bd_intf_pins smartconnect_0/M02_AXI] - connect_bd_intf_net -intf_net smartconnect_0_M03_AXI [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator/S_AXI] [get_bd_intf_pins smartconnect_0/M03_AXI] + connect_bd_intf_net -intf_net smartconnect_0_M03_AXI [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_0/S_AXI] [get_bd_intf_pins smartconnect_0/M03_AXI] connect_bd_intf_net -intf_net timer_hbm_0_data_out [get_bd_intf_pins axis_data_fifo_3/S_AXIS] [get_bd_intf_pins timer_hbm_0/data_out] connect_bd_intf_net -intf_net timer_host_0_data_out [get_bd_intf_pins axis_register_slice_data_1/S_AXIS] [get_bd_intf_pins timer_host_0/data_out] @@ -440,7 +454,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net action_config_0_nmodules [get_bd_pins action_config_0/nmodules] [get_bd_pins data_collection_fsm_0/nmodules] connect_bd_net -net action_config_0_nstorage_cells [get_bd_pins action_config_0/nstorage_cells] [get_bd_pins data_collection_fsm_0/nstorage_cells] connect_bd_net -net action_config_0_one_over_energy [get_bd_pins action_config_0/one_over_energy] [get_bd_pins data_collection_fsm_0/one_over_energy] - connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins internal_packet_generator_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins timer_hbm_0/ap_clk] [get_bd_pins timer_host_0/ap_clk] + connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins internal_packet_generator_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins timer_hbm_0/ap_clk] [get_bd_pins timer_host_0/ap_clk] connect_bd_net -net axis_addr_fifo_2_almost_empty [get_bd_pins action_config_0/calib_addr_fifo_empty] [get_bd_pins axis_addr_fifo_1/almost_empty] connect_bd_net -net axis_addr_fifo_2_almost_full [get_bd_pins action_config_0/calib_addr_fifo_full] [get_bd_pins axis_addr_fifo_1/almost_full] connect_bd_net -net axis_addr_fifo_4_almost_empty [get_bd_pins action_config_0/last_addr_fifo_empty] [get_bd_pins axis_addr_fifo_2/almost_empty] @@ -480,7 +494,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net network_stack_packets_udp [get_bd_pins action_config_0/packets_udp] [get_bd_pins network_stack/packets_udp] connect_bd_net -net network_stack_packets_udp_ap_vld [get_bd_pins action_config_0/packets_udp_valid] [get_bd_pins network_stack/packets_udp_ap_vld] connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_addr_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_5/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_0/aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_0/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] - connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins internal_packet_generator_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins timer_hbm_0/ap_rst_n] [get_bd_pins timer_host_0/ap_rst_n] + connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins internal_packet_generator_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins timer_hbm_0/ap_rst_n] [get_bd_pins timer_host_0/ap_rst_n] connect_bd_net -net timer_hbm_0_counter [get_bd_pins action_config_0/stalls_hbm] [get_bd_pins timer_hbm_0/counter] connect_bd_net -net timer_hbm_0_counter_ap_vld [get_bd_pins action_config_0/stalls_hbm_valid] [get_bd_pins timer_hbm_0/counter_ap_vld] connect_bd_net -net timer_host_0_counter [get_bd_pins action_config_0/stalls_host] [get_bd_pins timer_host_0/counter] From 11696608ca68d29d2b933388fa13dcfece8cef3d Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 6 Sep 2023 18:23:36 +0200 Subject: [PATCH 171/224] FPGA: reduce AXI number of outstainding operations in internal packet generator --- fpga/hls/internal_packet_generator.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fpga/hls/internal_packet_generator.cpp b/fpga/hls/internal_packet_generator.cpp index 6f280deb..2f3df9b5 100644 --- a/fpga/hls/internal_packet_generator.cpp +++ b/fpga/hls/internal_packet_generator.cpp @@ -14,7 +14,7 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS INTERFACE register both axis port=addr_in #pragma HLS INTERFACE register both axis port=addr_out #pragma HLS INTERFACE m_axi port=frame bundle=frame depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=16 latency=2 num_write_outstanding=8 num_read_outstanding=9 + max_read_burst_length=16 max_write_burst_length=16 latency=2 num_write_outstanding=2 num_read_outstanding=2 #pragma HLS INTERFACE ap_none register port=in_cancel From a6377239cf63634d7a6384073030f7dd3d5d4ae0 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 6 Sep 2023 19:07:20 +0200 Subject: [PATCH 172/224] FPGA: fix script for 2x100G design --- fpga/scripts/bd_pcie.tcl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index 2637e8ad..4f5ea703 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -655,7 +655,7 @@ proc create_root_design { parentCell } { assign_bd_address -offset 0x00070000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_1/axi_firewall_0/S_AXI_CTL/Control] -force assign_bd_address -offset 0x00090000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_1/xdma_0/S_AXI_LITE/CTL0] -force assign_bd_address -offset 0x000C0000 -range 0x00040000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs cms_subsystem_0/s_axi_ctrl/Mem] -force - assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_1/axi_bram_ctrl_internal_packet_generator/S_AXI/Mem0] -force + assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_1/axi_bram_ctrl_internal_packet_generator_0/S_AXI/Mem0] -force assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces jungfraujoch_1/internal_packet_generator_0/Data_m_axi_frame] [get_bd_addr_segs jungfraujoch_1/axi_bram_ctrl_internal_packet_generator_1/S_AXI/Mem0] -force assign_bd_address -offset 0x00000000 -range 0x00200000 -target_address_space [get_bd_addr_spaces jungfraujoch_1/jf_conversion_0/Data_m_axi_d_hbm_p0] [get_bd_addr_segs gain_uram_0/axi_bram_ctrl_0/S_AXI/Mem0] -force From 4032ce09b8030875bb39067b991ef2c707ddd3f9 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 7 Sep 2023 05:54:24 +0200 Subject: [PATCH 173/224] FPGA: increase burst length and latency for internal packet generator AXI interface --- fpga/hls/internal_packet_generator.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fpga/hls/internal_packet_generator.cpp b/fpga/hls/internal_packet_generator.cpp index 2f3df9b5..b3040e5f 100644 --- a/fpga/hls/internal_packet_generator.cpp +++ b/fpga/hls/internal_packet_generator.cpp @@ -14,7 +14,7 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS INTERFACE register both axis port=addr_in #pragma HLS INTERFACE register both axis port=addr_out #pragma HLS INTERFACE m_axi port=frame bundle=frame depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=16 latency=2 num_write_outstanding=2 num_read_outstanding=2 + max_read_burst_length=64 max_write_burst_length=2 latency=3 num_write_outstanding=2 num_read_outstanding=2 #pragma HLS INTERFACE ap_none register port=in_cancel From dd002e3d6dfee91f4fb53e79a0d421b772896ad0 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 7 Sep 2023 12:10:38 +0200 Subject: [PATCH 174/224] FPGA: Build only 100G solution (no bifurcated design) --- .gitlab-ci.yml | 34 +- fpga/CMakeLists.txt | 5 - fpga/scripts/bd_pcie.tcl | 245 +----------- fpga/scripts/bd_pcie_100g.tcl | 471 ------------------------ fpga/scripts/build_pcie_design_100g.tcl | 65 ---- fpga/scripts/pcie_dma.tcl | 220 ----------- 6 files changed, 8 insertions(+), 1032 deletions(-) delete mode 100644 fpga/scripts/bd_pcie_100g.tcl delete mode 100644 fpga/scripts/build_pcie_design_100g.tcl diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 841a4acf..78c95e6d 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -185,8 +185,7 @@ test:x86:xia2.ssx: - source /usr/local/dials-v3-13-0/dials_env.sh - xia2.ssx image=writing_test_master.h5 space_group=P43212 unit_cell=78.551,78.551,36.914,90.000,90.000,90.000 - -synthesis:vivado_pcie_200g: +synthesis:vivado_pcie_100g: stage: synthesis variables: GIT_SUBMODULE_STRATEGY: recursive @@ -216,34 +215,3 @@ synthesis:vivado_pcie_200g: - cmake3 .. - make action_pcie needs: ["build:x86:gcc", "build:x86:vitis_hls", "test:x86:gcc"] - -synthesis:vivado_pcie_100g: - stage: synthesis - variables: - GIT_SUBMODULE_STRATEGY: recursive - CC: gcc - CXX: g++ - allow_failure: true - rules: - - if: '$CI_PIPELINE_SOURCE == "push"' - changes: - - fpga/hls/* - - fpga/hdl/* - - fpga/scripts/* - - fpga/xdc/* - - common/Definitions.h - tags: - - vivado - artifacts: - paths: - - build/fpga/*.mcs - - build/fpga/*.bit - expire_in: 1 week - script: - - source /opt/grpc/grpc.sh - - source /opt/Xilinx/Vivado/2022.1/settings64.sh - - mkdir -p build - - cd build - - cmake3 .. - - make action_pcie_100g - needs: ["build:x86:gcc", "build:x86:vitis_hls", "test:x86:gcc"] diff --git a/fpga/CMakeLists.txt b/fpga/CMakeLists.txt index b2d1d101..a331b46d 100644 --- a/fpga/CMakeLists.txt +++ b/fpga/CMakeLists.txt @@ -25,11 +25,6 @@ IF(VIVADO_HLS AND VIVADO) ADD_CUSTOM_TARGET(action_pcie DEPENDS action/hw/hdl/action_config.v hls COMMAND ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_SOURCE_DIR}/scripts/build_pcie_design.tcl - COMMAND ${CMAKE_COMMAND} -E env FLOW=pcie_200gbit VIV_PROJECT_PATH=${CMAKE_CURRENT_BINARY_DIR}/vivado/jfjoch_pcie.xpr ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_BINARY_DIR}/action/scripts/synth_and_impl.tcl - ) - - ADD_CUSTOM_TARGET(action_pcie_100g DEPENDS action/hw/hdl/action_config.v hls - COMMAND ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_SOURCE_DIR}/scripts/build_pcie_design_100g.tcl COMMAND ${CMAKE_COMMAND} -E env FLOW=pcie_100gbit VIV_PROJECT_PATH=${CMAKE_CURRENT_BINARY_DIR}/vivado/jfjoch_pcie.xpr ${VIVADO} -notrace -mode batch -source ${CMAKE_CURRENT_BINARY_DIR}/action/scripts/synth_and_impl.tcl ) ENDIF() diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index 4f5ea703..d910915a 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -224,99 +224,6 @@ if { $bCheckIPsPassed != 1 } { # DESIGN PROCs ################################################################## - -# Hierarchical cell: gain_uram_0 -proc create_hier_cell_gain_uram_0 { parentCell nameHier } { - - variable script_folder - - if { $parentCell eq "" || $nameHier eq "" } { - catch {common::send_gid_msg -ssname BD::TCL -id 2092 -severity "ERROR" "create_hier_cell_gain_uram_0() - Empty argument(s)!"} - return - } - - # Get object for parentCell - set parentObj [get_bd_cells $parentCell] - if { $parentObj == "" } { - catch {common::send_gid_msg -ssname BD::TCL -id 2090 -severity "ERROR" "Unable to find parent cell <$parentCell>!"} - return - } - - # Make sure parentObj is hier blk - set parentType [get_property TYPE $parentObj] - if { $parentType ne "hier" } { - catch {common::send_gid_msg -ssname BD::TCL -id 2091 -severity "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} - return - } - - # Save current instance; Restore later - set oldCurInst [current_bd_instance .] - - # Set parent object as current - current_bd_instance $parentObj - - # Create cell and set as current instance - set hier_obj [create_bd_cell -type hier $nameHier] - current_bd_instance $hier_obj - - # Create interface pins - create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi - - - # Create pins - create_bd_pin -dir I axi_aresetn - create_bd_pin -dir I axi_clk - - # Create instance: axi_bram_ctrl_0, and set properties - set axi_bram_ctrl_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_0 ] - set_property -dict [ list \ - CONFIG.DATA_WIDTH {256} \ - CONFIG.READ_LATENCY {2} \ - ] $axi_bram_ctrl_0 - - # Create instance: axi_register_slice_0, and set properties - set axi_register_slice_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_register_slice:2.1 axi_register_slice_0 ] - set_property -dict [ list \ - CONFIG.REG_AR {15} \ - CONFIG.REG_AW {15} \ - CONFIG.REG_B {15} \ - CONFIG.REG_R {15} \ - CONFIG.REG_W {15} \ - CONFIG.USE_AUTOPIPELINING {1} \ - ] $axi_register_slice_0 - - # Create instance: blk_mem_gen_0, and set properties - set blk_mem_gen_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:blk_mem_gen:8.4 blk_mem_gen_0 ] - set_property -dict [ list \ - CONFIG.Assume_Synchronous_Clk {true} \ - CONFIG.EN_SAFETY_CKT {false} \ - CONFIG.Enable_B {Use_ENB_Pin} \ - CONFIG.Memory_Type {True_Dual_Port_RAM} \ - CONFIG.Operating_Mode_A {NO_CHANGE} \ - CONFIG.Operating_Mode_B {NO_CHANGE} \ - CONFIG.PRIM_type_to_Implement {URAM} \ - CONFIG.Port_B_Clock {100} \ - CONFIG.Port_B_Enable_Rate {100} \ - CONFIG.Port_B_Write_Rate {50} \ - CONFIG.READ_LATENCY_A {2} \ - CONFIG.READ_LATENCY_B {2} \ - CONFIG.Use_RSTB_Pin {true} \ - ] $blk_mem_gen_0 - - # Create interface connections - connect_bd_intf_net -intf_net axi_bram_ctrl_0_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_0/BRAM_PORTA] [get_bd_intf_pins blk_mem_gen_0/BRAM_PORTA] - connect_bd_intf_net -intf_net axi_bram_ctrl_0_BRAM_PORTB [get_bd_intf_pins axi_bram_ctrl_0/BRAM_PORTB] [get_bd_intf_pins blk_mem_gen_0/BRAM_PORTB] - connect_bd_intf_net -intf_net axi_register_slice_0_M_AXI [get_bd_intf_pins axi_bram_ctrl_0/S_AXI] [get_bd_intf_pins axi_register_slice_0/M_AXI] - connect_bd_intf_net -intf_net s_axi_1 [get_bd_intf_pins s_axi] [get_bd_intf_pins axi_register_slice_0/S_AXI] - - # Create port connections - connect_bd_net -net axi_aresetn_1 [get_bd_pins axi_aresetn] [get_bd_pins axi_bram_ctrl_0/s_axi_aresetn] [get_bd_pins axi_register_slice_0/aresetn] - connect_bd_net -net axi_clk_1 [get_bd_pins axi_clk] [get_bd_pins axi_bram_ctrl_0/s_axi_aclk] [get_bd_pins axi_register_slice_0/aclk] - - # Restore current instance - current_bd_instance $oldCurInst -} - # Procedure to create entire design; Provide argument to make # procedure reusable. If parentCell is "", will use root. proc create_root_design { parentCell } { @@ -354,10 +261,6 @@ proc create_root_design { parentCell } { set pcie0_ref [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 pcie0_ref ] - set pcie1_mgt [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:pcie_7x_mgt_rtl:1.0 pcie1_mgt ] - - set pcie1_ref [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 pcie1_ref ] - set qsfp0 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:gt_rtl:1.0 qsfp0 ] set qsfp0_ref [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 qsfp0_ref ] @@ -365,13 +268,6 @@ proc create_root_design { parentCell } { CONFIG.FREQ_HZ {161132812} \ ] $qsfp0_ref - set qsfp1 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:gt_rtl:1.0 qsfp1 ] - - set qsfp1_ref [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 qsfp1_ref ] - set_property -dict [ list \ - CONFIG.FREQ_HZ {161132812} \ - ] $qsfp1_ref - set ref100 [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 ref100 ] set_property -dict [ list \ CONFIG.FREQ_HZ {100000000} \ @@ -385,8 +281,6 @@ proc create_root_design { parentCell } { set pcie_perstn [ create_bd_port -dir I -type rst pcie_perstn ] set qsfp0_led_busy [ create_bd_port -dir O -from 0 -to 0 qsfp0_led_busy ] set qsfp0_led_conn [ create_bd_port -dir O -from 0 -to 0 qsfp0_led_conn ] - set qsfp1_led_busy [ create_bd_port -dir O -from 0 -to 0 qsfp1_led_busy ] - set qsfp1_led_conn [ create_bd_port -dir O -from 0 -to 0 qsfp1_led_conn ] set satellite_gpio_0 [ create_bd_port -dir I -from 3 -to 0 -type intr satellite_gpio_0 ] set_property -dict [ list \ CONFIG.PortWidth {4} \ @@ -400,13 +294,6 @@ proc create_root_design { parentCell } { CONFIG.C_NUM_SW_INTR {2} \ ] $axi_intc_0 - # Create instance: axi_intc_1, and set properties - set axi_intc_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_intc:4.1 axi_intc_1 ] - set_property -dict [ list \ - CONFIG.C_IRQ_CONNECTION {1} \ - CONFIG.C_NUM_SW_INTR {2} \ - ] $axi_intc_1 - # Create instance: axi_quad_spi_0, and set properties set axi_quad_spi_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_quad_spi:3.2 axi_quad_spi_0 ] set_property -dict [ list \ @@ -444,72 +331,33 @@ proc create_root_design { parentCell } { # Create instance: cms_subsystem_0, and set properties set cms_subsystem_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:cms_subsystem:4.0 cms_subsystem_0 ] - # Create instance: gain_uram_0 - create_hier_cell_gain_uram_0 [current_bd_instance .] gain_uram_0 - - # Create instance: gain_uram_1 - create_hier_cell_gain_uram_0 [current_bd_instance .] gain_uram_1 - - # Create instance: gain_uram_2 - create_hier_cell_gain_uram_0 [current_bd_instance .] gain_uram_2 - - # Create instance: gain_uram_3 - create_hier_cell_gain_uram_0 [current_bd_instance .] gain_uram_3 - - # Create instance: gain_uram_4 - create_hier_cell_gain_uram_0 [current_bd_instance .] gain_uram_4 - - # Create instance: gain_uram_5 - create_hier_cell_gain_uram_0 [current_bd_instance .] gain_uram_5 - # Create instance: hbm_infrastructure create_hier_cell_hbm_infrastructure [current_bd_instance .] hbm_infrastructure # Create instance: jungfraujoch_0 create_hier_cell_jungfraujoch [current_bd_instance .] jungfraujoch_0 - # Create instance: jungfraujoch_1 - create_hier_cell_jungfraujoch [current_bd_instance .] jungfraujoch_1 - # Create instance: mac_100g create_hier_cell_mac_100g [current_bd_instance .] mac_100g - # Create instance: mac_100g_1 - create_hier_cell_mac_100g [current_bd_instance .] mac_100g_1 - # Create instance: one, and set properties set one [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 one ] # Create instance: pcie_dma_0 create_hier_cell_pcie_dma_0 [current_bd_instance .] pcie_dma_0 - # Create instance: pcie_dma_1 - create_hier_cell_pcie_dma_1 [current_bd_instance .] pcie_dma_1 - # Create instance: proc_sys_reset_pcie_0, and set properties set proc_sys_reset_pcie_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 proc_sys_reset_pcie_0 ] set_property -dict [ list \ CONFIG.C_EXT_RST_WIDTH {1} \ ] $proc_sys_reset_pcie_0 - # Create instance: proc_sys_reset_pcie_1, and set properties - set proc_sys_reset_pcie_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 proc_sys_reset_pcie_1 ] - set_property -dict [ list \ - CONFIG.C_EXT_RST_WIDTH {1} \ - ] $proc_sys_reset_pcie_1 - # Create instance: proc_sys_reset_refclk, and set properties set proc_sys_reset_refclk [ create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 proc_sys_reset_refclk ] set_property -dict [ list \ CONFIG.C_EXT_RST_WIDTH {1} \ ] $proc_sys_reset_refclk - # Create instance: proc_sys_reset_refclk1, and set properties - set proc_sys_reset_refclk1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 proc_sys_reset_refclk1 ] - set_property -dict [ list \ - CONFIG.C_EXT_RST_WIDTH {1} \ - ] $proc_sys_reset_refclk1 - # Create instance: smartconnect_0, and set properties set smartconnect_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_0 ] set_property -dict [ list \ @@ -518,20 +366,6 @@ proc create_root_design { parentCell } { CONFIG.NUM_SI {1} \ ] $smartconnect_0 - # Create instance: smartconnect_1, and set properties - set smartconnect_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_1 ] - set_property -dict [ list \ - CONFIG.NUM_CLKS {4} \ - CONFIG.NUM_MI {5} \ - CONFIG.NUM_SI {1} \ - ] $smartconnect_1 - - # Create instance: smartconnect_2, and set properties - set smartconnect_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_2 ] - set_property -dict [ list \ - CONFIG.NUM_CLKS {3} \ - ] $smartconnect_2 - # Create instance: xlconcat_irq, and set properties set xlconcat_irq [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconcat:2.1 xlconcat_irq ] @@ -559,78 +393,41 @@ proc create_root_design { parentCell } { connect_bd_intf_net -intf_net jungfraujoch_0_m_axis_c2h_data [get_bd_intf_pins jungfraujoch_0/m_axis_c2h_data] [get_bd_intf_pins pcie_dma_0/s_axis_c2h_data] connect_bd_intf_net -intf_net jungfraujoch_0_m_axis_c2h_datamover_cmd [get_bd_intf_pins jungfraujoch_0/m_axis_c2h_datamover_cmd] [get_bd_intf_pins pcie_dma_0/s_axis_c2h_cmd] connect_bd_intf_net -intf_net jungfraujoch_0_m_axis_h2c_datamover_cmd [get_bd_intf_pins jungfraujoch_0/m_axis_h2c_datamover_cmd] [get_bd_intf_pins pcie_dma_0/s_axis_h2c_cmd] - connect_bd_intf_net -intf_net jungfraujoch_1_m_axis_c2h_data [get_bd_intf_pins jungfraujoch_1/m_axis_c2h_data] [get_bd_intf_pins pcie_dma_1/s_axis_c2h_data] - connect_bd_intf_net -intf_net jungfraujoch_1_m_axis_c2h_datamover_cmd [get_bd_intf_pins jungfraujoch_1/m_axis_c2h_datamover_cmd] [get_bd_intf_pins pcie_dma_1/s_axis_c2h_cmd] - connect_bd_intf_net -intf_net jungfraujoch_1_m_axis_h2c_datamover_cmd [get_bd_intf_pins jungfraujoch_1/m_axis_h2c_datamover_cmd] [get_bd_intf_pins pcie_dma_1/s_axis_h2c_cmd] connect_bd_intf_net -intf_net mac_100g_1_M_AXIS_100G [get_bd_intf_pins jungfraujoch_0/eth_in] [get_bd_intf_pins mac_100g/m_axis_eth_in] - connect_bd_intf_net -intf_net mac_100g_1_m_axis_eth_in [get_bd_intf_pins jungfraujoch_1/eth_in] [get_bd_intf_pins mac_100g_1/m_axis_eth_in] connect_bd_intf_net -intf_net mac_100g_1_qsfp0 [get_bd_intf_ports qsfp0] [get_bd_intf_pins mac_100g/qsfp] - connect_bd_intf_net -intf_net mac_100g_1_qsfp1 [get_bd_intf_ports qsfp1] [get_bd_intf_pins mac_100g_1/qsfp] connect_bd_intf_net -intf_net pcie0_ref_1 [get_bd_intf_ports pcie0_ref] [get_bd_intf_pins pcie_dma_0/pcie_refclk] - connect_bd_intf_net -intf_net pcie1_ref_1 [get_bd_intf_ports pcie1_ref] [get_bd_intf_pins pcie_dma_1/pcie_refclk] connect_bd_intf_net -intf_net pcie_dma_0_M_AXI [get_bd_intf_pins pcie_dma_0/m_axi_ctrl] [get_bd_intf_pins smartconnect_0/S00_AXI] connect_bd_intf_net -intf_net pcie_dma_0_pcie0_mgt [get_bd_intf_ports pcie0_mgt] [get_bd_intf_pins pcie_dma_0/pcie_mgt] - connect_bd_intf_net -intf_net pcie_dma_1_m_axi_ctrl [get_bd_intf_pins pcie_dma_1/m_axi_ctrl] [get_bd_intf_pins smartconnect_1/S00_AXI] - connect_bd_intf_net -intf_net pcie_dma_1_pcie_mgt [get_bd_intf_ports pcie1_mgt] [get_bd_intf_pins pcie_dma_1/pcie_mgt] connect_bd_intf_net -intf_net qsfp0_ref_1 [get_bd_intf_ports qsfp0_ref] [get_bd_intf_pins mac_100g/qsfp_ref] - connect_bd_intf_net -intf_net qsfp1_ref_1 [get_bd_intf_ports qsfp1_ref] [get_bd_intf_pins mac_100g_1/qsfp_ref] connect_bd_intf_net -intf_net ref100_1 [get_bd_intf_ports ref100] [get_bd_intf_pins clk_wiz_0/CLK_IN1_D] connect_bd_intf_net -intf_net s_axi_1 [get_bd_intf_pins jungfraujoch_0/s_axi] [get_bd_intf_pins smartconnect_0/M00_AXI] connect_bd_intf_net -intf_net s_axi_2 [get_bd_intf_pins mac_100g/s_axi] [get_bd_intf_pins smartconnect_0/M02_AXI] - connect_bd_intf_net -intf_net s_axi_3 [get_bd_intf_pins jungfraujoch_1/s_axi] [get_bd_intf_pins smartconnect_1/M00_AXI] - connect_bd_intf_net -intf_net jungfraujoch_1_m_axi_d_hbm_p0 [get_bd_intf_pins gain_uram_0/s_axi] [get_bd_intf_pins jungfraujoch_1/m_axi_d_hbm_p0] - connect_bd_intf_net -intf_net jungfraujoch_1_m_axi_d_hbm_p1 [get_bd_intf_pins gain_uram_1/s_axi] [get_bd_intf_pins jungfraujoch_1/m_axi_d_hbm_p1] - connect_bd_intf_net -intf_net jungfraujoch_1_m_axi_d_hbm_p2 [get_bd_intf_pins gain_uram_2/s_axi] [get_bd_intf_pins jungfraujoch_1/m_axi_d_hbm_p2] - connect_bd_intf_net -intf_net jungfraujoch_1_m_axi_d_hbm_p3 [get_bd_intf_pins gain_uram_3/s_axi] [get_bd_intf_pins jungfraujoch_1/m_axi_d_hbm_p3] - connect_bd_intf_net -intf_net jungfraujoch_1_m_axi_d_hbm_p4 [get_bd_intf_pins gain_uram_4/s_axi] [get_bd_intf_pins jungfraujoch_1/m_axi_d_hbm_p4] - connect_bd_intf_net -intf_net jungfraujoch_1_m_axi_d_hbm_p5 [get_bd_intf_pins gain_uram_5/s_axi] [get_bd_intf_pins jungfraujoch_1/m_axi_d_hbm_p5] - connect_bd_intf_net -intf_net jungfraujoch_1_m_axi_d_hbm_p6 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_12] [get_bd_intf_pins jungfraujoch_1/m_axi_d_hbm_p6] - connect_bd_intf_net -intf_net jungfraujoch_1_m_axi_d_hbm_p7 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_13] [get_bd_intf_pins jungfraujoch_1/m_axi_d_hbm_p7] - connect_bd_intf_net -intf_net jungfraujoch_1_m_axi_d_hbm_p8 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_14] [get_bd_intf_pins jungfraujoch_1/m_axi_d_hbm_p8] - connect_bd_intf_net -intf_net jungfraujoch_1_m_axi_d_hbm_p9 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_15] [get_bd_intf_pins jungfraujoch_1/m_axi_d_hbm_p9] - connect_bd_intf_net -intf_net jungfraujoch_1_m_axi_d_hbm_p10 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_16] [get_bd_intf_pins jungfraujoch_1/m_axi_d_hbm_p10] - connect_bd_intf_net -intf_net jungfraujoch_1_m_axi_d_hbm_p11 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_17] [get_bd_intf_pins jungfraujoch_1/m_axi_d_hbm_p11] - connect_bd_intf_net -intf_net s_axis_eth_out_1 [get_bd_intf_pins jungfraujoch_1/eth_out] [get_bd_intf_pins mac_100g_1/s_axis_eth_out] connect_bd_intf_net -intf_net s_axis_h2c_data_1 [get_bd_intf_pins jungfraujoch_0/s_axis_h2c_data] [get_bd_intf_pins pcie_dma_0/m_axis_h2c_data] - connect_bd_intf_net -intf_net s_axis_h2c_data_2 [get_bd_intf_pins jungfraujoch_1/s_axis_h2c_data] [get_bd_intf_pins pcie_dma_1/m_axis_h2c_data] - connect_bd_intf_net -intf_net smartconnect_0_M01_AXI [get_bd_intf_pins smartconnect_0/M01_AXI] [get_bd_intf_pins smartconnect_2/S01_AXI] + connect_bd_intf_net -intf_net smartconnect_0_M01_AXI [get_bd_intf_pins smartconnect_0/M01_AXI] [get_bd_intf_pins cms_subsystem_0/s_axi_ctrl] connect_bd_intf_net -intf_net smartconnect_0_M03_AXI [get_bd_intf_pins axi_quad_spi_0/AXI_LITE] [get_bd_intf_pins smartconnect_0/M03_AXI] connect_bd_intf_net -intf_net smartconnect_0_M04_AXI [get_bd_intf_pins axi_intc_0/s_axi] [get_bd_intf_pins smartconnect_0/M04_AXI] connect_bd_intf_net -intf_net smartconnect_0_M05_AXI [get_bd_intf_pins pcie_dma_0/s_axi_dma_ctrl] [get_bd_intf_pins smartconnect_0/M05_AXI] - connect_bd_intf_net -intf_net smartconnect_1_M01_AXI [get_bd_intf_pins mac_100g_1/s_axi] [get_bd_intf_pins smartconnect_1/M01_AXI] - connect_bd_intf_net -intf_net smartconnect_1_M02_AXI [get_bd_intf_pins pcie_dma_1/s_axi_dma_ctrl] [get_bd_intf_pins smartconnect_1/M02_AXI] - connect_bd_intf_net -intf_net smartconnect_1_M03_AXI [get_bd_intf_pins smartconnect_1/M03_AXI] [get_bd_intf_pins smartconnect_2/S00_AXI] - connect_bd_intf_net -intf_net smartconnect_1_M04_AXI [get_bd_intf_pins axi_intc_1/s_axi] [get_bd_intf_pins smartconnect_1/M04_AXI] - connect_bd_intf_net -intf_net smartconnect_2_M00_AXI [get_bd_intf_pins cms_subsystem_0/s_axi_ctrl] [get_bd_intf_pins smartconnect_2/M00_AXI] # Create port connections - connect_bd_net -net axi_clk_1 [get_bd_pins pcie_dma_0/axi_aclk] [get_bd_pins proc_sys_reset_pcie_0/slowest_sync_clk] [get_bd_pins smartconnect_0/aclk3] [get_bd_pins smartconnect_2/aclk1] + connect_bd_net -net axi_clk_1 [get_bd_pins pcie_dma_0/axi_aclk] [get_bd_pins proc_sys_reset_pcie_0/slowest_sync_clk] [get_bd_pins smartconnect_0/aclk3] connect_bd_net -net axi_quad_spi_0_ip2intc_irpt [get_bd_pins axi_quad_spi_0/ip2intc_irpt] [get_bd_pins xlconcat_irq/In0] connect_bd_net -net cms_subsystem_0_interrupt_host [get_bd_pins cms_subsystem_0/interrupt_host] [get_bd_pins xlconcat_irq/In1] connect_bd_net -net hbm_infrastructure_hbm_temp_trip_1 [get_bd_ports hbm_cattrip] [get_bd_pins cms_subsystem_0/interrupt_hbm_cattrip] [get_bd_pins hbm_infrastructure/hbm_cattrip] connect_bd_net -net hbm_infrastructure_hbm_temperature_1 [get_bd_pins cms_subsystem_0/hbm_temp_1] [get_bd_pins hbm_infrastructure/hbm_temperature_0] connect_bd_net -net hbm_infrastructure_hbm_temperature_2 [get_bd_pins cms_subsystem_0/hbm_temp_2] [get_bd_pins hbm_infrastructure/hbm_temperature_1] - connect_bd_net -net mac_100g_1_eth_busy_n [get_bd_ports qsfp1_led_busy] [get_bd_pins mac_100g_1/eth_busy_n] - connect_bd_net -net mac_100g_1_stat_rx_aligned_n [get_bd_ports qsfp1_led_conn] [get_bd_pins mac_100g_1/stat_rx_aligned_n] connect_bd_net -net mac_100g_eth_busy_n [get_bd_ports qsfp0_led_busy] [get_bd_pins mac_100g/eth_busy_n] connect_bd_net -net mac_100g_stat_rx_aligned_n [get_bd_ports qsfp0_led_conn] [get_bd_pins mac_100g/stat_rx_aligned_n] - connect_bd_net -net net_refclk50 [get_bd_pins axi_intc_0/s_axi_aclk] [get_bd_pins axi_intc_1/s_axi_aclk] [get_bd_pins axi_quad_spi_0/s_axi_aclk] [get_bd_pins clk_wiz_0/clk_out1] [get_bd_pins cms_subsystem_0/aclk_ctrl] [get_bd_pins proc_sys_reset_refclk/slowest_sync_clk] [get_bd_pins proc_sys_reset_refclk1/slowest_sync_clk] [get_bd_pins smartconnect_0/aclk2] [get_bd_pins smartconnect_1/aclk1] [get_bd_pins smartconnect_2/aclk] - connect_bd_net -net net_refclk100 [get_bd_pins axi_quad_spi_0/ext_spi_clk] [get_bd_pins clk_wiz_0/clk_out2] [get_bd_pins hbm_infrastructure/refclk100] [get_bd_pins mac_100g/refclk100] [get_bd_pins mac_100g_1/refclk100] [get_bd_pins smartconnect_0/aclk1] [get_bd_pins smartconnect_1/aclk2] - connect_bd_net -net net_refclk200 [get_bd_pins clk_wiz_0/clk_out3] [get_bd_pins gain_uram_0/axi_clk] [get_bd_pins gain_uram_1/axi_clk] [get_bd_pins gain_uram_2/axi_clk] [get_bd_pins gain_uram_3/axi_clk] [get_bd_pins gain_uram_4/axi_clk] [get_bd_pins gain_uram_5/axi_clk] [get_bd_pins hbm_infrastructure/axi_clk] [get_bd_pins jungfraujoch_0/axi_clk] [get_bd_pins jungfraujoch_1/axi_clk] [get_bd_pins mac_100g/axiclk] [get_bd_pins mac_100g_1/axiclk] [get_bd_pins pcie_dma_0/refclk200] [get_bd_pins pcie_dma_1/refclk200] [get_bd_pins smartconnect_0/aclk] [get_bd_pins smartconnect_1/aclk] - connect_bd_net -net one_dout [get_bd_pins one/dout] [get_bd_pins cms_subsystem_0/aresetn_ctrl] [get_bd_pins smartconnect_2/aresetn] [get_bd_pins proc_sys_reset_pcie_0/dcm_locked] [get_bd_pins proc_sys_reset_pcie_1/dcm_locked] [get_bd_pins proc_sys_reset_refclk/dcm_locked] [get_bd_pins proc_sys_reset_refclk1/dcm_locked] + connect_bd_net -net net_refclk50 [get_bd_pins axi_intc_0/s_axi_aclk] [get_bd_pins axi_intc_1/s_axi_aclk] [get_bd_pins axi_quad_spi_0/s_axi_aclk] [get_bd_pins clk_wiz_0/clk_out1] [get_bd_pins cms_subsystem_0/aclk_ctrl] [get_bd_pins proc_sys_reset_refclk/slowest_sync_clk] [get_bd_pins proc_sys_reset_refclk1/slowest_sync_clk] [get_bd_pins smartconnect_0/aclk2] + connect_bd_net -net net_refclk100 [get_bd_pins axi_quad_spi_0/ext_spi_clk] [get_bd_pins clk_wiz_0/clk_out2] [get_bd_pins hbm_infrastructure/refclk100] [get_bd_pins mac_100g/refclk100] [get_bd_pins smartconnect_0/aclk1] + connect_bd_net -net net_refclk200 [get_bd_pins clk_wiz_0/clk_out3] [get_bd_pins hbm_infrastructure/axi_clk] [get_bd_pins jungfraujoch_0/axi_clk] [get_bd_pins mac_100g/axiclk] [get_bd_pins pcie_dma_0/refclk200] [get_bd_pins smartconnect_0/aclk] + connect_bd_net -net one_dout [get_bd_pins one/dout] [get_bd_pins cms_subsystem_0/aresetn_ctrl] [get_bd_pins proc_sys_reset_pcie_0/dcm_locked] [get_bd_pins proc_sys_reset_refclk/dcm_locked] connect_bd_net -net pcie_dma_0_axi_aresetn [get_bd_pins pcie_dma_0/axi_aresetn] [get_bd_pins proc_sys_reset_pcie_0/ext_reset_in] [get_bd_pins proc_sys_reset_refclk/ext_reset_in] [get_bd_pins smartconnect_0/aresetn] - connect_bd_net -net pcie_dma_1_axi_aclk [get_bd_pins pcie_dma_1/axi_aclk] [get_bd_pins proc_sys_reset_pcie_1/slowest_sync_clk] [get_bd_pins smartconnect_1/aclk3] [get_bd_pins smartconnect_2/aclk2] - connect_bd_net -net pcie_dma_1_axi_aresetn [get_bd_pins pcie_dma_1/axi_aresetn] [get_bd_pins proc_sys_reset_pcie_1/ext_reset_in] [get_bd_pins proc_sys_reset_refclk1/ext_reset_in] [get_bd_pins smartconnect_1/aresetn] - connect_bd_net -net pcie_perstn_1 [get_bd_ports pcie_perstn] [get_bd_pins pcie_dma_0/pcie_perstn] [get_bd_pins pcie_dma_1/pcie_perstn] + connect_bd_net -net pcie_perstn_1 [get_bd_ports pcie_perstn] [get_bd_pins pcie_dma_0/pcie_perstn] connect_bd_net -net proc_sys_reset_pcie_0_interconnect_aresetn [get_bd_pins pcie_dma_0/axi_clk_resetn] [get_bd_pins proc_sys_reset_pcie_0/interconnect_aresetn] - connect_bd_net -net proc_sys_reset_pcie_1_interconnect_aresetn [get_bd_pins pcie_dma_1/axi_clk_resetn] [get_bd_pins proc_sys_reset_pcie_1/interconnect_aresetn] - connect_bd_net -net proc_sys_reset_refclk1_interconnect_aresetn [get_bd_pins gain_uram_0/axi_aresetn] [get_bd_pins gain_uram_1/axi_aresetn] [get_bd_pins gain_uram_2/axi_aresetn] [get_bd_pins gain_uram_3/axi_aresetn] [get_bd_pins gain_uram_4/axi_aresetn] [get_bd_pins gain_uram_5/axi_aresetn] [get_bd_pins jungfraujoch_1/axi_rst_n] [get_bd_pins mac_100g_1/ap_rst_n] [get_bd_pins pcie_dma_1/refclk200_resetn] [get_bd_pins proc_sys_reset_refclk1/interconnect_aresetn] - connect_bd_net -net proc_sys_reset_refclk1_peripheral_aresetn [get_bd_pins axi_intc_1/s_axi_aresetn] [get_bd_pins hbm_infrastructure/axi_resetn_1] [get_bd_pins jungfraujoch_1/ap_rst_n] [get_bd_pins mac_100g_1/resetn] [get_bd_pins proc_sys_reset_refclk1/peripheral_aresetn] connect_bd_net -net proc_sys_reset_refclk_peripheral_aresetn [get_bd_pins axi_intc_0/s_axi_aresetn] [get_bd_pins axi_quad_spi_0/s_axi_aresetn] [get_bd_pins hbm_infrastructure/axi_resetn] [get_bd_pins jungfraujoch_0/ap_rst_n] [get_bd_pins mac_100g/ap_rst_n] [get_bd_pins proc_sys_reset_refclk/peripheral_aresetn] connect_bd_net -net resetn_1 [get_bd_pins jungfraujoch_0/axi_rst_n] [get_bd_pins mac_100g/resetn] [get_bd_pins pcie_dma_0/refclk200_resetn] [get_bd_pins proc_sys_reset_refclk/interconnect_aresetn] connect_bd_net -net satellite_gpio_0_1 [get_bd_ports satellite_gpio_0] [get_bd_pins cms_subsystem_0/satellite_gpio] connect_bd_net -net usr_irq_req_1 [get_bd_pins axi_intc_0/irq] [get_bd_pins pcie_dma_0/usr_irq_req] - connect_bd_net -net usr_irq_req_2 [get_bd_pins axi_intc_1/irq] [get_bd_pins pcie_dma_1/usr_irq_req] connect_bd_net -net xlconcat_irq_dout [get_bd_pins axi_intc_0/intr] [get_bd_pins axi_intc_1/intr] [get_bd_pins xlconcat_irq/dout] connect_bd_net -net zero_dout [get_bd_pins axi_quad_spi_0/usrcclkts] [get_bd_pins zero/dout] @@ -646,24 +443,6 @@ proc create_root_design { parentCell } { assign_bd_address -offset 0x000C0000 -range 0x00040000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs cms_subsystem_0/s_axi_ctrl/Mem] -force assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator_0/S_AXI/Mem0] -force assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces jungfraujoch_0/internal_packet_generator_0/Data_m_axi_frame] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator_1/S_AXI/Mem0] -force - - assign_bd_address -offset 0x00010000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_1/action_config_0/s_axi/reg0] -force - assign_bd_address -offset 0x00020000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs mac_100g_1/cmac_usplus_0/s_axi/Reg] -force - assign_bd_address -offset 0x00030000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_1/mailbox_0/S0_AXI/Reg] -force - assign_bd_address -offset 0x00050000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs axi_intc_1/S_AXI/Reg] -force - assign_bd_address -offset 0x00060000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_1/axi_bram_ctrl_calibration_addr/S_AXI/Mem0] -force - assign_bd_address -offset 0x00070000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_1/axi_firewall_0/S_AXI_CTL/Control] -force - assign_bd_address -offset 0x00090000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_1/xdma_0/S_AXI_LITE/CTL0] -force - assign_bd_address -offset 0x000C0000 -range 0x00040000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs cms_subsystem_0/s_axi_ctrl/Mem] -force - assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_1/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_1/axi_bram_ctrl_internal_packet_generator_0/S_AXI/Mem0] -force - assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces jungfraujoch_1/internal_packet_generator_0/Data_m_axi_frame] [get_bd_addr_segs jungfraujoch_1/axi_bram_ctrl_internal_packet_generator_1/S_AXI/Mem0] -force - - assign_bd_address -offset 0x00000000 -range 0x00200000 -target_address_space [get_bd_addr_spaces jungfraujoch_1/jf_conversion_0/Data_m_axi_d_hbm_p0] [get_bd_addr_segs gain_uram_0/axi_bram_ctrl_0/S_AXI/Mem0] -force - assign_bd_address -offset 0x00000000 -range 0x00200000 -target_address_space [get_bd_addr_spaces jungfraujoch_1/jf_conversion_0/Data_m_axi_d_hbm_p1] [get_bd_addr_segs gain_uram_1/axi_bram_ctrl_0/S_AXI/Mem0] -force - assign_bd_address -offset 0x00000000 -range 0x00200000 -target_address_space [get_bd_addr_spaces jungfraujoch_1/jf_conversion_0/Data_m_axi_d_hbm_p2] [get_bd_addr_segs gain_uram_2/axi_bram_ctrl_0/S_AXI/Mem0] -force - assign_bd_address -offset 0x00000000 -range 0x00200000 -target_address_space [get_bd_addr_spaces jungfraujoch_1/jf_conversion_0/Data_m_axi_d_hbm_p3] [get_bd_addr_segs gain_uram_3/axi_bram_ctrl_0/S_AXI/Mem0] -force - assign_bd_address -offset 0x00000000 -range 0x00200000 -target_address_space [get_bd_addr_spaces jungfraujoch_1/jf_conversion_0/Data_m_axi_d_hbm_p4] [get_bd_addr_segs gain_uram_4/axi_bram_ctrl_0/S_AXI/Mem0] -force - assign_bd_address -offset 0x00000000 -range 0x00200000 -target_address_space [get_bd_addr_spaces jungfraujoch_1/jf_conversion_0/Data_m_axi_d_hbm_p5] [get_bd_addr_segs gain_uram_5/axi_bram_ctrl_0/S_AXI/Mem0] -force assign_bd_address set_property -dict [ list \ @@ -671,21 +450,11 @@ proc create_root_design { parentCell } { CONFIG.GT_GROUP_SELECT {X0Y24~X0Y27} \ ] [get_bd_cells mac_100g/cmac_usplus_0] - set_property -dict [ list \ - CONFIG.CMAC_CORE_SELECT {CMACE4_X0Y4} \ - CONFIG.GT_GROUP_SELECT {X0Y28~X0Y31} \ - ] [get_bd_cells mac_100g_1/cmac_usplus_0] - set_property -dict [list \ CONFIG.MAX_MODULES_FPGA_PARAM {0x00000010} \ CONFIG.DESIGN_NUMBER {0} \ ] [get_bd_cells jungfraujoch_0/action_config_0] - set_property -dict [list \ - CONFIG.MAX_MODULES_FPGA_PARAM {0x00000004} \ - CONFIG.DESIGN_NUMBER {1} \ - ] [get_bd_cells jungfraujoch_1/action_config_0] - # Restore current instance current_bd_instance $oldCurInst diff --git a/fpga/scripts/bd_pcie_100g.tcl b/fpga/scripts/bd_pcie_100g.tcl deleted file mode 100644 index d910915a..00000000 --- a/fpga/scripts/bd_pcie_100g.tcl +++ /dev/null @@ -1,471 +0,0 @@ -## Copyright (2019-2022) Paul Scherrer Institute -## SPDX-License-Identifier: CERN-OHL-S-2.0 - -################################################################ -# This is a generated script based on design: jfjoch_pcie -# -# Though there are limitations about the generated script, -# the main purpose of this utility is to make learning -# IP Integrator Tcl commands easier. -################################################################ - -namespace eval _tcl { -proc get_script_folder {} { - set script_path [file normalize [info script]] - set script_folder [file dirname $script_path] - return $script_folder -} -} -variable script_folder -set script_folder [_tcl::get_script_folder] - -################################################################ -# Check if script is running in correct Vivado version. -################################################################ -set scripts_vivado_version 2022.1 -set current_vivado_version [version -short] - -if { [string first $scripts_vivado_version $current_vivado_version] == -1 } { - puts "" - catch {common::send_gid_msg -ssname BD::TCL -id 2041 -severity "ERROR" "This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."} - - return 1 -} - -################################################################ -# START -################################################################ - -# To test this script, run the following commands from Vivado Tcl console: -# source jfjoch_pcie_script.tcl - - -# The design that will be created by this Tcl script contains the following -# module references: -# gen_xdma_descriptor, action_config, check_eth_busy, resetn_sync - -# Please add the sources of those modules before sourcing this Tcl script. - -# If there is no project opened, this script will create a -# project, but make sure you do not have an existing project -# <./myproj/project_1.xpr> in the current working folder. - -set list_projs [get_projects -quiet] -if { $list_projs eq "" } { - create_project project_1 myproj -part xcvu35p-fsvh2104-2-e -} - - -# CHANGE DESIGN NAME HERE -variable design_name -set design_name jfjoch_pcie - -# If you do not already have an existing IP Integrator design open, -# you can create a design using the following command: -# create_bd_design $design_name - -# Creating design if needed -set errMsg "" -set nRet 0 - -set cur_design [current_bd_design -quiet] -set list_cells [get_bd_cells -quiet] - -if { ${design_name} eq "" } { - # USE CASES: - # 1) Design_name not set - - set errMsg "Please set the variable to a non-empty value." - set nRet 1 - -} elseif { ${cur_design} ne "" && ${list_cells} eq "" } { - # USE CASES: - # 2): Current design opened AND is empty AND names same. - # 3): Current design opened AND is empty AND names diff; design_name NOT in project. - # 4): Current design opened AND is empty AND names diff; design_name exists in project. - - if { $cur_design ne $design_name } { - common::send_gid_msg -ssname BD::TCL -id 2001 -severity "INFO" "Changing value of from <$design_name> to <$cur_design> since current design is empty." - set design_name [get_property NAME $cur_design] - } - common::send_gid_msg -ssname BD::TCL -id 2002 -severity "INFO" "Constructing design in IPI design <$cur_design>..." - -} elseif { ${cur_design} ne "" && $list_cells ne "" && $cur_design eq $design_name } { - # USE CASES: - # 5) Current design opened AND has components AND same names. - - set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." - set nRet 1 -} elseif { [get_files -quiet ${design_name}.bd] ne "" } { - # USE CASES: - # 6) Current opened design, has components, but diff names, design_name exists in project. - # 7) No opened design, design_name exists in project. - - set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." - set nRet 2 - -} else { - # USE CASES: - # 8) No opened design, design_name not in project. - # 9) Current opened design, has components, but diff names, design_name not in project. - - common::send_gid_msg -ssname BD::TCL -id 2003 -severity "INFO" "Currently there is no design <$design_name> in project, so creating one..." - - create_bd_design $design_name - - common::send_gid_msg -ssname BD::TCL -id 2004 -severity "INFO" "Making design <$design_name> as current_bd_design." - current_bd_design $design_name - -} - -common::send_gid_msg -ssname BD::TCL -id 2005 -severity "INFO" "Currently the variable is equal to \"$design_name\"." - -if { $nRet != 0 } { - catch {common::send_gid_msg -ssname BD::TCL -id 2006 -severity "ERROR" $errMsg} - return $nRet -} - -set bCheckIPsPassed 1 -################################################################## -# CHECK IPs -################################################################## -set bCheckIPs 1 -if { $bCheckIPs == 1 } { - set list_check_ips "\ -xilinx.com:ip:axi_intc:4.1\ -xilinx.com:ip:axi_quad_spi:3.2\ -xilinx.com:ip:clk_wiz:6.0\ -xilinx.com:ip:cms_subsystem:4.0\ -xilinx.com:ip:xlconstant:1.1\ -xilinx.com:ip:proc_sys_reset:5.0\ -xilinx.com:ip:smartconnect:1.0\ -xilinx.com:ip:xlconcat:2.1\ -xilinx.com:ip:axi_protocol_converter:2.1\ -xilinx.com:ip:axi_register_slice:2.1\ -xilinx.com:ip:hbm:1.0\ -xilinx.com:ip:util_vector_logic:2.0\ -xilinx.com:ip:axi_bram_ctrl:4.1\ -xilinx.com:ip:axis_data_fifo:2.0\ -xilinx.com:ip:axis_register_slice:1.1\ -xilinx.com:ip:blk_mem_gen:8.4\ -psi.ch:hls:data_collection_fsm:1.0\ -psi.ch:hls:host_writer:1.0\ -psi.ch:hls:internal_packet_generator:1.0\ -psi.ch:hls:jf_conversion:1.0\ -psi.ch:hls:load_calibration:1.0\ -xilinx.com:ip:mailbox:2.1\ -psi.ch:hls:timer_hbm:1.0\ -psi.ch:hls:timer_host:1.0\ -xilinx.com:ip:cmac_usplus:3.1\ -xilinx.com:ip:axi_firewall:1.2\ -xilinx.com:ip:axis_clock_converter:1.1\ -xilinx.com:ip:util_ds_buf:2.2\ -xilinx.com:ip:xdma:4.1\ -psi.ch:hls:arp:1.0\ -xilinx.com:ip:axis_switch:1.1\ -psi.ch:hls:ethernet:1.0\ -psi.ch:hls:icmp:1.0\ -psi.ch:hls:ipv4:1.0\ -psi.ch:hls:sls_detector:1.0\ -psi.ch:hls:udp:1.0\ -" - - set list_ips_missing "" - common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following IPs exist in the project's IP catalog: $list_check_ips ." - - foreach ip_vlnv $list_check_ips { - set ip_obj [get_ipdefs -all $ip_vlnv] - if { $ip_obj eq "" } { - lappend list_ips_missing $ip_vlnv - } - } - - if { $list_ips_missing ne "" } { - catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following IPs are not found in the IP Catalog:\n $list_ips_missing\n\nResolution: Please add the repository containing the IP(s) to the project." } - set bCheckIPsPassed 0 - } - -} - -################################################################## -# CHECK Modules -################################################################## -set bCheckModules 1 -if { $bCheckModules == 1 } { - set list_check_mods "\ -gen_xdma_descriptor\ -action_config\ -check_eth_busy\ -resetn_sync\ -" - - set list_mods_missing "" - common::send_msg_id "BD_TCL-006" "INFO" "Checking if the following modules exist in the project's sources: $list_check_mods ." - - foreach mod_vlnv $list_check_mods { - if { [can_resolve_reference $mod_vlnv] == 0 } { - lappend list_mods_missing $mod_vlnv - } - } - - if { $list_mods_missing ne "" } { - catch {common::send_msg_id "BD_TCL-115" "ERROR" "The following module(s) are not found in the project: $list_mods_missing" } - common::send_msg_id "BD_TCL-008" "INFO" "Please add source files for the missing module(s) above." - set bCheckIPsPassed 0 - } -} - -if { $bCheckIPsPassed != 1 } { - common::send_msg_id "BD_TCL-1003" "WARNING" "Will not continue with creation of design due to the error(s) above." - return 3 -} - -################################################################## -# DESIGN PROCs -################################################################## - -# Procedure to create entire design; Provide argument to make -# procedure reusable. If parentCell is "", will use root. -proc create_root_design { parentCell } { - - variable script_folder - variable design_name - - if { $parentCell eq "" } { - set parentCell [get_bd_cells /] - } - - # Get object for parentCell - set parentObj [get_bd_cells $parentCell] - if { $parentObj == "" } { - catch {common::send_gid_msg -ssname BD::TCL -id 2090 -severity "ERROR" "Unable to find parent cell <$parentCell>!"} - return - } - - # Make sure parentObj is hier blk - set parentType [get_property TYPE $parentObj] - if { $parentType ne "hier" } { - catch {common::send_gid_msg -ssname BD::TCL -id 2091 -severity "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} - return - } - - # Save current instance; Restore later - set oldCurInst [current_bd_instance .] - - # Set parent object as current - current_bd_instance $parentObj - - - # Create interface ports - set pcie0_mgt [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:pcie_7x_mgt_rtl:1.0 pcie0_mgt ] - - set pcie0_ref [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 pcie0_ref ] - - set qsfp0 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:gt_rtl:1.0 qsfp0 ] - - set qsfp0_ref [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 qsfp0_ref ] - set_property -dict [ list \ - CONFIG.FREQ_HZ {161132812} \ - ] $qsfp0_ref - - set ref100 [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 ref100 ] - set_property -dict [ list \ - CONFIG.FREQ_HZ {100000000} \ - ] $ref100 - - set satellite_uart_0 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:uart_rtl:1.0 satellite_uart_0 ] - - - # Create ports - set hbm_cattrip [ create_bd_port -dir O -from 0 -to 0 hbm_cattrip ] - set pcie_perstn [ create_bd_port -dir I -type rst pcie_perstn ] - set qsfp0_led_busy [ create_bd_port -dir O -from 0 -to 0 qsfp0_led_busy ] - set qsfp0_led_conn [ create_bd_port -dir O -from 0 -to 0 qsfp0_led_conn ] - set satellite_gpio_0 [ create_bd_port -dir I -from 3 -to 0 -type intr satellite_gpio_0 ] - set_property -dict [ list \ - CONFIG.PortWidth {4} \ - CONFIG.SENSITIVITY {EDGE_RISING} \ - ] $satellite_gpio_0 - - # Create instance: axi_intc_0, and set properties - set axi_intc_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_intc:4.1 axi_intc_0 ] - set_property -dict [ list \ - CONFIG.C_IRQ_CONNECTION {1} \ - CONFIG.C_NUM_SW_INTR {2} \ - ] $axi_intc_0 - - # Create instance: axi_quad_spi_0, and set properties - set axi_quad_spi_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_quad_spi:3.2 axi_quad_spi_0 ] - set_property -dict [ list \ - CONFIG.C_FIFO_DEPTH {256} \ - CONFIG.C_SCK_RATIO {2} \ - CONFIG.C_SPI_MEMORY {2} \ - CONFIG.C_SPI_MODE {2} \ - CONFIG.C_USE_STARTUP {1} \ - CONFIG.C_USE_STARTUP_INT {1} \ - ] $axi_quad_spi_0 - - # Create instance: clk_wiz_0, and set properties - set clk_wiz_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:clk_wiz:6.0 clk_wiz_0 ] - set_property -dict [ list \ - CONFIG.CLKOUT1_JITTER {132.683} \ - CONFIG.CLKOUT1_REQUESTED_OUT_FREQ {50.000} \ - CONFIG.CLKOUT2_JITTER {115.831} \ - CONFIG.CLKOUT2_PHASE_ERROR {87.180} \ - CONFIG.CLKOUT2_USED {true} \ - CONFIG.CLKOUT3_JITTER {102.086} \ - CONFIG.CLKOUT3_PHASE_ERROR {87.180} \ - CONFIG.CLKOUT3_REQUESTED_OUT_FREQ {200.000} \ - CONFIG.CLKOUT3_USED {true} \ - CONFIG.MMCM_CLKOUT0_DIVIDE_F {24.000} \ - CONFIG.MMCM_CLKOUT1_DIVIDE {12} \ - CONFIG.MMCM_CLKOUT2_DIVIDE {6} \ - CONFIG.NUM_OUT_CLKS {3} \ - CONFIG.PRIM_SOURCE {Differential_clock_capable_pin} \ - CONFIG.RESET_PORT {reset} \ - CONFIG.RESET_TYPE {ACTIVE_HIGH} \ - CONFIG.USE_LOCKED {false} \ - CONFIG.USE_RESET {false} \ - ] $clk_wiz_0 - - # Create instance: cms_subsystem_0, and set properties - set cms_subsystem_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:cms_subsystem:4.0 cms_subsystem_0 ] - - # Create instance: hbm_infrastructure - create_hier_cell_hbm_infrastructure [current_bd_instance .] hbm_infrastructure - - # Create instance: jungfraujoch_0 - create_hier_cell_jungfraujoch [current_bd_instance .] jungfraujoch_0 - - # Create instance: mac_100g - create_hier_cell_mac_100g [current_bd_instance .] mac_100g - - # Create instance: one, and set properties - set one [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 one ] - - # Create instance: pcie_dma_0 - create_hier_cell_pcie_dma_0 [current_bd_instance .] pcie_dma_0 - - # Create instance: proc_sys_reset_pcie_0, and set properties - set proc_sys_reset_pcie_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 proc_sys_reset_pcie_0 ] - set_property -dict [ list \ - CONFIG.C_EXT_RST_WIDTH {1} \ - ] $proc_sys_reset_pcie_0 - - # Create instance: proc_sys_reset_refclk, and set properties - set proc_sys_reset_refclk [ create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 proc_sys_reset_refclk ] - set_property -dict [ list \ - CONFIG.C_EXT_RST_WIDTH {1} \ - ] $proc_sys_reset_refclk - - # Create instance: smartconnect_0, and set properties - set smartconnect_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_0 ] - set_property -dict [ list \ - CONFIG.NUM_CLKS {4} \ - CONFIG.NUM_MI {6} \ - CONFIG.NUM_SI {1} \ - ] $smartconnect_0 - - # Create instance: xlconcat_irq, and set properties - set xlconcat_irq [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconcat:2.1 xlconcat_irq ] - - # Create instance: zero, and set properties - set zero [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 zero ] - set_property -dict [ list \ - CONFIG.CONST_VAL {0} \ - ] $zero - - # Create interface connections - connect_bd_intf_net -intf_net S_AXIS_100G_1 [get_bd_intf_pins jungfraujoch_0/eth_out] [get_bd_intf_pins mac_100g/s_axis_eth_out] - connect_bd_intf_net -intf_net cms_subsystem_0_satellite_uart [get_bd_intf_ports satellite_uart_0] [get_bd_intf_pins cms_subsystem_0/satellite_uart] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p0 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_0] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p0] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p1 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_1] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p1] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p2 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_2] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p2] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p3 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_3] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p3] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p4 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_4] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p4] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p5 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_5] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p5] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p6 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_6] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p6] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p7 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_7] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p7] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p8 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_8] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p8] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p9 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_9] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p9] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p10 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_10] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p10] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p11 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_11] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p11] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axis_c2h_data [get_bd_intf_pins jungfraujoch_0/m_axis_c2h_data] [get_bd_intf_pins pcie_dma_0/s_axis_c2h_data] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axis_c2h_datamover_cmd [get_bd_intf_pins jungfraujoch_0/m_axis_c2h_datamover_cmd] [get_bd_intf_pins pcie_dma_0/s_axis_c2h_cmd] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axis_h2c_datamover_cmd [get_bd_intf_pins jungfraujoch_0/m_axis_h2c_datamover_cmd] [get_bd_intf_pins pcie_dma_0/s_axis_h2c_cmd] - connect_bd_intf_net -intf_net mac_100g_1_M_AXIS_100G [get_bd_intf_pins jungfraujoch_0/eth_in] [get_bd_intf_pins mac_100g/m_axis_eth_in] - connect_bd_intf_net -intf_net mac_100g_1_qsfp0 [get_bd_intf_ports qsfp0] [get_bd_intf_pins mac_100g/qsfp] - connect_bd_intf_net -intf_net pcie0_ref_1 [get_bd_intf_ports pcie0_ref] [get_bd_intf_pins pcie_dma_0/pcie_refclk] - connect_bd_intf_net -intf_net pcie_dma_0_M_AXI [get_bd_intf_pins pcie_dma_0/m_axi_ctrl] [get_bd_intf_pins smartconnect_0/S00_AXI] - connect_bd_intf_net -intf_net pcie_dma_0_pcie0_mgt [get_bd_intf_ports pcie0_mgt] [get_bd_intf_pins pcie_dma_0/pcie_mgt] - connect_bd_intf_net -intf_net qsfp0_ref_1 [get_bd_intf_ports qsfp0_ref] [get_bd_intf_pins mac_100g/qsfp_ref] - connect_bd_intf_net -intf_net ref100_1 [get_bd_intf_ports ref100] [get_bd_intf_pins clk_wiz_0/CLK_IN1_D] - connect_bd_intf_net -intf_net s_axi_1 [get_bd_intf_pins jungfraujoch_0/s_axi] [get_bd_intf_pins smartconnect_0/M00_AXI] - connect_bd_intf_net -intf_net s_axi_2 [get_bd_intf_pins mac_100g/s_axi] [get_bd_intf_pins smartconnect_0/M02_AXI] - connect_bd_intf_net -intf_net s_axis_h2c_data_1 [get_bd_intf_pins jungfraujoch_0/s_axis_h2c_data] [get_bd_intf_pins pcie_dma_0/m_axis_h2c_data] - connect_bd_intf_net -intf_net smartconnect_0_M01_AXI [get_bd_intf_pins smartconnect_0/M01_AXI] [get_bd_intf_pins cms_subsystem_0/s_axi_ctrl] - connect_bd_intf_net -intf_net smartconnect_0_M03_AXI [get_bd_intf_pins axi_quad_spi_0/AXI_LITE] [get_bd_intf_pins smartconnect_0/M03_AXI] - connect_bd_intf_net -intf_net smartconnect_0_M04_AXI [get_bd_intf_pins axi_intc_0/s_axi] [get_bd_intf_pins smartconnect_0/M04_AXI] - connect_bd_intf_net -intf_net smartconnect_0_M05_AXI [get_bd_intf_pins pcie_dma_0/s_axi_dma_ctrl] [get_bd_intf_pins smartconnect_0/M05_AXI] - - # Create port connections - connect_bd_net -net axi_clk_1 [get_bd_pins pcie_dma_0/axi_aclk] [get_bd_pins proc_sys_reset_pcie_0/slowest_sync_clk] [get_bd_pins smartconnect_0/aclk3] - connect_bd_net -net axi_quad_spi_0_ip2intc_irpt [get_bd_pins axi_quad_spi_0/ip2intc_irpt] [get_bd_pins xlconcat_irq/In0] - connect_bd_net -net cms_subsystem_0_interrupt_host [get_bd_pins cms_subsystem_0/interrupt_host] [get_bd_pins xlconcat_irq/In1] - connect_bd_net -net hbm_infrastructure_hbm_temp_trip_1 [get_bd_ports hbm_cattrip] [get_bd_pins cms_subsystem_0/interrupt_hbm_cattrip] [get_bd_pins hbm_infrastructure/hbm_cattrip] - connect_bd_net -net hbm_infrastructure_hbm_temperature_1 [get_bd_pins cms_subsystem_0/hbm_temp_1] [get_bd_pins hbm_infrastructure/hbm_temperature_0] - connect_bd_net -net hbm_infrastructure_hbm_temperature_2 [get_bd_pins cms_subsystem_0/hbm_temp_2] [get_bd_pins hbm_infrastructure/hbm_temperature_1] - connect_bd_net -net mac_100g_eth_busy_n [get_bd_ports qsfp0_led_busy] [get_bd_pins mac_100g/eth_busy_n] - connect_bd_net -net mac_100g_stat_rx_aligned_n [get_bd_ports qsfp0_led_conn] [get_bd_pins mac_100g/stat_rx_aligned_n] - connect_bd_net -net net_refclk50 [get_bd_pins axi_intc_0/s_axi_aclk] [get_bd_pins axi_intc_1/s_axi_aclk] [get_bd_pins axi_quad_spi_0/s_axi_aclk] [get_bd_pins clk_wiz_0/clk_out1] [get_bd_pins cms_subsystem_0/aclk_ctrl] [get_bd_pins proc_sys_reset_refclk/slowest_sync_clk] [get_bd_pins proc_sys_reset_refclk1/slowest_sync_clk] [get_bd_pins smartconnect_0/aclk2] - connect_bd_net -net net_refclk100 [get_bd_pins axi_quad_spi_0/ext_spi_clk] [get_bd_pins clk_wiz_0/clk_out2] [get_bd_pins hbm_infrastructure/refclk100] [get_bd_pins mac_100g/refclk100] [get_bd_pins smartconnect_0/aclk1] - connect_bd_net -net net_refclk200 [get_bd_pins clk_wiz_0/clk_out3] [get_bd_pins hbm_infrastructure/axi_clk] [get_bd_pins jungfraujoch_0/axi_clk] [get_bd_pins mac_100g/axiclk] [get_bd_pins pcie_dma_0/refclk200] [get_bd_pins smartconnect_0/aclk] - connect_bd_net -net one_dout [get_bd_pins one/dout] [get_bd_pins cms_subsystem_0/aresetn_ctrl] [get_bd_pins proc_sys_reset_pcie_0/dcm_locked] [get_bd_pins proc_sys_reset_refclk/dcm_locked] - connect_bd_net -net pcie_dma_0_axi_aresetn [get_bd_pins pcie_dma_0/axi_aresetn] [get_bd_pins proc_sys_reset_pcie_0/ext_reset_in] [get_bd_pins proc_sys_reset_refclk/ext_reset_in] [get_bd_pins smartconnect_0/aresetn] - connect_bd_net -net pcie_perstn_1 [get_bd_ports pcie_perstn] [get_bd_pins pcie_dma_0/pcie_perstn] - connect_bd_net -net proc_sys_reset_pcie_0_interconnect_aresetn [get_bd_pins pcie_dma_0/axi_clk_resetn] [get_bd_pins proc_sys_reset_pcie_0/interconnect_aresetn] - connect_bd_net -net proc_sys_reset_refclk_peripheral_aresetn [get_bd_pins axi_intc_0/s_axi_aresetn] [get_bd_pins axi_quad_spi_0/s_axi_aresetn] [get_bd_pins hbm_infrastructure/axi_resetn] [get_bd_pins jungfraujoch_0/ap_rst_n] [get_bd_pins mac_100g/ap_rst_n] [get_bd_pins proc_sys_reset_refclk/peripheral_aresetn] - connect_bd_net -net resetn_1 [get_bd_pins jungfraujoch_0/axi_rst_n] [get_bd_pins mac_100g/resetn] [get_bd_pins pcie_dma_0/refclk200_resetn] [get_bd_pins proc_sys_reset_refclk/interconnect_aresetn] - connect_bd_net -net satellite_gpio_0_1 [get_bd_ports satellite_gpio_0] [get_bd_pins cms_subsystem_0/satellite_gpio] - connect_bd_net -net usr_irq_req_1 [get_bd_pins axi_intc_0/irq] [get_bd_pins pcie_dma_0/usr_irq_req] - connect_bd_net -net xlconcat_irq_dout [get_bd_pins axi_intc_0/intr] [get_bd_pins axi_intc_1/intr] [get_bd_pins xlconcat_irq/dout] - connect_bd_net -net zero_dout [get_bd_pins axi_quad_spi_0/usrcclkts] [get_bd_pins zero/dout] - - # Create address segments - assign_bd_address -offset 0x00010000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/action_config_0/s_axi/reg0] -force - assign_bd_address -offset 0x00020000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs mac_100g/cmac_usplus_0/s_axi/Reg] -force - assign_bd_address -offset 0x00030000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/mailbox_0/S0_AXI/Reg] -force - assign_bd_address -offset 0x00040000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs axi_quad_spi_0/AXI_LITE/Reg] -force - assign_bd_address -offset 0x00050000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs axi_intc_0/S_AXI/Reg] -force - assign_bd_address -offset 0x00060000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_calibration_addr/S_AXI/Mem0] -force - assign_bd_address -offset 0x00070000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/axi_firewall_0/S_AXI_CTL/Control] -force - assign_bd_address -offset 0x00090000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/xdma_0/S_AXI_LITE/CTL0] -force - assign_bd_address -offset 0x000C0000 -range 0x00040000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs cms_subsystem_0/s_axi_ctrl/Mem] -force - assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator_0/S_AXI/Mem0] -force - assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces jungfraujoch_0/internal_packet_generator_0/Data_m_axi_frame] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator_1/S_AXI/Mem0] -force - assign_bd_address - - set_property -dict [ list \ - CONFIG.CMAC_CORE_SELECT {CMACE4_X0Y3} \ - CONFIG.GT_GROUP_SELECT {X0Y24~X0Y27} \ - ] [get_bd_cells mac_100g/cmac_usplus_0] - - set_property -dict [list \ - CONFIG.MAX_MODULES_FPGA_PARAM {0x00000010} \ - CONFIG.DESIGN_NUMBER {0} \ - ] [get_bd_cells jungfraujoch_0/action_config_0] - - # Restore current instance - current_bd_instance $oldCurInst - - save_bd_design - validate_bd_design - save_bd_design -} -# End of create_root_design() - -################################################################## -# MAIN FLOW -################################################################## - -create_root_design "" diff --git a/fpga/scripts/build_pcie_design_100g.tcl b/fpga/scripts/build_pcie_design_100g.tcl deleted file mode 100644 index 2b621efd..00000000 --- a/fpga/scripts/build_pcie_design_100g.tcl +++ /dev/null @@ -1,65 +0,0 @@ -## Copyright (2019-2022) Paul Scherrer Institute -## SPDX-License-Identifier: CERN-OHL-S-2.0 - -set origin_dir [file dirname [file normalize [info script]]] - -set project [create_project -force -part "xcu55c-fsvh2892-2L-e" "jfjoch_pcie" "vivado"] -current_project $project - -# Get the directory path for the new project -set proj_dir [get_property directory $project] - -set_property ip_repo_paths [concat [get_property ip_repo_paths [current_project]] "action/ip"] [current_project] - -update_ip_catalog - -# Create 'sources_1' fileset (if not found) -if {[string equal [get_filesets -quiet sources_1] ""]} { - create_fileset -srcset sources_1 -} -set source_set [get_filesets sources_1] - -set hdl_files [list \ - [file normalize "action/hw/hdl/action_config.v"] \ - [file normalize "action/hw/hdl/resetn_sync.v"] \ - [file normalize "action/hw/hdl/check_eth_busy.v"] \ - [file normalize "action/hw/hdl/gen_xdma_descriptor.v"] \ -] - -if { [llength $hdl_files] > 0 } { - add_files -norecurse -fileset $source_set $hdl_files -} - -if {[string equal [get_filesets -quiet constrs_1] ""]} { - create_fileset -constrset constrs_1 -} -set constraint_set [get_filesets constrs_1] - -# Add constraints files -# Put target .xdc as LAST in list -set constraint_files [list \ - [file normalize "$origin_dir/../xdc/pcie_u55c.xdc"] \ - [file normalize "$origin_dir/../xdc/pcie_timing.xdc"] \ -] - -add_files -norecurse -fileset $constraint_set $constraint_files -set_property "target_constrs_file" [lindex $constraint_files 0] $constraint_set - -source $origin_dir/network_stack.tcl -source $origin_dir/hbm_u55c.tcl -source $origin_dir/jfjoch.tcl -source $origin_dir/pcie_dma.tcl -source $origin_dir/mac_100g_pcie.tcl -source $origin_dir/bd_pcie_100g.tcl >> build_pcie.log - -make_wrapper -files [get_files "vivado/jfjoch_pcie.srcs/sources_1/bd/jfjoch_pcie/jfjoch_pcie.bd"] -top >> make_wrapper.log -add_files -norecurse "vivado/jfjoch_pcie.gen/sources_1/bd/jfjoch_pcie/hdl/jfjoch_pcie_wrapper.v" -set_property top jfjoch_pcie_wrapper [current_fileset] -update_compile_order -fileset sources_1 - -set_property synth_checkpoint_mode None [get_files vivado/jfjoch_pcie.srcs/sources_1/bd/jfjoch_pcie/jfjoch_pcie.bd] -generate_target all [get_files vivado/jfjoch_pcie.srcs/sources_1/bd/jfjoch_pcie/jfjoch_pcie.bd] >> generate_target.log - -set_property flow {Vivado Synthesis 2022} [get_runs synth_1] -set_property strategy Flow_PerfOptimized_high [get_runs synth_1] -set_property strategy Performance_ExploreWithRemap [get_runs impl_1] diff --git a/fpga/scripts/pcie_dma.tcl b/fpga/scripts/pcie_dma.tcl index f4dc738a..1e141532 100644 --- a/fpga/scripts/pcie_dma.tcl +++ b/fpga/scripts/pcie_dma.tcl @@ -220,223 +220,3 @@ proc create_hier_cell_pcie_dma_0 { parentCell nameHier } { # Restore current instance current_bd_instance $oldCurInst } - -# Hierarchical cell: pcie_dma_1 -proc create_hier_cell_pcie_dma_1 { parentCell nameHier } { - - variable script_folder - - if { $parentCell eq "" || $nameHier eq "" } { - catch {common::send_gid_msg -ssname BD::TCL -id 2092 -severity "ERROR" "create_hier_cell_pcie_dma() - Empty argument(s)!"} - return - } - - # Get object for parentCell - set parentObj [get_bd_cells $parentCell] - if { $parentObj == "" } { - catch {common::send_gid_msg -ssname BD::TCL -id 2090 -severity "ERROR" "Unable to find parent cell <$parentCell>!"} - return - } - - # Make sure parentObj is hier blk - set parentType [get_property TYPE $parentObj] - if { $parentType ne "hier" } { - catch {common::send_gid_msg -ssname BD::TCL -id 2091 -severity "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} - return - } - - # Save current instance; Restore later - set oldCurInst [current_bd_instance .] - - # Set parent object as current - current_bd_instance $parentObj - - # Create cell and set as current instance - set hier_obj [create_bd_cell -type hier $nameHier] - current_bd_instance $hier_obj - - # Create interface pins - create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_ctrl - - create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 m_axis_h2c_data - - create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:pcie_7x_mgt_rtl:1.0 pcie_mgt - - create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 pcie_refclk - - create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_dma_ctrl - - create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 s_axis_c2h_cmd - - create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 s_axis_c2h_data - - create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:axis_rtl:1.0 s_axis_h2c_cmd - - - # Create pins - create_bd_pin -dir O -type clk axi_aclk - create_bd_pin -dir O -type rst axi_aresetn - create_bd_pin -dir I -type rst axi_clk_resetn - create_bd_pin -dir I -type rst pcie_perstn - create_bd_pin -dir I -type clk refclk200 - create_bd_pin -dir I -type rst refclk200_resetn - create_bd_pin -dir I usr_irq_req - - # Create instance: axi_firewall_0, and set properties - set axi_firewall_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_firewall:1.2 axi_firewall_0 ] - - # Create instance: axis_clock_converter_c2h_cmd, and set properties - set axis_clock_converter_c2h_cmd [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_clock_converter:1.1 axis_clock_converter_c2h_cmd ] - set_property -dict [ list \ - CONFIG.SYNCHRONIZATION_STAGES {3} \ - ] $axis_clock_converter_c2h_cmd - - # Create instance: axis_clock_converter_c2h_data, and set properties - set axis_clock_converter_c2h_data [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_clock_converter:1.1 axis_clock_converter_c2h_data ] - set_property -dict [ list \ - CONFIG.SYNCHRONIZATION_STAGES {3} \ - ] $axis_clock_converter_c2h_data - - # Create instance: axis_clock_converter_h2c_cmd, and set properties - set axis_clock_converter_h2c_cmd [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_clock_converter:1.1 axis_clock_converter_h2c_cmd ] - set_property -dict [ list \ - CONFIG.SYNCHRONIZATION_STAGES {3} \ - ] $axis_clock_converter_h2c_cmd - - # Create instance: axis_clock_converter_h2c_data, and set properties - set axis_clock_converter_h2c_data [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_clock_converter:1.1 axis_clock_converter_h2c_data ] - set_property -dict [ list \ - CONFIG.SYNCHRONIZATION_STAGES {3} \ - ] $axis_clock_converter_h2c_data - - # Create instance: gen_xdma_descriptor_c2h, and set properties - set block_name gen_xdma_descriptor - set block_cell_name gen_xdma_descriptor_c2h - if { [catch {set gen_xdma_descriptor_c2h [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { - catch {common::send_gid_msg -ssname BD::TCL -id 2095 -severity "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} - return 1 - } elseif { $gen_xdma_descriptor_c2h eq "" } { - catch {common::send_gid_msg -ssname BD::TCL -id 2096 -severity "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} - return 1 - } - - # Create instance: gen_xdma_descriptor_h2c, and set properties - set block_name gen_xdma_descriptor - set block_cell_name gen_xdma_descriptor_h2c - if { [catch {set gen_xdma_descriptor_h2c [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { - catch {common::send_gid_msg -ssname BD::TCL -id 2095 -severity "ERROR" "Unable to add referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} - return 1 - } elseif { $gen_xdma_descriptor_h2c eq "" } { - catch {common::send_gid_msg -ssname BD::TCL -id 2096 -severity "ERROR" "Unable to referenced block <$block_name>. Please add the files for ${block_name}'s definition into the project."} - return 1 - } - - # Create instance: pcie_clk_buf_inst, and set properties - set pcie_clk_buf_inst [ create_bd_cell -type ip -vlnv xilinx.com:ip:util_ds_buf:2.2 pcie_clk_buf_inst ] - set_property -dict [ list \ - CONFIG.C_BUF_TYPE {IBUFDSGTE} \ - ] $pcie_clk_buf_inst - - # Create instance: smartconnect_0, and set properties - set smartconnect_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_0 ] - set_property -dict [ list \ - CONFIG.NUM_MI {2} \ - CONFIG.NUM_SI {1} \ - ] $smartconnect_0 - - # Create instance: xdma_0, and set properties - set xdma_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xdma:4.1 xdma_0 ] - set_property -dict [ list \ - CONFIG.INS_LOSS_NYQ {15} \ - CONFIG.PF0_DEVICE_ID_mqdma {9048} \ - CONFIG.PF0_SRIOV_VF_DEVICE_ID {A048} \ - CONFIG.PF1_SRIOV_VF_DEVICE_ID {A148} \ - CONFIG.PF2_DEVICE_ID_mqdma {9248} \ - CONFIG.PF2_SRIOV_VF_DEVICE_ID {A248} \ - CONFIG.PF3_DEVICE_ID_mqdma {9348} \ - CONFIG.PF3_SRIOV_VF_DEVICE_ID {A348} \ - CONFIG.axi_data_width {512_bit} \ - CONFIG.axi_id_width {2} \ - CONFIG.axil_master_64bit_en {false} \ - CONFIG.axilite_master_en {true} \ - CONFIG.axilite_master_size {4} \ - CONFIG.axisten_freq {250} \ - CONFIG.cfg_mgmt_if {false} \ - CONFIG.copy_pf0 {true} \ - CONFIG.coreclk_freq {500} \ - CONFIG.dsc_bypass_rd {0001} \ - CONFIG.dsc_bypass_wr {0001} \ - CONFIG.en_gt_selection {true} \ - CONFIG.ins_loss_profile {Add-in_Card} \ - CONFIG.mode_selection {Advanced} \ - CONFIG.pcie_blk_locn {PCIE4C_X1Y0} \ - CONFIG.pf0_base_class_menu {Processing_accelerators} \ - CONFIG.pf0_class_code {120000} \ - CONFIG.pf0_class_code_base {12} \ - CONFIG.pf0_class_code_interface {00} \ - CONFIG.pf0_class_code_sub {00} \ - CONFIG.pf0_device_id {9048} \ - CONFIG.pf0_msix_cap_pba_bir {BAR_1} \ - CONFIG.pf0_msix_cap_pba_offset {00008FE0} \ - CONFIG.pf0_msix_cap_table_bir {BAR_1} \ - CONFIG.pf0_msix_cap_table_offset {00008000} \ - CONFIG.pf0_msix_cap_table_size {01F} \ - CONFIG.pf0_msix_enabled {true} \ - CONFIG.pf0_sub_class_interface_menu {Unknown} \ - CONFIG.pf0_subsystem_id {5232} \ - CONFIG.pf0_subsystem_vendor_id {10EE} \ - CONFIG.pf1_msix_cap_pba_offset {00000000} \ - CONFIG.pf1_msix_cap_table_offset {00000000} \ - CONFIG.pf1_msix_cap_table_size {000} \ - CONFIG.pl_link_cap_max_link_speed {16.0_GT/s} \ - CONFIG.pl_link_cap_max_link_width {X8} \ - CONFIG.plltype {QPLL0} \ - CONFIG.runbit_fix {false} \ - CONFIG.select_quad {GTY_Quad_225} \ - CONFIG.vendor_id {10EE} \ - CONFIG.xdma_axi_intf_mm {AXI_Stream} \ - CONFIG.xdma_axilite_slave {true} \ - CONFIG.xdma_wnum_chnl {1} \ - ] $xdma_0 - - # Create interface connections - connect_bd_intf_net -intf_net Conn1 [get_bd_intf_pins s_axis_c2h_cmd] [get_bd_intf_pins axis_clock_converter_c2h_cmd/S_AXIS] - connect_bd_intf_net -intf_net Conn2 [get_bd_intf_pins m_axi_ctrl] [get_bd_intf_pins axi_firewall_0/M_AXI] - connect_bd_intf_net -intf_net Conn3 [get_bd_intf_pins pcie_mgt] [get_bd_intf_pins xdma_0/pcie_mgt] - connect_bd_intf_net -intf_net Conn4 [get_bd_intf_pins s_axis_c2h_data] [get_bd_intf_pins axis_clock_converter_c2h_data/S_AXIS] - connect_bd_intf_net -intf_net Conn5 [get_bd_intf_pins pcie_refclk] [get_bd_intf_pins pcie_clk_buf_inst/CLK_IN_D] - connect_bd_intf_net -intf_net Conn6 [get_bd_intf_pins m_axis_h2c_data] [get_bd_intf_pins axis_clock_converter_h2c_data/M_AXIS] - connect_bd_intf_net -intf_net Conn7 [get_bd_intf_pins s_axis_h2c_cmd] [get_bd_intf_pins axis_clock_converter_h2c_cmd/S_AXIS] - connect_bd_intf_net -intf_net axis_clock_converter_c2h_cmd_M_AXIS [get_bd_intf_pins axis_clock_converter_c2h_cmd/M_AXIS] [get_bd_intf_pins gen_xdma_descriptor_c2h/S_AXIS] - connect_bd_intf_net -intf_net axis_clock_converter_c2h_data_M_AXIS [get_bd_intf_pins axis_clock_converter_c2h_data/M_AXIS] [get_bd_intf_pins xdma_0/S_AXIS_C2H_0] - connect_bd_intf_net -intf_net axis_clock_converter_h2c_cmd_M_AXIS [get_bd_intf_pins axis_clock_converter_h2c_cmd/M_AXIS] [get_bd_intf_pins gen_xdma_descriptor_h2c/S_AXIS] - connect_bd_intf_net -intf_net s_axi_dma_ctrl_1 [get_bd_intf_pins s_axi_dma_ctrl] [get_bd_intf_pins xdma_0/S_AXI_LITE] - connect_bd_intf_net -intf_net smartconnect_0_M00_AXI [get_bd_intf_pins axi_firewall_0/S_AXI] [get_bd_intf_pins smartconnect_0/M00_AXI] - connect_bd_intf_net -intf_net smartconnect_0_M01_AXI [get_bd_intf_pins axi_firewall_0/S_AXI_CTL] [get_bd_intf_pins smartconnect_0/M01_AXI] - connect_bd_intf_net -intf_net xdma_0_M_AXIS_H2C_0 [get_bd_intf_pins axis_clock_converter_h2c_data/S_AXIS] [get_bd_intf_pins xdma_0/M_AXIS_H2C_0] - connect_bd_intf_net -intf_net xdma_0_M_AXI_LITE [get_bd_intf_pins smartconnect_0/S00_AXI] [get_bd_intf_pins xdma_0/M_AXI_LITE] - - # Create port connections - connect_bd_net -net gen_xdma_descriptor_c2h_0_dsc_addr [get_bd_pins gen_xdma_descriptor_c2h/dsc_addr] [get_bd_pins xdma_0/c2h_dsc_byp_dst_addr_0] [get_bd_pins xdma_0/c2h_dsc_byp_src_addr_0] - connect_bd_net -net gen_xdma_descriptor_c2h_0_dsc_ctl [get_bd_pins gen_xdma_descriptor_c2h/dsc_ctl] [get_bd_pins xdma_0/c2h_dsc_byp_ctl_0] - connect_bd_net -net gen_xdma_descriptor_c2h_0_dsc_len [get_bd_pins gen_xdma_descriptor_c2h/dsc_len] [get_bd_pins xdma_0/c2h_dsc_byp_len_0] - connect_bd_net -net gen_xdma_descriptor_c2h_0_dsc_load [get_bd_pins gen_xdma_descriptor_c2h/dsc_load] [get_bd_pins xdma_0/c2h_dsc_byp_load_0] - connect_bd_net -net gen_xdma_descriptor_h2c_0_dsc_addr [get_bd_pins gen_xdma_descriptor_h2c/dsc_addr] [get_bd_pins xdma_0/h2c_dsc_byp_dst_addr_0] [get_bd_pins xdma_0/h2c_dsc_byp_src_addr_0] - connect_bd_net -net gen_xdma_descriptor_h2c_0_dsc_ctl [get_bd_pins gen_xdma_descriptor_h2c/dsc_ctl] [get_bd_pins xdma_0/h2c_dsc_byp_ctl_0] - connect_bd_net -net gen_xdma_descriptor_h2c_0_dsc_len [get_bd_pins gen_xdma_descriptor_h2c/dsc_len] [get_bd_pins xdma_0/h2c_dsc_byp_len_0] - connect_bd_net -net gen_xdma_descriptor_h2c_0_dsc_load [get_bd_pins gen_xdma_descriptor_h2c/dsc_load] [get_bd_pins xdma_0/h2c_dsc_byp_load_0] - connect_bd_net -net pcie_clk_buf_inst_IBUF_DS_ODIV2 [get_bd_pins pcie_clk_buf_inst/IBUF_DS_ODIV2] [get_bd_pins xdma_0/sys_clk] - connect_bd_net -net pcie_clk_buf_inst_IBUF_OUT [get_bd_pins pcie_clk_buf_inst/IBUF_OUT] [get_bd_pins xdma_0/sys_clk_gt] - connect_bd_net -net pcie_perstn_1 [get_bd_pins pcie_perstn] [get_bd_pins xdma_0/sys_rst_n] - connect_bd_net -net net_refclk200 [get_bd_pins refclk200] [get_bd_pins axis_clock_converter_c2h_cmd/s_axis_aclk] [get_bd_pins axis_clock_converter_c2h_data/s_axis_aclk] [get_bd_pins axis_clock_converter_h2c_cmd/s_axis_aclk] [get_bd_pins axis_clock_converter_h2c_data/m_axis_aclk] - connect_bd_net -net net_refclk200_resetn [get_bd_pins refclk200_resetn] [get_bd_pins axis_clock_converter_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_clock_converter_c2h_data/s_axis_aresetn] [get_bd_pins axis_clock_converter_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_clock_converter_h2c_data/m_axis_aresetn] - connect_bd_net -net s_axis_aresetn_1 [get_bd_pins axi_clk_resetn] [get_bd_pins axi_firewall_0/aresetn] [get_bd_pins axis_clock_converter_c2h_cmd/m_axis_aresetn] [get_bd_pins axis_clock_converter_c2h_data/m_axis_aresetn] [get_bd_pins axis_clock_converter_h2c_cmd/m_axis_aresetn] [get_bd_pins axis_clock_converter_h2c_data/s_axis_aresetn] [get_bd_pins gen_xdma_descriptor_c2h/resetn] [get_bd_pins gen_xdma_descriptor_h2c/resetn] [get_bd_pins smartconnect_0/aresetn] - connect_bd_net -net usr_irq_req_1 [get_bd_pins usr_irq_req] [get_bd_pins xdma_0/usr_irq_req] - connect_bd_net -net xdma_0_axi_aclk [get_bd_pins axi_aclk] [get_bd_pins axi_firewall_0/aclk] [get_bd_pins axis_clock_converter_c2h_cmd/m_axis_aclk] [get_bd_pins axis_clock_converter_c2h_data/m_axis_aclk] [get_bd_pins axis_clock_converter_h2c_cmd/m_axis_aclk] [get_bd_pins axis_clock_converter_h2c_data/s_axis_aclk] [get_bd_pins gen_xdma_descriptor_c2h/clk] [get_bd_pins gen_xdma_descriptor_h2c/clk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins xdma_0/axi_aclk] - connect_bd_net -net xdma_0_axi_aresetn [get_bd_pins axi_aresetn] [get_bd_pins xdma_0/axi_aresetn] - connect_bd_net -net xdma_0_c2h_dsc_byp_ready_0 [get_bd_pins gen_xdma_descriptor_c2h/dsc_ready] [get_bd_pins xdma_0/c2h_dsc_byp_ready_0] - connect_bd_net -net xdma_0_h2c_dsc_byp_ready_0 [get_bd_pins gen_xdma_descriptor_h2c/dsc_ready] [get_bd_pins xdma_0/h2c_dsc_byp_ready_0] - - # Restore current instance - current_bd_instance $oldCurInst -} From 35aa21fefec08ee75f45aaf7bbd1fffe9b0ec08f Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 7 Sep 2023 12:23:38 +0200 Subject: [PATCH 175/224] FPGA: Increase FIFO size to improve buffering capability --- fpga/scripts/jfjoch.tcl | 2 +- fpga/scripts/mac_100g_pcie.tcl | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index ba039c77..52ef5551 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -186,7 +186,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { # Create instance: axis_data_fifo_5, and set properties set axis_data_fifo_5 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_5 ] set_property -dict [ list \ - CONFIG.FIFO_DEPTH {8192} \ + CONFIG.FIFO_DEPTH {32768} \ CONFIG.FIFO_MEMORY_TYPE {ultra} \ CONFIG.HAS_AEMPTY {1} \ CONFIG.HAS_AFULL {1} \ diff --git a/fpga/scripts/mac_100g_pcie.tcl b/fpga/scripts/mac_100g_pcie.tcl index 87785efd..0a157394 100644 --- a/fpga/scripts/mac_100g_pcie.tcl +++ b/fpga/scripts/mac_100g_pcie.tcl @@ -65,7 +65,7 @@ proc create_hier_cell_mac_100g { parentCell nameHier } { # Create instance: axis_data_fifo_rx_1, and set properties set axis_data_fifo_rx_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_rx_1 ] set_property -dict [ list \ - CONFIG.FIFO_DEPTH {4096} \ + CONFIG.FIFO_DEPTH {16384} \ CONFIG.FIFO_MEMORY_TYPE {ultra} \ CONFIG.ENABLE_ECC {1} \ ] $axis_data_fifo_rx_1 From 1d1894d7d6e67742c698978766633c305309fb41 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 7 Sep 2023 13:54:38 +0200 Subject: [PATCH 176/224] FPGA: Use only single HBM stack --- fpga/scripts/bd_pcie.tcl | 3 +- fpga/scripts/hbm_u55c.tcl | 102 ++++++++++---------------------------- 2 files changed, 27 insertions(+), 78 deletions(-) diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index d910915a..39c0e2fa 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -414,7 +414,6 @@ proc create_root_design { parentCell } { connect_bd_net -net cms_subsystem_0_interrupt_host [get_bd_pins cms_subsystem_0/interrupt_host] [get_bd_pins xlconcat_irq/In1] connect_bd_net -net hbm_infrastructure_hbm_temp_trip_1 [get_bd_ports hbm_cattrip] [get_bd_pins cms_subsystem_0/interrupt_hbm_cattrip] [get_bd_pins hbm_infrastructure/hbm_cattrip] connect_bd_net -net hbm_infrastructure_hbm_temperature_1 [get_bd_pins cms_subsystem_0/hbm_temp_1] [get_bd_pins hbm_infrastructure/hbm_temperature_0] - connect_bd_net -net hbm_infrastructure_hbm_temperature_2 [get_bd_pins cms_subsystem_0/hbm_temp_2] [get_bd_pins hbm_infrastructure/hbm_temperature_1] connect_bd_net -net mac_100g_eth_busy_n [get_bd_ports qsfp0_led_busy] [get_bd_pins mac_100g/eth_busy_n] connect_bd_net -net mac_100g_stat_rx_aligned_n [get_bd_ports qsfp0_led_conn] [get_bd_pins mac_100g/stat_rx_aligned_n] connect_bd_net -net net_refclk50 [get_bd_pins axi_intc_0/s_axi_aclk] [get_bd_pins axi_intc_1/s_axi_aclk] [get_bd_pins axi_quad_spi_0/s_axi_aclk] [get_bd_pins clk_wiz_0/clk_out1] [get_bd_pins cms_subsystem_0/aclk_ctrl] [get_bd_pins proc_sys_reset_refclk/slowest_sync_clk] [get_bd_pins proc_sys_reset_refclk1/slowest_sync_clk] [get_bd_pins smartconnect_0/aclk2] @@ -429,7 +428,7 @@ proc create_root_design { parentCell } { connect_bd_net -net satellite_gpio_0_1 [get_bd_ports satellite_gpio_0] [get_bd_pins cms_subsystem_0/satellite_gpio] connect_bd_net -net usr_irq_req_1 [get_bd_pins axi_intc_0/irq] [get_bd_pins pcie_dma_0/usr_irq_req] connect_bd_net -net xlconcat_irq_dout [get_bd_pins axi_intc_0/intr] [get_bd_pins axi_intc_1/intr] [get_bd_pins xlconcat_irq/dout] - connect_bd_net -net zero_dout [get_bd_pins axi_quad_spi_0/usrcclkts] [get_bd_pins zero/dout] + connect_bd_net -net zero_dout [get_bd_pins axi_quad_spi_0/usrcclkts] [get_bd_pins zero/dout] [get_bd_pins cms_subsystem_0/hbm_temp_2] # Create address segments assign_bd_address -offset 0x00010000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/action_config_0/s_axi/reg0] -force diff --git a/fpga/scripts/hbm_u55c.tcl b/fpga/scripts/hbm_u55c.tcl index 15442109..442b15bb 100644 --- a/fpga/scripts/hbm_u55c.tcl +++ b/fpga/scripts/hbm_u55c.tcl @@ -37,16 +37,12 @@ proc create_hier_cell_hbm_infrastructure { parentCell nameHier } { set hier_obj [create_bd_cell -type hier $nameHier] current_bd_instance $hier_obj - create_bd_pin -dir O apb_complete_0 - create_bd_pin -dir O apb_complete_1 create_bd_pin -dir I -type clk axi_clk create_bd_pin -dir I -type rst axi_resetn - create_bd_pin -dir I -type rst axi_resetn_1 create_bd_pin -dir I -type clk refclk100 create_bd_pin -dir O hbm_cattrip set hbm_temperature_0 [ create_bd_pin -dir O -from 6 -to 0 hbm_temperature_0 ] - set hbm_temperature_1 [ create_bd_pin -dir O -from 6 -to 0 hbm_temperature_1 ] # Create instance: hbm, and set properties set hbm [ create_bd_cell -type ip -vlnv xilinx.com:ip:hbm:1.0 hbm ] @@ -60,30 +56,30 @@ proc create_hier_cell_hbm_infrastructure { parentCell nameHier } { CONFIG.USER_APB_PCLK_PERIOD_0 {10.0} \ CONFIG.USER_AUTO_POPULATE {yes} \ CONFIG.USER_CLK_SEL_LIST0 {AXI_07_ACLK} \ - CONFIG.USER_CLK_SEL_LIST1 {AXI_19_ACLK} \ + CONFIG.USER_CLK_SEL_LIST1 {AXI_16_ACLK} \ CONFIG.USER_DFI_CLK0_FREQ {450.000} \ CONFIG.USER_HBM_CP_0 {6} \ - CONFIG.USER_HBM_CP_1 {6} \ - CONFIG.USER_HBM_DENSITY {16GB} \ + CONFIG.USER_HBM_CP_1 {3} \ + CONFIG.USER_HBM_DENSITY {8GB} \ CONFIG.USER_HBM_FBDIV_0 {36} \ - CONFIG.USER_HBM_FBDIV_1 {36} \ + CONFIG.USER_HBM_FBDIV_1 {5} \ CONFIG.USER_HBM_HEX_CP_RES_0 {0x0000A600} \ - CONFIG.USER_HBM_HEX_CP_RES_1 {0x0000A600} \ + CONFIG.USER_HBM_HEX_CP_RES_1 {0x0000B300} \ CONFIG.USER_HBM_HEX_FBDIV_CLKOUTDIV_0 {0x00000902} \ - CONFIG.USER_HBM_HEX_FBDIV_CLKOUTDIV_1 {0x00000902} \ + CONFIG.USER_HBM_HEX_FBDIV_CLKOUTDIV_1 {0x00000142} \ CONFIG.USER_HBM_HEX_LOCK_FB_REF_DLY_0 {0x00001f1f} \ - CONFIG.USER_HBM_HEX_LOCK_FB_REF_DLY_1 {0x00001f1f} \ + CONFIG.USER_HBM_HEX_LOCK_FB_REF_DLY_1 {0x00000a0a} \ CONFIG.USER_HBM_LOCK_FB_DLY_0 {31} \ - CONFIG.USER_HBM_LOCK_FB_DLY_1 {31} \ + CONFIG.USER_HBM_LOCK_FB_DLY_1 {10} \ CONFIG.USER_HBM_LOCK_REF_DLY_0 {31} \ - CONFIG.USER_HBM_LOCK_REF_DLY_1 {31} \ + CONFIG.USER_HBM_LOCK_REF_DLY_1 {10} \ CONFIG.USER_HBM_REF_CLK_0 {100} \ CONFIG.USER_HBM_REF_CLK_PS_0 {5000.00} \ CONFIG.USER_HBM_REF_CLK_XDC_0 {10.00} \ CONFIG.USER_HBM_REF_OUT_CLK_0 {1800} \ CONFIG.USER_HBM_RES_0 {10} \ - CONFIG.USER_HBM_RES_1 {10} \ - CONFIG.USER_HBM_STACK {2} \ + CONFIG.USER_HBM_RES_1 {11} \ + CONFIG.USER_HBM_STACK {1} \ CONFIG.USER_HBM_TCK_0 {900} \ CONFIG.USER_HBM_TCK_0_PERIOD {1.1111111111111112} \ CONFIG.USER_MC0_ENABLE_ECC_CORRECTION {true} \ @@ -222,6 +218,7 @@ proc create_hier_cell_hbm_infrastructure { parentCell nameHier } { CONFIG.USER_MC9_LOOKAHEAD_SBRF {true} \ CONFIG.USER_MC9_REF_TEMP_COMP {false} \ CONFIG.USER_MC9_TRAFFIC_OPTION {Linear} \ + CONFIG.USER_MC_ENABLE_08 {FALSE} \ CONFIG.USER_MC_ENABLE_09 {FALSE} \ CONFIG.USER_MC_ENABLE_10 {FALSE} \ CONFIG.USER_MC_ENABLE_11 {FALSE} \ @@ -230,15 +227,15 @@ proc create_hier_cell_hbm_infrastructure { parentCell nameHier } { CONFIG.USER_MC_ENABLE_14 {FALSE} \ CONFIG.USER_MC_ENABLE_15 {FALSE} \ CONFIG.USER_MC_ENABLE_APB_01 {FALSE} \ - CONFIG.USER_MEMORY_DISPLAY {16384} \ - CONFIG.USER_PHY_ENABLE_08 {TRUE} \ - CONFIG.USER_PHY_ENABLE_09 {TRUE} \ - CONFIG.USER_PHY_ENABLE_10 {TRUE} \ - CONFIG.USER_PHY_ENABLE_11 {TRUE} \ - CONFIG.USER_PHY_ENABLE_12 {TRUE} \ - CONFIG.USER_PHY_ENABLE_13 {TRUE} \ - CONFIG.USER_PHY_ENABLE_14 {TRUE} \ - CONFIG.USER_PHY_ENABLE_15 {TRUE} \ + CONFIG.USER_MEMORY_DISPLAY {8192} \ + CONFIG.USER_PHY_ENABLE_08 {FALSE} \ + CONFIG.USER_PHY_ENABLE_09 {FALSE} \ + CONFIG.USER_PHY_ENABLE_10 {FALSE} \ + CONFIG.USER_PHY_ENABLE_11 {FALSE} \ + CONFIG.USER_PHY_ENABLE_12 {FALSE} \ + CONFIG.USER_PHY_ENABLE_13 {FALSE} \ + CONFIG.USER_PHY_ENABLE_14 {FALSE} \ + CONFIG.USER_PHY_ENABLE_15 {FALSE} \ CONFIG.USER_SWITCH_ENABLE_00 {FALSE} \ CONFIG.USER_SWITCH_ENABLE_01 {FALSE} \ CONFIG.USER_TEMP_POLL_CNT_0 {100000} \ @@ -258,26 +255,13 @@ proc create_hier_cell_hbm_infrastructure { parentCell nameHier } { CONFIG.USER_tXP_0 {0x07} \ ] $hbm - # Create instance: util_vector_logic_0, and set properties - set util_vector_logic_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:util_vector_logic:2.0 util_vector_logic_0 ] - set_property -dict [ list \ - CONFIG.C_OPERATION {or} \ - CONFIG.C_SIZE {1} \ - CONFIG.LOGO_FILE {data/sym_orgate.png} \ - ] $util_vector_logic_0 - connect_bd_net [get_bd_pins hbm_temperature_0] [get_bd_pins hbm/DRAM_0_STAT_TEMP] - connect_bd_net [get_bd_pins hbm_temperature_1] [get_bd_pins hbm/DRAM_1_STAT_TEMP] - connect_bd_net -net hbm_DRAM_0_STAT_CATTRIP [get_bd_pins hbm/DRAM_0_STAT_CATTRIP] [get_bd_pins util_vector_logic_0/Op1] - connect_bd_net -net hbm_DRAM_1_STAT_CATTRIP [get_bd_pins hbm/DRAM_1_STAT_CATTRIP] [get_bd_pins util_vector_logic_0/Op2] - connect_bd_net -net util_vector_logic_0_Res [get_bd_pins hbm_cattrip] [get_bd_pins util_vector_logic_0/Res] - connect_bd_net -net hbm_apb_complete_0 [get_bd_pins apb_complete_0] [get_bd_pins hbm/apb_complete_0] - connect_bd_net -net hbm_apb_complete_1 [get_bd_pins apb_complete_1] [get_bd_pins hbm/apb_complete_1] + connect_bd_net -net hbm_DRAM_0_STAT_CATTRIP [get_bd_pins hbm/DRAM_0_STAT_CATTRIP] [get_bd_pins hbm_cattrip] - connect_bd_net [get_bd_pins axi_resetn] [get_bd_pins hbm/APB_0_PRESET_N] [get_bd_pins hbm/APB_1_PRESET_N] - connect_bd_net [get_bd_pins refclk100] [get_bd_pins hbm/APB_0_PCLK] [get_bd_pins hbm/APB_1_PCLK] [get_bd_pins hbm/HBM_REF_CLK_0] [get_bd_pins hbm/HBM_REF_CLK_1] + connect_bd_net [get_bd_pins axi_resetn] [get_bd_pins hbm/APB_0_PRESET_N] + connect_bd_net [get_bd_pins refclk100] [get_bd_pins hbm/APB_0_PCLK] [get_bd_pins hbm/HBM_REF_CLK_0] - for {set i 0} {$i < 12} {incr i} { + for {set i 0} {$i < 16} {incr i} { create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_hbm_$i set cell [create_bd_cell -type ip -vlnv {xilinx.com:ip:axi_register_slice:*} axi_register_slice_$i ] @@ -291,7 +275,7 @@ proc create_hier_cell_hbm_infrastructure { parentCell nameHier } { set axi_prot_conv [create_bd_cell -type ip -vlnv {xilinx.com:ip:axi_protocol_converter:*} axi4_to_axi3_$i] set_property -dict [ list \ - CONFIG.TRANSLATION_MODE {0} \ + CONFIG.TRANSLATION_MODE {2} \ ] $axi_prot_conv connect_bd_net [get_bd_pins axi_clk] [get_bd_pins axi4_to_axi3_$i/aclk] [get_bd_pins axi_register_slice_$i/aclk] @@ -311,40 +295,6 @@ proc create_hier_cell_hbm_infrastructure { parentCell nameHier } { } } - for {set i 12} {$i < 18} {incr i} { - create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_hbm_$i - - set cell [create_bd_cell -type ip -vlnv {xilinx.com:ip:axi_register_slice:*} axi_register_slice_$i ] - set_property -dict [ list \ - CONFIG.REG_AW {15} \ - CONFIG.REG_AR {15} \ - CONFIG.REG_W {15} \ - CONFIG.REG_R {15} \ - CONFIG.REG_B {15} \ - ] $cell - - set axi_prot_conv [create_bd_cell -type ip -vlnv {xilinx.com:ip:axi_protocol_converter:*} axi4_to_axi3_$i] - set_property -dict [ list \ - CONFIG.TRANSLATION_MODE {0} \ - ] $axi_prot_conv - - connect_bd_net [get_bd_pins axi_clk] [get_bd_pins axi4_to_axi3_$i/aclk] [get_bd_pins axi_register_slice_$i/aclk] - - connect_bd_net [get_bd_pins axi_resetn_1] [get_bd_pins axi_register_slice_$i/aresetn] - connect_bd_net [get_bd_pins axi_resetn_1] [get_bd_pins axi4_to_axi3_$i/aresetn] - connect_bd_intf_net [get_bd_intf_pins axi4_to_axi3_$i/M_AXI] [get_bd_intf_pins axi_register_slice_$i/S_AXI] - connect_bd_intf_net [get_bd_intf_pins axi4_to_axi3_$i/S_AXI] [get_bd_intf_pins s_axi_hbm_$i] - if {$i < 10} { - connect_bd_net [get_bd_pins axi_resetn_1] [get_bd_pins hbm/AXI_0${i}_ARESET_N] - connect_bd_net [get_bd_pins axi_clk] [get_bd_pins hbm/AXI_0${i}_ACLK] - connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i/M_AXI] [get_bd_intf_pins hbm/SAXI_0${i}*] - } else { - connect_bd_net [get_bd_pins axi_resetn_1] [get_bd_pins hbm/AXI_${i}_ARESET_N] - connect_bd_net [get_bd_pins axi_clk] [get_bd_pins hbm/AXI_${i}_ACLK] - connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i/M_AXI] [get_bd_intf_pins hbm/SAXI_${i}*] - } - } - # Restore current instance current_bd_instance $oldCurInst } From ae830009c45a67ccabf126971cc645c0082eff14 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 7 Sep 2023 13:55:35 +0200 Subject: [PATCH 177/224] FPGA: Don't override default MAC location in bd_pcie.tcl --- fpga/scripts/bd_pcie.tcl | 5 ----- 1 file changed, 5 deletions(-) diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index 39c0e2fa..df18c8fa 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -444,11 +444,6 @@ proc create_root_design { parentCell } { assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces jungfraujoch_0/internal_packet_generator_0/Data_m_axi_frame] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator_1/S_AXI/Mem0] -force assign_bd_address - set_property -dict [ list \ - CONFIG.CMAC_CORE_SELECT {CMACE4_X0Y3} \ - CONFIG.GT_GROUP_SELECT {X0Y24~X0Y27} \ - ] [get_bd_cells mac_100g/cmac_usplus_0] - set_property -dict [list \ CONFIG.MAX_MODULES_FPGA_PARAM {0x00000010} \ CONFIG.DESIGN_NUMBER {0} \ From 347bfd3f2c6f19be2c88a4619cf6b56cee6ad129 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 7 Sep 2023 21:39:14 +0200 Subject: [PATCH 178/224] HLSSimulateDevice: Remove reference to UltraRAM --- receiver/HLSSimulatedDevice.cpp | 9 +++------ receiver/HLSSimulatedDevice.h | 2 +- 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index 86507c7f..601022cf 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -227,10 +227,7 @@ void HLSSimulatedDevice::HLSMainThread() { ap_uint<8> err_reg; - std::vector> d_uram_p0(MAX_MODULES_FPGA * RAW_MODULE_SIZE / 32); - std::vector> d_uram_p1(MAX_MODULES_FPGA * RAW_MODULE_SIZE / 32); - - while(!din_eth.empty()) + while(!din_eth.empty()) ethernet(din_eth, ip1, arp1, mac_addr, eth_packets, clear_counters); while(!ip1.empty()) @@ -299,12 +296,12 @@ void HLSSimulatedDevice::HLSMainThread() { // 2. Apply pedestal & gain corrections hls_cores.emplace_back([&] { jf_conversion(raw4, converted_1, addr2, addr3, - d_uram_p0.data(), d_uram_p1.data(), (hbm256_t *) (hbm_memory[0].data()), (hbm256_t *) (hbm_memory[1].data()), (hbm256_t *) (hbm_memory[2].data()), (hbm256_t *) (hbm_memory[3].data()), (hbm256_t *) (hbm_memory[4].data()), (hbm256_t *) (hbm_memory[5].data()), (hbm256_t *) (hbm_memory[6].data()), (hbm256_t *) (hbm_memory[7].data()), - (hbm256_t *) (hbm_memory[8].data()), (hbm256_t *) (hbm_memory[9].data())); }); + (hbm256_t *) (hbm_memory[8].data()), (hbm256_t *) (hbm_memory[9].data()), + (hbm256_t *) (hbm_memory[10].data()), (hbm256_t *) (hbm_memory[11].data())); }); // Timer procedure - count how many times write_data is not accepting input (to help track down latency issues) hls_cores.emplace_back([&] { timer_host(converted_1, converted_2, counter_host); }); diff --git a/receiver/HLSSimulatedDevice.h b/receiver/HLSSimulatedDevice.h index b2bf4e39..5f4bf434 100644 --- a/receiver/HLSSimulatedDevice.h +++ b/receiver/HLSSimulatedDevice.h @@ -21,7 +21,7 @@ class HLSSimulatedDevice : public FPGAAcquisitionDevice { ActionConfig cfg; volatile bool idle; - std::vector hbm_memory[10]; + std::vector hbm_memory[16]; hls::stream > work_request_stream; hls::stream > completion_stream; From 38df621cf60a5022e6a8950ad623e243ffa25fb8 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 7 Sep 2023 21:39:24 +0200 Subject: [PATCH 179/224] FPGA: Add save to HBM (work in progress) --- fpga/hls/CMakeLists.txt | 7 +- fpga/hls/hls_jfjoch.h | 12 ++ fpga/hls/save_to_hbm.cpp | 241 ++++++++++++++++++++++++++++++++ fpga/scripts/bd_pcie.tcl | 4 + fpga/scripts/jfjoch.tcl | 8 ++ receiver/HLSSimulatedDevice.cpp | 25 +++- 6 files changed, 294 insertions(+), 3 deletions(-) create mode 100644 fpga/hls/save_to_hbm.cpp diff --git a/fpga/hls/CMakeLists.txt b/fpga/hls/CMakeLists.txt index 098f9084..69aa737e 100644 --- a/fpga/hls/CMakeLists.txt +++ b/fpga/hls/CMakeLists.txt @@ -12,7 +12,8 @@ ADD_LIBRARY( HLSSimulation STATIC icmp.cpp arp.cpp ip_header_checksum.h udp.cpp - sls_detector.cpp) + sls_detector.cpp + save_to_hbm.cpp) TARGET_INCLUDE_DIRECTORIES(HLSSimulation PUBLIC ../include) TARGET_LINK_LIBRARIES(HLSSimulation CommonFunctions) @@ -45,6 +46,7 @@ MAKE_HLS_MODULE(ethernet.cpp ethernet) MAKE_HLS_MODULE(arp.cpp arp) MAKE_HLS_MODULE(udp.cpp udp) MAKE_HLS_MODULE(sls_detector.cpp sls_detector) +MAKE_HLS_MODULE(save_to_hbm.cpp save_to_hbm) SET (HLS_IPS psi_ch_hls_data_collection_fsm_1_0.zip psi_ch_hls_timer_host_1_0.zip @@ -58,7 +60,8 @@ SET (HLS_IPS psi_ch_hls_data_collection_fsm_1_0.zip psi_ch_hls_udp_1_0.zip psi_ch_hls_sls_detector_1_0.zip psi_ch_hls_icmp_1_0.zip - psi_ch_hls_host_writer_1_0.zip) + psi_ch_hls_host_writer_1_0.zip + psi_ch_hls_save_to_hbm_1_0.zip) SET (HLS_IPS ${HLS_IPS} PARENT_SCOPE) ADD_CUSTOM_TARGET(hls DEPENDS ${HLS_IPS}) diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index 58c3f845..09fed7ec 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -118,6 +118,18 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, ap_uint<512> module_cache[RAW_MODULE_SIZE * sizeof(uint16_t) / 512 * 8], volatile ap_uint<1> &in_cancel); +void save_to_hbm(STREAM_512 &data_in, + hls::stream > &addr_in, + STREAM_512 &data_out, + hls::stream > &addr_out, + hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, + hls::burst_maxi d_hbm_p2, hls::burst_maxi d_hbm_p3, + STREAM_512 &completion_out, + volatile uint64_t &packets_processed, + volatile ap_uint<1> &idle, + ap_uint<8> &err_reg, + uint32_t hbm_size); + template ap_uint pack32(ap_int in[32]) { #pragma HLS INLINE ap_uint out; diff --git a/fpga/hls/save_to_hbm.cpp b/fpga/hls/save_to_hbm.cpp new file mode 100644 index 00000000..559967c2 --- /dev/null +++ b/fpga/hls/save_to_hbm.cpp @@ -0,0 +1,241 @@ +// Copyright (2019-2022) Paul Scherrer Institute +// SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later + +#include "hls_jfjoch.h" + +#ifndef __SYNTHESIS__ +#include +#endif + +#define PACKET_SIZE 8192 +#define HBM_BURST_SIZE 64 + +inline void write_completion(STREAM_512 &m_axis_completion, + const ap_uint<32> &handle, + const ap_uint<8> &module_number, + const ap_uint<64> &frame_num, + const ap_uint<256> &packet_mask, + const ap_uint<16> &packet_count, + const ap_uint<32> &debug, + const ap_uint<64> ×tamp, + const ap_uint<64> &bunchid, + const ap_uint<32> &exptime, + const ap_uint<32> &data_collection_id, + const ap_uint<1> &flushing) { +#pragma HLS INLINE + + ap_uint<1> all_packets_ok = packet_mask.and_reduce(); + ap_uint<1> any_packets_received = packet_mask.or_reduce(); + ap_uint<8> status = 0; + status[0] = all_packets_ok; + status[1] = any_packets_received; + status[2] = flushing; + ap_uint<128> tmp = (handle, packet_count, status, module_number, frame_num); + status[7] = tmp.xor_reduce(); // ensure completion has even parity +/* + if (handle != HANDLE_SKIP_FRAME) { + m_axis_completion << handle; + m_axis_completion << (packet_count, status, module_number); + m_axis_completion << frame_num(63, 32); + m_axis_completion << frame_num(31, 0); + + m_axis_completion << timestamp(63,32); + m_axis_completion << timestamp(31,0); + m_axis_completion << bunchid(63,32); + m_axis_completion << bunchid(31,0); + + m_axis_completion << exptime; + m_axis_completion << debug; + m_axis_completion << 0; + m_axis_completion << data_collection_id; + + m_axis_completion << packet_mask(127,96); + m_axis_completion << packet_mask( 95,64); + m_axis_completion << packet_mask( 63,32); + m_axis_completion << packet_mask( 31, 0); + } */ + +} + +void save_to_hbm(STREAM_512 &data_in, + hls::stream > &addr_in, + STREAM_512 &data_out, + hls::stream > &addr_out, + hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, + hls::burst_maxi d_hbm_p2, hls::burst_maxi d_hbm_p3, + STREAM_512 &completion_out, + volatile uint64_t &packets_processed, + volatile ap_uint<1> &idle, + ap_uint<8> &err_reg, + uint32_t hbm_size) { +#pragma HLS INTERFACE ap_ctrl_none port=return +#pragma HLS INTERFACE register both axis port=data_in +#pragma HLS INTERFACE register both axis port=addr_in +#pragma HLS INTERFACE register both axis port=data_out +#pragma HLS INTERFACE register both axis port=addr_out +#pragma HLS INTERFACE register both axis port=completion_out +#pragma HLS INTERFACE register ap_vld port=packets_processed +#pragma HLS INTERFACE register ap_vld port=err_reg +#pragma HLS INTERFACE register ap_none port=idle +#pragma HLS INTERFACE register ap_stable port=hbm_size + +#pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=off \ + max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 +#pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=off \ + max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 +#pragma HLS INTERFACE m_axi port=d_hbm_p2 bundle=d_hbm_p2 depth=512 offset=off \ + max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 +#pragma HLS INTERFACE m_axi port=d_hbm_p3 bundle=d_hbm_p3 depth=512 offset=off \ + max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 + + ap_uint<128> packet_mask[MAX_MODULES_FPGA*2]; +#pragma HLS RESOURCE variable=packet_mask core=RAM_1P + ap_uint<16> packet_count[MAX_MODULES_FPGA*2]; +#pragma HLS RESOURCE variable=packet_count core=RAM_1P + ap_uint<32> handle[MAX_MODULES_FPGA*2]; +#pragma HLS RESOURCE variable=handle core=RAM_1P + ap_uint<64> curr_frame[MAX_MODULES_FPGA*2]; +#pragma HLS RESOURCE variable=curr_frame core=RAM_1P + ap_uint<32> debug[MAX_MODULES_FPGA*2]; +#pragma HLS RESOURCE variable=debug core=RAM_1P + ap_uint<64> timestamp[MAX_MODULES_FPGA*2]; +#pragma HLS RESOURCE variable=timestamp core=RAM_1P + ap_uint<32> exptime[MAX_MODULES_FPGA*2]; +#pragma HLS RESOURCE variable=exptime core=RAM_1P + ap_uint<64> jf_bunchid[MAX_MODULES_FPGA*2]; +#pragma HLS RESOURCE variable=jf_bunchid core=RAM_1P + + idle = 1; + + for (int i = 0; i < MAX_MODULES_FPGA*2; i++) { +#pragma HLS UNROLL + curr_frame[i] = UINT64_MAX; + handle[i] = 0; + packet_mask[i] = 0; + packet_count[i] = 0; + debug[i] = 0; + timestamp[i] = 0; + exptime[i] = 0; + jf_bunchid[i] = 0; + } + + uint32_t handle_val = 0; + + ap_uint addr; + addr_in >> addr; + addr_out << addr; + + packet_512_t packet_in; + data_in >> packet_in; + data_out << packet_in; + + ap_uint<5> nmodules = ACT_REG_NMODULES(packet_in.data); + ap_uint<32> data_collection_mode = ACT_REG_MODE(packet_in.data); + ap_uint<32> data_collection_id = data_collection_mode(31, 16); // upper 16-bit of mode + + ap_uint<1> mode_nonblocking = (data_collection_mode & MODE_NONBLOCKING_ON_WR) ? 1 : 0; + + ap_uint<8> internal_err_reg = 0; + err_reg = internal_err_reg; + + idle = 0; + uint64_t total_counter = 0; + packets_processed = 0; + addr_in >> addr; + addr_out << addr; + + Loop_good_packet: + while (!addr_last_flag(addr)) { + // Process one UDP packet per iteration +#pragma HLS PIPELINE II=128 + ap_uint<64> frame_number = addr_frame_number(addr); + ap_uint<4> module_number = addr_module(addr); + ap_uint<7> eth_packet = addr_eth_packet(addr); + ap_uint<5> id = module_number * 2 + (frame_number % 2); + + if (curr_frame[id] != frame_number) { + if (packet_mask[id] != 0) { + ap_uint<32> comp_handle = handle[id]; + ap_uint<64> comp_frame = curr_frame[id]; + ap_uint<256> comp_packet_mask = packet_mask[id]; + ap_uint<16> comp_packet_count = packet_count[id]; + ap_uint<32> comp_debug = debug[id]; + ap_uint<64> comp_timestamp = timestamp[id]; + ap_uint<64> comp_bunchid = jf_bunchid[id]; + ap_uint<32> comp_exptime = exptime[id]; + + write_completion(completion_out, comp_handle, module_number, + comp_frame, comp_packet_mask, comp_packet_count, + comp_debug, comp_timestamp, comp_bunchid, + comp_exptime, data_collection_id, 0); + } + + handle[id] = handle_val; + curr_frame[id] = frame_number; + + debug[id] = addr_jf_debug(addr); + timestamp[id] = addr_timestamp(addr); + jf_bunchid[id] = addr_bunch_id(addr); + exptime[id] = addr_exptime(addr); + + packet_mask[id] = ap_uint<128>(1) << eth_packet; + packet_count[id] = 1; + + handle_val = (handle_val + 1) % hbm_size; + } else { + packet_count[id]++; + packet_mask[id] |= ap_uint<128>(1) << eth_packet; + } + + size_t out_frame_addr = (handle[id] * 128 + eth_packet) * 64; + + for (int i = 0; i < 64; i++) { + if (i % 16 == 0) { + d_hbm_p0.write_request(out_frame_addr + i, 16); + d_hbm_p1.write_request(out_frame_addr + i, 16); + d_hbm_p2.write_request(out_frame_addr + i, 16); + d_hbm_p3.write_request(out_frame_addr + i, 16); + } + + data_in >> packet_in; + data_out << packet_in; + d_hbm_p0.write(packet_in.data(255, 0)); + d_hbm_p1.write(packet_in.data(511, 256)); + + data_in >> packet_in; + data_out << packet_in; + d_hbm_p2.write(packet_in.data(255, 0)); + d_hbm_p3.write(packet_in.data(511, 256)); + + if (i % 16 == 15) { + d_hbm_p0.write_response(); + d_hbm_p1.write_response(); + d_hbm_p2.write_response(); + d_hbm_p3.write_response(); + } + } + if (packet_in.last != 1) + internal_err_reg[1] = 1; + + + total_counter++; + packets_processed = total_counter; + addr_in >> addr; + addr_out << addr; + err_reg = internal_err_reg; + } + + for (ap_uint<8> m = 0; m < nmodules * 2; m++) { +#pragma HLS PIPELINE II=16 + if (packet_mask[m] != 0) + write_completion(completion_out, handle[m], m / 2, curr_frame[m], + packet_mask[m], packet_count[m], + debug[m], timestamp[m], jf_bunchid[m], + exptime[m], data_collection_id, 1); + } + + data_in >> packet_in; + data_out << packet_in; + + idle = 1; +} diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index df18c8fa..6c10cfab 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -390,6 +390,10 @@ proc create_root_design { parentCell } { connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p9 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_9] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p9] connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p10 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_10] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p10] connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p11 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_11] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p11] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p12 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_12] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p12] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p13 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_13] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p13] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p14 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_14] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p14] + connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p15 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_15] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p15] connect_bd_intf_net -intf_net jungfraujoch_0_m_axis_c2h_data [get_bd_intf_pins jungfraujoch_0/m_axis_c2h_data] [get_bd_intf_pins pcie_dma_0/s_axis_c2h_data] connect_bd_intf_net -intf_net jungfraujoch_0_m_axis_c2h_datamover_cmd [get_bd_intf_pins jungfraujoch_0/m_axis_c2h_datamover_cmd] [get_bd_intf_pins pcie_dma_0/s_axis_c2h_cmd] connect_bd_intf_net -intf_net jungfraujoch_0_m_axis_h2c_datamover_cmd [get_bd_intf_pins jungfraujoch_0/m_axis_h2c_datamover_cmd] [get_bd_intf_pins pcie_dma_0/s_axis_h2c_cmd] diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index 52ef5551..526355f6 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -64,6 +64,14 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p11 + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p12 + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p13 + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p14 + + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p15 + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 m_axis_c2h_data create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 m_axis_c2h_datamover_cmd diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index 601022cf..cda6db15 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -216,11 +216,13 @@ void HLSSimulatedDevice::HLSMainThread() { STREAM_512 converted_1; STREAM_512 converted_2; + STREAM_512 converted_3; hls::stream > addr0; hls::stream > addr1; hls::stream > addr2; hls::stream > addr3; + hls::stream > addr4; hls::stream > udp_metadata; ap_uint<1> idle_data_collection; @@ -306,10 +308,25 @@ void HLSSimulatedDevice::HLSMainThread() { // Timer procedure - count how many times write_data is not accepting input (to help track down latency issues) hls_cores.emplace_back([&] { timer_host(converted_1, converted_2, counter_host); }); + STREAM_512 save_to_hbm_completion; + ap_uint<8> save_to_hbm_err_reg; + uint64_t save_to_hbm_packets_processed; + ap_uint<1> save_to_hbm_idle; + + hls_cores.emplace_back([&] { save_to_hbm(converted_2, addr3, converted_3, addr4, + (hbm256_t *) (hbm_memory[12].data()), + (hbm256_t *) (hbm_memory[13].data()), + (hbm256_t *) (hbm_memory[14].data()), + (hbm256_t *) (hbm_memory[15].data()), + save_to_hbm_completion, + save_to_hbm_packets_processed, + save_to_hbm_idle, + save_to_hbm_err_reg, + 16); }); // 3. Prepare data to write to host memory hls_cores.emplace_back([&] { - host_writer(converted_2, addr3, datamover_out.GetDataStream(), + host_writer(converted_3, addr4, datamover_out.GetDataStream(), datamover_out.GetCtrlStream(), work_request_stream, completion_stream, packets_processed, host_writer_idle, err_reg); }); @@ -328,6 +345,9 @@ void HLSSimulatedDevice::HLSMainThread() { if (!addr3.empty()) throw std::runtime_error("Addr3 queue not empty"); + if (!addr4.empty()) + throw std::runtime_error("Addr4 queue not empty"); + if (!raw1.empty()) throw std::runtime_error("Raw1 queue not empty"); @@ -349,6 +369,9 @@ void HLSSimulatedDevice::HLSMainThread() { if (!converted_2.empty()) throw std::runtime_error("Converted_2 queue not empty"); + if (!converted_3.empty()) + throw std::runtime_error("Converted_3 queue not empty"); + if (!datamover_in.GetDataStream().empty()) throw std::runtime_error("Datamover queue is not empty"); From 5d566aeb4b81c43db8403b1ecb96e5fef5d51296 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 7 Sep 2023 21:51:44 +0200 Subject: [PATCH 180/224] FPGAIntegrationTest: Added blocking mode to one more test --- tests/FPGAIntegrationTest.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index 7815f244..c7b454f3 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -337,6 +337,7 @@ TEST_CASE("HLS_C_Simulation_check_single_packet", "[FPGA][Full]") { test.CreatePacketJF(x, 4, 1, 0, data, false); test.CreateFinalPacket(x); + test.SetFPGANonBlockingMode(false); REQUIRE_NOTHROW(test.StartAction(x)); REQUIRE_NOTHROW(test.WaitForActionComplete()); From c2eaee6d8ae823a24b236b4f90542e443ab36a68 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 8 Sep 2023 13:07:49 +0200 Subject: [PATCH 181/224] FPGA: Save to HBM operates in parallel to host writer --- fpga/hls/CMakeLists.txt | 8 +++- fpga/hls/hls_jfjoch.h | 11 +++-- fpga/hls/save_to_hbm.cpp | 31 ++++++-------- fpga/hls/writer_split.cpp | 53 ++++++++++++++++++++++++ fpga/scripts/bd_pcie.tcl | 4 +- fpga/scripts/jfjoch.tcl | 72 ++++++++++++++++++++++++++++++--- receiver/HLSSimulatedDevice.cpp | 32 ++++++++++----- 7 files changed, 172 insertions(+), 39 deletions(-) create mode 100644 fpga/hls/writer_split.cpp diff --git a/fpga/hls/CMakeLists.txt b/fpga/hls/CMakeLists.txt index 69aa737e..2a7be26a 100644 --- a/fpga/hls/CMakeLists.txt +++ b/fpga/hls/CMakeLists.txt @@ -13,7 +13,8 @@ ADD_LIBRARY( HLSSimulation STATIC ip_header_checksum.h udp.cpp sls_detector.cpp - save_to_hbm.cpp) + save_to_hbm.cpp + writer_split.cpp) TARGET_INCLUDE_DIRECTORIES(HLSSimulation PUBLIC ../include) TARGET_LINK_LIBRARIES(HLSSimulation CommonFunctions) @@ -47,6 +48,7 @@ MAKE_HLS_MODULE(arp.cpp arp) MAKE_HLS_MODULE(udp.cpp udp) MAKE_HLS_MODULE(sls_detector.cpp sls_detector) MAKE_HLS_MODULE(save_to_hbm.cpp save_to_hbm) +MAKE_HLS_MODULE(writer_split.cpp writer_split) SET (HLS_IPS psi_ch_hls_data_collection_fsm_1_0.zip psi_ch_hls_timer_host_1_0.zip @@ -61,7 +63,9 @@ SET (HLS_IPS psi_ch_hls_data_collection_fsm_1_0.zip psi_ch_hls_sls_detector_1_0.zip psi_ch_hls_icmp_1_0.zip psi_ch_hls_host_writer_1_0.zip - psi_ch_hls_save_to_hbm_1_0.zip) + psi_ch_hls_save_to_hbm_1_0.zip + psi_ch_hls_writer_split_1_0.zip + ) SET (HLS_IPS ${HLS_IPS} PARENT_SCOPE) ADD_CUSTOM_TARGET(hls DEPENDS ${HLS_IPS}) diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index 09fed7ec..a3f76f36 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -112,6 +112,13 @@ void host_writer(STREAM_512 &data_in, void timer_hbm(STREAM_512 &in, STREAM_512 &data_out, uint64_t &counter); void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, uint64_t &counter); +void writer_split(STREAM_512 &data_in, + STREAM_512 &data_out_1, + STREAM_512 &data_out_2, + hls::stream > &addr_in, + hls::stream > &addr_out_1, + hls::stream > &addr_out_2); + void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, hls::stream > &addr_in, hls::stream > &addr_out, @@ -120,11 +127,9 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, void save_to_hbm(STREAM_512 &data_in, hls::stream > &addr_in, - STREAM_512 &data_out, - hls::stream > &addr_out, + hls::stream > &completion_out, hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, hls::burst_maxi d_hbm_p2, hls::burst_maxi d_hbm_p3, - STREAM_512 &completion_out, volatile uint64_t &packets_processed, volatile ap_uint<1> &idle, ap_uint<8> &err_reg, diff --git a/fpga/hls/save_to_hbm.cpp b/fpga/hls/save_to_hbm.cpp index 559967c2..0cdb4cf0 100644 --- a/fpga/hls/save_to_hbm.cpp +++ b/fpga/hls/save_to_hbm.cpp @@ -8,9 +8,8 @@ #endif #define PACKET_SIZE 8192 -#define HBM_BURST_SIZE 64 -inline void write_completion(STREAM_512 &m_axis_completion, +inline void write_completion(hls::stream > &m_axis_completion, const ap_uint<32> &handle, const ap_uint<8> &module_number, const ap_uint<64> &frame_num, @@ -32,7 +31,7 @@ inline void write_completion(STREAM_512 &m_axis_completion, status[2] = flushing; ap_uint<128> tmp = (handle, packet_count, status, module_number, frame_num); status[7] = tmp.xor_reduce(); // ensure completion has even parity -/* + if (handle != HANDLE_SKIP_FRAME) { m_axis_completion << handle; m_axis_completion << (packet_count, status, module_number); @@ -53,17 +52,14 @@ inline void write_completion(STREAM_512 &m_axis_completion, m_axis_completion << packet_mask( 95,64); m_axis_completion << packet_mask( 63,32); m_axis_completion << packet_mask( 31, 0); - } */ - + } } void save_to_hbm(STREAM_512 &data_in, hls::stream > &addr_in, - STREAM_512 &data_out, - hls::stream > &addr_out, + hls::stream > &completion_out, hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, hls::burst_maxi d_hbm_p2, hls::burst_maxi d_hbm_p3, - STREAM_512 &completion_out, volatile uint64_t &packets_processed, volatile ap_uint<1> &idle, ap_uint<8> &err_reg, @@ -71,8 +67,6 @@ void save_to_hbm(STREAM_512 &data_in, #pragma HLS INTERFACE ap_ctrl_none port=return #pragma HLS INTERFACE register both axis port=data_in #pragma HLS INTERFACE register both axis port=addr_in -#pragma HLS INTERFACE register both axis port=data_out -#pragma HLS INTERFACE register both axis port=addr_out #pragma HLS INTERFACE register both axis port=completion_out #pragma HLS INTERFACE register ap_vld port=packets_processed #pragma HLS INTERFACE register ap_vld port=err_reg @@ -123,11 +117,9 @@ void save_to_hbm(STREAM_512 &data_in, ap_uint addr; addr_in >> addr; - addr_out << addr; packet_512_t packet_in; data_in >> packet_in; - data_out << packet_in; ap_uint<5> nmodules = ACT_REG_NMODULES(packet_in.data); ap_uint<32> data_collection_mode = ACT_REG_MODE(packet_in.data); @@ -142,7 +134,6 @@ void save_to_hbm(STREAM_512 &data_in, uint64_t total_counter = 0; packets_processed = 0; addr_in >> addr; - addr_out << addr; Loop_good_packet: while (!addr_last_flag(addr)) { @@ -180,8 +171,16 @@ void save_to_hbm(STREAM_512 &data_in, packet_mask[id] = ap_uint<128>(1) << eth_packet; packet_count[id] = 1; + + if (hbm_size == 64) + handle_val = (handle_val + 1) % 64; + else if (hbm_size == 512) + handle_val = (handle_val + 1) % 512; + else if (hbm_size == 1024) + handle_val = (handle_val + 1) % 1024; + else + handle_val = (handle_val + 1) % 32; - handle_val = (handle_val + 1) % hbm_size; } else { packet_count[id]++; packet_mask[id] |= ap_uint<128>(1) << eth_packet; @@ -198,12 +197,10 @@ void save_to_hbm(STREAM_512 &data_in, } data_in >> packet_in; - data_out << packet_in; d_hbm_p0.write(packet_in.data(255, 0)); d_hbm_p1.write(packet_in.data(511, 256)); data_in >> packet_in; - data_out << packet_in; d_hbm_p2.write(packet_in.data(255, 0)); d_hbm_p3.write(packet_in.data(511, 256)); @@ -221,7 +218,6 @@ void save_to_hbm(STREAM_512 &data_in, total_counter++; packets_processed = total_counter; addr_in >> addr; - addr_out << addr; err_reg = internal_err_reg; } @@ -235,7 +231,6 @@ void save_to_hbm(STREAM_512 &data_in, } data_in >> packet_in; - data_out << packet_in; idle = 1; } diff --git a/fpga/hls/writer_split.cpp b/fpga/hls/writer_split.cpp new file mode 100644 index 00000000..b6a705f3 --- /dev/null +++ b/fpga/hls/writer_split.cpp @@ -0,0 +1,53 @@ +// Copyright (2019-2023) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#include "hls_jfjoch.h" + +void writer_split(STREAM_512 &data_in, + STREAM_512 &data_out_1, + STREAM_512 &data_out_2, + hls::stream > &addr_in, + hls::stream > &addr_out_1, + hls::stream > &addr_out_2) { +#pragma HLS INTERFACE register both axis port=data_in +#pragma HLS INTERFACE register both axis port=data_out_1 +#pragma HLS INTERFACE register both axis port=data_out_2 + +#pragma HLS INTERFACE register both axis port=addr_in +#pragma HLS INTERFACE register both axis port=addr_out_1 +#pragma HLS INTERFACE register both axis port=addr_out_2 + +#pragma HLS INTERFACE ap_ctrl_none port=return + packet_512_t packet; + ap_uint addr; + + addr_in >> addr; + addr_out_1 << addr; + addr_out_2 << addr; + + data_in >> packet; + data_out_1 << packet; + data_out_2 << packet; + + addr_in >> addr; + addr_out_1 << addr; + addr_out_2 << addr; + + Loop_good_packet: + while (!addr_last_flag(addr)) { +#pragma HLS PIPELINE II=128 + for (int i = 0; i < 128; i++) { + data_in >> packet; + data_out_1 << packet; + data_out_2 << packet; + } + addr_in >> addr; + addr_out_1 << addr; + addr_out_2 << addr; + } + + data_in >> packet; + data_out_1 << packet; + data_out_2 << packet; +} + diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index 6c10cfab..f2a3f2e2 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -143,7 +143,6 @@ xilinx.com:ip:xlconcat:2.1\ xilinx.com:ip:axi_protocol_converter:2.1\ xilinx.com:ip:axi_register_slice:2.1\ xilinx.com:ip:hbm:1.0\ -xilinx.com:ip:util_vector_logic:2.0\ xilinx.com:ip:axi_bram_ctrl:4.1\ xilinx.com:ip:axis_data_fifo:2.0\ xilinx.com:ip:axis_register_slice:1.1\ @@ -154,9 +153,12 @@ psi.ch:hls:internal_packet_generator:1.0\ psi.ch:hls:jf_conversion:1.0\ psi.ch:hls:load_calibration:1.0\ xilinx.com:ip:mailbox:2.1\ +psi.ch:hls:save_to_hbm:1.0\ psi.ch:hls:timer_hbm:1.0\ psi.ch:hls:timer_host:1.0\ +psi.ch:hls:writer_split:1.0\ xilinx.com:ip:cmac_usplus:3.1\ +xilinx.com:ip:util_vector_logic:2.0\ xilinx.com:ip:axi_firewall:1.2\ xilinx.com:ip:axis_clock_converter:1.1\ xilinx.com:ip:util_ds_buf:2.2\ diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index 526355f6..84326c15 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -88,7 +88,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { create_bd_pin -dir I -type clk axi_clk create_bd_pin -dir I -type rst axi_rst_n - # Create instance: action_config_0, and set properties + # Create instance: action_config_0, and set properties set block_name action_config set block_cell_name action_config_0 if { [catch {set action_config_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { @@ -154,6 +154,24 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { CONFIG.HAS_AFULL {1} \ ] $axis_addr_fifo_2 + # Create instance: axis_addr_fifo_3, and set properties + set axis_addr_fifo_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_addr_fifo_3 ] + set_property -dict [ list \ + CONFIG.FIFO_DEPTH {16} \ + CONFIG.FIFO_MEMORY_TYPE {block} \ + CONFIG.HAS_AEMPTY {0} \ + CONFIG.HAS_AFULL {0} \ + ] $axis_addr_fifo_3 + + # Create instance: axis_addr_fifo_4, and set properties + set axis_addr_fifo_4 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_addr_fifo_4 ] + set_property -dict [ list \ + CONFIG.FIFO_DEPTH {16} \ + CONFIG.FIFO_MEMORY_TYPE {block} \ + CONFIG.HAS_AEMPTY {0} \ + CONFIG.HAS_AFULL {0} \ + ] $axis_addr_fifo_4 + # Create instance: axis_data_fifo_0, and set properties set axis_data_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_0 ] set_property -dict [ list \ @@ -200,6 +218,18 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { CONFIG.HAS_AFULL {1} \ ] $axis_data_fifo_5 + # Create instance: axis_data_fifo_6, and set properties + set axis_data_fifo_6 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_6 ] + set_property -dict [ list \ + CONFIG.FIFO_DEPTH {4096} \ + ] $axis_data_fifo_6 + + # Create instance: axis_data_fifo_7, and set properties + set axis_data_fifo_7 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_7 ] + set_property -dict [ list \ + CONFIG.FIFO_DEPTH {4096} \ + ] $axis_data_fifo_7 + # Create instance: axis_data_fifo_c2h_cmd, and set properties set axis_data_fifo_c2h_cmd [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_c2h_cmd ] set_property -dict [ list \ @@ -370,6 +400,12 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { # Create instance: network_stack create_hier_cell_network_stack $hier_obj network_stack + # Create instance: one, and set properties + set one [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 one ] + + # Create instance: save_to_hbm_0, and set properties + set save_to_hbm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:save_to_hbm:1.0 save_to_hbm_0 ] + # Create instance: smartconnect_0, and set properties set smartconnect_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_0 ] set_property -dict [ list \ @@ -384,6 +420,16 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { # Create instance: timer_host_0, and set properties set timer_host_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:timer_host:1.0 timer_host_0 ] + # Create instance: writer_split_0, and set properties + set writer_split_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:writer_split:1.0 writer_split_0 ] + + # Create instance: xlconstant_hbm_size, and set properties + set xlconstant_hbm_size [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 xlconstant_hbm_size ] + set_property -dict [ list \ + CONFIG.CONST_VAL {64} \ + CONFIG.CONST_WIDTH {32} \ + ] $xlconstant_hbm_size + # Create interface connections connect_bd_intf_net -intf_net Conn2 [get_bd_intf_pins eth_out] [get_bd_intf_pins network_stack/M00_AXIS] connect_bd_intf_net -intf_net Conn3 [get_bd_intf_pins eth_in] [get_bd_intf_pins network_stack/eth_in] @@ -393,13 +439,17 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net axi_bram_ctrl_internal_packet_generator_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_0/BRAM_PORTA] [get_bd_intf_pins internal_packet_generator_uram/BRAM_PORTA] connect_bd_intf_net -intf_net axis_addr_fifo_0_M_AXIS [get_bd_intf_pins axis_addr_fifo_0/M_AXIS] [get_bd_intf_pins internal_packet_generator_0/addr_in] connect_bd_intf_net -intf_net axis_addr_fifo_2_M_AXIS [get_bd_intf_pins axis_addr_fifo_1/M_AXIS] [get_bd_intf_pins jf_conversion_0/addr_in] - connect_bd_intf_net -intf_net axis_addr_fifo_3_M_AXIS [get_bd_intf_pins axis_addr_fifo_2/M_AXIS] [get_bd_intf_pins host_writer_0/addr_in] + connect_bd_intf_net -intf_net axis_addr_fifo_2_M_AXIS1 [get_bd_intf_pins axis_addr_fifo_2/M_AXIS] [get_bd_intf_pins writer_split_0/addr_in] + connect_bd_intf_net -intf_net axis_addr_fifo_3_M_AXIS1 [get_bd_intf_pins axis_addr_fifo_3/M_AXIS] [get_bd_intf_pins save_to_hbm_0/addr_in] + connect_bd_intf_net -intf_net axis_addr_fifo_4_M_AXIS [get_bd_intf_pins axis_addr_fifo_4/M_AXIS] [get_bd_intf_pins host_writer_0/addr_in] connect_bd_intf_net -intf_net axis_data_fifo_0_M_AXIS [get_bd_intf_pins axis_data_fifo_0/M_AXIS] [get_bd_intf_pins load_calibration_0/data_in] connect_bd_intf_net -intf_net axis_data_fifo_1_M_AXIS [get_bd_intf_pins axis_data_fifo_1/M_AXIS] [get_bd_intf_pins internal_packet_generator_0/data_in] connect_bd_intf_net -intf_net axis_data_fifo_2_M_AXIS [get_bd_intf_pins axis_data_fifo_2/M_AXIS] [get_bd_intf_pins timer_hbm_0/data_in] connect_bd_intf_net -intf_net axis_data_fifo_4_M_AXIS [get_bd_intf_pins axis_data_fifo_3/M_AXIS] [get_bd_intf_pins jf_conversion_0/data_in] connect_bd_intf_net -intf_net axis_data_fifo_4_M_AXIS1 [get_bd_intf_pins axis_data_fifo_4/M_AXIS] [get_bd_intf_pins timer_host_0/data_in] - connect_bd_intf_net -intf_net axis_data_fifo_8_M_AXIS [get_bd_intf_pins axis_data_fifo_5/M_AXIS] [get_bd_intf_pins host_writer_0/data_in] + connect_bd_intf_net -intf_net axis_data_fifo_5_M_AXIS [get_bd_intf_pins axis_data_fifo_5/M_AXIS] [get_bd_intf_pins writer_split_0/data_in] + connect_bd_intf_net -intf_net axis_data_fifo_6_M_AXIS [get_bd_intf_pins axis_data_fifo_6/M_AXIS] [get_bd_intf_pins save_to_hbm_0/data_in] + connect_bd_intf_net -intf_net axis_data_fifo_7_M_AXIS [get_bd_intf_pins axis_data_fifo_7/M_AXIS] [get_bd_intf_pins host_writer_0/data_in] connect_bd_intf_net -intf_net axis_data_fifo_c2h_cmd_M_AXIS [get_bd_intf_pins m_axis_c2h_datamover_cmd] [get_bd_intf_pins axis_data_fifo_c2h_cmd/M_AXIS] connect_bd_intf_net -intf_net axis_data_fifo_c2h_data_M_AXIS [get_bd_intf_pins m_axis_c2h_data] [get_bd_intf_pins axis_data_fifo_c2h_data/M_AXIS] connect_bd_intf_net -intf_net axis_data_fifo_h2c_cmd_M_AXIS [get_bd_intf_pins m_axis_h2c_datamover_cmd] [get_bd_intf_pins axis_data_fifo_h2c_cmd/M_AXIS] @@ -444,12 +494,20 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net network_stack_udp_addr_out [get_bd_intf_pins axis_udp_addr_fifo_0/S_AXIS] [get_bd_intf_pins network_stack/udp_addr_out] connect_bd_intf_net -intf_net network_stack_udp_out [get_bd_intf_pins axis_udp_fifo_0/S_AXIS] [get_bd_intf_pins network_stack/udp_out] connect_bd_intf_net -intf_net s_axi_1 [get_bd_intf_pins s_axi] [get_bd_intf_pins smartconnect_0/S00_AXI] + connect_bd_intf_net -intf_net save_to_hbm_0_m_axi_d_hbm_p0 [get_bd_intf_pins m_axi_d_hbm_p12] [get_bd_intf_pins save_to_hbm_0/m_axi_d_hbm_p0] + connect_bd_intf_net -intf_net save_to_hbm_0_m_axi_d_hbm_p1 [get_bd_intf_pins m_axi_d_hbm_p13] [get_bd_intf_pins save_to_hbm_0/m_axi_d_hbm_p1] + connect_bd_intf_net -intf_net save_to_hbm_0_m_axi_d_hbm_p2 [get_bd_intf_pins m_axi_d_hbm_p14] [get_bd_intf_pins save_to_hbm_0/m_axi_d_hbm_p2] + connect_bd_intf_net -intf_net save_to_hbm_0_m_axi_d_hbm_p3 [get_bd_intf_pins m_axi_d_hbm_p15] [get_bd_intf_pins save_to_hbm_0/m_axi_d_hbm_p3] connect_bd_intf_net -intf_net smartconnect_0_M00_AXI [get_bd_intf_pins action_config_0/s_axi] [get_bd_intf_pins smartconnect_0/M00_AXI] connect_bd_intf_net -intf_net smartconnect_0_M01_AXI [get_bd_intf_pins mailbox_0/S0_AXI] [get_bd_intf_pins smartconnect_0/M01_AXI] connect_bd_intf_net -intf_net smartconnect_0_M02_AXI [get_bd_intf_pins axi_bram_ctrl_calibration_addr/S_AXI] [get_bd_intf_pins smartconnect_0/M02_AXI] connect_bd_intf_net -intf_net smartconnect_0_M03_AXI [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_0/S_AXI] [get_bd_intf_pins smartconnect_0/M03_AXI] connect_bd_intf_net -intf_net timer_hbm_0_data_out [get_bd_intf_pins axis_data_fifo_3/S_AXIS] [get_bd_intf_pins timer_hbm_0/data_out] connect_bd_intf_net -intf_net timer_host_0_data_out [get_bd_intf_pins axis_register_slice_data_1/S_AXIS] [get_bd_intf_pins timer_host_0/data_out] + connect_bd_intf_net -intf_net writer_split_0_addr_out_1 [get_bd_intf_pins axis_addr_fifo_3/S_AXIS] [get_bd_intf_pins writer_split_0/addr_out_1] + connect_bd_intf_net -intf_net writer_split_0_addr_out_2 [get_bd_intf_pins axis_addr_fifo_4/S_AXIS] [get_bd_intf_pins writer_split_0/addr_out_2] + connect_bd_intf_net -intf_net writer_split_0_data_out_1 [get_bd_intf_pins axis_data_fifo_6/S_AXIS] [get_bd_intf_pins writer_split_0/data_out_1] + connect_bd_intf_net -intf_net writer_split_0_data_out_2 [get_bd_intf_pins axis_data_fifo_7/S_AXIS] [get_bd_intf_pins writer_split_0/data_out_2] # Create port connections connect_bd_net -net action_config_0_clear_counters [get_bd_pins action_config_0/clear_counters] [get_bd_pins network_stack/clear_counters] @@ -462,7 +520,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net action_config_0_nmodules [get_bd_pins action_config_0/nmodules] [get_bd_pins data_collection_fsm_0/nmodules] connect_bd_net -net action_config_0_nstorage_cells [get_bd_pins action_config_0/nstorage_cells] [get_bd_pins data_collection_fsm_0/nstorage_cells] connect_bd_net -net action_config_0_one_over_energy [get_bd_pins action_config_0/one_over_energy] [get_bd_pins data_collection_fsm_0/one_over_energy] - connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins internal_packet_generator_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins timer_hbm_0/ap_clk] [get_bd_pins timer_host_0/ap_clk] + connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_addr_fifo_3/s_axis_aclk] [get_bd_pins axis_addr_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_6/s_axis_aclk] [get_bd_pins axis_data_fifo_7/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins internal_packet_generator_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins save_to_hbm_0/ap_clk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins timer_hbm_0/ap_clk] [get_bd_pins timer_host_0/ap_clk] [get_bd_pins writer_split_0/ap_clk] connect_bd_net -net axis_addr_fifo_2_almost_empty [get_bd_pins action_config_0/calib_addr_fifo_empty] [get_bd_pins axis_addr_fifo_1/almost_empty] connect_bd_net -net axis_addr_fifo_2_almost_full [get_bd_pins action_config_0/calib_addr_fifo_full] [get_bd_pins axis_addr_fifo_1/almost_full] connect_bd_net -net axis_addr_fifo_4_almost_empty [get_bd_pins action_config_0/last_addr_fifo_empty] [get_bd_pins axis_addr_fifo_2/almost_empty] @@ -501,12 +559,14 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net network_stack_packets_sls_ap_vld [get_bd_pins action_config_0/packets_sls_valid] [get_bd_pins network_stack/packets_sls_ap_vld] connect_bd_net -net network_stack_packets_udp [get_bd_pins action_config_0/packets_udp] [get_bd_pins network_stack/packets_udp] connect_bd_net -net network_stack_packets_udp_ap_vld [get_bd_pins action_config_0/packets_udp_valid] [get_bd_pins network_stack/packets_udp_ap_vld] - connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_addr_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_5/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_0/aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_0/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] - connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins internal_packet_generator_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins timer_hbm_0/ap_rst_n] [get_bd_pins timer_host_0/ap_rst_n] + connect_bd_net -net one_dout [get_bd_pins one/dout] [get_bd_pins save_to_hbm_0/completion_out_TREADY] + connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_addr_fifo_2/s_axis_aresetn] [get_bd_pins axis_addr_fifo_3/s_axis_aresetn] [get_bd_pins axis_addr_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_5/s_axis_aresetn] [get_bd_pins axis_data_fifo_6/s_axis_aresetn] [get_bd_pins axis_data_fifo_7/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_0/aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_0/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] + connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins internal_packet_generator_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins save_to_hbm_0/ap_rst_n] [get_bd_pins timer_hbm_0/ap_rst_n] [get_bd_pins timer_host_0/ap_rst_n] [get_bd_pins writer_split_0/ap_rst_n] connect_bd_net -net timer_hbm_0_counter [get_bd_pins action_config_0/stalls_hbm] [get_bd_pins timer_hbm_0/counter] connect_bd_net -net timer_hbm_0_counter_ap_vld [get_bd_pins action_config_0/stalls_hbm_valid] [get_bd_pins timer_hbm_0/counter_ap_vld] connect_bd_net -net timer_host_0_counter [get_bd_pins action_config_0/stalls_host] [get_bd_pins timer_host_0/counter] connect_bd_net -net timer_host_0_counter_ap_vld [get_bd_pins action_config_0/stalls_host_valid] [get_bd_pins timer_host_0/counter_ap_vld] + connect_bd_net -net xlconstant_0_dout [get_bd_pins save_to_hbm_0/hbm_size] [get_bd_pins xlconstant_hbm_size/dout] # Restore current instance current_bd_instance $oldCurInst diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index cda6db15..d80bc2c8 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -217,12 +217,16 @@ void HLSSimulatedDevice::HLSMainThread() { STREAM_512 converted_1; STREAM_512 converted_2; STREAM_512 converted_3; + STREAM_512 converted_4; + STREAM_512 converted_5; hls::stream > addr0; hls::stream > addr1; hls::stream > addr2; hls::stream > addr3; hls::stream > addr4; + hls::stream > addr5; + hls::stream > addr6; hls::stream > udp_metadata; ap_uint<1> idle_data_collection; @@ -308,25 +312,29 @@ void HLSSimulatedDevice::HLSMainThread() { // Timer procedure - count how many times write_data is not accepting input (to help track down latency issues) hls_cores.emplace_back([&] { timer_host(converted_1, converted_2, counter_host); }); - STREAM_512 save_to_hbm_completion; + // Temporary - split streams so data can be written to both HBM and internal memory + hls_cores.emplace_back([&] { writer_split(converted_2, converted_3, converted_4, + addr3, addr4, addr5); }); + + hls::stream > save_to_hbm_completion; ap_uint<8> save_to_hbm_err_reg; uint64_t save_to_hbm_packets_processed; ap_uint<1> save_to_hbm_idle; - hls_cores.emplace_back([&] { save_to_hbm(converted_2, addr3, converted_3, addr4, + // 3. Write images to HBM + hls_cores.emplace_back([&] { save_to_hbm(converted_3, addr4, save_to_hbm_completion, (hbm256_t *) (hbm_memory[12].data()), (hbm256_t *) (hbm_memory[13].data()), (hbm256_t *) (hbm_memory[14].data()), (hbm256_t *) (hbm_memory[15].data()), - save_to_hbm_completion, - save_to_hbm_packets_processed, - save_to_hbm_idle, - save_to_hbm_err_reg, - 16); }); + save_to_hbm_packets_processed, + save_to_hbm_idle, + save_to_hbm_err_reg, + 16); }); - // 3. Prepare data to write to host memory + // 4. Prepare data to write to host memory hls_cores.emplace_back([&] { - host_writer(converted_3, addr4, datamover_out.GetDataStream(), + host_writer(converted_4, addr5, datamover_out.GetDataStream(), datamover_out.GetCtrlStream(), work_request_stream, completion_stream, packets_processed, host_writer_idle, err_reg); }); @@ -348,6 +356,9 @@ void HLSSimulatedDevice::HLSMainThread() { if (!addr4.empty()) throw std::runtime_error("Addr4 queue not empty"); + if (!addr5.empty()) + throw std::runtime_error("Addr5 queue not empty"); + if (!raw1.empty()) throw std::runtime_error("Raw1 queue not empty"); @@ -372,6 +383,9 @@ void HLSSimulatedDevice::HLSMainThread() { if (!converted_3.empty()) throw std::runtime_error("Converted_3 queue not empty"); + if (!converted_4.empty()) + throw std::runtime_error("Converted_4 queue not empty"); + if (!datamover_in.GetDataStream().empty()) throw std::runtime_error("Datamover queue is not empty"); From e8c0500ea84bafcf1d2eb7a2f78a0a0c6b3c9eb6 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 8 Sep 2023 17:09:33 +0200 Subject: [PATCH 182/224] FPGA: Use HBM switch to access full HBM --- fpga/hls/jf_conversion.cpp | 24 +++---- fpga/hls/save_to_hbm.cpp | 8 +-- fpga/scripts/bd_pcie.tcl | 4 ++ fpga/scripts/hbm_u55c.tcl | 2 +- fpga/scripts/jfjoch.tcl | 130 ++++++++++++++++++++++++++++++++++++- 5 files changed, 150 insertions(+), 18 deletions(-) diff --git a/fpga/hls/jf_conversion.cpp b/fpga/hls/jf_conversion.cpp index 25df9b08..4f62cdfd 100644 --- a/fpga/hls/jf_conversion.cpp +++ b/fpga/hls/jf_conversion.cpp @@ -115,29 +115,29 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS INTERFACE register both axis port=addr_in #pragma HLS INTERFACE register both axis port=addr_out -#pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=off \ +#pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=direct \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=off \ +#pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=direct \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p2 bundle=d_hbm_p2 depth=512 offset=off \ +#pragma HLS INTERFACE m_axi port=d_hbm_p2 bundle=d_hbm_p2 depth=512 offset=direct \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p3 bundle=d_hbm_p3 depth=512 offset=off \ +#pragma HLS INTERFACE m_axi port=d_hbm_p3 bundle=d_hbm_p3 depth=512 offset=direct \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p4 bundle=d_hbm_p4 depth=512 offset=off \ +#pragma HLS INTERFACE m_axi port=d_hbm_p4 bundle=d_hbm_p4 depth=512 offset=direct \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p5 bundle=d_hbm_p5 depth=512 offset=off \ +#pragma HLS INTERFACE m_axi port=d_hbm_p5 bundle=d_hbm_p5 depth=512 offset=direct \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p6 bundle=d_hbm_p6 depth=512 offset=off \ +#pragma HLS INTERFACE m_axi port=d_hbm_p6 bundle=d_hbm_p6 depth=512 offset=direct \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p7 bundle=d_hbm_p7 depth=512 offset=off \ +#pragma HLS INTERFACE m_axi port=d_hbm_p7 bundle=d_hbm_p7 depth=512 offset=direct \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p8 bundle=d_hbm_p8 depth=512 offset=off \ +#pragma HLS INTERFACE m_axi port=d_hbm_p8 bundle=d_hbm_p8 depth=512 offset=direct \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p9 bundle=d_hbm_p9 depth=512 offset=off \ +#pragma HLS INTERFACE m_axi port=d_hbm_p9 bundle=d_hbm_p9 depth=512 offset=direct \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p10 bundle=d_hbm_p10 depth=512 offset=off \ +#pragma HLS INTERFACE m_axi port=d_hbm_p10 bundle=d_hbm_p10 depth=512 offset=direct \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p11 bundle=d_hbm_p11 depth=512 offset=off \ +#pragma HLS INTERFACE m_axi port=d_hbm_p11 bundle=d_hbm_p11 depth=512 offset=direct \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 packet_512_t packet_in; diff --git a/fpga/hls/save_to_hbm.cpp b/fpga/hls/save_to_hbm.cpp index 0cdb4cf0..24815ef9 100644 --- a/fpga/hls/save_to_hbm.cpp +++ b/fpga/hls/save_to_hbm.cpp @@ -73,13 +73,13 @@ void save_to_hbm(STREAM_512 &data_in, #pragma HLS INTERFACE register ap_none port=idle #pragma HLS INTERFACE register ap_stable port=hbm_size -#pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=off \ +#pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=direct \ max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 -#pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=off \ +#pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=direct \ max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 -#pragma HLS INTERFACE m_axi port=d_hbm_p2 bundle=d_hbm_p2 depth=512 offset=off \ +#pragma HLS INTERFACE m_axi port=d_hbm_p2 bundle=d_hbm_p2 depth=512 offset=direct \ max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 -#pragma HLS INTERFACE m_axi port=d_hbm_p3 bundle=d_hbm_p3 depth=512 offset=off \ +#pragma HLS INTERFACE m_axi port=d_hbm_p3 bundle=d_hbm_p3 depth=512 offset=direct \ max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 ap_uint<128> packet_mask[MAX_MODULES_FPGA*2]; diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index f2a3f2e2..d796da35 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -455,6 +455,10 @@ proc create_root_design { parentCell } { CONFIG.DESIGN_NUMBER {0} \ ] [get_bd_cells jungfraujoch_0/action_config_0] + for {set i 0} {$i < 16} {incr i} { + set_property -dict [list CONFIG.CONST_VAL [expr 0x20000000 * $i]] [get_bd_cells jungfraujoch_0/constant_hbm_offset_${i}] + } + # Restore current instance current_bd_instance $oldCurInst diff --git a/fpga/scripts/hbm_u55c.tcl b/fpga/scripts/hbm_u55c.tcl index 442b15bb..baf9eff1 100644 --- a/fpga/scripts/hbm_u55c.tcl +++ b/fpga/scripts/hbm_u55c.tcl @@ -236,7 +236,7 @@ proc create_hier_cell_hbm_infrastructure { parentCell nameHier } { CONFIG.USER_PHY_ENABLE_13 {FALSE} \ CONFIG.USER_PHY_ENABLE_14 {FALSE} \ CONFIG.USER_PHY_ENABLE_15 {FALSE} \ - CONFIG.USER_SWITCH_ENABLE_00 {FALSE} \ + CONFIG.USER_SWITCH_ENABLE_00 {TRUE} \ CONFIG.USER_SWITCH_ENABLE_01 {FALSE} \ CONFIG.USER_TEMP_POLL_CNT_0 {100000} \ CONFIG.USER_XSDB_INTF_EN {TRUE} \ diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index 84326c15..9fcb6444 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -88,7 +88,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { create_bd_pin -dir I -type clk axi_clk create_bd_pin -dir I -type rst axi_rst_n - # Create instance: action_config_0, and set properties + # Create instance: action_config_0, and set properties set block_name action_config set block_cell_name action_config_0 if { [catch {set action_config_0 [create_bd_cell -type module -reference $block_name $block_cell_name] } errmsg] } { @@ -354,6 +354,118 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { CONFIG.Use_RSTB_Pin {true} \ ] $calibration_addr_bram + # Create instance: constant_hbm_offset_0, and set properties + set constant_hbm_offset_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_0 ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + CONFIG.CONST_WIDTH {64} \ + ] $constant_hbm_offset_0 + + # Create instance: constant_hbm_offset_1, and set properties + set constant_hbm_offset_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_1 ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + CONFIG.CONST_WIDTH {64} \ + ] $constant_hbm_offset_1 + + # Create instance: constant_hbm_offset_2, and set properties + set constant_hbm_offset_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_2 ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + CONFIG.CONST_WIDTH {64} \ + ] $constant_hbm_offset_2 + + # Create instance: constant_hbm_offset_3, and set properties + set constant_hbm_offset_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_3 ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + CONFIG.CONST_WIDTH {64} \ + ] $constant_hbm_offset_3 + + # Create instance: constant_hbm_offset_4, and set properties + set constant_hbm_offset_4 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_4 ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + CONFIG.CONST_WIDTH {64} \ + ] $constant_hbm_offset_4 + + # Create instance: constant_hbm_offset_5, and set properties + set constant_hbm_offset_5 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_5 ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + CONFIG.CONST_WIDTH {64} \ + ] $constant_hbm_offset_5 + + # Create instance: constant_hbm_offset_6, and set properties + set constant_hbm_offset_6 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_6 ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + CONFIG.CONST_WIDTH {64} \ + ] $constant_hbm_offset_6 + + # Create instance: constant_hbm_offset_7, and set properties + set constant_hbm_offset_7 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_7 ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + CONFIG.CONST_WIDTH {64} \ + ] $constant_hbm_offset_7 + + # Create instance: constant_hbm_offset_8, and set properties + set constant_hbm_offset_8 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_8 ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + CONFIG.CONST_WIDTH {64} \ + ] $constant_hbm_offset_8 + + # Create instance: constant_hbm_offset_9, and set properties + set constant_hbm_offset_9 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_9 ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + CONFIG.CONST_WIDTH {64} \ + ] $constant_hbm_offset_9 + + # Create instance: constant_hbm_offset_10, and set properties + set constant_hbm_offset_10 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_10 ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + CONFIG.CONST_WIDTH {64} \ + ] $constant_hbm_offset_10 + + # Create instance: constant_hbm_offset_11, and set properties + set constant_hbm_offset_11 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_11 ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + CONFIG.CONST_WIDTH {64} \ + ] $constant_hbm_offset_11 + + # Create instance: constant_hbm_offset_12, and set properties + set constant_hbm_offset_12 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_12 ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + CONFIG.CONST_WIDTH {64} \ + ] $constant_hbm_offset_12 + + # Create instance: constant_hbm_offset_13, and set properties + set constant_hbm_offset_13 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_13 ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + CONFIG.CONST_WIDTH {64} \ + ] $constant_hbm_offset_13 + + # Create instance: constant_hbm_offset_14, and set properties + set constant_hbm_offset_14 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_14 ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + CONFIG.CONST_WIDTH {64} \ + ] $constant_hbm_offset_14 + + # Create instance: constant_hbm_offset_15, and set properties + set constant_hbm_offset_15 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_15 ] + set_property -dict [ list \ + CONFIG.CONST_VAL {0} \ + CONFIG.CONST_WIDTH {64} \ + ] $constant_hbm_offset_15 + # Create instance: data_collection_fsm_0, and set properties set data_collection_fsm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:data_collection_fsm:1.0 data_collection_fsm_0 ] @@ -539,6 +651,22 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net axis_work_completion_fifo_0_almost_full [get_bd_pins action_config_0/work_compl_fifo_full] [get_bd_pins axis_work_completion_fifo_0/almost_full] connect_bd_net -net axis_work_request_fifo_0_almost_empty [get_bd_pins action_config_0/work_req_fifo_empty] [get_bd_pins axis_work_request_fifo_0/almost_empty] connect_bd_net -net axis_work_request_fifo_0_almost_full [get_bd_pins action_config_0/work_req_fifo_full] [get_bd_pins axis_work_request_fifo_0/almost_full] + connect_bd_net -net constant_hbm_offset_0_dout [get_bd_pins constant_hbm_offset_0/dout] [get_bd_pins jf_conversion_0/d_hbm_p0_offset] + connect_bd_net -net constant_hbm_offset_10_dout [get_bd_pins constant_hbm_offset_10/dout] [get_bd_pins jf_conversion_0/d_hbm_p10_offset] + connect_bd_net -net constant_hbm_offset_11_dout [get_bd_pins constant_hbm_offset_11/dout] [get_bd_pins jf_conversion_0/d_hbm_p11_offset] + connect_bd_net -net constant_hbm_offset_12_dout [get_bd_pins constant_hbm_offset_12/dout] [get_bd_pins save_to_hbm_0/d_hbm_p0_offset] + connect_bd_net -net constant_hbm_offset_13_dout [get_bd_pins constant_hbm_offset_13/dout] [get_bd_pins save_to_hbm_0/d_hbm_p1_offset] + connect_bd_net -net constant_hbm_offset_14_dout [get_bd_pins constant_hbm_offset_14/dout] [get_bd_pins save_to_hbm_0/d_hbm_p2_offset] + connect_bd_net -net constant_hbm_offset_15_dout [get_bd_pins constant_hbm_offset_15/dout] [get_bd_pins save_to_hbm_0/d_hbm_p3_offset] + connect_bd_net -net constant_hbm_offset_1_dout [get_bd_pins constant_hbm_offset_1/dout] [get_bd_pins jf_conversion_0/d_hbm_p1_offset] + connect_bd_net -net constant_hbm_offset_2_dout [get_bd_pins constant_hbm_offset_2/dout] [get_bd_pins jf_conversion_0/d_hbm_p2_offset] + connect_bd_net -net constant_hbm_offset_3_dout [get_bd_pins constant_hbm_offset_3/dout] [get_bd_pins jf_conversion_0/d_hbm_p3_offset] + connect_bd_net -net constant_hbm_offset_4_dout [get_bd_pins constant_hbm_offset_4/dout] [get_bd_pins jf_conversion_0/d_hbm_p4_offset] + connect_bd_net -net constant_hbm_offset_5_dout [get_bd_pins constant_hbm_offset_5/dout] [get_bd_pins jf_conversion_0/d_hbm_p5_offset] + connect_bd_net -net constant_hbm_offset_6_dout [get_bd_pins constant_hbm_offset_6/dout] [get_bd_pins jf_conversion_0/d_hbm_p6_offset] + connect_bd_net -net constant_hbm_offset_7_dout [get_bd_pins constant_hbm_offset_7/dout] [get_bd_pins jf_conversion_0/d_hbm_p7_offset] + connect_bd_net -net constant_hbm_offset_8_dout [get_bd_pins constant_hbm_offset_8/dout] [get_bd_pins jf_conversion_0/d_hbm_p8_offset] + connect_bd_net -net constant_hbm_offset_9_dout [get_bd_pins constant_hbm_offset_9/dout] [get_bd_pins jf_conversion_0/d_hbm_p9_offset] connect_bd_net -net data_collection_fsm_0_out_idle_V [get_bd_pins action_config_0/data_collection_idle] [get_bd_pins data_collection_fsm_0/out_idle] connect_bd_net -net host_writer_0_err_reg_V [get_bd_pins action_config_0/host_writer_err] [get_bd_pins host_writer_0/err_reg] connect_bd_net -net host_writer_0_err_reg_V_ap_vld [get_bd_pins action_config_0/host_writer_err_valid] [get_bd_pins host_writer_0/err_reg_ap_vld] From 6251c58f3211659f69f12139d9f144a5f95f9c4f Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 8 Sep 2023 19:02:09 +0200 Subject: [PATCH 183/224] FPGA: Add function to transfer data from HBM to AXI-Lite accessible buffer --- common/Definitions.h | 2 +- fpga/hls/CMakeLists.txt | 6 +- fpga/hls/hls_jfjoch.h | 7 +++ fpga/hls/transfer_hbm.cpp | 65 +++++++++++++++++++ fpga/scripts/bd_pcie.tcl | 5 ++ fpga/scripts/jfjoch.tcl | 91 +++++++++++++++++++++------ receiver/HLSSimulatedDevice.cpp | 23 ++++++- receiver/HLSSimulatedDevice.h | 6 +- tests/FPGAIntegrationTest.cpp | 108 ++++++++++++++++++++++++++++++++ 9 files changed, 288 insertions(+), 25 deletions(-) create mode 100644 fpga/hls/transfer_hbm.cpp diff --git a/common/Definitions.h b/common/Definitions.h index 8951a8c2..e9886dcf 100644 --- a/common/Definitions.h +++ b/common/Definitions.h @@ -50,7 +50,7 @@ // For FPGA #define ACTION_TYPE 0x52324158 -#define RELEASE_LEVEL 0x0039 +#define RELEASE_LEVEL 0x003A #define MODE_CONV 0x0001L #define MODE_INTERNAL_PACKET_GEN 0x0002L diff --git a/fpga/hls/CMakeLists.txt b/fpga/hls/CMakeLists.txt index 2a7be26a..63843f2d 100644 --- a/fpga/hls/CMakeLists.txt +++ b/fpga/hls/CMakeLists.txt @@ -14,7 +14,8 @@ ADD_LIBRARY( HLSSimulation STATIC udp.cpp sls_detector.cpp save_to_hbm.cpp - writer_split.cpp) + writer_split.cpp + transfer_hbm.cpp) TARGET_INCLUDE_DIRECTORIES(HLSSimulation PUBLIC ../include) TARGET_LINK_LIBRARIES(HLSSimulation CommonFunctions) @@ -49,6 +50,7 @@ MAKE_HLS_MODULE(udp.cpp udp) MAKE_HLS_MODULE(sls_detector.cpp sls_detector) MAKE_HLS_MODULE(save_to_hbm.cpp save_to_hbm) MAKE_HLS_MODULE(writer_split.cpp writer_split) +MAKE_HLS_MODULE(transfer_hbm.cpp transfer_hbm) SET (HLS_IPS psi_ch_hls_data_collection_fsm_1_0.zip psi_ch_hls_timer_host_1_0.zip @@ -65,7 +67,7 @@ SET (HLS_IPS psi_ch_hls_data_collection_fsm_1_0.zip psi_ch_hls_host_writer_1_0.zip psi_ch_hls_save_to_hbm_1_0.zip psi_ch_hls_writer_split_1_0.zip - ) + psi_ch_hls_transfer_hbm_1_0.zip) SET (HLS_IPS ${HLS_IPS} PARENT_SCOPE) ADD_CUSTOM_TARGET(hls DEPENDS ${HLS_IPS}) diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index a3f76f36..314a1acb 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -255,4 +255,11 @@ void sls_detector(AXI_STREAM &udp_payload_in, uint32_t& counter_eth_error, uint32_t& counter_len_error, volatile ap_uint<1> &in_clear_counters); + +void transfer_hbm(ap_uint<256> *d_hbm_p0, + ap_uint<256> *uram, + uint32_t hbm_offset, + bool hbm_to_uram, + uint8_t stride, + uint8_t uram_offset); #endif diff --git a/fpga/hls/transfer_hbm.cpp b/fpga/hls/transfer_hbm.cpp new file mode 100644 index 00000000..d8034865 --- /dev/null +++ b/fpga/hls/transfer_hbm.cpp @@ -0,0 +1,65 @@ +// Copyright (2019-2023) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#include "hls_jfjoch.h" + +void transfer_hbm(ap_uint<256> *d_hbm_p0, + ap_uint<256> *uram, + uint32_t hbm_offset, + bool hbm_to_uram, + uint8_t stride, + uint8_t uram_offset) { +#pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=off \ + max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 +#pragma HLS INTERFACE m_axi port=uram bundle=uram depth=512 offset=off \ + max_read_burst_length=16 max_write_burst_length=16 latency=8 num_write_outstanding=2 num_read_outstanding=2 +#pragma HLS interface s_axilite port=hbm_offset +#pragma HLS interface s_axilite port=hbm_to_uram +#pragma HLS interface s_axilite port=stride +#pragma HLS interface s_axilite port=uram_offset +#pragma HLS INTERFACE s_axilite port=return + + if ((stride != 1) && (stride != 2) && (stride != 4)) + return; + + if (uram_offset >= stride) + return; + + if (stride == 2) { + if (hbm_to_uram) { + for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 32 / 2; i++) { +#pragma HLS PIPELINE II=1 + uram[2 * i + uram_offset] = d_hbm_p0[hbm_offset + i]; + } + } else { + for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 32 / 2; i++) { +#pragma HLS PIPELINE II=1 + d_hbm_p0[hbm_offset + i] = uram[2 * i + uram_offset]; + } + } + } else if (stride == 4) { + if (hbm_to_uram) { + for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 32 / 4; i++) { +#pragma HLS PIPELINE II=1 + uram[4 * i + uram_offset] = d_hbm_p0[hbm_offset + i]; + } + } else { + for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 32 / 4; i++) { +#pragma HLS PIPELINE II=1 + d_hbm_p0[hbm_offset + i] = uram[4 * i + uram_offset]; + } + } + } else { + if (hbm_to_uram) { + for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 32; i++) { +#pragma HLS PIPELINE II=1 + uram[i + uram_offset] = d_hbm_p0[hbm_offset + i]; + } + } else { + for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 32; i++) { +#pragma HLS PIPELINE II=1 + d_hbm_p0[hbm_offset + i] = uram[i + uram_offset]; + } + } + } +} diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index d796da35..7ccb8570 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -156,6 +156,7 @@ xilinx.com:ip:mailbox:2.1\ psi.ch:hls:save_to_hbm:1.0\ psi.ch:hls:timer_hbm:1.0\ psi.ch:hls:timer_host:1.0\ +psi.ch:hls:transfer_hbm:1.0\ psi.ch:hls:writer_split:1.0\ xilinx.com:ip:cmac_usplus:3.1\ xilinx.com:ip:util_vector_logic:2.0\ @@ -445,9 +446,13 @@ proc create_root_design { parentCell } { assign_bd_address -offset 0x00060000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_calibration_addr/S_AXI/Mem0] -force assign_bd_address -offset 0x00070000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/axi_firewall_0/S_AXI_CTL/Control] -force assign_bd_address -offset 0x00090000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/xdma_0/S_AXI_LITE/CTL0] -force + assign_bd_address -offset 0x000A0000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/transfer_hbm_0/s_axi_control/Reg] -force assign_bd_address -offset 0x000C0000 -range 0x00040000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs cms_subsystem_0/s_axi_ctrl/Mem] -force assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator_0/S_AXI/Mem0] -force + assign_bd_address -offset 0x00200000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_hbm_transfer_1/S_AXI/Mem0] -force assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces jungfraujoch_0/internal_packet_generator_0/Data_m_axi_frame] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator_1/S_AXI/Mem0] -force + assign_bd_address -offset 0x00200000 -range 0x00100000 -target_address_space [get_bd_addr_spaces jungfraujoch_0/transfer_hbm_0/Data_m_axi_uram] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_hbm_transfer_0/S_AXI/Mem0] -force + assign_bd_address set_property -dict [list \ diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index 9fcb6444..bd5c6d70 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -111,6 +111,24 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { CONFIG.SINGLE_PORT_BRAM {1} \ ] $axi_bram_ctrl_calibration_addr + # Create instance: axi_bram_ctrl_hbm_transfer_0, and set properties + set axi_bram_ctrl_hbm_transfer_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_hbm_transfer_0 ] + set_property -dict [ list \ + CONFIG.DATA_WIDTH {256} \ + CONFIG.PROTOCOL {AXI4} \ + CONFIG.READ_LATENCY {1} \ + CONFIG.SINGLE_PORT_BRAM {1} \ + ] $axi_bram_ctrl_hbm_transfer_0 + + # Create instance: axi_bram_ctrl_hbm_transfer_1, and set properties + set axi_bram_ctrl_hbm_transfer_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_hbm_transfer_1 ] + set_property -dict [ list \ + CONFIG.DATA_WIDTH {256} \ + CONFIG.PROTOCOL {AXI4} \ + CONFIG.READ_LATENCY {1} \ + CONFIG.SINGLE_PORT_BRAM {1} \ + ] $axi_bram_ctrl_hbm_transfer_1 + # Create instance: axi_bram_ctrl_internal_packet_generator_0, and set properties set axi_bram_ctrl_internal_packet_generator_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_internal_packet_generator_0 ] set_property -dict [ list \ @@ -364,111 +382,131 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { # Create instance: constant_hbm_offset_1, and set properties set constant_hbm_offset_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_1 ] set_property -dict [ list \ - CONFIG.CONST_VAL {0} \ + CONFIG.CONST_VAL {536870912} \ CONFIG.CONST_WIDTH {64} \ ] $constant_hbm_offset_1 # Create instance: constant_hbm_offset_2, and set properties set constant_hbm_offset_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_2 ] set_property -dict [ list \ - CONFIG.CONST_VAL {0} \ + CONFIG.CONST_VAL {1073741824} \ CONFIG.CONST_WIDTH {64} \ ] $constant_hbm_offset_2 # Create instance: constant_hbm_offset_3, and set properties set constant_hbm_offset_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_3 ] set_property -dict [ list \ - CONFIG.CONST_VAL {0} \ + CONFIG.CONST_VAL {1610612736} \ CONFIG.CONST_WIDTH {64} \ ] $constant_hbm_offset_3 # Create instance: constant_hbm_offset_4, and set properties set constant_hbm_offset_4 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_4 ] set_property -dict [ list \ - CONFIG.CONST_VAL {0} \ + CONFIG.CONST_VAL {2147483648} \ CONFIG.CONST_WIDTH {64} \ ] $constant_hbm_offset_4 # Create instance: constant_hbm_offset_5, and set properties set constant_hbm_offset_5 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_5 ] set_property -dict [ list \ - CONFIG.CONST_VAL {0} \ + CONFIG.CONST_VAL {2684354560} \ CONFIG.CONST_WIDTH {64} \ ] $constant_hbm_offset_5 # Create instance: constant_hbm_offset_6, and set properties set constant_hbm_offset_6 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_6 ] set_property -dict [ list \ - CONFIG.CONST_VAL {0} \ + CONFIG.CONST_VAL {3221225472} \ CONFIG.CONST_WIDTH {64} \ ] $constant_hbm_offset_6 # Create instance: constant_hbm_offset_7, and set properties set constant_hbm_offset_7 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_7 ] set_property -dict [ list \ - CONFIG.CONST_VAL {0} \ + CONFIG.CONST_VAL {3758096384} \ CONFIG.CONST_WIDTH {64} \ ] $constant_hbm_offset_7 # Create instance: constant_hbm_offset_8, and set properties set constant_hbm_offset_8 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_8 ] set_property -dict [ list \ - CONFIG.CONST_VAL {0} \ + CONFIG.CONST_VAL {4294967296} \ CONFIG.CONST_WIDTH {64} \ ] $constant_hbm_offset_8 # Create instance: constant_hbm_offset_9, and set properties set constant_hbm_offset_9 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_9 ] set_property -dict [ list \ - CONFIG.CONST_VAL {0} \ + CONFIG.CONST_VAL {4831838208} \ CONFIG.CONST_WIDTH {64} \ ] $constant_hbm_offset_9 # Create instance: constant_hbm_offset_10, and set properties set constant_hbm_offset_10 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_10 ] set_property -dict [ list \ - CONFIG.CONST_VAL {0} \ + CONFIG.CONST_VAL {5368709120} \ CONFIG.CONST_WIDTH {64} \ ] $constant_hbm_offset_10 # Create instance: constant_hbm_offset_11, and set properties set constant_hbm_offset_11 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_11 ] set_property -dict [ list \ - CONFIG.CONST_VAL {0} \ + CONFIG.CONST_VAL {5905580032} \ CONFIG.CONST_WIDTH {64} \ ] $constant_hbm_offset_11 # Create instance: constant_hbm_offset_12, and set properties set constant_hbm_offset_12 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_12 ] set_property -dict [ list \ - CONFIG.CONST_VAL {0} \ + CONFIG.CONST_VAL {6442450944} \ CONFIG.CONST_WIDTH {64} \ ] $constant_hbm_offset_12 # Create instance: constant_hbm_offset_13, and set properties set constant_hbm_offset_13 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_13 ] set_property -dict [ list \ - CONFIG.CONST_VAL {0} \ + CONFIG.CONST_VAL {6979321856} \ CONFIG.CONST_WIDTH {64} \ ] $constant_hbm_offset_13 # Create instance: constant_hbm_offset_14, and set properties set constant_hbm_offset_14 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_14 ] set_property -dict [ list \ - CONFIG.CONST_VAL {0} \ + CONFIG.CONST_VAL {7516192768} \ CONFIG.CONST_WIDTH {64} \ ] $constant_hbm_offset_14 # Create instance: constant_hbm_offset_15, and set properties set constant_hbm_offset_15 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_15 ] set_property -dict [ list \ - CONFIG.CONST_VAL {0} \ + CONFIG.CONST_VAL {8053063680} \ CONFIG.CONST_WIDTH {64} \ ] $constant_hbm_offset_15 # Create instance: data_collection_fsm_0, and set properties set data_collection_fsm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:data_collection_fsm:1.0 data_collection_fsm_0 ] + # Create instance: hbm_transfer_uram, and set properties + set hbm_transfer_uram [ create_bd_cell -type ip -vlnv xilinx.com:ip:blk_mem_gen:8.4 hbm_transfer_uram ] + set_property -dict [ list \ + CONFIG.Assume_Synchronous_Clk {true} \ + CONFIG.EN_SAFETY_CKT {false} \ + CONFIG.Enable_B {Use_ENB_Pin} \ + CONFIG.Memory_Type {True_Dual_Port_RAM} \ + CONFIG.Operating_Mode_A {NO_CHANGE} \ + CONFIG.Operating_Mode_B {NO_CHANGE} \ + CONFIG.PRIM_type_to_Implement {URAM} \ + CONFIG.Port_A_Write_Rate {50} \ + CONFIG.Port_B_Clock {100} \ + CONFIG.Port_B_Enable_Rate {100} \ + CONFIG.Port_B_Write_Rate {50} \ + CONFIG.Read_Width_B {256} \ + CONFIG.Use_Byte_Write_Enable {true} \ + CONFIG.Use_RSTB_Pin {true} \ + CONFIG.Write_Width_B {256} \ + ] $hbm_transfer_uram + # Create instance: host_writer_0, and set properties set host_writer_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:host_writer:1.0 host_writer_0 ] @@ -522,16 +560,22 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { set smartconnect_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_0 ] set_property -dict [ list \ CONFIG.NUM_CLKS {1} \ - CONFIG.NUM_MI {4} \ + CONFIG.NUM_MI {6} \ CONFIG.NUM_SI {1} \ ] $smartconnect_0 + # Create instance: smartconnect_1, and set properties + set smartconnect_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_1 ] + # Create instance: timer_hbm_0, and set properties set timer_hbm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:timer_hbm:1.0 timer_hbm_0 ] # Create instance: timer_host_0, and set properties set timer_host_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:timer_host:1.0 timer_host_0 ] + # Create instance: transfer_hbm_0, and set properties + set transfer_hbm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:transfer_hbm:1.0 transfer_hbm_0 ] + # Create instance: writer_split_0, and set properties set writer_split_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:writer_split:1.0 writer_split_0 ] @@ -547,6 +591,8 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net Conn3 [get_bd_intf_pins eth_in] [get_bd_intf_pins network_stack/eth_in] connect_bd_intf_net -intf_net S_AXIS_1 [get_bd_intf_pins s_axis_h2c_data] [get_bd_intf_pins axis_data_fifo_h2c_data/S_AXIS] connect_bd_intf_net -intf_net axi_bram_ctrl_0_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_calibration_addr/BRAM_PORTA] [get_bd_intf_pins calibration_addr_bram/BRAM_PORTB] + connect_bd_intf_net -intf_net axi_bram_ctrl_hbm_transfer_0_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_hbm_transfer_0/BRAM_PORTA] [get_bd_intf_pins hbm_transfer_uram/BRAM_PORTB] + connect_bd_intf_net -intf_net axi_bram_ctrl_hbm_transfer_1_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_hbm_transfer_1/BRAM_PORTA] [get_bd_intf_pins hbm_transfer_uram/BRAM_PORTA] connect_bd_intf_net -intf_net axi_bram_ctrl_internal_packet_generator_1_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_1/BRAM_PORTA] [get_bd_intf_pins internal_packet_generator_uram/BRAM_PORTB] connect_bd_intf_net -intf_net axi_bram_ctrl_internal_packet_generator_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_0/BRAM_PORTA] [get_bd_intf_pins internal_packet_generator_uram/BRAM_PORTA] connect_bd_intf_net -intf_net axis_addr_fifo_0_M_AXIS [get_bd_intf_pins axis_addr_fifo_0/M_AXIS] [get_bd_intf_pins internal_packet_generator_0/addr_in] @@ -587,7 +633,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net internal_packet_generator_0_m_axi_frame [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_1/S_AXI] [get_bd_intf_pins internal_packet_generator_0/m_axi_frame] connect_bd_intf_net -intf_net jf_conversion_0_addr_out [get_bd_intf_pins axis_register_slice_addr_1/S_AXIS] [get_bd_intf_pins jf_conversion_0/addr_out] connect_bd_intf_net -intf_net jf_conversion_0_data_out [get_bd_intf_pins axis_data_fifo_4/S_AXIS] [get_bd_intf_pins jf_conversion_0/data_out] - connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p0 [get_bd_intf_pins m_axi_d_hbm_p0] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p0] + connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p0 [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/S00_AXI] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p1 [get_bd_intf_pins m_axi_d_hbm_p1] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p1] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p2 [get_bd_intf_pins m_axi_d_hbm_p2] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p2] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p3 [get_bd_intf_pins m_axi_d_hbm_p3] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p3] @@ -614,8 +660,13 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net smartconnect_0_M01_AXI [get_bd_intf_pins mailbox_0/S0_AXI] [get_bd_intf_pins smartconnect_0/M01_AXI] connect_bd_intf_net -intf_net smartconnect_0_M02_AXI [get_bd_intf_pins axi_bram_ctrl_calibration_addr/S_AXI] [get_bd_intf_pins smartconnect_0/M02_AXI] connect_bd_intf_net -intf_net smartconnect_0_M03_AXI [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_0/S_AXI] [get_bd_intf_pins smartconnect_0/M03_AXI] + connect_bd_intf_net -intf_net smartconnect_0_M04_AXI [get_bd_intf_pins smartconnect_0/M04_AXI] [get_bd_intf_pins transfer_hbm_0/s_axi_control] + connect_bd_intf_net -intf_net smartconnect_0_M05_AXI [get_bd_intf_pins axi_bram_ctrl_hbm_transfer_1/S_AXI] [get_bd_intf_pins smartconnect_0/M05_AXI] + connect_bd_intf_net -intf_net smartconnect_1_M00_AXI [get_bd_intf_pins m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/M00_AXI] connect_bd_intf_net -intf_net timer_hbm_0_data_out [get_bd_intf_pins axis_data_fifo_3/S_AXIS] [get_bd_intf_pins timer_hbm_0/data_out] connect_bd_intf_net -intf_net timer_host_0_data_out [get_bd_intf_pins axis_register_slice_data_1/S_AXIS] [get_bd_intf_pins timer_host_0/data_out] + connect_bd_intf_net -intf_net transfer_hbm_0_m_axi_d_hbm_p0 [get_bd_intf_pins smartconnect_1/S01_AXI] [get_bd_intf_pins transfer_hbm_0/m_axi_d_hbm_p0] + connect_bd_intf_net -intf_net transfer_hbm_0_m_axi_uram [get_bd_intf_pins axi_bram_ctrl_hbm_transfer_0/S_AXI] [get_bd_intf_pins transfer_hbm_0/m_axi_uram] connect_bd_intf_net -intf_net writer_split_0_addr_out_1 [get_bd_intf_pins axis_addr_fifo_3/S_AXIS] [get_bd_intf_pins writer_split_0/addr_out_1] connect_bd_intf_net -intf_net writer_split_0_addr_out_2 [get_bd_intf_pins axis_addr_fifo_4/S_AXIS] [get_bd_intf_pins writer_split_0/addr_out_2] connect_bd_intf_net -intf_net writer_split_0_data_out_1 [get_bd_intf_pins axis_data_fifo_6/S_AXIS] [get_bd_intf_pins writer_split_0/data_out_1] @@ -632,7 +683,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net action_config_0_nmodules [get_bd_pins action_config_0/nmodules] [get_bd_pins data_collection_fsm_0/nmodules] connect_bd_net -net action_config_0_nstorage_cells [get_bd_pins action_config_0/nstorage_cells] [get_bd_pins data_collection_fsm_0/nstorage_cells] connect_bd_net -net action_config_0_one_over_energy [get_bd_pins action_config_0/one_over_energy] [get_bd_pins data_collection_fsm_0/one_over_energy] - connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_addr_fifo_3/s_axis_aclk] [get_bd_pins axis_addr_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_6/s_axis_aclk] [get_bd_pins axis_data_fifo_7/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins internal_packet_generator_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins save_to_hbm_0/ap_clk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins timer_hbm_0/ap_clk] [get_bd_pins timer_host_0/ap_clk] [get_bd_pins writer_split_0/ap_clk] + connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aclk] [get_bd_pins axi_bram_ctrl_hbm_transfer_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_hbm_transfer_1/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_addr_fifo_3/s_axis_aclk] [get_bd_pins axis_addr_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_6/s_axis_aclk] [get_bd_pins axis_data_fifo_7/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins internal_packet_generator_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins save_to_hbm_0/ap_clk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins smartconnect_1/aclk] [get_bd_pins timer_hbm_0/ap_clk] [get_bd_pins timer_host_0/ap_clk] [get_bd_pins transfer_hbm_0/ap_clk] [get_bd_pins writer_split_0/ap_clk] connect_bd_net -net axis_addr_fifo_2_almost_empty [get_bd_pins action_config_0/calib_addr_fifo_empty] [get_bd_pins axis_addr_fifo_1/almost_empty] connect_bd_net -net axis_addr_fifo_2_almost_full [get_bd_pins action_config_0/calib_addr_fifo_full] [get_bd_pins axis_addr_fifo_1/almost_full] connect_bd_net -net axis_addr_fifo_4_almost_empty [get_bd_pins action_config_0/last_addr_fifo_empty] [get_bd_pins axis_addr_fifo_2/almost_empty] @@ -688,8 +739,8 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net network_stack_packets_udp [get_bd_pins action_config_0/packets_udp] [get_bd_pins network_stack/packets_udp] connect_bd_net -net network_stack_packets_udp_ap_vld [get_bd_pins action_config_0/packets_udp_valid] [get_bd_pins network_stack/packets_udp_ap_vld] connect_bd_net -net one_dout [get_bd_pins one/dout] [get_bd_pins save_to_hbm_0/completion_out_TREADY] - connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_addr_fifo_2/s_axis_aresetn] [get_bd_pins axis_addr_fifo_3/s_axis_aresetn] [get_bd_pins axis_addr_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_5/s_axis_aresetn] [get_bd_pins axis_data_fifo_6/s_axis_aresetn] [get_bd_pins axis_data_fifo_7/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_0/aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_0/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] - connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins internal_packet_generator_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins save_to_hbm_0/ap_rst_n] [get_bd_pins timer_hbm_0/ap_rst_n] [get_bd_pins timer_host_0/ap_rst_n] [get_bd_pins writer_split_0/ap_rst_n] + connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axi_bram_ctrl_hbm_transfer_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_hbm_transfer_1/s_axi_aresetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_addr_fifo_2/s_axis_aresetn] [get_bd_pins axis_addr_fifo_3/s_axis_aresetn] [get_bd_pins axis_addr_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_5/s_axis_aresetn] [get_bd_pins axis_data_fifo_6/s_axis_aresetn] [get_bd_pins axis_data_fifo_7/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_0/aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_0/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] [get_bd_pins smartconnect_1/aresetn] + connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins internal_packet_generator_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins save_to_hbm_0/ap_rst_n] [get_bd_pins timer_hbm_0/ap_rst_n] [get_bd_pins timer_host_0/ap_rst_n] [get_bd_pins transfer_hbm_0/ap_rst_n] [get_bd_pins writer_split_0/ap_rst_n] connect_bd_net -net timer_hbm_0_counter [get_bd_pins action_config_0/stalls_hbm] [get_bd_pins timer_hbm_0/counter] connect_bd_net -net timer_hbm_0_counter_ap_vld [get_bd_pins action_config_0/stalls_hbm_valid] [get_bd_pins timer_hbm_0/counter_ap_vld] connect_bd_net -net timer_host_0_counter [get_bd_pins action_config_0/stalls_host] [get_bd_pins timer_host_0/counter] diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index d80bc2c8..75624a1a 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -8,6 +8,8 @@ #include "../fpga/hls/datamover_model.h" #include "../fpga/hls/hls_jfjoch.h" +#define HBM_SIZE (32*1024*1024UL) + uint16_t checksum(const uint16_t *addr, size_t count) { /* Compute Internet Checksum for "count" bytes * beginning at location "addr". @@ -50,7 +52,7 @@ HLSSimulatedDevice::HLSSimulatedDevice(uint16_t data_stream, size_t in_frame_buf for (auto &i: hbm_memory) // i.resize(SIZE_OF_HBM_BLOCK_IN_BYTES); - i.resize(32*1024*1024); // only 32 MiB instead of 256 MiB per HBM interface (should be more than enough for all the tests anyway) + i.resize(HBM_SIZE); // only 32 MiB instead of 256 MiB per HBM interface (should be more than enough for all the tests anyway) } void HLSSimulatedDevice::CreateFinalPacket(const DiffractionExperiment& experiment) { @@ -404,4 +406,23 @@ void HLSSimulatedDevice::HW_GetStatus(ActionStatus *status) const { status->ctrl_reg = ap_uint<1>(host_writer_idle) ? (1 << 4) : 0; status->modules_internal_packet_generator = 1; status->max_modules = max_modules; +} + +void HLSSimulatedDevice::HBMTransfer(void *uram, uint64_t hbm_interface, uint64_t hbm_offset, bool hbm_to_uram, + uint8_t stride, uint8_t uram_offset) { + if (hbm_interface >= HLS_SIM_DEVICE_HBM_INTERFACES) + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "HBM interface out of bounds"); + if (hbm_offset > HBM_SIZE - (RAW_MODULE_SIZE * sizeof(uint16_t))) + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "HBM offset out of bounds"); + if ((stride != 1) && (stride != 2) && (stride != 4)) + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Only stride of 1, 2 and 4 allowed"); + if (uram_offset >= stride) + throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "UltraRAM stride out of bounds"); + + transfer_hbm((ap_uint<256> *) hbm_memory[hbm_interface].data(), + (ap_uint<256> *) uram, + hbm_offset / 32, + hbm_to_uram, + stride, + uram_offset); } \ No newline at end of file diff --git a/receiver/HLSSimulatedDevice.h b/receiver/HLSSimulatedDevice.h index 5f4bf434..de077956 100644 --- a/receiver/HLSSimulatedDevice.h +++ b/receiver/HLSSimulatedDevice.h @@ -12,6 +12,8 @@ #include "FPGAAcquisitionDevice.h" #include "../jungfrau/jf_packet.h" +#define HLS_SIM_DEVICE_HBM_INTERFACES (16) + uint16_t checksum(const uint16_t *addr, size_t count); class HLSSimulatedDevice : public FPGAAcquisitionDevice { @@ -21,7 +23,7 @@ class HLSSimulatedDevice : public FPGAAcquisitionDevice { ActionConfig cfg; volatile bool idle; - std::vector hbm_memory[16]; + std::vector hbm_memory[HLS_SIM_DEVICE_HBM_INTERFACES]; hls::stream > work_request_stream; hls::stream > completion_stream; @@ -58,6 +60,8 @@ public: void CreateFinalPacket(const DiffractionExperiment& experiment); AXI_STREAM &OutputStream(); void Cancel() override; + + void HBMTransfer(void *uram, uint64_t hbm_interface, uint64_t hbm_offset, bool hbm_to_uram, uint8_t stride, uint8_t uram_offset); }; diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index c7b454f3..de8ad964 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -1031,3 +1031,111 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_storage_cell_convert_G1", REQUIRE(test.GetFrameBuffer(i,1)[200*145] == 2 * (i % 16) - 1); } } + +TEST_CASE("HLS_C_transfer_hbm_1_interface", "[FPGA][Full]") { + std::vector test_frame_1(RAW_MODULE_SIZE); + std::vector test_frame_2(RAW_MODULE_SIZE); + + std::mt19937 g1(1387); + std::uniform_int_distribution dist(0, 65535); + + for (auto &i: test_frame_1) + i = dist(g1); + + HLSSimulatedDevice test(0, 64); + + REQUIRE(test_frame_1 != test_frame_2); + + test.HBMTransfer(test_frame_1.data(), 14, 16*1024, false, 1, 0); + test.HBMTransfer(test_frame_2.data(), 14, 16*1024, true, 1, 0); + + REQUIRE(test_frame_1 == test_frame_2); +} + +TEST_CASE("HLS_C_transfer_hbm_2_interfaces", "[FPGA][Full]") { + std::vector test_frame_1(RAW_MODULE_SIZE); + std::vector test_frame_2(RAW_MODULE_SIZE); + + std::mt19937 g1(1388); + std::uniform_int_distribution dist(0, 65535); + + for (auto &i: test_frame_1) + i = dist(g1); + + HLSSimulatedDevice test(0, 64); + + REQUIRE(test_frame_1 != test_frame_2); + + test.HBMTransfer(test_frame_1.data(), 14, 16*1024, false, 2, 0); + test.HBMTransfer(test_frame_1.data(), 15, 16*1024, false, 2, 1); + test.HBMTransfer(test_frame_2.data(), 14, 16*1024, true, 2, 0); + test.HBMTransfer(test_frame_2.data(), 15, 16*1024, true, 2, 1); + + REQUIRE(test_frame_1 == test_frame_2); +} + +TEST_CASE("HLS_C_transfer_hbm_4_interfaces", "[FPGA][Full]") { + std::vector test_frame_1(RAW_MODULE_SIZE); + std::vector test_frame_2(RAW_MODULE_SIZE); + + std::mt19937 g1(1389); + std::uniform_int_distribution dist(0, 65535); + + for (auto &i: test_frame_1) + i = dist(g1); + + HLSSimulatedDevice test(0, 64); + + REQUIRE(test_frame_1 != test_frame_2); + + test.HBMTransfer(test_frame_1.data(), 12, 16*1024*1024, false, 4, 0); + test.HBMTransfer(test_frame_1.data(), 13, 16*1024*1024, false, 4, 1); + test.HBMTransfer(test_frame_1.data(), 14, 16*1024*1024, false, 4, 2); + test.HBMTransfer(test_frame_1.data(), 15, 16*1024*1024, false, 4, 3); + test.HBMTransfer(test_frame_2.data(), 12, 16*1024*1024, true, 4, 0); + test.HBMTransfer(test_frame_2.data(), 13, 16*1024*1024, true, 4, 1); + test.HBMTransfer(test_frame_2.data(), 14, 16*1024*1024, true, 4, 2); + test.HBMTransfer(test_frame_2.data(), 15, 16*1024*1024, true, 4, 3); + + REQUIRE(test_frame_1 == test_frame_2); +} + +TEST_CASE("HLS_C_Simulation_internal_packet_generator_write_to_hbm", "[FPGA][Full]") { + const uint16_t nmodules = 1; + + DiffractionExperiment x((DetectorGeometry(nmodules))); + + x.Mode(DetectorMode::Raw); + x.UseInternalPacketGenerator(true).ImagesPerTrigger(4).PedestalG0Frames(0); + + HLSSimulatedDevice test(0, 64); + test.SetFPGANonBlockingMode(false); + + std::vector test_frame_1(RAW_MODULE_SIZE); + std::vector test_frame_2(RAW_MODULE_SIZE); + + std::mt19937 g1(1387); + std::uniform_int_distribution dist(0, 65535); + + for (auto &i: test_frame_1) + i = dist(g1); + + REQUIRE_NOTHROW(test.SetCustomInternalGeneratorFrame(test_frame_1)); + REQUIRE_NOTHROW(test.StartAction(x)); + REQUIRE_NOTHROW(test.WaitForActionComplete()); + + REQUIRE(test.OutputStream().size() == 1); + + JFJochProtoBuf::AcquisitionDeviceStatistics device_statistics; + REQUIRE_NOTHROW(test.SaveStatistics(x, device_statistics)); + REQUIRE(device_statistics.bytes_received() == 128 * nmodules * 4 * JUNGFRAU_PACKET_SIZE_BYTES); + + REQUIRE(test_frame_1 != test_frame_2); + + test.HBMTransfer(test_frame_2.data(), 12, 2*256*1024, true, 4, 0); + test.HBMTransfer(test_frame_2.data(), 13, 2*256*1024, true, 4, 1); + test.HBMTransfer(test_frame_2.data(), 14, 2*256*1024, true, 4, 2); + test.HBMTransfer(test_frame_2.data(), 15, 2*256*1024, true, 4, 3); + + REQUIRE(test_frame_1 == test_frame_2); +} From aca1bbda0e6627ee3bf3ef8350907b9f607bee31 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 9 Sep 2023 12:48:25 +0200 Subject: [PATCH 184/224] HLSSimulatedDevice: moving towards continuous HBM representation --- receiver/HLSSimulatedDevice.cpp | 42 ++++++++++++++++----------------- receiver/HLSSimulatedDevice.h | 7 +++--- 2 files changed, 25 insertions(+), 24 deletions(-) diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index 75624a1a..6af6cb6e 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -8,8 +8,6 @@ #include "../fpga/hls/datamover_model.h" #include "../fpga/hls/hls_jfjoch.h" -#define HBM_SIZE (32*1024*1024UL) - uint16_t checksum(const uint16_t *addr, size_t count) { /* Compute Internet Checksum for "count" bytes * beginning at location "addr". @@ -34,7 +32,7 @@ HLSSimulatedDevice::HLSSimulatedDevice(uint16_t data_stream, size_t in_frame_buf : FPGAAcquisitionDevice(data_stream), datamover_in(Direction::Input), datamover_out(Direction::Output, nullptr, 256), - idle(true) { + idle(true), hbm(hbm_if_size / 32 * hbm_if_count) { mac_addr = 0xCCAA11223344; ipv4_addr = 0x0132010A; @@ -49,10 +47,6 @@ HLSSimulatedDevice::HLSSimulatedDevice(uint16_t data_stream, size_t in_frame_buf in_mem_location32[2 * i ] = ((uint64_t) buffer_device[i]) & UINT32_MAX; in_mem_location32[2 * i + 1] = ((uint64_t) buffer_device[i]) >> 32; } - - for (auto &i: hbm_memory) - // i.resize(SIZE_OF_HBM_BLOCK_IN_BYTES); - i.resize(HBM_SIZE); // only 32 MiB instead of 256 MiB per HBM interface (should be more than enough for all the tests anyway) } void HLSSimulatedDevice::CreateFinalPacket(const DiffractionExperiment& experiment) { @@ -304,12 +298,18 @@ void HLSSimulatedDevice::HLSMainThread() { // 2. Apply pedestal & gain corrections hls_cores.emplace_back([&] { jf_conversion(raw4, converted_1, addr2, addr3, - (hbm256_t *) (hbm_memory[0].data()), (hbm256_t *) (hbm_memory[1].data()), - (hbm256_t *) (hbm_memory[2].data()), (hbm256_t *) (hbm_memory[3].data()), - (hbm256_t *) (hbm_memory[4].data()), (hbm256_t *) (hbm_memory[5].data()), - (hbm256_t *) (hbm_memory[6].data()), (hbm256_t *) (hbm_memory[7].data()), - (hbm256_t *) (hbm_memory[8].data()), (hbm256_t *) (hbm_memory[9].data()), - (hbm256_t *) (hbm_memory[10].data()), (hbm256_t *) (hbm_memory[11].data())); }); + hbm.data() + 0 * hbm_if_size / 32, + hbm.data() + 1 * hbm_if_size / 32, + hbm.data() + 2 * hbm_if_size / 32, + hbm.data() + 3 * hbm_if_size / 32, + hbm.data() + 4 * hbm_if_size / 32, + hbm.data() + 5 * hbm_if_size / 32, + hbm.data() + 6 * hbm_if_size / 32, + hbm.data() + 7 * hbm_if_size / 32, + hbm.data() + 8 * hbm_if_size / 32, + hbm.data() + 9 * hbm_if_size / 32, + hbm.data() + 10 * hbm_if_size / 32, + hbm.data() + 11 * hbm_if_size / 32); }); // Timer procedure - count how many times write_data is not accepting input (to help track down latency issues) hls_cores.emplace_back([&] { timer_host(converted_1, converted_2, counter_host); }); @@ -325,10 +325,10 @@ void HLSSimulatedDevice::HLSMainThread() { // 3. Write images to HBM hls_cores.emplace_back([&] { save_to_hbm(converted_3, addr4, save_to_hbm_completion, - (hbm256_t *) (hbm_memory[12].data()), - (hbm256_t *) (hbm_memory[13].data()), - (hbm256_t *) (hbm_memory[14].data()), - (hbm256_t *) (hbm_memory[15].data()), + hbm.data() + 12 * hbm_if_size / 32, + hbm.data() + 13 * hbm_if_size / 32, + hbm.data() + 14 * hbm_if_size / 32, + hbm.data() + 15 * hbm_if_size / 32, save_to_hbm_packets_processed, save_to_hbm_idle, save_to_hbm_err_reg, @@ -410,18 +410,18 @@ void HLSSimulatedDevice::HW_GetStatus(ActionStatus *status) const { void HLSSimulatedDevice::HBMTransfer(void *uram, uint64_t hbm_interface, uint64_t hbm_offset, bool hbm_to_uram, uint8_t stride, uint8_t uram_offset) { - if (hbm_interface >= HLS_SIM_DEVICE_HBM_INTERFACES) + if (hbm_interface >= hbm_if_count) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "HBM interface out of bounds"); - if (hbm_offset > HBM_SIZE - (RAW_MODULE_SIZE * sizeof(uint16_t))) + if (hbm_offset > hbm_if_size - (RAW_MODULE_SIZE * sizeof(uint16_t))) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "HBM offset out of bounds"); if ((stride != 1) && (stride != 2) && (stride != 4)) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Only stride of 1, 2 and 4 allowed"); if (uram_offset >= stride) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "UltraRAM stride out of bounds"); - transfer_hbm((ap_uint<256> *) hbm_memory[hbm_interface].data(), + transfer_hbm((ap_uint<256> *) hbm.data(), (ap_uint<256> *) uram, - hbm_offset / 32, + (hbm_interface * hbm_if_size + hbm_offset) / 32, hbm_to_uram, stride, uram_offset); diff --git a/receiver/HLSSimulatedDevice.h b/receiver/HLSSimulatedDevice.h index de077956..3fa13a0b 100644 --- a/receiver/HLSSimulatedDevice.h +++ b/receiver/HLSSimulatedDevice.h @@ -12,8 +12,6 @@ #include "FPGAAcquisitionDevice.h" #include "../jungfrau/jf_packet.h" -#define HLS_SIM_DEVICE_HBM_INTERFACES (16) - uint16_t checksum(const uint16_t *addr, size_t count); class HLSSimulatedDevice : public FPGAAcquisitionDevice { @@ -23,7 +21,10 @@ class HLSSimulatedDevice : public FPGAAcquisitionDevice { ActionConfig cfg; volatile bool idle; - std::vector hbm_memory[HLS_SIM_DEVICE_HBM_INTERFACES]; + + constexpr static const size_t hbm_if_count = 16; + constexpr static const size_t hbm_if_size = 32*1024*1024LU; + std::vector> hbm; hls::stream > work_request_stream; hls::stream > completion_stream; From d4bcfb9f9e5bd8dc6138b5c50c8a4eafe73b37ed Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 9 Sep 2023 18:41:05 +0200 Subject: [PATCH 185/224] hls_burst_maxi.h: Allow for multiple operations on the same channel --- fpga/include/hls_burst_maxi.h | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/fpga/include/hls_burst_maxi.h b/fpga/include/hls_burst_maxi.h index 627b965b..9d8541fb 100644 --- a/fpga/include/hls_burst_maxi.h +++ b/fpga/include/hls_burst_maxi.h @@ -1,4 +1,9 @@ // 67d7842dbbe25473c3c32b93c0da8047785f30d78e8a024de1b57352245f9689 + +// Modified by Filip Leonarski (Paul Scherrer Institute +// to allow for multiple parallel bursts to the same pointer +// (via independent HBM channels) + #ifndef X_HLS_BURST_MAXI_SIM_H #define X_HLS_BURST_MAXI_SIM_H @@ -27,9 +32,6 @@ struct MAXIAccessRecord { std::list> WriteRespQ; }; -// A global map between pointer and MAXAccessRecord. -std::map MAXIPointer2AccessRecordMap __attribute__((weak)); - template class burst_maxi { public: @@ -38,7 +40,6 @@ public: assert(bitwidth != 0 && !(bitwidth & (bitwidth - 1)) && "Error: bit width of hls::burst_maxi is not poower-of-2."); // Reset the MAXI access record to this pointer - MAXIAccessRecord &R = MAXIPointer2AccessRecordMap[p]; R.read_disp = 0; R.write_disp = 0; R.ReadQ.clear(); @@ -48,7 +49,6 @@ public: void read_request(size_t offset, unsigned len) { assert(len > 0); - MAXIAccessRecord &R = MAXIPointer2AccessRecordMap[Ptr]; R.ReadQ.push_back(std::make_pair(offset, len)); std::list> CurrentWriteQ = R.WriteQ; CurrentWriteQ.insert(CurrentWriteQ.end(), @@ -62,8 +62,7 @@ public: } T read() { - MAXIAccessRecord &R = MAXIPointer2AccessRecordMap[Ptr]; - assert(!R.ReadQ.empty() && "Error: MAXI read without request."); + assert(!R.ReadQ.empty() && "Error: MAXI read without request."); auto Pair = R.ReadQ.front(); T V = Ptr[Pair.first + (R.read_disp++)]; if (R.read_disp == Pair.second) { @@ -75,7 +74,6 @@ public: void write_request(size_t offset, unsigned len) { assert(len > 0); - MAXIAccessRecord &R = MAXIPointer2AccessRecordMap[Ptr]; for (auto Pair : R.ReadQ) { if (overlap(offset, len, Pair.first, Pair.second)) { std::cerr << "Error: MAXI write request(offset = " << offset << ", len = " << len << ") overlaps with previous read request(offset = " << Pair.first << ", len = " << Pair.second << ")." << std::endl; @@ -86,8 +84,7 @@ public: } void write(const T &val, ap_int byte_enable_mask = -1) { - MAXIAccessRecord &R = MAXIPointer2AccessRecordMap[Ptr]; - assert(!R.WriteQ.empty() && "Error: MAXI write without request."); + assert(!R.WriteQ.empty() && "Error: MAXI write without request."); auto Pair = R.WriteQ.front(); T *DstP = &Ptr[Pair.first + R.write_disp++]; T Src = val; @@ -104,13 +101,13 @@ public: } void write_response() { - MAXIAccessRecord &R = MAXIPointer2AccessRecordMap[Ptr]; assert(!R.WriteRespQ.empty() && "Error: bad MAXI write response. Possible: 1) no corresponding write request; 2) some data still not written."); R.WriteRespQ.pop_front(); } private: T *Ptr; + MAXIAccessRecord R; bool overlap(size_t a, unsigned a_len, size_t b, unsigned b_len) { return a <= b ? a + a_len > b : b + b_len > a; } From 929f6c654463413b9d2cfb131ecb77518556e673 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sat, 9 Sep 2023 20:30:53 +0200 Subject: [PATCH 186/224] FPGA: Handle HBM offsets internally in Jungfraujoch logic --- fpga/README.md | 96 +++++++++++----------- fpga/hdl/action_config.v | 23 +++++- fpga/hls/data_collection_fsm.cpp | 5 +- fpga/hls/hls_jfjoch.h | 7 +- fpga/hls/jf_conversion.cpp | 85 +++++++++++-------- fpga/hls/save_to_hbm.cpp | 36 ++++---- fpga/pcie_driver/ActionConfig.h | 2 +- fpga/scripts/bd_pcie.tcl | 4 - fpga/scripts/jfjoch.tcl | 137 +------------------------------ receiver/HLSSimulatedDevice.cpp | 38 ++++----- tests/FPGAIntegrationTest.cpp | 29 ++++--- 11 files changed, 182 insertions(+), 280 deletions(-) diff --git a/fpga/README.md b/fpga/README.md index 30554051..ac7593e9 100644 --- a/fpga/README.md +++ b/fpga/README.md @@ -54,53 +54,55 @@ To test that FPGA board is working properly without access to a JUNGFRAU detecto ## FPGA reference FPGA setup can be done via 32-bit registers: -| Address | Bits | Meaning | Mode | Notes | -|-------------------|------|------------------------------------------------------------------------------------------------------|:-----|-----------------------------------| -| 0x00000 - 0x0FFFF | | Reserved for internal memory of MicroBlaze | | | -| 0x10000 | 32 | Action Control Register | | | -| | | Bit 0 - Action start | R/W | | -| | | Bit 1 - Action idle | R | | -| | | Bit 2 - Action cancel | R/W | cleared on reset or action start | -| | | Bit 3 - Clear network counters | R/W | cleared on reset or action start | -| | | Bit 4 - Host writer idle | R | cleared on reset | -| | | Bit 7 - Design number | R | 0 = PCIe #0, 1 = PCIe #1 | -| | | Bit 16 - AXI Mailbox interrupt 0 | R | | -| | | Bit 17 - AXI Mailbox interrupt 1 | R | | -| | | Bits 24-27 - Various errors in host memory writer | R | cleared on reset or action start | -| 0x10004 | 32 | Reserved | - | | -| 0x1000C | 32 | Action GIT SHA1 | R | | -| 0x10010 | 32 | Action Type | R | | -| 0x10014 | 32 | Action Release Level | R | | -| 0x10020 | 32 | Max. number supported detector modules | R | constant | -| 0x10024 | 32 | Number of modules in internal packet generator memory | R | constant | -| 0x10028 | 64 | Pipeline stalls before writing to host memory | R | reset on action start | -| 0x10030 | 64 | Pipeline stalls before accessing HBM | R | reset on action start | -| 0x10038 | 32 | FIFO status (see action_config.v for details) | R/W | | -| 0x1003C | 32 | Reserved | - | | -| 0x10040 | 64 | Packets processed by the action | R/W | cleared on reset or action start | -| 0x10048 | 64 | Valid ethernet packets | R/W | cleared on reset | -| 0x10050 | 64 | Valid ICMP packets | R/W | cleared on reset | -| 0x10058 | 64 | Valid UDP packets | R/W | cleared on reset | -| 0x10060 | 64 | MAC address of FPGA card | R/W | network byte order | -| 0x10068 | 32 | IPv4 address of FPGA card | R/W | network byte order | -| 0x1006C | 32 | Number of detector modules | R/W | | -| 0x10070 | 32 | Data collection mode | R/W | | -| | | Bit 0 - Conversion to photons | | | -| | | Bit 1 - Use internal packet generator | | | -| | | Bit 2 - Nonblocking operation (host writer will ignore frames if there is no available work request) | | | -| | | Bit 16:31 - Data collection ID (carried with completions) | | | -| 0x10074 | 32 | One over energy in keV (in fixed-point:12 int. + 24 frac. bit format) | R/W | | -| 0x10078 | 32 | Number of frames to be generated by internal packet generator | R/W | | -| 0x1007C | 32 | Number of storage cells | R/W | | -| | | | | | -| 0x20000 - 0x2FFFF | | CMAC 100G | | See Xilinx PG203 for register map | -| 0x30000 - 0x3FFFF | | AXI Mailbox for Work Request / Work Completion | | See Xilinx PG114 for register map | -| 0x40000 - 0x4FFFF | | QuadSPI flash | | See Xilinx PG153 for register map | -| 0x60000 - 0x60FFF | 64 | Input calibration memory addresses block RAM | | | -| 0x70000 - 0x7FFFF | | AXI Firewall | | See Xilinx PG293 for register map | -| 0x80000 - 0x8FFFF | | Interrupt controller | | See Xilinx PG099 for register map | -| 0x70000 - 0x7FFFF | | PCIe DMA control | | See Xilinx PG195 for register map | -| 0xC0000 - 0xFFFFF | | Xilinx Card Management Solution Subsystem management subsystem | | See Xilinx PG348 for register map | +| Address | Bits | Meaning | Mode | Notes | +|---------------------|------|------------------------------------------------------------------------------------------------------|:-----|----------------------------------------------| +| 0x00000 - 0x0FFFF | | Reserved (in case using MicroBlaze in the future, this has to reserved for internal memory) | | | +| 0x010000 | 32 | Action Control Register | | | +| | | Bit 0 - Action start | R/W | | +| | | Bit 1 - Action idle | R | | +| | | Bit 2 - Action cancel | R/W | cleared on reset or action start | +| | | Bit 3 - Clear network counters | R/W | cleared on reset or action start | +| | | Bit 4 - Host writer idle | R | cleared on reset | +| | | Bit 7 - Design number | R | 0 = PCIe #0, 1 = PCIe #1 | +| | | Bit 16 - AXI Mailbox interrupt 0 | R | | +| | | Bit 17 - AXI Mailbox interrupt 1 | R | | +| | | Bits 24-27 - Various errors in host memory writer | R | cleared on reset or action start | +| 0x010004 | 32 | Reserved | - | | +| 0x01000C | 32 | Action GIT SHA1 | R | | +| 0x010010 | 32 | Action Type | R | | +| 0x010014 | 32 | Action Release Level | R | | +| 0x010020 | 32 | Max. number supported detector modules | R | constant | +| 0x010024 | 32 | Number of modules in internal packet generator memory | R | constant | +| 0x010028 | 64 | Pipeline stalls before writing to host memory | R | reset on action start | +| 0x010030 | 64 | Pipeline stalls before accessing HBM | R | reset on action start | +| 0x010038 | 32 | FIFO status (see action_config.v for details) | R | | +| 0x01003C | 32 | Size of single HBM channel in bytes (default value for the particular card) | R/W | should not be altered for standard operation | +| 0x010040 | 64 | Packets processed by the action | R | cleared on reset or action start | +| 0x010048 | 64 | Valid ethernet packets | R | cleared on reset | +| 0x010050 | 64 | Valid ICMP packets | R | cleared on reset | +| 0x010058 | 64 | Valid UDP packets | R | cleared on reset | +| 0x010060 | 64 | MAC address of FPGA card | R/W | network byte order | +| 0x010068 | 32 | IPv4 address of FPGA card | R/W | network byte order | +| 0x01006C | 32 | Number of detector modules | R/W | | +| 0x010070 | 32 | Data collection mode | R/W | | +| | | Bit 0 - Conversion to photons | | | +| | | Bit 1 - Use internal packet generator | | | +| | | Bit 2 - Nonblocking operation (host writer will ignore frames if there is no available work request) | | | +| | | Bit 16:31 - Data collection ID (carried with completions) | | | +| 0x010074 | 32 | One over energy in keV (in fixed-point:12 int. + 24 frac. bit format) | R/W | | +| 0x010078 | 32 | Number of frames to be generated by internal packet generator | R/W | | +| 0x01007C | 32 | Number of storage cells | R/W | | +| | | | | | +| 0x020000 - 0x02FFFF | | CMAC 100G | | See Xilinx PG203 for register map | +| 0x030000 - 0x03FFFF | | AXI Mailbox for Work Request / Work Completion | | See Xilinx PG114 for register map | +| 0x040000 - 0x04FFFF | | QuadSPI flash | | See Xilinx PG153 for register map | +| 0x060000 - 0x060FFF | 64 | Input calibration memory addresses block RAM | | | +| 0x070000 - 0x07FFFF | | AXI Firewall | | See Xilinx PG293 for register map | +| 0x090000 - 0x09FFFF | | PCIe DMA control | | See Xilinx PG195 for register map | +| 0x0A0000 - 0x0AFFFF | | Transfer between UltraRAM buffer <-> HBM (HLS registers) | | | +| 0x0C0000 - 0x0FFFFF | | Xilinx Card Management Solution Subsystem management subsystem | | See Xilinx PG348 for register map | +| 0x100000 - 0x1FFFFF | 16 | Internal packet generator frame | | | +| 0x200000 - 0x2FFFFF | | UltraRAM buffer for transfers to/from HBM | | | ### AXI Mailbox diff --git a/fpga/hdl/action_config.v b/fpga/hdl/action_config.v index 527349bb..f8ad79cb 100644 --- a/fpga/hdl/action_config.v +++ b/fpga/hdl/action_config.v @@ -5,9 +5,10 @@ // parameters imported from source files `define ACTION_TYPE 32'h52324158 -`define RELEASE_LEVEL 32'h00000000 -`define GIT_SHA1 32'h00000000 -`define MAX_MODULES_FPGA 32'd8 +`define RELEASE_LEVEL 32'h003A +`define GIT_SHA1 32'hd4bcfb9f +`define MAX_MODULES_FPGA 32'd16 +`define HBM_SIZE_BYTES 32'h20000000 `define ADDR_AP_CTRL 16'h0000 `define ADDR_SET_LED 16'h0008 @@ -23,6 +24,7 @@ `define ADDR_STALLS_HBM_LO 16'h0030 `define ADDR_STALLS_HBM_HI 16'h0034 `define ADDR_FIFO_STATUS 16'h0038 +`define ADDR_HBM_SIZE 16'h003C `define ADDR_PACKETS_PROC_LO 16'h0040 `define ADDR_PACKETS_PROC_HI 16'h0044 @@ -88,6 +90,7 @@ module action_config output reg [31:0] nframes , output reg [7:0] nmodules , output reg [3:0] nstorage_cells , + output reg [31:0] hbm_size_bytes , output reg data_collection_start , output reg data_collection_cancel , @@ -359,6 +362,9 @@ always @(posedge clk) begin `ADDR_PACKETS_ERR_ETH: begin rdata <= reg_udp_err_eth; end + `ADDR_HBM_SIZE: begin + rdata <= hbm_size_bytes; + end `ADDR_FIFO_STATUS: begin rdata <= reg_fifo_status; end @@ -375,6 +381,17 @@ initial data_collection_start = 1'b0; initial data_collection_cancel = 1'b0; initial reg_ctrl = 32'b0; +initial hbm_size_bytes = `HBM_SIZE_BYTES; + +always @(posedge clk) begin + if (!resetn) + hbm_size_bytes = `HBM_SIZE_BYTES; + else if (reg_data_collection_idle) begin + if (w_hs && waddr == `ADDR_HBM_SIZE) + hbm_size_bytes <= (s_axi_WDATA[31:0] & wmask) | (hbm_size_bytes & !wmask); + end +end + always @(posedge clk) begin if (!resetn) reg_ctrl <= 32'b0; diff --git a/fpga/hls/data_collection_fsm.cpp b/fpga/hls/data_collection_fsm.cpp index 1dade42a..87d59bf3 100644 --- a/fpga/hls/data_collection_fsm.cpp +++ b/fpga/hls/data_collection_fsm.cpp @@ -14,7 +14,8 @@ void data_collection_fsm(AXI_STREAM ð_in, ap_uint<32> one_over_energy, ap_uint<32> nframes, ap_uint<8> nmodules, - ap_uint<4> nstorage_cells) { + ap_uint<4> nstorage_cells, + ap_uint<32> hbm_size_bytes) { #pragma HLS INTERFACE ap_ctrl_none port=return #pragma HLS INTERFACE axis register both port=eth_in @@ -30,6 +31,7 @@ void data_collection_fsm(AXI_STREAM ð_in, #pragma HLS INTERFACE ap_none register port=nframes #pragma HLS INTERFACE ap_none register port=nmodules #pragma HLS INTERFACE ap_none register port=nstorage_cells +#pragma HLS INTERFACE ap_none register port=hbm_size_bytes #pragma HLS PIPELINE II=1 style=flp @@ -75,6 +77,7 @@ void data_collection_fsm(AXI_STREAM ð_in, ACT_REG_NFRAMES(packet_out.data) = nframes; ACT_REG_NMODULES(packet_out.data) = nmodules; ACT_REG_NSTORAGE_CELLS(packet_out.data) = nstorage_cells + 1; + ACT_REG_HBM_SIZE_256b(packet_out.data) = hbm_size_bytes / 32; packet_out.user = 0; packet_out.last = 0; diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index 314a1acb..47a36c56 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -64,6 +64,7 @@ typedef hls::stream STREAM_512; #define ACT_REG_NFRAMES(x) ((x)(95 , 64)) // 32 bit #define ACT_REG_NMODULES(x) ((x)(132, 128)) // 5 bit (0..31) #define ACT_REG_NSTORAGE_CELLS(x) ((x)(148, 144)) // 5 bit +#define ACT_REG_HBM_SIZE_256b(x) ((x)(191, 160)) // 32 bit struct axis_datamover_ctrl { ap_uint<40+64> data; @@ -82,7 +83,8 @@ void data_collection_fsm(AXI_STREAM ð_in, ap_uint<32> one_over_energy, ap_uint<32> nframes, ap_uint<8> nmodules, - ap_uint<4> nstorage_cells); + ap_uint<4> nstorage_cells, + ap_uint<32> hbm_size_bytes); void load_calibration(STREAM_512 &data_in, STREAM_512 &data_out, hls::stream &datamover_in_cmd, @@ -132,8 +134,7 @@ void save_to_hbm(STREAM_512 &data_in, hls::burst_maxi d_hbm_p2, hls::burst_maxi d_hbm_p3, volatile uint64_t &packets_processed, volatile ap_uint<1> &idle, - ap_uint<8> &err_reg, - uint32_t hbm_size); + ap_uint<8> &err_reg); template ap_uint pack32(ap_int in[32]) { #pragma HLS INLINE diff --git a/fpga/hls/jf_conversion.cpp b/fpga/hls/jf_conversion.cpp index 4f62cdfd..1cff39df 100644 --- a/fpga/hls/jf_conversion.cpp +++ b/fpga/hls/jf_conversion.cpp @@ -115,29 +115,29 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS INTERFACE register both axis port=addr_in #pragma HLS INTERFACE register both axis port=addr_out -#pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=direct \ +#pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=off \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=direct \ +#pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=off \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p2 bundle=d_hbm_p2 depth=512 offset=direct \ +#pragma HLS INTERFACE m_axi port=d_hbm_p2 bundle=d_hbm_p2 depth=512 offset=off \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p3 bundle=d_hbm_p3 depth=512 offset=direct \ +#pragma HLS INTERFACE m_axi port=d_hbm_p3 bundle=d_hbm_p3 depth=512 offset=off \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p4 bundle=d_hbm_p4 depth=512 offset=direct \ +#pragma HLS INTERFACE m_axi port=d_hbm_p4 bundle=d_hbm_p4 depth=512 offset=off \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p5 bundle=d_hbm_p5 depth=512 offset=direct \ +#pragma HLS INTERFACE m_axi port=d_hbm_p5 bundle=d_hbm_p5 depth=512 offset=off \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p6 bundle=d_hbm_p6 depth=512 offset=direct \ +#pragma HLS INTERFACE m_axi port=d_hbm_p6 bundle=d_hbm_p6 depth=512 offset=off \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p7 bundle=d_hbm_p7 depth=512 offset=direct \ +#pragma HLS INTERFACE m_axi port=d_hbm_p7 bundle=d_hbm_p7 depth=512 offset=off \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p8 bundle=d_hbm_p8 depth=512 offset=direct \ +#pragma HLS INTERFACE m_axi port=d_hbm_p8 bundle=d_hbm_p8 depth=512 offset=off \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p9 bundle=d_hbm_p9 depth=512 offset=direct \ +#pragma HLS INTERFACE m_axi port=d_hbm_p9 bundle=d_hbm_p9 depth=512 offset=off \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p10 bundle=d_hbm_p10 depth=512 offset=direct \ +#pragma HLS INTERFACE m_axi port=d_hbm_p10 bundle=d_hbm_p10 depth=512 offset=off \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=d_hbm_p11 bundle=d_hbm_p11 depth=512 offset=direct \ +#pragma HLS INTERFACE m_axi port=d_hbm_p11 bundle=d_hbm_p11 depth=512 offset=off \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 packet_512_t packet_in; @@ -152,6 +152,19 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, ap_uint<5> modules = ACT_REG_NMODULES(packet_in.data); ap_uint<32> in_one_over_energy = ACT_REG_ONE_OVER_ENERGY(packet_in.data); ap_uint<5> storage_cells = ACT_REG_NSTORAGE_CELLS(packet_in.data); + ap_uint<32> hbm_size_256b = ACT_REG_HBM_SIZE_256b(packet_in.data); + ap_uint<32> offset_hbm_0 = 0 * hbm_size_256b; + ap_uint<32> offset_hbm_1 = 1 * hbm_size_256b; + ap_uint<32> offset_hbm_2 = 2 * hbm_size_256b; + ap_uint<32> offset_hbm_3 = 3 * hbm_size_256b; + ap_uint<32> offset_hbm_4 = 4 * hbm_size_256b; + ap_uint<32> offset_hbm_5 = 5 * hbm_size_256b; + ap_uint<32> offset_hbm_6 = 6 * hbm_size_256b; + ap_uint<32> offset_hbm_7 = 7 * hbm_size_256b; + ap_uint<32> offset_hbm_8 = 8 * hbm_size_256b; + ap_uint<32> offset_hbm_9 = 9 * hbm_size_256b; + ap_uint<32> offset_hbm_10 = 10 * hbm_size_256b; + ap_uint<32> offset_hbm_11 = 11 * hbm_size_256b; one_over_energy_t one_over_energy; for (int i = 0; i < 32; i++) @@ -166,8 +179,8 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS PIPELINE II=1 data_in >> packet_in; if (i % HBM_BURST == 0) { - d_hbm_p0.write_request(i, HBM_BURST); - d_hbm_p1.write_request(i, HBM_BURST); + d_hbm_p0.write_request(offset_hbm_0 + i, HBM_BURST); + d_hbm_p1.write_request(offset_hbm_1 + i, HBM_BURST); } d_hbm_p0.write(packet_in.data(255, 0)); d_hbm_p1.write(packet_in.data(511, 256)); @@ -182,8 +195,8 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS PIPELINE II=1 data_in >> packet_in; if (i % HBM_BURST == 0) { - d_hbm_p2.write_request(i, HBM_BURST); - d_hbm_p3.write_request(i, HBM_BURST); + d_hbm_p2.write_request(offset_hbm_2 + i, HBM_BURST); + d_hbm_p3.write_request(offset_hbm_3 + i, HBM_BURST); } d_hbm_p2.write(packet_in.data(255, 0)); d_hbm_p3.write(packet_in.data(511, 256)); @@ -198,8 +211,8 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS PIPELINE II=1 data_in >> packet_in; if (i % HBM_BURST == 0) { - d_hbm_p4.write_request(i, HBM_BURST); - d_hbm_p5.write_request(i, HBM_BURST); + d_hbm_p4.write_request(offset_hbm_4 + i, HBM_BURST); + d_hbm_p5.write_request(offset_hbm_5 + i, HBM_BURST); } d_hbm_p4.write(packet_in.data(255, 0)); d_hbm_p5.write(packet_in.data(511, 256)); @@ -214,8 +227,8 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS PIPELINE II=1 data_in >> packet_in; if (i % HBM_BURST == 0) { - d_hbm_p6.write_request(i, HBM_BURST); - d_hbm_p7.write_request(i, HBM_BURST); + d_hbm_p6.write_request(offset_hbm_6 + i, HBM_BURST); + d_hbm_p7.write_request(offset_hbm_7 + i, HBM_BURST); } d_hbm_p6.write(packet_in.data(255, 0)); d_hbm_p7.write(packet_in.data(511, 256)); @@ -230,8 +243,8 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS PIPELINE II=1 data_in >> packet_in; if (i % HBM_BURST == 0) { - d_hbm_p8.write_request(i, HBM_BURST); - d_hbm_p9.write_request(i, HBM_BURST); + d_hbm_p8.write_request(offset_hbm_8 + i, HBM_BURST); + d_hbm_p9.write_request(offset_hbm_9 + i, HBM_BURST); } d_hbm_p8.write(packet_in.data(255, 0)); d_hbm_p9.write(packet_in.data(511, 256)); @@ -246,8 +259,8 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS PIPELINE II=1 data_in >> packet_in; if (i % HBM_BURST == 0) { - d_hbm_p10.write_request(i, HBM_BURST); - d_hbm_p11.write_request(i, HBM_BURST); + d_hbm_p10.write_request(offset_hbm_10 + i, HBM_BURST); + d_hbm_p11.write_request(offset_hbm_11 + i, HBM_BURST); } d_hbm_p10.write(packet_in.data(255, 0)); d_hbm_p11.write(packet_in.data(511, 256)); @@ -274,18 +287,18 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, ap_uint<26> pedestal_offset = (pedestal_location, addr_eth_packet(addr), counter); - d_hbm_p0.read_request(gain_offset, 16); - d_hbm_p1.read_request(gain_offset, 16); - d_hbm_p2.read_request(gain_offset, 16); - d_hbm_p3.read_request(gain_offset, 16); - d_hbm_p4.read_request(gain_offset, 16); - d_hbm_p5.read_request(gain_offset, 16); - d_hbm_p6.read_request(pedestal_offset, 16); - d_hbm_p7.read_request(pedestal_offset, 16); - d_hbm_p8.read_request(pedestal_offset, 16); - d_hbm_p9.read_request(pedestal_offset, 16); - d_hbm_p10.read_request(pedestal_offset, 16); - d_hbm_p11.read_request(pedestal_offset, 16); + d_hbm_p0.read_request(offset_hbm_0 + gain_offset, 16); + d_hbm_p1.read_request(offset_hbm_1 + gain_offset, 16); + d_hbm_p2.read_request(offset_hbm_2 + gain_offset, 16); + d_hbm_p3.read_request(offset_hbm_3 + gain_offset, 16); + d_hbm_p4.read_request(offset_hbm_4 + gain_offset, 16); + d_hbm_p5.read_request(offset_hbm_5 + gain_offset, 16); + d_hbm_p6.read_request(offset_hbm_6 + pedestal_offset, 16); + d_hbm_p7.read_request(offset_hbm_7 + pedestal_offset, 16); + d_hbm_p8.read_request(offset_hbm_8 + pedestal_offset, 16); + d_hbm_p9.read_request(offset_hbm_9 + pedestal_offset, 16); + d_hbm_p10.read_request(offset_hbm_10 + pedestal_offset, 16); + d_hbm_p11.read_request(offset_hbm_11 + pedestal_offset, 16); } ap_uint<256> packed_gainG0_1 = d_hbm_p0.read(); ap_uint<256> packed_gainG0_2 = d_hbm_p1.read(); diff --git a/fpga/hls/save_to_hbm.cpp b/fpga/hls/save_to_hbm.cpp index 24815ef9..d755c1bc 100644 --- a/fpga/hls/save_to_hbm.cpp +++ b/fpga/hls/save_to_hbm.cpp @@ -62,8 +62,7 @@ void save_to_hbm(STREAM_512 &data_in, hls::burst_maxi d_hbm_p2, hls::burst_maxi d_hbm_p3, volatile uint64_t &packets_processed, volatile ap_uint<1> &idle, - ap_uint<8> &err_reg, - uint32_t hbm_size) { + ap_uint<8> &err_reg) { #pragma HLS INTERFACE ap_ctrl_none port=return #pragma HLS INTERFACE register both axis port=data_in #pragma HLS INTERFACE register both axis port=addr_in @@ -71,15 +70,14 @@ void save_to_hbm(STREAM_512 &data_in, #pragma HLS INTERFACE register ap_vld port=packets_processed #pragma HLS INTERFACE register ap_vld port=err_reg #pragma HLS INTERFACE register ap_none port=idle -#pragma HLS INTERFACE register ap_stable port=hbm_size -#pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=direct \ +#pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=off \ max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 -#pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=direct \ +#pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=off \ max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 -#pragma HLS INTERFACE m_axi port=d_hbm_p2 bundle=d_hbm_p2 depth=512 offset=direct \ +#pragma HLS INTERFACE m_axi port=d_hbm_p2 bundle=d_hbm_p2 depth=512 offset=off \ max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 -#pragma HLS INTERFACE m_axi port=d_hbm_p3 bundle=d_hbm_p3 depth=512 offset=direct \ +#pragma HLS INTERFACE m_axi port=d_hbm_p3 bundle=d_hbm_p3 depth=512 offset=off \ max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 ap_uint<128> packet_mask[MAX_MODULES_FPGA*2]; @@ -124,6 +122,12 @@ void save_to_hbm(STREAM_512 &data_in, ap_uint<5> nmodules = ACT_REG_NMODULES(packet_in.data); ap_uint<32> data_collection_mode = ACT_REG_MODE(packet_in.data); ap_uint<32> data_collection_id = data_collection_mode(31, 16); // upper 16-bit of mode + ap_uint<32> hbm_size_256b = ACT_REG_HBM_SIZE_256b(packet_in.data); + ap_uint<32> offset_hbm_0 = 12 * hbm_size_256b; + ap_uint<32> offset_hbm_1 = 13 * hbm_size_256b; + ap_uint<32> offset_hbm_2 = 14 * hbm_size_256b; + ap_uint<32> offset_hbm_3 = 15 * hbm_size_256b; + ap_uint<32> hbm_size = hbm_size_256b * 32 * 4 / (RAW_MODULE_SIZE * 2); ap_uint<1> mode_nonblocking = (data_collection_mode & MODE_NONBLOCKING_ON_WR) ? 1 : 0; @@ -171,16 +175,8 @@ void save_to_hbm(STREAM_512 &data_in, packet_mask[id] = ap_uint<128>(1) << eth_packet; packet_count[id] = 1; - - if (hbm_size == 64) - handle_val = (handle_val + 1) % 64; - else if (hbm_size == 512) - handle_val = (handle_val + 1) % 512; - else if (hbm_size == 1024) - handle_val = (handle_val + 1) % 1024; - else - handle_val = (handle_val + 1) % 32; + handle_val = (handle_val + 1) % hbm_size; } else { packet_count[id]++; packet_mask[id] |= ap_uint<128>(1) << eth_packet; @@ -190,10 +186,10 @@ void save_to_hbm(STREAM_512 &data_in, for (int i = 0; i < 64; i++) { if (i % 16 == 0) { - d_hbm_p0.write_request(out_frame_addr + i, 16); - d_hbm_p1.write_request(out_frame_addr + i, 16); - d_hbm_p2.write_request(out_frame_addr + i, 16); - d_hbm_p3.write_request(out_frame_addr + i, 16); + d_hbm_p0.write_request(offset_hbm_0 + out_frame_addr + i, 16); + d_hbm_p1.write_request(offset_hbm_1 + out_frame_addr + i, 16); + d_hbm_p2.write_request(offset_hbm_2 + out_frame_addr + i, 16); + d_hbm_p3.write_request(offset_hbm_3 + out_frame_addr + i, 16); } data_in >> packet_in; diff --git a/fpga/pcie_driver/ActionConfig.h b/fpga/pcie_driver/ActionConfig.h index 0e2fd0ce..8a31793b 100644 --- a/fpga/pcie_driver/ActionConfig.h +++ b/fpga/pcie_driver/ActionConfig.h @@ -36,7 +36,7 @@ struct ActionStatus { uint64_t pipeline_stalls_host; uint64_t pipeline_stalls_hbm; uint32_t fifo_status; - uint32_t reserved_2; + uint32_t hbm_size_bytes; uint64_t packets_processed; uint64_t packets_eth; uint64_t packets_icmp; diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index 7ccb8570..b08632ea 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -460,10 +460,6 @@ proc create_root_design { parentCell } { CONFIG.DESIGN_NUMBER {0} \ ] [get_bd_cells jungfraujoch_0/action_config_0] - for {set i 0} {$i < 16} {incr i} { - set_property -dict [list CONFIG.CONST_VAL [expr 0x20000000 * $i]] [get_bd_cells jungfraujoch_0/constant_hbm_offset_${i}] - } - # Restore current instance current_bd_instance $oldCurInst diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index bd5c6d70..1f915f8e 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -372,118 +372,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { CONFIG.Use_RSTB_Pin {true} \ ] $calibration_addr_bram - # Create instance: constant_hbm_offset_0, and set properties - set constant_hbm_offset_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_0 ] - set_property -dict [ list \ - CONFIG.CONST_VAL {0} \ - CONFIG.CONST_WIDTH {64} \ - ] $constant_hbm_offset_0 - - # Create instance: constant_hbm_offset_1, and set properties - set constant_hbm_offset_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_1 ] - set_property -dict [ list \ - CONFIG.CONST_VAL {536870912} \ - CONFIG.CONST_WIDTH {64} \ - ] $constant_hbm_offset_1 - - # Create instance: constant_hbm_offset_2, and set properties - set constant_hbm_offset_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_2 ] - set_property -dict [ list \ - CONFIG.CONST_VAL {1073741824} \ - CONFIG.CONST_WIDTH {64} \ - ] $constant_hbm_offset_2 - - # Create instance: constant_hbm_offset_3, and set properties - set constant_hbm_offset_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_3 ] - set_property -dict [ list \ - CONFIG.CONST_VAL {1610612736} \ - CONFIG.CONST_WIDTH {64} \ - ] $constant_hbm_offset_3 - - # Create instance: constant_hbm_offset_4, and set properties - set constant_hbm_offset_4 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_4 ] - set_property -dict [ list \ - CONFIG.CONST_VAL {2147483648} \ - CONFIG.CONST_WIDTH {64} \ - ] $constant_hbm_offset_4 - - # Create instance: constant_hbm_offset_5, and set properties - set constant_hbm_offset_5 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_5 ] - set_property -dict [ list \ - CONFIG.CONST_VAL {2684354560} \ - CONFIG.CONST_WIDTH {64} \ - ] $constant_hbm_offset_5 - - # Create instance: constant_hbm_offset_6, and set properties - set constant_hbm_offset_6 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_6 ] - set_property -dict [ list \ - CONFIG.CONST_VAL {3221225472} \ - CONFIG.CONST_WIDTH {64} \ - ] $constant_hbm_offset_6 - - # Create instance: constant_hbm_offset_7, and set properties - set constant_hbm_offset_7 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_7 ] - set_property -dict [ list \ - CONFIG.CONST_VAL {3758096384} \ - CONFIG.CONST_WIDTH {64} \ - ] $constant_hbm_offset_7 - - # Create instance: constant_hbm_offset_8, and set properties - set constant_hbm_offset_8 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_8 ] - set_property -dict [ list \ - CONFIG.CONST_VAL {4294967296} \ - CONFIG.CONST_WIDTH {64} \ - ] $constant_hbm_offset_8 - - # Create instance: constant_hbm_offset_9, and set properties - set constant_hbm_offset_9 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_9 ] - set_property -dict [ list \ - CONFIG.CONST_VAL {4831838208} \ - CONFIG.CONST_WIDTH {64} \ - ] $constant_hbm_offset_9 - - # Create instance: constant_hbm_offset_10, and set properties - set constant_hbm_offset_10 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_10 ] - set_property -dict [ list \ - CONFIG.CONST_VAL {5368709120} \ - CONFIG.CONST_WIDTH {64} \ - ] $constant_hbm_offset_10 - - # Create instance: constant_hbm_offset_11, and set properties - set constant_hbm_offset_11 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_11 ] - set_property -dict [ list \ - CONFIG.CONST_VAL {5905580032} \ - CONFIG.CONST_WIDTH {64} \ - ] $constant_hbm_offset_11 - - # Create instance: constant_hbm_offset_12, and set properties - set constant_hbm_offset_12 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_12 ] - set_property -dict [ list \ - CONFIG.CONST_VAL {6442450944} \ - CONFIG.CONST_WIDTH {64} \ - ] $constant_hbm_offset_12 - - # Create instance: constant_hbm_offset_13, and set properties - set constant_hbm_offset_13 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_13 ] - set_property -dict [ list \ - CONFIG.CONST_VAL {6979321856} \ - CONFIG.CONST_WIDTH {64} \ - ] $constant_hbm_offset_13 - - # Create instance: constant_hbm_offset_14, and set properties - set constant_hbm_offset_14 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_14 ] - set_property -dict [ list \ - CONFIG.CONST_VAL {7516192768} \ - CONFIG.CONST_WIDTH {64} \ - ] $constant_hbm_offset_14 - - # Create instance: constant_hbm_offset_15, and set properties - set constant_hbm_offset_15 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 constant_hbm_offset_15 ] - set_property -dict [ list \ - CONFIG.CONST_VAL {8053063680} \ - CONFIG.CONST_WIDTH {64} \ - ] $constant_hbm_offset_15 - # Create instance: data_collection_fsm_0, and set properties set data_collection_fsm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:data_collection_fsm:1.0 data_collection_fsm_0 ] @@ -579,13 +467,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { # Create instance: writer_split_0, and set properties set writer_split_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:writer_split:1.0 writer_split_0 ] - # Create instance: xlconstant_hbm_size, and set properties - set xlconstant_hbm_size [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 xlconstant_hbm_size ] - set_property -dict [ list \ - CONFIG.CONST_VAL {64} \ - CONFIG.CONST_WIDTH {32} \ - ] $xlconstant_hbm_size - # Create interface connections connect_bd_intf_net -intf_net Conn2 [get_bd_intf_pins eth_out] [get_bd_intf_pins network_stack/M00_AXIS] connect_bd_intf_net -intf_net Conn3 [get_bd_intf_pins eth_in] [get_bd_intf_pins network_stack/eth_in] @@ -680,6 +561,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net action_config_0_fpga_ipv4_addr [get_bd_pins action_config_0/fpga_ipv4_addr] [get_bd_pins network_stack/fpga_ipv4_addr] connect_bd_net -net action_config_0_fpga_mac_addr [get_bd_pins action_config_0/fpga_mac_addr] [get_bd_pins network_stack/fpga_mac_addr] connect_bd_net -net action_config_0_frames_per_trigger [get_bd_pins action_config_0/nframes] [get_bd_pins data_collection_fsm_0/nframes] + connect_bd_net -net action_config_0_hbm_size_bytes [get_bd_pins action_config_0/hbm_size_bytes] [get_bd_pins data_collection_fsm_0/hbm_size_bytes] connect_bd_net -net action_config_0_nmodules [get_bd_pins action_config_0/nmodules] [get_bd_pins data_collection_fsm_0/nmodules] connect_bd_net -net action_config_0_nstorage_cells [get_bd_pins action_config_0/nstorage_cells] [get_bd_pins data_collection_fsm_0/nstorage_cells] connect_bd_net -net action_config_0_one_over_energy [get_bd_pins action_config_0/one_over_energy] [get_bd_pins data_collection_fsm_0/one_over_energy] @@ -702,22 +584,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net axis_work_completion_fifo_0_almost_full [get_bd_pins action_config_0/work_compl_fifo_full] [get_bd_pins axis_work_completion_fifo_0/almost_full] connect_bd_net -net axis_work_request_fifo_0_almost_empty [get_bd_pins action_config_0/work_req_fifo_empty] [get_bd_pins axis_work_request_fifo_0/almost_empty] connect_bd_net -net axis_work_request_fifo_0_almost_full [get_bd_pins action_config_0/work_req_fifo_full] [get_bd_pins axis_work_request_fifo_0/almost_full] - connect_bd_net -net constant_hbm_offset_0_dout [get_bd_pins constant_hbm_offset_0/dout] [get_bd_pins jf_conversion_0/d_hbm_p0_offset] - connect_bd_net -net constant_hbm_offset_10_dout [get_bd_pins constant_hbm_offset_10/dout] [get_bd_pins jf_conversion_0/d_hbm_p10_offset] - connect_bd_net -net constant_hbm_offset_11_dout [get_bd_pins constant_hbm_offset_11/dout] [get_bd_pins jf_conversion_0/d_hbm_p11_offset] - connect_bd_net -net constant_hbm_offset_12_dout [get_bd_pins constant_hbm_offset_12/dout] [get_bd_pins save_to_hbm_0/d_hbm_p0_offset] - connect_bd_net -net constant_hbm_offset_13_dout [get_bd_pins constant_hbm_offset_13/dout] [get_bd_pins save_to_hbm_0/d_hbm_p1_offset] - connect_bd_net -net constant_hbm_offset_14_dout [get_bd_pins constant_hbm_offset_14/dout] [get_bd_pins save_to_hbm_0/d_hbm_p2_offset] - connect_bd_net -net constant_hbm_offset_15_dout [get_bd_pins constant_hbm_offset_15/dout] [get_bd_pins save_to_hbm_0/d_hbm_p3_offset] - connect_bd_net -net constant_hbm_offset_1_dout [get_bd_pins constant_hbm_offset_1/dout] [get_bd_pins jf_conversion_0/d_hbm_p1_offset] - connect_bd_net -net constant_hbm_offset_2_dout [get_bd_pins constant_hbm_offset_2/dout] [get_bd_pins jf_conversion_0/d_hbm_p2_offset] - connect_bd_net -net constant_hbm_offset_3_dout [get_bd_pins constant_hbm_offset_3/dout] [get_bd_pins jf_conversion_0/d_hbm_p3_offset] - connect_bd_net -net constant_hbm_offset_4_dout [get_bd_pins constant_hbm_offset_4/dout] [get_bd_pins jf_conversion_0/d_hbm_p4_offset] - connect_bd_net -net constant_hbm_offset_5_dout [get_bd_pins constant_hbm_offset_5/dout] [get_bd_pins jf_conversion_0/d_hbm_p5_offset] - connect_bd_net -net constant_hbm_offset_6_dout [get_bd_pins constant_hbm_offset_6/dout] [get_bd_pins jf_conversion_0/d_hbm_p6_offset] - connect_bd_net -net constant_hbm_offset_7_dout [get_bd_pins constant_hbm_offset_7/dout] [get_bd_pins jf_conversion_0/d_hbm_p7_offset] - connect_bd_net -net constant_hbm_offset_8_dout [get_bd_pins constant_hbm_offset_8/dout] [get_bd_pins jf_conversion_0/d_hbm_p8_offset] - connect_bd_net -net constant_hbm_offset_9_dout [get_bd_pins constant_hbm_offset_9/dout] [get_bd_pins jf_conversion_0/d_hbm_p9_offset] connect_bd_net -net data_collection_fsm_0_out_idle_V [get_bd_pins action_config_0/data_collection_idle] [get_bd_pins data_collection_fsm_0/out_idle] connect_bd_net -net host_writer_0_err_reg_V [get_bd_pins action_config_0/host_writer_err] [get_bd_pins host_writer_0/err_reg] connect_bd_net -net host_writer_0_err_reg_V_ap_vld [get_bd_pins action_config_0/host_writer_err_valid] [get_bd_pins host_writer_0/err_reg_ap_vld] @@ -745,7 +611,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net timer_hbm_0_counter_ap_vld [get_bd_pins action_config_0/stalls_hbm_valid] [get_bd_pins timer_hbm_0/counter_ap_vld] connect_bd_net -net timer_host_0_counter [get_bd_pins action_config_0/stalls_host] [get_bd_pins timer_host_0/counter] connect_bd_net -net timer_host_0_counter_ap_vld [get_bd_pins action_config_0/stalls_host_valid] [get_bd_pins timer_host_0/counter_ap_vld] - connect_bd_net -net xlconstant_0_dout [get_bd_pins save_to_hbm_0/hbm_size] [get_bd_pins xlconstant_hbm_size/dout] # Restore current instance current_bd_instance $oldCurInst diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index 6af6cb6e..71678500 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -278,7 +278,8 @@ void HLSSimulatedDevice::HLSMainThread() { cfg.one_over_energy, cfg.nframes, cfg.nmodules, - cfg.nstorage_cells); + cfg.nstorage_cells, + hbm_if_size); run_data_collection = 0; } }); @@ -298,18 +299,18 @@ void HLSSimulatedDevice::HLSMainThread() { // 2. Apply pedestal & gain corrections hls_cores.emplace_back([&] { jf_conversion(raw4, converted_1, addr2, addr3, - hbm.data() + 0 * hbm_if_size / 32, - hbm.data() + 1 * hbm_if_size / 32, - hbm.data() + 2 * hbm_if_size / 32, - hbm.data() + 3 * hbm_if_size / 32, - hbm.data() + 4 * hbm_if_size / 32, - hbm.data() + 5 * hbm_if_size / 32, - hbm.data() + 6 * hbm_if_size / 32, - hbm.data() + 7 * hbm_if_size / 32, - hbm.data() + 8 * hbm_if_size / 32, - hbm.data() + 9 * hbm_if_size / 32, - hbm.data() + 10 * hbm_if_size / 32, - hbm.data() + 11 * hbm_if_size / 32); }); + hbm.data(), + hbm.data(), + hbm.data(), + hbm.data(), + hbm.data(), + hbm.data(), + hbm.data(), + hbm.data(), + hbm.data(), + hbm.data(), + hbm.data(), + hbm.data()); }); // Timer procedure - count how many times write_data is not accepting input (to help track down latency issues) hls_cores.emplace_back([&] { timer_host(converted_1, converted_2, counter_host); }); @@ -325,14 +326,13 @@ void HLSSimulatedDevice::HLSMainThread() { // 3. Write images to HBM hls_cores.emplace_back([&] { save_to_hbm(converted_3, addr4, save_to_hbm_completion, - hbm.data() + 12 * hbm_if_size / 32, - hbm.data() + 13 * hbm_if_size / 32, - hbm.data() + 14 * hbm_if_size / 32, - hbm.data() + 15 * hbm_if_size / 32, + hbm.data(), + hbm.data(), + hbm.data(), + hbm.data(), save_to_hbm_packets_processed, save_to_hbm_idle, - save_to_hbm_err_reg, - 16); }); + save_to_hbm_err_reg); }); // 4. Prepare data to write to host memory hls_cores.emplace_back([&] { diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index de8ad964..704d6ed9 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -95,7 +95,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_custom_frame", "[FPGA][Ful auto imageBuf = (uint16_t *) test.GetFrameBuffer(image, m); for (int i = 0; i < RAW_MODULE_SIZE; i++) { if (imageBuf[i] != test_frame[i]) - std::cout << m << " " << i << " " << imageBuf[i] << std::endl; + std::cout << m << " " << i << " " << imageBuf[i] << std::endl; REQUIRE(imageBuf[i] == test_frame[i]); } } @@ -689,7 +689,8 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { act_reg.one_over_energy, act_reg.nframes, act_reg.nmodules, - act_reg.nstorage_cells); + act_reg.nstorage_cells, + 0); REQUIRE(idle_data_collection == 1); REQUIRE(addr1.empty()); REQUIRE(raw1.empty()); @@ -706,7 +707,8 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { act_reg.one_over_energy, act_reg.nframes, act_reg.nmodules, - act_reg.nstorage_cells); + act_reg.nstorage_cells, + 0); REQUIRE(idle_data_collection == 0); REQUIRE(addr1.empty()); REQUIRE(raw1.empty()); @@ -721,7 +723,8 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { act_reg.one_over_energy, act_reg.nframes, act_reg.nmodules, - act_reg.nstorage_cells); + act_reg.nstorage_cells, + 0); REQUIRE(idle_data_collection == 0); REQUIRE(addr1.empty()); REQUIRE(raw1.empty()); @@ -739,7 +742,8 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { act_reg.one_over_energy, act_reg.nframes, act_reg.nmodules, - act_reg.nstorage_cells); + act_reg.nstorage_cells, + 0); REQUIRE(idle_data_collection == 0); REQUIRE(addr1.empty()); REQUIRE(raw1.empty()); @@ -754,7 +758,8 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { act_reg.one_over_energy, act_reg.nframes, act_reg.nmodules, - act_reg.nstorage_cells); + act_reg.nstorage_cells, + 0); REQUIRE(idle_data_collection == 0); REQUIRE(addr1.size() == 1); @@ -771,7 +776,8 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { act_reg.one_over_energy, act_reg.nframes, act_reg.nmodules, - act_reg.nstorage_cells); + act_reg.nstorage_cells, + 0); REQUIRE(idle_data_collection == 0); REQUIRE(addr1.size() == 1); @@ -790,7 +796,8 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { act_reg.one_over_energy, act_reg.nframes, act_reg.nmodules, - act_reg.nstorage_cells); + act_reg.nstorage_cells, + 0); REQUIRE(idle_data_collection == 0); REQUIRE(addr1.size() == 1); @@ -807,7 +814,8 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { act_reg.one_over_energy, act_reg.nframes, act_reg.nmodules, - act_reg.nstorage_cells); + act_reg.nstorage_cells, + 0); REQUIRE(idle_data_collection == 0); REQUIRE(addr1.size() == 2); @@ -824,7 +832,8 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { act_reg.one_over_energy, act_reg.nframes, act_reg.nmodules, - act_reg.nstorage_cells); + act_reg.nstorage_cells, + 0); REQUIRE(idle_data_collection == 1); REQUIRE(addr1.size() == 2); From 175aefc4b8f42735e446ce0910d15e1c8307e12f Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sun, 10 Sep 2023 09:54:32 +0200 Subject: [PATCH 187/224] FPGA: Save to HBM uses only 2 channels --- fpga/hls/hls_jfjoch.h | 1 - fpga/hls/save_to_hbm.cpp | 22 +++------------------- fpga/hls/transfer_hbm.cpp | 14 +------------- fpga/scripts/jfjoch.tcl | 2 -- receiver/HLSSimulatedDevice.cpp | 2 -- tests/FPGAIntegrationTest.cpp | 32 ++------------------------------ 6 files changed, 6 insertions(+), 67 deletions(-) diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index 47a36c56..30cce2df 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -131,7 +131,6 @@ void save_to_hbm(STREAM_512 &data_in, hls::stream > &addr_in, hls::stream > &completion_out, hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, - hls::burst_maxi d_hbm_p2, hls::burst_maxi d_hbm_p3, volatile uint64_t &packets_processed, volatile ap_uint<1> &idle, ap_uint<8> &err_reg); diff --git a/fpga/hls/save_to_hbm.cpp b/fpga/hls/save_to_hbm.cpp index d755c1bc..bfd4e68a 100644 --- a/fpga/hls/save_to_hbm.cpp +++ b/fpga/hls/save_to_hbm.cpp @@ -59,7 +59,6 @@ void save_to_hbm(STREAM_512 &data_in, hls::stream > &addr_in, hls::stream > &completion_out, hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, - hls::burst_maxi d_hbm_p2, hls::burst_maxi d_hbm_p3, volatile uint64_t &packets_processed, volatile ap_uint<1> &idle, ap_uint<8> &err_reg) { @@ -75,10 +74,6 @@ void save_to_hbm(STREAM_512 &data_in, max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 #pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=off \ max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 -#pragma HLS INTERFACE m_axi port=d_hbm_p2 bundle=d_hbm_p2 depth=512 offset=off \ - max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 -#pragma HLS INTERFACE m_axi port=d_hbm_p3 bundle=d_hbm_p3 depth=512 offset=off \ - max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 ap_uint<128> packet_mask[MAX_MODULES_FPGA*2]; #pragma HLS RESOURCE variable=packet_mask core=RAM_1P @@ -125,9 +120,7 @@ void save_to_hbm(STREAM_512 &data_in, ap_uint<32> hbm_size_256b = ACT_REG_HBM_SIZE_256b(packet_in.data); ap_uint<32> offset_hbm_0 = 12 * hbm_size_256b; ap_uint<32> offset_hbm_1 = 13 * hbm_size_256b; - ap_uint<32> offset_hbm_2 = 14 * hbm_size_256b; - ap_uint<32> offset_hbm_3 = 15 * hbm_size_256b; - ap_uint<32> hbm_size = hbm_size_256b * 32 * 4 / (RAW_MODULE_SIZE * 2); + ap_uint<32> hbm_size = hbm_size_256b * 32 * 2 / (RAW_MODULE_SIZE * 2); ap_uint<1> mode_nonblocking = (data_collection_mode & MODE_NONBLOCKING_ON_WR) ? 1 : 0; @@ -182,35 +175,26 @@ void save_to_hbm(STREAM_512 &data_in, packet_mask[id] |= ap_uint<128>(1) << eth_packet; } - size_t out_frame_addr = (handle[id] * 128 + eth_packet) * 64; + size_t out_frame_addr = (handle[id] * 128 + eth_packet) * 128; - for (int i = 0; i < 64; i++) { + for (int i = 0; i < 128; i++) { if (i % 16 == 0) { d_hbm_p0.write_request(offset_hbm_0 + out_frame_addr + i, 16); d_hbm_p1.write_request(offset_hbm_1 + out_frame_addr + i, 16); - d_hbm_p2.write_request(offset_hbm_2 + out_frame_addr + i, 16); - d_hbm_p3.write_request(offset_hbm_3 + out_frame_addr + i, 16); } data_in >> packet_in; d_hbm_p0.write(packet_in.data(255, 0)); d_hbm_p1.write(packet_in.data(511, 256)); - data_in >> packet_in; - d_hbm_p2.write(packet_in.data(255, 0)); - d_hbm_p3.write(packet_in.data(511, 256)); - if (i % 16 == 15) { d_hbm_p0.write_response(); d_hbm_p1.write_response(); - d_hbm_p2.write_response(); - d_hbm_p3.write_response(); } } if (packet_in.last != 1) internal_err_reg[1] = 1; - total_counter++; packets_processed = total_counter; addr_in >> addr; diff --git a/fpga/hls/transfer_hbm.cpp b/fpga/hls/transfer_hbm.cpp index d8034865..66955206 100644 --- a/fpga/hls/transfer_hbm.cpp +++ b/fpga/hls/transfer_hbm.cpp @@ -19,7 +19,7 @@ void transfer_hbm(ap_uint<256> *d_hbm_p0, #pragma HLS interface s_axilite port=uram_offset #pragma HLS INTERFACE s_axilite port=return - if ((stride != 1) && (stride != 2) && (stride != 4)) + if ((stride != 1) && (stride != 2)) return; if (uram_offset >= stride) @@ -37,18 +37,6 @@ void transfer_hbm(ap_uint<256> *d_hbm_p0, d_hbm_p0[hbm_offset + i] = uram[2 * i + uram_offset]; } } - } else if (stride == 4) { - if (hbm_to_uram) { - for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 32 / 4; i++) { -#pragma HLS PIPELINE II=1 - uram[4 * i + uram_offset] = d_hbm_p0[hbm_offset + i]; - } - } else { - for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 32 / 4; i++) { -#pragma HLS PIPELINE II=1 - d_hbm_p0[hbm_offset + i] = uram[4 * i + uram_offset]; - } - } } else { if (hbm_to_uram) { for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 32; i++) { diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index 1f915f8e..28c24353 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -535,8 +535,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net s_axi_1 [get_bd_intf_pins s_axi] [get_bd_intf_pins smartconnect_0/S00_AXI] connect_bd_intf_net -intf_net save_to_hbm_0_m_axi_d_hbm_p0 [get_bd_intf_pins m_axi_d_hbm_p12] [get_bd_intf_pins save_to_hbm_0/m_axi_d_hbm_p0] connect_bd_intf_net -intf_net save_to_hbm_0_m_axi_d_hbm_p1 [get_bd_intf_pins m_axi_d_hbm_p13] [get_bd_intf_pins save_to_hbm_0/m_axi_d_hbm_p1] - connect_bd_intf_net -intf_net save_to_hbm_0_m_axi_d_hbm_p2 [get_bd_intf_pins m_axi_d_hbm_p14] [get_bd_intf_pins save_to_hbm_0/m_axi_d_hbm_p2] - connect_bd_intf_net -intf_net save_to_hbm_0_m_axi_d_hbm_p3 [get_bd_intf_pins m_axi_d_hbm_p15] [get_bd_intf_pins save_to_hbm_0/m_axi_d_hbm_p3] connect_bd_intf_net -intf_net smartconnect_0_M00_AXI [get_bd_intf_pins action_config_0/s_axi] [get_bd_intf_pins smartconnect_0/M00_AXI] connect_bd_intf_net -intf_net smartconnect_0_M01_AXI [get_bd_intf_pins mailbox_0/S0_AXI] [get_bd_intf_pins smartconnect_0/M01_AXI] connect_bd_intf_net -intf_net smartconnect_0_M02_AXI [get_bd_intf_pins axi_bram_ctrl_calibration_addr/S_AXI] [get_bd_intf_pins smartconnect_0/M02_AXI] diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index 71678500..2d035f7a 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -326,8 +326,6 @@ void HLSSimulatedDevice::HLSMainThread() { // 3. Write images to HBM hls_cores.emplace_back([&] { save_to_hbm(converted_3, addr4, save_to_hbm_completion, - hbm.data(), - hbm.data(), hbm.data(), hbm.data(), save_to_hbm_packets_processed, diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index 704d6ed9..ebdd6252 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -1083,32 +1083,6 @@ TEST_CASE("HLS_C_transfer_hbm_2_interfaces", "[FPGA][Full]") { REQUIRE(test_frame_1 == test_frame_2); } -TEST_CASE("HLS_C_transfer_hbm_4_interfaces", "[FPGA][Full]") { - std::vector test_frame_1(RAW_MODULE_SIZE); - std::vector test_frame_2(RAW_MODULE_SIZE); - - std::mt19937 g1(1389); - std::uniform_int_distribution dist(0, 65535); - - for (auto &i: test_frame_1) - i = dist(g1); - - HLSSimulatedDevice test(0, 64); - - REQUIRE(test_frame_1 != test_frame_2); - - test.HBMTransfer(test_frame_1.data(), 12, 16*1024*1024, false, 4, 0); - test.HBMTransfer(test_frame_1.data(), 13, 16*1024*1024, false, 4, 1); - test.HBMTransfer(test_frame_1.data(), 14, 16*1024*1024, false, 4, 2); - test.HBMTransfer(test_frame_1.data(), 15, 16*1024*1024, false, 4, 3); - test.HBMTransfer(test_frame_2.data(), 12, 16*1024*1024, true, 4, 0); - test.HBMTransfer(test_frame_2.data(), 13, 16*1024*1024, true, 4, 1); - test.HBMTransfer(test_frame_2.data(), 14, 16*1024*1024, true, 4, 2); - test.HBMTransfer(test_frame_2.data(), 15, 16*1024*1024, true, 4, 3); - - REQUIRE(test_frame_1 == test_frame_2); -} - TEST_CASE("HLS_C_Simulation_internal_packet_generator_write_to_hbm", "[FPGA][Full]") { const uint16_t nmodules = 1; @@ -1141,10 +1115,8 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_write_to_hbm", "[FPGA][Ful REQUIRE(test_frame_1 != test_frame_2); - test.HBMTransfer(test_frame_2.data(), 12, 2*256*1024, true, 4, 0); - test.HBMTransfer(test_frame_2.data(), 13, 2*256*1024, true, 4, 1); - test.HBMTransfer(test_frame_2.data(), 14, 2*256*1024, true, 4, 2); - test.HBMTransfer(test_frame_2.data(), 15, 2*256*1024, true, 4, 3); + test.HBMTransfer(test_frame_2.data(), 12, 2*512*1024, true, 2, 0); + test.HBMTransfer(test_frame_2.data(), 13, 2*512*1024, true, 2, 1); REQUIRE(test_frame_1 == test_frame_2); } From 6e299c5a15bfb885344da564f33fee5b96fd2199 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sun, 10 Sep 2023 10:11:59 +0200 Subject: [PATCH 188/224] FPGA: Save to HBM uses fixed sizes of HBM to calculate offset in memory --- fpga/hls/save_to_hbm.cpp | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/fpga/hls/save_to_hbm.cpp b/fpga/hls/save_to_hbm.cpp index bfd4e68a..faff8108 100644 --- a/fpga/hls/save_to_hbm.cpp +++ b/fpga/hls/save_to_hbm.cpp @@ -169,7 +169,15 @@ void save_to_hbm(STREAM_512 &data_in, packet_mask[id] = ap_uint<128>(1) << eth_packet; packet_count[id] = 1; - handle_val = (handle_val + 1) % hbm_size; + if (hbm_size == 1024) + handle_val = (handle_val + 1) % 1024; + else if (hbm_size == 512) + handle_val = (handle_val + 1) % 512; + else if (hbm_size == 64) + handle_val = (handle_val + 1) % 64; + else + handle_val = (handle_val + 1) % 32; + } else { packet_count[id]++; packet_mask[id] |= ap_uint<128>(1) << eth_packet; From 48861aafcb58dbcdc17c4624457c9ae1d9ff4733 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sun, 10 Sep 2023 16:38:25 +0200 Subject: [PATCH 189/224] FPGAAcquisitionDevice: Report HBM size --- grpc/jfjoch.proto | 2 + python/jfjoch_pb2.py | 92 +++++++++++++++--------------- receiver/FPGAAcquisitionDevice.cpp | 1 + receiver/HLSSimulatedDevice.cpp | 1 + receiver/jfjoch_pcie_status.cpp | 1 + 5 files changed, 51 insertions(+), 46 deletions(-) diff --git a/grpc/jfjoch.proto b/grpc/jfjoch.proto index e5329073..465859ee 100644 --- a/grpc/jfjoch.proto +++ b/grpc/jfjoch.proto @@ -405,6 +405,8 @@ message FPGAStatus { bool host_writer_idle = 41; bool cancel_bit = 42; + + uint32 hbm_size_bytes = 43; } message DataProcessingSettings { diff --git a/python/jfjoch_pb2.py b/python/jfjoch_pb2.py index 283e3149..d5223dfc 100644 --- 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_builder.BuildMessageAndEnumDescriptors(DESCRIPTOR, globals()) _builder.BuildTopDescriptorsAndMessages(DESCRIPTOR, 'jfjoch_pb2', globals()) if _descriptor._USE_C_DESCRIPTORS == False: DESCRIPTOR._options = None - _COMPRESSION._serialized_start=9008 - _COMPRESSION._serialized_end=9092 - _DETECTORTYPE._serialized_start=9094 - _DETECTORTYPE._serialized_end=9133 - _DETECTORMODE._serialized_start=9135 - _DETECTORMODE._serialized_end=9225 - _FPGAFIFOSTATUSENUM._serialized_start=9227 - _FPGAFIFOSTATUSENUM._serialized_end=9281 - _STATE._serialized_start=9283 - _STATE._serialized_end=9377 - _PLOTTYPE._serialized_start=9379 - _PLOTTYPE._serialized_end=9483 + _COMPRESSION._serialized_start=9032 + _COMPRESSION._serialized_end=9116 + _DETECTORTYPE._serialized_start=9118 + _DETECTORTYPE._serialized_end=9157 + _DETECTORMODE._serialized_start=9159 + _DETECTORMODE._serialized_end=9249 + _FPGAFIFOSTATUSENUM._serialized_start=9251 + _FPGAFIFOSTATUSENUM._serialized_end=9305 + _STATE._serialized_start=9307 + _STATE._serialized_end=9401 + _PLOTTYPE._serialized_start=9403 + _PLOTTYPE._serialized_end=9507 _EMPTY._serialized_start=32 _EMPTY._serialized_end=39 _UNITCELL._serialized_start=41 @@ -103,37 +103,37 @@ if _descriptor._USE_C_DESCRIPTORS == False: _FPGAFIFOSTATUS._serialized_start=5731 _FPGAFIFOSTATUS._serialized_end=5812 _FPGASTATUS._serialized_start=5815 - _FPGASTATUS._serialized_end=6686 - _DATAPROCESSINGSETTINGS._serialized_start=6689 - _DATAPROCESSINGSETTINGS._serialized_end=7035 - _PREVIEWFRAMESPOT._serialized_start=7037 - _PREVIEWFRAMESPOT._serialized_end=7094 - _PREVIEWFRAME._serialized_start=7097 - _PREVIEWFRAME._serialized_end=7415 - _MODULESTATISTICS._serialized_start=7418 - _MODULESTATISTICS._serialized_end=7655 - _IMAGE._serialized_start=7657 - _IMAGE._serialized_end=7730 - _MASKTOLOAD._serialized_start=7732 - _MASKTOLOAD._serialized_end=7778 - _MEASUREMENTSTATISTICS._serialized_start=7781 - _MEASUREMENTSTATISTICS._serialized_end=8394 - _BROKERSTATUS._serialized_start=8397 - _BROKERSTATUS._serialized_end=8612 - _BROKERFULLSTATUS._serialized_start=8615 - _BROKERFULLSTATUS._serialized_end=8779 - _DETECTORLISTELEMENT._serialized_start=8781 - _DETECTORLISTELEMENT._serialized_end=8853 - _DETECTORLIST._serialized_start=8855 - _DETECTORLIST._serialized_end=8973 - _DETECTORSELECTION._serialized_start=8975 - _DETECTORSELECTION._serialized_end=9006 - _GRPC_JFJOCHRECEIVER._serialized_start=9486 - _GRPC_JFJOCHRECEIVER._serialized_end=10253 - _GRPC_JFJOCHWRITER._serialized_start=10256 - _GRPC_JFJOCHWRITER._serialized_end=10458 - _GRPC_JFJOCHDETECTOR._serialized_start=10461 - _GRPC_JFJOCHDETECTOR._serialized_end=10847 - _GRPC_JFJOCHBROKER._serialized_start=10850 - _GRPC_JFJOCHBROKER._serialized_end=12539 + _FPGASTATUS._serialized_end=6710 + _DATAPROCESSINGSETTINGS._serialized_start=6713 + _DATAPROCESSINGSETTINGS._serialized_end=7059 + _PREVIEWFRAMESPOT._serialized_start=7061 + _PREVIEWFRAMESPOT._serialized_end=7118 + _PREVIEWFRAME._serialized_start=7121 + _PREVIEWFRAME._serialized_end=7439 + _MODULESTATISTICS._serialized_start=7442 + _MODULESTATISTICS._serialized_end=7679 + _IMAGE._serialized_start=7681 + _IMAGE._serialized_end=7754 + _MASKTOLOAD._serialized_start=7756 + _MASKTOLOAD._serialized_end=7802 + _MEASUREMENTSTATISTICS._serialized_start=7805 + _MEASUREMENTSTATISTICS._serialized_end=8418 + _BROKERSTATUS._serialized_start=8421 + _BROKERSTATUS._serialized_end=8636 + _BROKERFULLSTATUS._serialized_start=8639 + _BROKERFULLSTATUS._serialized_end=8803 + _DETECTORLISTELEMENT._serialized_start=8805 + _DETECTORLISTELEMENT._serialized_end=8877 + _DETECTORLIST._serialized_start=8879 + _DETECTORLIST._serialized_end=8997 + _DETECTORSELECTION._serialized_start=8999 + _DETECTORSELECTION._serialized_end=9030 + _GRPC_JFJOCHRECEIVER._serialized_start=9510 + _GRPC_JFJOCHRECEIVER._serialized_end=10277 + _GRPC_JFJOCHWRITER._serialized_start=10280 + _GRPC_JFJOCHWRITER._serialized_end=10482 + _GRPC_JFJOCHDETECTOR._serialized_start=10485 + _GRPC_JFJOCHDETECTOR._serialized_end=10871 + _GRPC_JFJOCHBROKER._serialized_start=10874 + _GRPC_JFJOCHBROKER._serialized_end=12563 # @@protoc_insertion_point(module_scope) diff --git a/receiver/FPGAAcquisitionDevice.cpp b/receiver/FPGAAcquisitionDevice.cpp index 281d966f..05d23efe 100644 --- a/receiver/FPGAAcquisitionDevice.cpp +++ b/receiver/FPGAAcquisitionDevice.cpp @@ -191,6 +191,7 @@ JFJochProtoBuf::FPGAStatus FPGAAcquisitionDevice::GetStatus() const { ret.set_max_modules(status.max_modules); ret.set_git_sha1(status.git_sha1); + ret.set_hbm_size_bytes(status.hbm_size_bytes); FIFO_check(ret, "Conversion input (data)", status.fifo_status, 0, 1); FIFO_check(ret, "Conversion input (cmd)", status.fifo_status, 2, 3); diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index 2d035f7a..b6671a61 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -404,6 +404,7 @@ void HLSSimulatedDevice::HW_GetStatus(ActionStatus *status) const { status->ctrl_reg = ap_uint<1>(host_writer_idle) ? (1 << 4) : 0; status->modules_internal_packet_generator = 1; status->max_modules = max_modules; + status->hbm_size_bytes = hbm_if_size; } void HLSSimulatedDevice::HBMTransfer(void *uram, uint64_t hbm_interface, uint64_t hbm_offset, bool hbm_to_uram, diff --git a/receiver/jfjoch_pcie_status.cpp b/receiver/jfjoch_pcie_status.cpp index 8bd1650f..0f92ef37 100644 --- a/receiver/jfjoch_pcie_status.cpp +++ b/receiver/jfjoch_pcie_status.cpp @@ -33,6 +33,7 @@ int main(int argc, char **argv) { std::cout << "FPGA temperature " << status.fpga_temp_degc() << std::endl; std::cout << "HBM temperature #0 " << status.hbm_temp_0_degc() << std::endl; std::cout << "HBM temperature #1 " << status.hbm_temp_1_degc() << std::endl; + std::cout << "HBM size (MiB) " << status.hbm_size_bytes() / static_cast(1024 * 1024) << std::endl; std::cout << "Data collection idle " << status.fpga_idle() << std::endl; std::cout << "Host writer idle " << status.host_writer_idle() << std::endl; std::cout << "Data collection cancel " << status.cancel_bit() << std::endl; From 36444f4c8f7938b4c3d7ace6eb941a3daa1c8631 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sun, 10 Sep 2023 20:19:15 +0200 Subject: [PATCH 190/224] FPGA: Use different memory controllers for save to HBM --- fpga/hls/save_to_hbm.cpp | 2 +- fpga/scripts/jfjoch.tcl | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/fpga/hls/save_to_hbm.cpp b/fpga/hls/save_to_hbm.cpp index faff8108..d11261c3 100644 --- a/fpga/hls/save_to_hbm.cpp +++ b/fpga/hls/save_to_hbm.cpp @@ -119,7 +119,7 @@ void save_to_hbm(STREAM_512 &data_in, ap_uint<32> data_collection_id = data_collection_mode(31, 16); // upper 16-bit of mode ap_uint<32> hbm_size_256b = ACT_REG_HBM_SIZE_256b(packet_in.data); ap_uint<32> offset_hbm_0 = 12 * hbm_size_256b; - ap_uint<32> offset_hbm_1 = 13 * hbm_size_256b; + ap_uint<32> offset_hbm_1 = 14 * hbm_size_256b; ap_uint<32> hbm_size = hbm_size_256b * 32 * 2 / (RAW_MODULE_SIZE * 2); ap_uint<1> mode_nonblocking = (data_collection_mode & MODE_NONBLOCKING_ON_WR) ? 1 : 0; diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index 28c24353..16cec59d 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -534,7 +534,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net network_stack_udp_out [get_bd_intf_pins axis_udp_fifo_0/S_AXIS] [get_bd_intf_pins network_stack/udp_out] connect_bd_intf_net -intf_net s_axi_1 [get_bd_intf_pins s_axi] [get_bd_intf_pins smartconnect_0/S00_AXI] connect_bd_intf_net -intf_net save_to_hbm_0_m_axi_d_hbm_p0 [get_bd_intf_pins m_axi_d_hbm_p12] [get_bd_intf_pins save_to_hbm_0/m_axi_d_hbm_p0] - connect_bd_intf_net -intf_net save_to_hbm_0_m_axi_d_hbm_p1 [get_bd_intf_pins m_axi_d_hbm_p13] [get_bd_intf_pins save_to_hbm_0/m_axi_d_hbm_p1] + connect_bd_intf_net -intf_net save_to_hbm_0_m_axi_d_hbm_p1 [get_bd_intf_pins m_axi_d_hbm_p14] [get_bd_intf_pins save_to_hbm_0/m_axi_d_hbm_p1] connect_bd_intf_net -intf_net smartconnect_0_M00_AXI [get_bd_intf_pins action_config_0/s_axi] [get_bd_intf_pins smartconnect_0/M00_AXI] connect_bd_intf_net -intf_net smartconnect_0_M01_AXI [get_bd_intf_pins mailbox_0/S0_AXI] [get_bd_intf_pins smartconnect_0/M01_AXI] connect_bd_intf_net -intf_net smartconnect_0_M02_AXI [get_bd_intf_pins axi_bram_ctrl_calibration_addr/S_AXI] [get_bd_intf_pins smartconnect_0/M02_AXI] From ae7ccfdcecb41e00278118003eac23f705fa5a4b Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Sun, 10 Sep 2023 21:37:20 +0200 Subject: [PATCH 191/224] FPGA: Fix to save_to_hbm test --- fpga/hls/save_to_hbm.cpp | 2 -- tests/FPGAIntegrationTest.cpp | 2 +- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/fpga/hls/save_to_hbm.cpp b/fpga/hls/save_to_hbm.cpp index d11261c3..f4295553 100644 --- a/fpga/hls/save_to_hbm.cpp +++ b/fpga/hls/save_to_hbm.cpp @@ -217,8 +217,6 @@ void save_to_hbm(STREAM_512 &data_in, debug[m], timestamp[m], jf_bunchid[m], exptime[m], data_collection_id, 1); } - data_in >> packet_in; - idle = 1; } diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index ebdd6252..b8517d76 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -1116,7 +1116,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_write_to_hbm", "[FPGA][Ful REQUIRE(test_frame_1 != test_frame_2); test.HBMTransfer(test_frame_2.data(), 12, 2*512*1024, true, 2, 0); - test.HBMTransfer(test_frame_2.data(), 13, 2*512*1024, true, 2, 1); + test.HBMTransfer(test_frame_2.data(), 14, 2*512*1024, true, 2, 1); REQUIRE(test_frame_1 == test_frame_2); } From 6cd8d768ea2dd7653ae1b27c0a8d45d38ddc1aed Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 11 Sep 2023 10:50:15 +0200 Subject: [PATCH 192/224] FPGA: save_to_hbm uses dedicated data structure for completion --- fpga/hls/hls_jfjoch.h | 16 ++++++++++- fpga/hls/host_writer.cpp | 2 +- fpga/hls/save_to_hbm.cpp | 51 +++++++++++---------------------- receiver/HLSSimulatedDevice.cpp | 2 +- 4 files changed, 33 insertions(+), 38 deletions(-) diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index 30cce2df..2e83dfd8 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -70,6 +70,20 @@ struct axis_datamover_ctrl { ap_uint<40+64> data; }; +struct axis_completion { + ap_uint<128> packet_mask; + ap_uint<64> frame_number; + ap_uint<64> exptime; + ap_uint<64> timestamp; + ap_uint<64> bunchid; + ap_uint<32> debug; + ap_uint<32> data_collection_id; + ap_uint<32> handle; + ap_uint<16> packet_count; + ap_uint<5> module; + ap_uint<1> flushing; +}; + void setup_datamover (hls::stream &datamover_cmd_stream, uint64_t address, size_t bytes_to_write); void data_collection_fsm(AXI_STREAM ð_in, @@ -129,7 +143,7 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, void save_to_hbm(STREAM_512 &data_in, hls::stream > &addr_in, - hls::stream > &completion_out, + hls::stream &completion_out, hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, volatile uint64_t &packets_processed, volatile ap_uint<1> &idle, diff --git a/fpga/hls/host_writer.cpp b/fpga/hls/host_writer.cpp index 8a923327..7ef49687 100644 --- a/fpga/hls/host_writer.cpp +++ b/fpga/hls/host_writer.cpp @@ -13,7 +13,7 @@ inline void write_completion(hls::stream > &m_axis_completion, const ap_uint<32> &handle, const ap_uint<8> &module_number, const ap_uint<64> &frame_num, - const ap_uint<256> &packet_mask, + const ap_uint<128> &packet_mask, const ap_uint<16> &packet_count, const ap_uint<32> &debug, const ap_uint<64> ×tamp, diff --git a/fpga/hls/save_to_hbm.cpp b/fpga/hls/save_to_hbm.cpp index f4295553..f2c5460c 100644 --- a/fpga/hls/save_to_hbm.cpp +++ b/fpga/hls/save_to_hbm.cpp @@ -9,11 +9,11 @@ #define PACKET_SIZE 8192 -inline void write_completion(hls::stream > &m_axis_completion, +inline void write_completion(hls::stream &m_axis_completion, const ap_uint<32> &handle, - const ap_uint<8> &module_number, + const ap_uint<5> &module_number, const ap_uint<64> &frame_num, - const ap_uint<256> &packet_mask, + const ap_uint<128> &packet_mask, const ap_uint<16> &packet_count, const ap_uint<32> &debug, const ap_uint<64> ×tamp, @@ -22,42 +22,23 @@ inline void write_completion(hls::stream > &m_axis_completion, const ap_uint<32> &data_collection_id, const ap_uint<1> &flushing) { #pragma HLS INLINE - - ap_uint<1> all_packets_ok = packet_mask.and_reduce(); - ap_uint<1> any_packets_received = packet_mask.or_reduce(); - ap_uint<8> status = 0; - status[0] = all_packets_ok; - status[1] = any_packets_received; - status[2] = flushing; - ap_uint<128> tmp = (handle, packet_count, status, module_number, frame_num); - status[7] = tmp.xor_reduce(); // ensure completion has even parity - - if (handle != HANDLE_SKIP_FRAME) { - m_axis_completion << handle; - m_axis_completion << (packet_count, status, module_number); - m_axis_completion << frame_num(63, 32); - m_axis_completion << frame_num(31, 0); - - m_axis_completion << timestamp(63,32); - m_axis_completion << timestamp(31,0); - m_axis_completion << bunchid(63,32); - m_axis_completion << bunchid(31,0); - - m_axis_completion << exptime; - m_axis_completion << debug; - m_axis_completion << 0; - m_axis_completion << data_collection_id; - - m_axis_completion << packet_mask(127,96); - m_axis_completion << packet_mask( 95,64); - m_axis_completion << packet_mask( 63,32); - m_axis_completion << packet_mask( 31, 0); - } + axis_completion cmpl; + cmpl.handle = handle; + cmpl.module = module_number; + cmpl.frame_number = frame_num; + cmpl.packet_mask = packet_mask; + cmpl.packet_count = packet_count; + cmpl.debug = debug; + cmpl.timestamp = timestamp; + cmpl.bunchid = bunchid; + cmpl.exptime = exptime; + cmpl.data_collection_id = data_collection_id; + cmpl.flushing = flushing; } void save_to_hbm(STREAM_512 &data_in, hls::stream > &addr_in, - hls::stream > &completion_out, + hls::stream &completion_out, hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, volatile uint64_t &packets_processed, volatile ap_uint<1> &idle, diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index b6671a61..53e2db80 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -319,7 +319,7 @@ void HLSSimulatedDevice::HLSMainThread() { hls_cores.emplace_back([&] { writer_split(converted_2, converted_3, converted_4, addr3, addr4, addr5); }); - hls::stream > save_to_hbm_completion; + hls::stream save_to_hbm_completion; ap_uint<8> save_to_hbm_err_reg; uint64_t save_to_hbm_packets_processed; ap_uint<1> save_to_hbm_idle; From 9ff8e039d7800ac2b326df8462855794a61b0865 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 11 Sep 2023 10:50:30 +0200 Subject: [PATCH 193/224] FPGA: use HBM channels 12 and 13 for save_to_hbm --- fpga/scripts/jfjoch.tcl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index 16cec59d..28c24353 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -534,7 +534,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net network_stack_udp_out [get_bd_intf_pins axis_udp_fifo_0/S_AXIS] [get_bd_intf_pins network_stack/udp_out] connect_bd_intf_net -intf_net s_axi_1 [get_bd_intf_pins s_axi] [get_bd_intf_pins smartconnect_0/S00_AXI] connect_bd_intf_net -intf_net save_to_hbm_0_m_axi_d_hbm_p0 [get_bd_intf_pins m_axi_d_hbm_p12] [get_bd_intf_pins save_to_hbm_0/m_axi_d_hbm_p0] - connect_bd_intf_net -intf_net save_to_hbm_0_m_axi_d_hbm_p1 [get_bd_intf_pins m_axi_d_hbm_p14] [get_bd_intf_pins save_to_hbm_0/m_axi_d_hbm_p1] + connect_bd_intf_net -intf_net save_to_hbm_0_m_axi_d_hbm_p1 [get_bd_intf_pins m_axi_d_hbm_p13] [get_bd_intf_pins save_to_hbm_0/m_axi_d_hbm_p1] connect_bd_intf_net -intf_net smartconnect_0_M00_AXI [get_bd_intf_pins action_config_0/s_axi] [get_bd_intf_pins smartconnect_0/M00_AXI] connect_bd_intf_net -intf_net smartconnect_0_M01_AXI [get_bd_intf_pins mailbox_0/S0_AXI] [get_bd_intf_pins smartconnect_0/M01_AXI] connect_bd_intf_net -intf_net smartconnect_0_M02_AXI [get_bd_intf_pins axi_bram_ctrl_calibration_addr/S_AXI] [get_bd_intf_pins smartconnect_0/M02_AXI] From 309dabd32b4fa9132075e8ec445bc25d7b52450e Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 11 Sep 2023 11:19:05 +0200 Subject: [PATCH 194/224] FPGA: Use dedicated struct for address exchange --- fpga/hls/data_collection_fsm.cpp | 15 +++--- fpga/hls/hls_jfjoch.h | 65 +++++++++----------------- fpga/hls/host_writer.cpp | 20 ++++---- fpga/hls/internal_packet_generator.cpp | 23 ++++++--- fpga/hls/jf_conversion.cpp | 18 +++---- fpga/hls/save_to_hbm.cpp | 20 ++++---- fpga/hls/sls_detector.cpp | 23 +++++---- fpga/hls/writer_split.cpp | 10 ++-- receiver/HLSSimulatedDevice.cpp | 14 +++--- tests/FPGAIntegrationTest.cpp | 6 +-- tests/FPGANetworkTest.cpp | 32 ++++++------- 11 files changed, 118 insertions(+), 128 deletions(-) diff --git a/fpga/hls/data_collection_fsm.cpp b/fpga/hls/data_collection_fsm.cpp index 87d59bf3..f3034444 100644 --- a/fpga/hls/data_collection_fsm.cpp +++ b/fpga/hls/data_collection_fsm.cpp @@ -5,8 +5,8 @@ void data_collection_fsm(AXI_STREAM ð_in, STREAM_512 &data_out, - hls::stream > &addr_in, - hls::stream > &addr_out, + hls::stream &addr_in, + hls::stream &addr_out, volatile ap_uint<1> &in_run, volatile ap_uint<1> &in_cancel, volatile ap_uint<1> &out_idle, @@ -37,7 +37,7 @@ void data_collection_fsm(AXI_STREAM ð_in, packet_512_t packet_in; packet_512_t packet_out; - ap_uint addr; + axis_addr addr; enum rcv_state_t {RCV_WAIT_FOR_START = 0, RCV_WAIT_FOR_START_LOW = 1, RCV_START = 2, RCV_INIT = 3, RCV_GOOD = 4, RCV_FLUSH = 5, RCV_LAST = 6, RCV_FLUSH_IDLE = 7, RCV_IGNORE = 8}; @@ -85,9 +85,7 @@ void data_collection_fsm(AXI_STREAM ð_in, packet_out.id = 1; data_out << packet_out; - addr = 0; - addr(63, 0) = mode; - addr(79,64) = nmodules; + addr.last = 0; addr_out << addr; if (mode & MODE_INTERNAL_PACKET_GEN) @@ -102,7 +100,7 @@ void data_collection_fsm(AXI_STREAM ð_in, else if (!addr_in.empty()) { addr_in >> addr; - if (addr_frame_number(addr) >= nframes + DELAY_FRAMES_STOP_AND_QUIT) + if (addr.frame_number >= nframes + DELAY_FRAMES_STOP_AND_QUIT) rcv_state = RCV_FLUSH; else { addr_out << addr; @@ -133,8 +131,7 @@ void data_collection_fsm(AXI_STREAM ð_in, break; case RCV_LAST: out_idle = 0; - addr = 0; - addr_last_flag(addr) = 1; + addr.last = 1; addr_out << addr; // Finish data collection diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index 2e83dfd8..cbcc47a6 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -22,8 +22,6 @@ // Number of modules that can be simultaneously handled by the FPGA #define MAX_MODULES_FPGA 16 -#define ADDR_STREAM_WIDTH 320 - typedef ap_ufixed<16,2, AP_RND_CONV> gainG0_t; typedef ap_ufixed<16,4, AP_RND_CONV> gainG1_t; typedef ap_ufixed<16,6, AP_RND_CONV> gainG2_t; @@ -50,15 +48,6 @@ typedef ap_axiu<512,1, 1, 1> packet_512_t; typedef hls::stream AXI_STREAM; typedef hls::stream STREAM_512; -#define addr_frame_number(x) x(63, 0) -#define addr_eth_packet(x) x(70, 64) -#define addr_module(x) x(76, 72) -#define addr_last_flag(x) x[79] -#define addr_jf_debug(x) x(127, 96) -#define addr_timestamp(x) x(191,128) -#define addr_bunch_id(x) x(255,192) -#define addr_exptime(x) x(256+63, 256) - #define ACT_REG_MODE(x) ((x)(32 , 0)) // 32 bit #define ACT_REG_ONE_OVER_ENERGY(x) ((x)(63 , 32)) // 32 bit #define ACT_REG_NFRAMES(x) ((x)(95 , 64)) // 32 bit @@ -70,6 +59,17 @@ struct axis_datamover_ctrl { ap_uint<40+64> data; }; +struct axis_addr { + ap_uint<64> frame_number; + ap_uint<64> exptime; + ap_uint<64> timestamp; + ap_uint<64> bunchid; + ap_uint<32> debug; + ap_uint<5> module; + ap_uint<7> eth_packet; + ap_uint<1> last; +}; + struct axis_completion { ap_uint<128> packet_mask; ap_uint<64> frame_number; @@ -88,8 +88,8 @@ void setup_datamover (hls::stream &datamover_cmd_stream, ui void data_collection_fsm(AXI_STREAM ð_in, STREAM_512 &data_out, - hls::stream > &addr_in, - hls::stream > &addr_out, + hls::stream &addr_in, + hls::stream &addr_out, volatile ap_uint<1> &in_run, volatile ap_uint<1> &in_cancel, volatile ap_uint<1> &out_idle, @@ -106,8 +106,8 @@ void load_calibration(STREAM_512 &data_in, STREAM_512 &data_out, uint64_t in_mem_location[LOAD_CALIBRATION_BRAM_SIZE]); void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, - hls::stream > &addr_in, - hls::stream > &addr_out, + hls::stream &addr_in, + hls::stream &addr_out, hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, hls::burst_maxi d_hbm_p2, hls::burst_maxi d_hbm_p3, hls::burst_maxi d_hbm_p4, hls::burst_maxi d_hbm_p5, @@ -116,7 +116,7 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, hls::burst_maxi d_hbm_p10, hls::burst_maxi d_hbm_p11); void host_writer(STREAM_512 &data_in, - hls::stream > &addr_in, + hls::stream &addr_in, hls::stream > &host_memory_out, hls::stream &datamover_out_cmd, hls::stream > &s_axis_work_request, @@ -131,18 +131,18 @@ void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, uint64_t &counter); void writer_split(STREAM_512 &data_in, STREAM_512 &data_out_1, STREAM_512 &data_out_2, - hls::stream > &addr_in, - hls::stream > &addr_out_1, - hls::stream > &addr_out_2); + hls::stream &addr_in, + hls::stream &addr_out_1, + hls::stream &addr_out_2); void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, - hls::stream > &addr_in, - hls::stream > &addr_out, + hls::stream &addr_in, + hls::stream &addr_out, ap_uint<512> module_cache[RAW_MODULE_SIZE * sizeof(uint16_t) / 512 * 8], volatile ap_uint<1> &in_cancel); void save_to_hbm(STREAM_512 &data_in, - hls::stream > &addr_in, + hls::stream &addr_in, hls::stream &completion_out, hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, volatile uint64_t &packets_processed, @@ -177,25 +177,6 @@ inline void setup_datamover (hls::stream &datamover_cmd_str datamover_cmd_stream << msg; } -inline ap_uint addr_packet(ap_uint<8> eth_packet, - ap_uint<5> module_number, - ap_uint<64> frame, - ap_uint<32> jf_debug, - ap_uint<64> timestamp, - ap_uint<64> bunchid, - ap_uint<32> expttime) { -#pragma HLS INLINE - ap_uint retval = 0; - addr_eth_packet(retval) = eth_packet; - addr_module(retval) = module_number; - addr_frame_number(retval) = frame; - addr_jf_debug(retval) = jf_debug; - addr_timestamp(retval) = timestamp; - addr_bunch_id(retval) = bunchid; - addr_exptime(retval) = expttime; - return retval; -} - inline ap_uint<16> get_header_field_16(ap_uint<512> data, size_t position) { ap_uint<16> tmp = data(position+15, position); ap_uint<16> retval; @@ -264,7 +245,7 @@ void udp(AXI_STREAM ð_in, void sls_detector(AXI_STREAM &udp_payload_in, hls::stream > &udp_metadata_in, AXI_STREAM &data_out, - hls::stream > &addr_out, + hls::stream &addr_out, uint64_t& counter, uint32_t& counter_eth_error, uint32_t& counter_len_error, diff --git a/fpga/hls/host_writer.cpp b/fpga/hls/host_writer.cpp index 7ef49687..dd96d634 100644 --- a/fpga/hls/host_writer.cpp +++ b/fpga/hls/host_writer.cpp @@ -78,7 +78,7 @@ inline ap_uint<1> read_request(hls::stream > &s_axis_work_request, } void host_writer(STREAM_512 &data_in, - hls::stream > &addr_in, + hls::stream &addr_in, hls::stream > &host_memory_out, hls::stream &datamover_out_cmd, hls::stream > &s_axis_work_request, @@ -140,7 +140,7 @@ void host_writer(STREAM_512 &data_in, read_request(s_axis_work_request, req_handle, req_host_offset); } - ap_uint addr; + axis_addr addr; addr_in >> addr; packet_512_t packet_in; @@ -169,12 +169,12 @@ void host_writer(STREAM_512 &data_in, packet_out.user = 0; Loop_good_packet: - while (!addr_last_flag(addr)) { + while (!addr.last) { // Process one UDP packet per iteration #pragma HLS PIPELINE II=128 - ap_uint<64> frame_number = addr_frame_number(addr); - ap_uint<4> module_number = addr_module(addr); - ap_uint<7> eth_packet = addr_eth_packet(addr); + ap_uint<64> frame_number = addr.frame_number; + ap_uint<4> module_number = addr.module; + ap_uint<7> eth_packet = addr.eth_packet; ap_uint<5> id = module_number * 2 + (frame_number % 2); if (curr_frame[id] != frame_number) { @@ -215,10 +215,10 @@ void host_writer(STREAM_512 &data_in, curr_frame[id] = frame_number; curr_offset[id] = req_host_offset; - debug[id] = addr_jf_debug(addr); - timestamp[id] = addr_timestamp(addr); - jf_bunchid[id] = addr_bunch_id(addr); - exptime[id] = addr_exptime(addr); + debug[id] = addr.debug; + timestamp[id] = addr.timestamp; + jf_bunchid[id] = addr.bunchid; + exptime[id] = addr.exptime; packet_mask[id] = ap_uint<128>(1) << eth_packet; packet_count[id] = 1; diff --git a/fpga/hls/internal_packet_generator.cpp b/fpga/hls/internal_packet_generator.cpp index b3040e5f..8e6a0c11 100644 --- a/fpga/hls/internal_packet_generator.cpp +++ b/fpga/hls/internal_packet_generator.cpp @@ -4,8 +4,8 @@ #include "hls_jfjoch.h" void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, - hls::stream > &addr_in, - hls::stream > &addr_out, + hls::stream &addr_in, + hls::stream &addr_out, ap_uint<512> *frame, volatile ap_uint<1> &in_cancel) { #pragma HLS INTERFACE ap_ctrl_none port=return @@ -31,7 +31,7 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, ap_uint<1> conversion = (mode & MODE_CONV) ? 1 : 0; data_out << packet_in; - ap_uint addr; + axis_addr addr; addr_in >> addr; addr_out << addr; @@ -54,9 +54,18 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS PIPELINE II=1 uint32_t eth_packet = i / 128; uint32_t axis_packet = i % 128; - if (axis_packet == 0) - addr_out << addr_packet(eth_packet, module_number, frame_number, INT_PKT_GEN_DEBUG, - INT_PKT_GEN_TIMESTAMP, INT_PKT_GEN_BUNCHID, INT_PKT_GEN_EXPTTIME); + if (axis_packet == 0) { + axis_addr addr_x; + addr_x.eth_packet = eth_packet; + addr_x.module = module_number; + addr_x.frame_number = frame_number; + addr_x.debug = INT_PKT_GEN_DEBUG; + addr_x.timestamp = INT_PKT_GEN_TIMESTAMP; + addr_x.bunchid = INT_PKT_GEN_BUNCHID; + addr_x.exptime = INT_PKT_GEN_EXPTTIME; + addr_x.last = 0; + addr_out << addr_x; + } packet_out.user = 0; packet_out.id = 0; packet_out.last = (axis_packet == 127) ? 1 : 0; @@ -74,7 +83,7 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, addr_in >> addr; forward_packets: - while (!addr_last_flag(addr)) { + while (!addr.last) { #pragma HLS PIPELINE II=1 data_in >> packet_in; data_out << packet_in; diff --git a/fpga/hls/jf_conversion.cpp b/fpga/hls/jf_conversion.cpp index 1cff39df..259acd2e 100644 --- a/fpga/hls/jf_conversion.cpp +++ b/fpga/hls/jf_conversion.cpp @@ -100,8 +100,8 @@ ap_uint<512> convert(ap_uint<512> data_in, } void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, - hls::stream > &addr_in, - hls::stream > &addr_out, + hls::stream &addr_in, + hls::stream &addr_out, hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, hls::burst_maxi d_hbm_p2, hls::burst_maxi d_hbm_p3, hls::burst_maxi d_hbm_p4, hls::burst_maxi d_hbm_p5, @@ -142,7 +142,7 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, packet_512_t packet_in; - ap_uint addr; + axis_addr addr; addr_in >> addr; addr_out << addr; @@ -273,19 +273,19 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, ap_uint<7> counter = 0; addr_in >> addr; pixel_conversion: - while (!addr_last_flag(addr)) { + while (!addr.last) { #pragma HLS PIPELINE II=1 //ap_uint<17> offset = packet_in.user(16,0); if (counter % 16 == 0) { - ap_uint<17> gain_offset = (addr_module(addr), addr_eth_packet(addr), counter); - ap_uint<12> pedestal_location = addr_module(addr); + ap_uint<19> gain_offset = (addr.module, addr.eth_packet, counter); + ap_uint<12> pedestal_location = addr.module; if (storage_cells > 1) { - ap_uint<4> storage_cell_id = (addr_frame_number(addr) - 1) % storage_cells; + ap_uint<4> storage_cell_id = (addr.frame_number - 1) % storage_cells; pedestal_location += modules * storage_cell_id; } - ap_uint<26> pedestal_offset = (pedestal_location, addr_eth_packet(addr), counter); + ap_uint<26> pedestal_offset = (pedestal_location, addr.eth_packet, counter); d_hbm_p0.read_request(offset_hbm_0 + gain_offset, 16); d_hbm_p1.read_request(offset_hbm_1 + gain_offset, 16); @@ -334,7 +334,7 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, } else { addr_in >> addr; forward_packets: - while (!addr_last_flag(addr)) { + while (!addr.last) { #pragma HLS PIPELINE II=1 data_in >> packet_in; data_out << packet_in; diff --git a/fpga/hls/save_to_hbm.cpp b/fpga/hls/save_to_hbm.cpp index f2c5460c..31a9902a 100644 --- a/fpga/hls/save_to_hbm.cpp +++ b/fpga/hls/save_to_hbm.cpp @@ -37,7 +37,7 @@ inline void write_completion(hls::stream &m_axis_completion, } void save_to_hbm(STREAM_512 &data_in, - hls::stream > &addr_in, + hls::stream &addr_in, hls::stream &completion_out, hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, volatile uint64_t &packets_processed, @@ -89,7 +89,7 @@ void save_to_hbm(STREAM_512 &data_in, uint32_t handle_val = 0; - ap_uint addr; + axis_addr addr; addr_in >> addr; packet_512_t packet_in; @@ -114,12 +114,12 @@ void save_to_hbm(STREAM_512 &data_in, addr_in >> addr; Loop_good_packet: - while (!addr_last_flag(addr)) { + while (!addr.last) { // Process one UDP packet per iteration #pragma HLS PIPELINE II=128 - ap_uint<64> frame_number = addr_frame_number(addr); - ap_uint<4> module_number = addr_module(addr); - ap_uint<7> eth_packet = addr_eth_packet(addr); + ap_uint<64> frame_number = addr.frame_number; + ap_uint<4> module_number = addr.module; + ap_uint<7> eth_packet = addr.eth_packet; ap_uint<5> id = module_number * 2 + (frame_number % 2); if (curr_frame[id] != frame_number) { @@ -142,10 +142,10 @@ void save_to_hbm(STREAM_512 &data_in, handle[id] = handle_val; curr_frame[id] = frame_number; - debug[id] = addr_jf_debug(addr); - timestamp[id] = addr_timestamp(addr); - jf_bunchid[id] = addr_bunch_id(addr); - exptime[id] = addr_exptime(addr); + debug[id] = addr.debug; + timestamp[id] = addr.timestamp; + jf_bunchid[id] = addr.bunchid; + exptime[id] = addr.exptime; packet_mask[id] = ap_uint<128>(1) << eth_packet; packet_count[id] = 1; diff --git a/fpga/hls/sls_detector.cpp b/fpga/hls/sls_detector.cpp index 74783036..14a1e5f7 100644 --- a/fpga/hls/sls_detector.cpp +++ b/fpga/hls/sls_detector.cpp @@ -6,7 +6,7 @@ void sls_detector(AXI_STREAM &udp_payload_in, hls::stream > &udp_metadata_in, AXI_STREAM &data_out, - hls::stream > &addr_out, + hls::stream &addr_out, uint64_t& counter, uint32_t& counter_eth_error, uint32_t& counter_len_error, @@ -65,19 +65,22 @@ void sls_detector(AXI_STREAM &udp_payload_in, && (udp_metadata_len_err(udp_metadata) == 0)) { ap_uint<16> column = packet_in.data(4 * 64 + 31, 4 * 64 + 16); - - ap_uint<64> frame_number = packet_in.data(63, 0); - ap_uint<32> jf_debug = packet_in.data(5 * 64 + 31, 5 * 64); - ap_uint<64> timestamp = packet_in.data(3 * 64 + 63, 3 * 64); - ap_uint<64> bunchid = packet_in.data(2 * 64 + 63, 2 * 64); - ap_uint<5> module = (column % 32) / 2; ap_uint<1> module_part = column[0]; - ap_uint<7> eth_packet = (packet_in.data(127, 96) % 128) | (module_part * 64); - ap_uint<32> exptime = packet_in.data(95, 64); + beat_counter = 0; reminder = packet_in.data(511, 384); - addr_out << addr_packet(eth_packet, module, frame_number, jf_debug, timestamp, bunchid,exptime); + axis_addr addr; + addr.frame_number = packet_in.data(63, 0); + addr.debug = packet_in.data(5 * 64 + 31, 5 * 64); + addr.timestamp = packet_in.data(3 * 64 + 63, 3 * 64); + addr.bunchid = packet_in.data(2 * 64 + 63, 2 * 64); + addr.module = (column % 32) / 2; + addr.eth_packet = (packet_in.data(127, 96) % 128) | (module_part * 64); + addr.exptime = packet_in.data(95, 64); + addr.last = 0; + addr_out << addr; + state = FORWARD; internal_counter++; } else { diff --git a/fpga/hls/writer_split.cpp b/fpga/hls/writer_split.cpp index b6a705f3..f16e3f87 100644 --- a/fpga/hls/writer_split.cpp +++ b/fpga/hls/writer_split.cpp @@ -6,9 +6,9 @@ void writer_split(STREAM_512 &data_in, STREAM_512 &data_out_1, STREAM_512 &data_out_2, - hls::stream > &addr_in, - hls::stream > &addr_out_1, - hls::stream > &addr_out_2) { + hls::stream &addr_in, + hls::stream &addr_out_1, + hls::stream &addr_out_2) { #pragma HLS INTERFACE register both axis port=data_in #pragma HLS INTERFACE register both axis port=data_out_1 #pragma HLS INTERFACE register both axis port=data_out_2 @@ -19,7 +19,7 @@ void writer_split(STREAM_512 &data_in, #pragma HLS INTERFACE ap_ctrl_none port=return packet_512_t packet; - ap_uint addr; + axis_addr addr; addr_in >> addr; addr_out_1 << addr; @@ -34,7 +34,7 @@ void writer_split(STREAM_512 &data_in, addr_out_2 << addr; Loop_good_packet: - while (!addr_last_flag(addr)) { + while (!addr.last) { #pragma HLS PIPELINE II=128 for (int i = 0; i < 128; i++) { data_in >> packet; diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index 53e2db80..9333020b 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -216,13 +216,13 @@ void HLSSimulatedDevice::HLSMainThread() { STREAM_512 converted_4; STREAM_512 converted_5; - hls::stream > addr0; - hls::stream > addr1; - hls::stream > addr2; - hls::stream > addr3; - hls::stream > addr4; - hls::stream > addr5; - hls::stream > addr6; + hls::stream addr0; + hls::stream addr1; + hls::stream addr2; + hls::stream addr3; + hls::stream addr4; + hls::stream addr5; + hls::stream addr6; hls::stream > udp_metadata; ap_uint<1> idle_data_collection; diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index b8517d76..609186e1 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -669,8 +669,8 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { STREAM_512 raw0; STREAM_512 raw1; - hls::stream > addr0; - hls::stream > addr1; + hls::stream addr0; + hls::stream addr1; ap_uint<1> run_data_collection = 0; ap_uint<1> cancel_data_collection = 0; @@ -849,7 +849,7 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { auto addr = addr1.read(); addr = addr1.read(); - REQUIRE(addr_last_flag(addr)); + REQUIRE(addr.last); } diff --git a/tests/FPGANetworkTest.cpp b/tests/FPGANetworkTest.cpp index 65575f9e..2c701ec2 100644 --- a/tests/FPGANetworkTest.cpp +++ b/tests/FPGANetworkTest.cpp @@ -205,7 +205,7 @@ TEST_CASE("HLS_Network_UDP_SLS_detector_1") { hls::stream > udp_metadata; STREAM_512 raw_out; - hls::stream > addr0; + hls::stream addr0; uint64_t packet_counter; uint64_t sls_packet_counter; @@ -239,9 +239,9 @@ TEST_CASE("HLS_Network_UDP_SLS_detector_1") { } auto addr = addr0.read(); - REQUIRE(addr_frame_number(addr) == jf_packet->jf.framenum); - REQUIRE(addr_module(addr) == 5 / 2); - REQUIRE(addr_eth_packet(addr) == (jf_packet->jf.packetnum | 64)); + REQUIRE(addr.frame_number == jf_packet->jf.framenum); + REQUIRE(addr.module == 5 / 2); + REQUIRE(addr.eth_packet == (jf_packet->jf.packetnum | 64)); } TEST_CASE("HLS_Network_UDP_SLS_detector_2") { @@ -264,7 +264,7 @@ TEST_CASE("HLS_Network_UDP_SLS_detector_2") { hls::stream > udp_metadata; STREAM_512 raw_out; - hls::stream > addr0; + hls::stream addr0; auto jf_packet_axi = (ap_uint<512> *) packet; @@ -298,9 +298,9 @@ TEST_CASE("HLS_Network_UDP_SLS_detector_2") { } auto addr = addr0.read(); - REQUIRE(addr_frame_number(addr) == jf_packet->jf.framenum); - REQUIRE(addr_module(addr) == 2); - REQUIRE(addr_eth_packet(addr) == jf_packet->jf.packetnum); + REQUIRE(addr.frame_number == jf_packet->jf.framenum); + REQUIRE(addr.module == 2); + REQUIRE(addr.eth_packet == jf_packet->jf.packetnum); } TEST_CASE("HLS_Network_UDP_SLS_detector_2_packets") { @@ -323,7 +323,7 @@ TEST_CASE("HLS_Network_UDP_SLS_detector_2_packets") { hls::stream > udp_metadata; STREAM_512 raw_out; - hls::stream > addr0; + hls::stream addr0; auto jf_packet_axi = (ap_uint<512> *) packet; @@ -368,9 +368,9 @@ TEST_CASE("HLS_Network_UDP_SLS_detector_2_packets") { } auto addr = addr0.read(); - REQUIRE(addr_frame_number(addr) == jf_packet->jf.framenum); - REQUIRE(addr_module(addr) == 1); - REQUIRE(addr_eth_packet(addr) == jf_packet->jf.packetnum); + REQUIRE(addr.frame_number == jf_packet->jf.framenum); + REQUIRE(addr.module == 1); + REQUIRE(addr.eth_packet == jf_packet->jf.packetnum); } } @@ -394,7 +394,7 @@ TEST_CASE("HLS_Network_UDP_SLS_detector_packets_err") { hls::stream > udp_metadata; STREAM_512 raw_out; - hls::stream > addr0; + hls::stream addr0; auto jf_packet_axi = (ap_uint<512> *) packet; @@ -460,9 +460,9 @@ TEST_CASE("HLS_Network_UDP_SLS_detector_packets_err") { } auto addr = addr0.read(); - REQUIRE(addr_frame_number(addr) == jf_packet->jf.framenum); - REQUIRE(addr_module(addr) == 2); - REQUIRE(addr_eth_packet(addr) == jf_packet->jf.packetnum); + REQUIRE(addr.frame_number == jf_packet->jf.framenum); + REQUIRE(addr.module == 2); + REQUIRE(addr.eth_packet == jf_packet->jf.packetnum); REQUIRE(udp_packet_counter == 4); REQUIRE(sls_packet_counter == 1); From 253b409d382a61cd214bddfeb04d9045216491df Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 11 Sep 2023 12:20:07 +0200 Subject: [PATCH 195/224] FPGA: Mark last completion saved to HBM --- fpga/hls/hls_jfjoch.h | 1 + fpga/hls/save_to_hbm.cpp | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index cbcc47a6..c16ac8d1 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -82,6 +82,7 @@ struct axis_completion { ap_uint<16> packet_count; ap_uint<5> module; ap_uint<1> flushing; + ap_uint<1> last; }; void setup_datamover (hls::stream &datamover_cmd_stream, uint64_t address, size_t bytes_to_write); diff --git a/fpga/hls/save_to_hbm.cpp b/fpga/hls/save_to_hbm.cpp index 31a9902a..c44e4dce 100644 --- a/fpga/hls/save_to_hbm.cpp +++ b/fpga/hls/save_to_hbm.cpp @@ -34,6 +34,7 @@ inline void write_completion(hls::stream &m_axis_completion, cmpl.exptime = exptime; cmpl.data_collection_id = data_collection_id; cmpl.flushing = flushing; + cmpl.last = 0; } void save_to_hbm(STREAM_512 &data_in, @@ -198,6 +199,12 @@ void save_to_hbm(STREAM_512 &data_in, debug[m], timestamp[m], jf_bunchid[m], exptime[m], data_collection_id, 1); } + data_in >> packet_in; + + axis_completion cmpl; + cmpl.last = 1; + completion_out << cmpl; + idle = 1; } From 0c524f9a3c5abaad1c8e3a7b0b79ad07fb68f956 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 11 Sep 2023 12:20:24 +0200 Subject: [PATCH 196/224] FPGA: Add module to load images from HBM --- fpga/hls/CMakeLists.txt | 5 +++- fpga/hls/hls_jfjoch.h | 7 +++++ fpga/hls/load_from_hbm.cpp | 53 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 64 insertions(+), 1 deletion(-) create mode 100644 fpga/hls/load_from_hbm.cpp diff --git a/fpga/hls/CMakeLists.txt b/fpga/hls/CMakeLists.txt index 63843f2d..22067450 100644 --- a/fpga/hls/CMakeLists.txt +++ b/fpga/hls/CMakeLists.txt @@ -15,7 +15,8 @@ ADD_LIBRARY( HLSSimulation STATIC sls_detector.cpp save_to_hbm.cpp writer_split.cpp - transfer_hbm.cpp) + transfer_hbm.cpp + load_from_hbm.cpp) TARGET_INCLUDE_DIRECTORIES(HLSSimulation PUBLIC ../include) TARGET_LINK_LIBRARIES(HLSSimulation CommonFunctions) @@ -51,6 +52,7 @@ MAKE_HLS_MODULE(sls_detector.cpp sls_detector) MAKE_HLS_MODULE(save_to_hbm.cpp save_to_hbm) MAKE_HLS_MODULE(writer_split.cpp writer_split) MAKE_HLS_MODULE(transfer_hbm.cpp transfer_hbm) +MAKE_HLS_MODULE(load_from_hbm.cpp load_from_hbm) SET (HLS_IPS psi_ch_hls_data_collection_fsm_1_0.zip psi_ch_hls_timer_host_1_0.zip @@ -66,6 +68,7 @@ SET (HLS_IPS psi_ch_hls_data_collection_fsm_1_0.zip psi_ch_hls_icmp_1_0.zip psi_ch_hls_host_writer_1_0.zip psi_ch_hls_save_to_hbm_1_0.zip + psi_ch_hls_load_from_hbm_1_0.zip psi_ch_hls_writer_split_1_0.zip psi_ch_hls_transfer_hbm_1_0.zip) diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index c16ac8d1..6fe5eade 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -150,6 +150,13 @@ void save_to_hbm(STREAM_512 &data_in, volatile ap_uint<1> &idle, ap_uint<8> &err_reg); +void load_from_hbm(STREAM_512 &data_out, + hls::stream &completion_in, + hls::stream &completion_out, + hls::burst_maxi d_hbm_p0, + hls::burst_maxi d_hbm_p1, + ap_uint<32> hbm_size); + template ap_uint pack32(ap_int in[32]) { #pragma HLS INLINE ap_uint out; diff --git a/fpga/hls/load_from_hbm.cpp b/fpga/hls/load_from_hbm.cpp new file mode 100644 index 00000000..67a109f8 --- /dev/null +++ b/fpga/hls/load_from_hbm.cpp @@ -0,0 +1,53 @@ +// Copyright (2019-2023) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#include "hls_jfjoch.h" + +void load_from_hbm(STREAM_512 &data_out, + hls::stream &completion_in, + hls::stream &completion_out, + hls::burst_maxi d_hbm_p0, + hls::burst_maxi d_hbm_p1, + ap_uint<32> hbm_size) { +#pragma HLS INTERFACE ap_ctrl_none port=return +#pragma HLS INTERFACE register both axis port=data_out +#pragma HLS INTERFACE register both axis port=completion_in +#pragma HLS INTERFACE register both axis port=completion_out +#pragma HLS INTERFACE register ap_none port=hbm_size + +#pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=off \ + max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=8 +#pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=off \ + max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=8 + + axis_completion cmpl; + + completion_in >> cmpl; + + ap_uint<32> offset_hbm_0 = 12 * (hbm_size / 32); + ap_uint<32> offset_hbm_1 = 14 * (hbm_size / 32); + + while (!cmpl.last) { + completion_out << cmpl; + for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 64; i++) { +#pragma HLS PIPELINE II=1 + if (i % 16 == 0) { + d_hbm_p0.read_request(offset_hbm_0 + cmpl.handle * RAW_MODULE_SIZE * sizeof(uint16_t) / 32 / 2 + i, 16); + d_hbm_p1.read_request(offset_hbm_1 + cmpl.handle * RAW_MODULE_SIZE * sizeof(uint16_t) / 32 / 2 + i, 16); + } + packet_512_t packet_out; + packet_out.data(255, 0) = d_hbm_p0.read(); + packet_out.data(511,256) = d_hbm_p1.read(); + if (cmpl.packet_mask[i/128] == 0) { + for (int i = 0; i < 32; i++) + packet_out.data(16*i+15,16*i) = PIXEL_OUT_LOST; + } + packet_out.keep = UINT64_MAX; + packet_out.strb = UINT64_MAX; + packet_out.last = (i == (RAW_MODULE_SIZE / 32 * 2 - 1)); + data_out << packet_out; + } + completion_in >> cmpl; + } + completion_out << cmpl; +} From 05000bab1fe3df548d606807e6fa0ce427c9b57f Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 11 Sep 2023 20:16:35 +0200 Subject: [PATCH 197/224] FPGA: remove transfer to HBM for the time being --- fpga/hls/CMakeLists.txt | 16 +-- fpga/hls/save_to_hbm.cpp | 210 -------------------------------- fpga/hls/transfer_hbm.cpp | 53 -------- fpga/hls/writer_split.cpp | 53 -------- fpga/scripts/bd_pcie.tcl | 7 -- fpga/scripts/jfjoch.tcl | 125 ++----------------- receiver/HLSSimulatedDevice.cpp | 63 +--------- receiver/HLSSimulatedDevice.h | 2 - tests/FPGAIntegrationTest.cpp | 79 ------------ 9 files changed, 12 insertions(+), 596 deletions(-) delete mode 100644 fpga/hls/save_to_hbm.cpp delete mode 100644 fpga/hls/transfer_hbm.cpp delete mode 100644 fpga/hls/writer_split.cpp diff --git a/fpga/hls/CMakeLists.txt b/fpga/hls/CMakeLists.txt index 22067450..098f9084 100644 --- a/fpga/hls/CMakeLists.txt +++ b/fpga/hls/CMakeLists.txt @@ -12,11 +12,7 @@ ADD_LIBRARY( HLSSimulation STATIC icmp.cpp arp.cpp ip_header_checksum.h udp.cpp - sls_detector.cpp - save_to_hbm.cpp - writer_split.cpp - transfer_hbm.cpp - load_from_hbm.cpp) + sls_detector.cpp) TARGET_INCLUDE_DIRECTORIES(HLSSimulation PUBLIC ../include) TARGET_LINK_LIBRARIES(HLSSimulation CommonFunctions) @@ -49,10 +45,6 @@ MAKE_HLS_MODULE(ethernet.cpp ethernet) MAKE_HLS_MODULE(arp.cpp arp) MAKE_HLS_MODULE(udp.cpp udp) MAKE_HLS_MODULE(sls_detector.cpp sls_detector) -MAKE_HLS_MODULE(save_to_hbm.cpp save_to_hbm) -MAKE_HLS_MODULE(writer_split.cpp writer_split) -MAKE_HLS_MODULE(transfer_hbm.cpp transfer_hbm) -MAKE_HLS_MODULE(load_from_hbm.cpp load_from_hbm) SET (HLS_IPS psi_ch_hls_data_collection_fsm_1_0.zip psi_ch_hls_timer_host_1_0.zip @@ -66,11 +58,7 @@ SET (HLS_IPS psi_ch_hls_data_collection_fsm_1_0.zip psi_ch_hls_udp_1_0.zip psi_ch_hls_sls_detector_1_0.zip psi_ch_hls_icmp_1_0.zip - psi_ch_hls_host_writer_1_0.zip - psi_ch_hls_save_to_hbm_1_0.zip - psi_ch_hls_load_from_hbm_1_0.zip - psi_ch_hls_writer_split_1_0.zip - psi_ch_hls_transfer_hbm_1_0.zip) + psi_ch_hls_host_writer_1_0.zip) SET (HLS_IPS ${HLS_IPS} PARENT_SCOPE) ADD_CUSTOM_TARGET(hls DEPENDS ${HLS_IPS}) diff --git a/fpga/hls/save_to_hbm.cpp b/fpga/hls/save_to_hbm.cpp deleted file mode 100644 index c44e4dce..00000000 --- a/fpga/hls/save_to_hbm.cpp +++ /dev/null @@ -1,210 +0,0 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later - -#include "hls_jfjoch.h" - -#ifndef __SYNTHESIS__ -#include -#endif - -#define PACKET_SIZE 8192 - -inline void write_completion(hls::stream &m_axis_completion, - const ap_uint<32> &handle, - const ap_uint<5> &module_number, - const ap_uint<64> &frame_num, - const ap_uint<128> &packet_mask, - const ap_uint<16> &packet_count, - const ap_uint<32> &debug, - const ap_uint<64> ×tamp, - const ap_uint<64> &bunchid, - const ap_uint<32> &exptime, - const ap_uint<32> &data_collection_id, - const ap_uint<1> &flushing) { -#pragma HLS INLINE - axis_completion cmpl; - cmpl.handle = handle; - cmpl.module = module_number; - cmpl.frame_number = frame_num; - cmpl.packet_mask = packet_mask; - cmpl.packet_count = packet_count; - cmpl.debug = debug; - cmpl.timestamp = timestamp; - cmpl.bunchid = bunchid; - cmpl.exptime = exptime; - cmpl.data_collection_id = data_collection_id; - cmpl.flushing = flushing; - cmpl.last = 0; -} - -void save_to_hbm(STREAM_512 &data_in, - hls::stream &addr_in, - hls::stream &completion_out, - hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, - volatile uint64_t &packets_processed, - volatile ap_uint<1> &idle, - ap_uint<8> &err_reg) { -#pragma HLS INTERFACE ap_ctrl_none port=return -#pragma HLS INTERFACE register both axis port=data_in -#pragma HLS INTERFACE register both axis port=addr_in -#pragma HLS INTERFACE register both axis port=completion_out -#pragma HLS INTERFACE register ap_vld port=packets_processed -#pragma HLS INTERFACE register ap_vld port=err_reg -#pragma HLS INTERFACE register ap_none port=idle - -#pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=off \ - max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 -#pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=off \ - max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 - - ap_uint<128> packet_mask[MAX_MODULES_FPGA*2]; -#pragma HLS RESOURCE variable=packet_mask core=RAM_1P - ap_uint<16> packet_count[MAX_MODULES_FPGA*2]; -#pragma HLS RESOURCE variable=packet_count core=RAM_1P - ap_uint<32> handle[MAX_MODULES_FPGA*2]; -#pragma HLS RESOURCE variable=handle core=RAM_1P - ap_uint<64> curr_frame[MAX_MODULES_FPGA*2]; -#pragma HLS RESOURCE variable=curr_frame core=RAM_1P - ap_uint<32> debug[MAX_MODULES_FPGA*2]; -#pragma HLS RESOURCE variable=debug core=RAM_1P - ap_uint<64> timestamp[MAX_MODULES_FPGA*2]; -#pragma HLS RESOURCE variable=timestamp core=RAM_1P - ap_uint<32> exptime[MAX_MODULES_FPGA*2]; -#pragma HLS RESOURCE variable=exptime core=RAM_1P - ap_uint<64> jf_bunchid[MAX_MODULES_FPGA*2]; -#pragma HLS RESOURCE variable=jf_bunchid core=RAM_1P - - idle = 1; - - for (int i = 0; i < MAX_MODULES_FPGA*2; i++) { -#pragma HLS UNROLL - curr_frame[i] = UINT64_MAX; - handle[i] = 0; - packet_mask[i] = 0; - packet_count[i] = 0; - debug[i] = 0; - timestamp[i] = 0; - exptime[i] = 0; - jf_bunchid[i] = 0; - } - - uint32_t handle_val = 0; - - axis_addr addr; - addr_in >> addr; - - packet_512_t packet_in; - data_in >> packet_in; - - ap_uint<5> nmodules = ACT_REG_NMODULES(packet_in.data); - ap_uint<32> data_collection_mode = ACT_REG_MODE(packet_in.data); - ap_uint<32> data_collection_id = data_collection_mode(31, 16); // upper 16-bit of mode - ap_uint<32> hbm_size_256b = ACT_REG_HBM_SIZE_256b(packet_in.data); - ap_uint<32> offset_hbm_0 = 12 * hbm_size_256b; - ap_uint<32> offset_hbm_1 = 14 * hbm_size_256b; - ap_uint<32> hbm_size = hbm_size_256b * 32 * 2 / (RAW_MODULE_SIZE * 2); - - ap_uint<1> mode_nonblocking = (data_collection_mode & MODE_NONBLOCKING_ON_WR) ? 1 : 0; - - ap_uint<8> internal_err_reg = 0; - err_reg = internal_err_reg; - - idle = 0; - uint64_t total_counter = 0; - packets_processed = 0; - addr_in >> addr; - - Loop_good_packet: - while (!addr.last) { - // Process one UDP packet per iteration -#pragma HLS PIPELINE II=128 - ap_uint<64> frame_number = addr.frame_number; - ap_uint<4> module_number = addr.module; - ap_uint<7> eth_packet = addr.eth_packet; - ap_uint<5> id = module_number * 2 + (frame_number % 2); - - if (curr_frame[id] != frame_number) { - if (packet_mask[id] != 0) { - ap_uint<32> comp_handle = handle[id]; - ap_uint<64> comp_frame = curr_frame[id]; - ap_uint<256> comp_packet_mask = packet_mask[id]; - ap_uint<16> comp_packet_count = packet_count[id]; - ap_uint<32> comp_debug = debug[id]; - ap_uint<64> comp_timestamp = timestamp[id]; - ap_uint<64> comp_bunchid = jf_bunchid[id]; - ap_uint<32> comp_exptime = exptime[id]; - - write_completion(completion_out, comp_handle, module_number, - comp_frame, comp_packet_mask, comp_packet_count, - comp_debug, comp_timestamp, comp_bunchid, - comp_exptime, data_collection_id, 0); - } - - handle[id] = handle_val; - curr_frame[id] = frame_number; - - debug[id] = addr.debug; - timestamp[id] = addr.timestamp; - jf_bunchid[id] = addr.bunchid; - exptime[id] = addr.exptime; - - packet_mask[id] = ap_uint<128>(1) << eth_packet; - packet_count[id] = 1; - - if (hbm_size == 1024) - handle_val = (handle_val + 1) % 1024; - else if (hbm_size == 512) - handle_val = (handle_val + 1) % 512; - else if (hbm_size == 64) - handle_val = (handle_val + 1) % 64; - else - handle_val = (handle_val + 1) % 32; - - } else { - packet_count[id]++; - packet_mask[id] |= ap_uint<128>(1) << eth_packet; - } - - size_t out_frame_addr = (handle[id] * 128 + eth_packet) * 128; - - for (int i = 0; i < 128; i++) { - if (i % 16 == 0) { - d_hbm_p0.write_request(offset_hbm_0 + out_frame_addr + i, 16); - d_hbm_p1.write_request(offset_hbm_1 + out_frame_addr + i, 16); - } - - data_in >> packet_in; - d_hbm_p0.write(packet_in.data(255, 0)); - d_hbm_p1.write(packet_in.data(511, 256)); - - if (i % 16 == 15) { - d_hbm_p0.write_response(); - d_hbm_p1.write_response(); - } - } - if (packet_in.last != 1) - internal_err_reg[1] = 1; - - total_counter++; - packets_processed = total_counter; - addr_in >> addr; - err_reg = internal_err_reg; - } - - for (ap_uint<8> m = 0; m < nmodules * 2; m++) { -#pragma HLS PIPELINE II=16 - if (packet_mask[m] != 0) - write_completion(completion_out, handle[m], m / 2, curr_frame[m], - packet_mask[m], packet_count[m], - debug[m], timestamp[m], jf_bunchid[m], - exptime[m], data_collection_id, 1); - } - - data_in >> packet_in; - - axis_completion cmpl; - cmpl.last = 1; - completion_out << cmpl; - - idle = 1; -} diff --git a/fpga/hls/transfer_hbm.cpp b/fpga/hls/transfer_hbm.cpp deleted file mode 100644 index 66955206..00000000 --- a/fpga/hls/transfer_hbm.cpp +++ /dev/null @@ -1,53 +0,0 @@ -// Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later - -#include "hls_jfjoch.h" - -void transfer_hbm(ap_uint<256> *d_hbm_p0, - ap_uint<256> *uram, - uint32_t hbm_offset, - bool hbm_to_uram, - uint8_t stride, - uint8_t uram_offset) { -#pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 -#pragma HLS INTERFACE m_axi port=uram bundle=uram depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=16 latency=8 num_write_outstanding=2 num_read_outstanding=2 -#pragma HLS interface s_axilite port=hbm_offset -#pragma HLS interface s_axilite port=hbm_to_uram -#pragma HLS interface s_axilite port=stride -#pragma HLS interface s_axilite port=uram_offset -#pragma HLS INTERFACE s_axilite port=return - - if ((stride != 1) && (stride != 2)) - return; - - if (uram_offset >= stride) - return; - - if (stride == 2) { - if (hbm_to_uram) { - for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 32 / 2; i++) { -#pragma HLS PIPELINE II=1 - uram[2 * i + uram_offset] = d_hbm_p0[hbm_offset + i]; - } - } else { - for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 32 / 2; i++) { -#pragma HLS PIPELINE II=1 - d_hbm_p0[hbm_offset + i] = uram[2 * i + uram_offset]; - } - } - } else { - if (hbm_to_uram) { - for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 32; i++) { -#pragma HLS PIPELINE II=1 - uram[i + uram_offset] = d_hbm_p0[hbm_offset + i]; - } - } else { - for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 32; i++) { -#pragma HLS PIPELINE II=1 - d_hbm_p0[hbm_offset + i] = uram[i + uram_offset]; - } - } - } -} diff --git a/fpga/hls/writer_split.cpp b/fpga/hls/writer_split.cpp deleted file mode 100644 index f16e3f87..00000000 --- a/fpga/hls/writer_split.cpp +++ /dev/null @@ -1,53 +0,0 @@ -// Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later - -#include "hls_jfjoch.h" - -void writer_split(STREAM_512 &data_in, - STREAM_512 &data_out_1, - STREAM_512 &data_out_2, - hls::stream &addr_in, - hls::stream &addr_out_1, - hls::stream &addr_out_2) { -#pragma HLS INTERFACE register both axis port=data_in -#pragma HLS INTERFACE register both axis port=data_out_1 -#pragma HLS INTERFACE register both axis port=data_out_2 - -#pragma HLS INTERFACE register both axis port=addr_in -#pragma HLS INTERFACE register both axis port=addr_out_1 -#pragma HLS INTERFACE register both axis port=addr_out_2 - -#pragma HLS INTERFACE ap_ctrl_none port=return - packet_512_t packet; - axis_addr addr; - - addr_in >> addr; - addr_out_1 << addr; - addr_out_2 << addr; - - data_in >> packet; - data_out_1 << packet; - data_out_2 << packet; - - addr_in >> addr; - addr_out_1 << addr; - addr_out_2 << addr; - - Loop_good_packet: - while (!addr.last) { -#pragma HLS PIPELINE II=128 - for (int i = 0; i < 128; i++) { - data_in >> packet; - data_out_1 << packet; - data_out_2 << packet; - } - addr_in >> addr; - addr_out_1 << addr; - addr_out_2 << addr; - } - - data_in >> packet; - data_out_1 << packet; - data_out_2 << packet; -} - diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index b08632ea..f679a389 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -393,10 +393,6 @@ proc create_root_design { parentCell } { connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p9 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_9] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p9] connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p10 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_10] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p10] connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p11 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_11] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p11] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p12 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_12] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p12] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p13 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_13] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p13] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p14 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_14] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p14] - connect_bd_intf_net -intf_net jungfraujoch_0_m_axi_d_hbm_p15 [get_bd_intf_pins hbm_infrastructure/s_axi_hbm_15] [get_bd_intf_pins jungfraujoch_0/m_axi_d_hbm_p15] connect_bd_intf_net -intf_net jungfraujoch_0_m_axis_c2h_data [get_bd_intf_pins jungfraujoch_0/m_axis_c2h_data] [get_bd_intf_pins pcie_dma_0/s_axis_c2h_data] connect_bd_intf_net -intf_net jungfraujoch_0_m_axis_c2h_datamover_cmd [get_bd_intf_pins jungfraujoch_0/m_axis_c2h_datamover_cmd] [get_bd_intf_pins pcie_dma_0/s_axis_c2h_cmd] connect_bd_intf_net -intf_net jungfraujoch_0_m_axis_h2c_datamover_cmd [get_bd_intf_pins jungfraujoch_0/m_axis_h2c_datamover_cmd] [get_bd_intf_pins pcie_dma_0/s_axis_h2c_cmd] @@ -446,12 +442,9 @@ proc create_root_design { parentCell } { assign_bd_address -offset 0x00060000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_calibration_addr/S_AXI/Mem0] -force assign_bd_address -offset 0x00070000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/axi_firewall_0/S_AXI_CTL/Control] -force assign_bd_address -offset 0x00090000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/xdma_0/S_AXI_LITE/CTL0] -force - assign_bd_address -offset 0x000A0000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/transfer_hbm_0/s_axi_control/Reg] -force assign_bd_address -offset 0x000C0000 -range 0x00040000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs cms_subsystem_0/s_axi_ctrl/Mem] -force assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator_0/S_AXI/Mem0] -force - assign_bd_address -offset 0x00200000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_hbm_transfer_1/S_AXI/Mem0] -force assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces jungfraujoch_0/internal_packet_generator_0/Data_m_axi_frame] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator_1/S_AXI/Mem0] -force - assign_bd_address -offset 0x00200000 -range 0x00100000 -target_address_space [get_bd_addr_spaces jungfraujoch_0/transfer_hbm_0/Data_m_axi_uram] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_hbm_transfer_0/S_AXI/Mem0] -force assign_bd_address diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index 28c24353..e81593ab 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -4,10 +4,10 @@ # Hierarchical cell: jungfraujoch proc create_hier_cell_jungfraujoch { parentCell nameHier } { - variable script_folder + variable script_folder if { $parentCell eq "" || $nameHier eq "" } { - catch {common::send_gid_msg -ssname BD::TCL -id 2092 -severity "ERROR" "create_hier_cell_jungfraujoch() - Empty argument(s)!"} + catch {common::send_gid_msg -ssname BD::TCL -id 2092 -severity "ERROR" "create_hier_cell_jungfraujoch_0() - Empty argument(s)!"} return } @@ -64,14 +64,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p11 - create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p12 - - create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p13 - - create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p14 - - create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_d_hbm_p15 - create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 m_axis_c2h_data create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 m_axis_c2h_datamover_cmd @@ -111,24 +103,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { CONFIG.SINGLE_PORT_BRAM {1} \ ] $axi_bram_ctrl_calibration_addr - # Create instance: axi_bram_ctrl_hbm_transfer_0, and set properties - set axi_bram_ctrl_hbm_transfer_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_hbm_transfer_0 ] - set_property -dict [ list \ - CONFIG.DATA_WIDTH {256} \ - CONFIG.PROTOCOL {AXI4} \ - CONFIG.READ_LATENCY {1} \ - CONFIG.SINGLE_PORT_BRAM {1} \ - ] $axi_bram_ctrl_hbm_transfer_0 - - # Create instance: axi_bram_ctrl_hbm_transfer_1, and set properties - set axi_bram_ctrl_hbm_transfer_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_hbm_transfer_1 ] - set_property -dict [ list \ - CONFIG.DATA_WIDTH {256} \ - CONFIG.PROTOCOL {AXI4} \ - CONFIG.READ_LATENCY {1} \ - CONFIG.SINGLE_PORT_BRAM {1} \ - ] $axi_bram_ctrl_hbm_transfer_1 - # Create instance: axi_bram_ctrl_internal_packet_generator_0, and set properties set axi_bram_ctrl_internal_packet_generator_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_internal_packet_generator_0 ] set_property -dict [ list \ @@ -172,24 +146,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { CONFIG.HAS_AFULL {1} \ ] $axis_addr_fifo_2 - # Create instance: axis_addr_fifo_3, and set properties - set axis_addr_fifo_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_addr_fifo_3 ] - set_property -dict [ list \ - CONFIG.FIFO_DEPTH {16} \ - CONFIG.FIFO_MEMORY_TYPE {block} \ - CONFIG.HAS_AEMPTY {0} \ - CONFIG.HAS_AFULL {0} \ - ] $axis_addr_fifo_3 - - # Create instance: axis_addr_fifo_4, and set properties - set axis_addr_fifo_4 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_addr_fifo_4 ] - set_property -dict [ list \ - CONFIG.FIFO_DEPTH {16} \ - CONFIG.FIFO_MEMORY_TYPE {block} \ - CONFIG.HAS_AEMPTY {0} \ - CONFIG.HAS_AFULL {0} \ - ] $axis_addr_fifo_4 - # Create instance: axis_data_fifo_0, and set properties set axis_data_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_0 ] set_property -dict [ list \ @@ -236,18 +192,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { CONFIG.HAS_AFULL {1} \ ] $axis_data_fifo_5 - # Create instance: axis_data_fifo_6, and set properties - set axis_data_fifo_6 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_6 ] - set_property -dict [ list \ - CONFIG.FIFO_DEPTH {4096} \ - ] $axis_data_fifo_6 - - # Create instance: axis_data_fifo_7, and set properties - set axis_data_fifo_7 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_7 ] - set_property -dict [ list \ - CONFIG.FIFO_DEPTH {4096} \ - ] $axis_data_fifo_7 - # Create instance: axis_data_fifo_c2h_cmd, and set properties set axis_data_fifo_c2h_cmd [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_c2h_cmd ] set_property -dict [ list \ @@ -375,26 +319,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { # Create instance: data_collection_fsm_0, and set properties set data_collection_fsm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:data_collection_fsm:1.0 data_collection_fsm_0 ] - # Create instance: hbm_transfer_uram, and set properties - set hbm_transfer_uram [ create_bd_cell -type ip -vlnv xilinx.com:ip:blk_mem_gen:8.4 hbm_transfer_uram ] - set_property -dict [ list \ - CONFIG.Assume_Synchronous_Clk {true} \ - CONFIG.EN_SAFETY_CKT {false} \ - CONFIG.Enable_B {Use_ENB_Pin} \ - CONFIG.Memory_Type {True_Dual_Port_RAM} \ - CONFIG.Operating_Mode_A {NO_CHANGE} \ - CONFIG.Operating_Mode_B {NO_CHANGE} \ - CONFIG.PRIM_type_to_Implement {URAM} \ - CONFIG.Port_A_Write_Rate {50} \ - CONFIG.Port_B_Clock {100} \ - CONFIG.Port_B_Enable_Rate {100} \ - CONFIG.Port_B_Write_Rate {50} \ - CONFIG.Read_Width_B {256} \ - CONFIG.Use_Byte_Write_Enable {true} \ - CONFIG.Use_RSTB_Pin {true} \ - CONFIG.Write_Width_B {256} \ - ] $hbm_transfer_uram - # Create instance: host_writer_0, and set properties set host_writer_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:host_writer:1.0 host_writer_0 ] @@ -438,12 +362,6 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { # Create instance: network_stack create_hier_cell_network_stack $hier_obj network_stack - # Create instance: one, and set properties - set one [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 one ] - - # Create instance: save_to_hbm_0, and set properties - set save_to_hbm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:save_to_hbm:1.0 save_to_hbm_0 ] - # Create instance: smartconnect_0, and set properties set smartconnect_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_0 ] set_property -dict [ list \ @@ -452,43 +370,28 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { CONFIG.NUM_SI {1} \ ] $smartconnect_0 - # Create instance: smartconnect_1, and set properties - set smartconnect_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_1 ] - # Create instance: timer_hbm_0, and set properties set timer_hbm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:timer_hbm:1.0 timer_hbm_0 ] # Create instance: timer_host_0, and set properties set timer_host_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:timer_host:1.0 timer_host_0 ] - # Create instance: transfer_hbm_0, and set properties - set transfer_hbm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:transfer_hbm:1.0 transfer_hbm_0 ] - - # Create instance: writer_split_0, and set properties - set writer_split_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:writer_split:1.0 writer_split_0 ] - # Create interface connections connect_bd_intf_net -intf_net Conn2 [get_bd_intf_pins eth_out] [get_bd_intf_pins network_stack/M00_AXIS] connect_bd_intf_net -intf_net Conn3 [get_bd_intf_pins eth_in] [get_bd_intf_pins network_stack/eth_in] connect_bd_intf_net -intf_net S_AXIS_1 [get_bd_intf_pins s_axis_h2c_data] [get_bd_intf_pins axis_data_fifo_h2c_data/S_AXIS] connect_bd_intf_net -intf_net axi_bram_ctrl_0_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_calibration_addr/BRAM_PORTA] [get_bd_intf_pins calibration_addr_bram/BRAM_PORTB] - connect_bd_intf_net -intf_net axi_bram_ctrl_hbm_transfer_0_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_hbm_transfer_0/BRAM_PORTA] [get_bd_intf_pins hbm_transfer_uram/BRAM_PORTB] - connect_bd_intf_net -intf_net axi_bram_ctrl_hbm_transfer_1_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_hbm_transfer_1/BRAM_PORTA] [get_bd_intf_pins hbm_transfer_uram/BRAM_PORTA] connect_bd_intf_net -intf_net axi_bram_ctrl_internal_packet_generator_1_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_1/BRAM_PORTA] [get_bd_intf_pins internal_packet_generator_uram/BRAM_PORTB] connect_bd_intf_net -intf_net axi_bram_ctrl_internal_packet_generator_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_0/BRAM_PORTA] [get_bd_intf_pins internal_packet_generator_uram/BRAM_PORTA] connect_bd_intf_net -intf_net axis_addr_fifo_0_M_AXIS [get_bd_intf_pins axis_addr_fifo_0/M_AXIS] [get_bd_intf_pins internal_packet_generator_0/addr_in] connect_bd_intf_net -intf_net axis_addr_fifo_2_M_AXIS [get_bd_intf_pins axis_addr_fifo_1/M_AXIS] [get_bd_intf_pins jf_conversion_0/addr_in] - connect_bd_intf_net -intf_net axis_addr_fifo_2_M_AXIS1 [get_bd_intf_pins axis_addr_fifo_2/M_AXIS] [get_bd_intf_pins writer_split_0/addr_in] - connect_bd_intf_net -intf_net axis_addr_fifo_3_M_AXIS1 [get_bd_intf_pins axis_addr_fifo_3/M_AXIS] [get_bd_intf_pins save_to_hbm_0/addr_in] - connect_bd_intf_net -intf_net axis_addr_fifo_4_M_AXIS [get_bd_intf_pins axis_addr_fifo_4/M_AXIS] [get_bd_intf_pins host_writer_0/addr_in] + connect_bd_intf_net -intf_net axis_addr_fifo_2_M_AXIS1 [get_bd_intf_pins axis_addr_fifo_2/M_AXIS] [get_bd_intf_pins host_writer_0/addr_in] connect_bd_intf_net -intf_net axis_data_fifo_0_M_AXIS [get_bd_intf_pins axis_data_fifo_0/M_AXIS] [get_bd_intf_pins load_calibration_0/data_in] connect_bd_intf_net -intf_net axis_data_fifo_1_M_AXIS [get_bd_intf_pins axis_data_fifo_1/M_AXIS] [get_bd_intf_pins internal_packet_generator_0/data_in] connect_bd_intf_net -intf_net axis_data_fifo_2_M_AXIS [get_bd_intf_pins axis_data_fifo_2/M_AXIS] [get_bd_intf_pins timer_hbm_0/data_in] connect_bd_intf_net -intf_net axis_data_fifo_4_M_AXIS [get_bd_intf_pins axis_data_fifo_3/M_AXIS] [get_bd_intf_pins jf_conversion_0/data_in] connect_bd_intf_net -intf_net axis_data_fifo_4_M_AXIS1 [get_bd_intf_pins axis_data_fifo_4/M_AXIS] [get_bd_intf_pins timer_host_0/data_in] - connect_bd_intf_net -intf_net axis_data_fifo_5_M_AXIS [get_bd_intf_pins axis_data_fifo_5/M_AXIS] [get_bd_intf_pins writer_split_0/data_in] - connect_bd_intf_net -intf_net axis_data_fifo_6_M_AXIS [get_bd_intf_pins axis_data_fifo_6/M_AXIS] [get_bd_intf_pins save_to_hbm_0/data_in] - connect_bd_intf_net -intf_net axis_data_fifo_7_M_AXIS [get_bd_intf_pins axis_data_fifo_7/M_AXIS] [get_bd_intf_pins host_writer_0/data_in] + connect_bd_intf_net -intf_net axis_data_fifo_5_M_AXIS [get_bd_intf_pins axis_data_fifo_5/M_AXIS] [get_bd_intf_pins host_writer_0/data_in] connect_bd_intf_net -intf_net axis_data_fifo_c2h_cmd_M_AXIS [get_bd_intf_pins m_axis_c2h_datamover_cmd] [get_bd_intf_pins axis_data_fifo_c2h_cmd/M_AXIS] connect_bd_intf_net -intf_net axis_data_fifo_c2h_data_M_AXIS [get_bd_intf_pins m_axis_c2h_data] [get_bd_intf_pins axis_data_fifo_c2h_data/M_AXIS] connect_bd_intf_net -intf_net axis_data_fifo_h2c_cmd_M_AXIS [get_bd_intf_pins m_axis_h2c_datamover_cmd] [get_bd_intf_pins axis_data_fifo_h2c_cmd/M_AXIS] @@ -514,7 +417,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net internal_packet_generator_0_m_axi_frame [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_1/S_AXI] [get_bd_intf_pins internal_packet_generator_0/m_axi_frame] connect_bd_intf_net -intf_net jf_conversion_0_addr_out [get_bd_intf_pins axis_register_slice_addr_1/S_AXIS] [get_bd_intf_pins jf_conversion_0/addr_out] connect_bd_intf_net -intf_net jf_conversion_0_data_out [get_bd_intf_pins axis_data_fifo_4/S_AXIS] [get_bd_intf_pins jf_conversion_0/data_out] - connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p0 [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/S00_AXI] + connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p0 [get_bd_intf_pins m_axi_d_hbm_p0] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p0] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p1 [get_bd_intf_pins m_axi_d_hbm_p1] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p1] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p2 [get_bd_intf_pins m_axi_d_hbm_p2] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p2] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p3 [get_bd_intf_pins m_axi_d_hbm_p3] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p3] @@ -533,23 +436,12 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net network_stack_udp_addr_out [get_bd_intf_pins axis_udp_addr_fifo_0/S_AXIS] [get_bd_intf_pins network_stack/udp_addr_out] connect_bd_intf_net -intf_net network_stack_udp_out [get_bd_intf_pins axis_udp_fifo_0/S_AXIS] [get_bd_intf_pins network_stack/udp_out] connect_bd_intf_net -intf_net s_axi_1 [get_bd_intf_pins s_axi] [get_bd_intf_pins smartconnect_0/S00_AXI] - connect_bd_intf_net -intf_net save_to_hbm_0_m_axi_d_hbm_p0 [get_bd_intf_pins m_axi_d_hbm_p12] [get_bd_intf_pins save_to_hbm_0/m_axi_d_hbm_p0] - connect_bd_intf_net -intf_net save_to_hbm_0_m_axi_d_hbm_p1 [get_bd_intf_pins m_axi_d_hbm_p13] [get_bd_intf_pins save_to_hbm_0/m_axi_d_hbm_p1] connect_bd_intf_net -intf_net smartconnect_0_M00_AXI [get_bd_intf_pins action_config_0/s_axi] [get_bd_intf_pins smartconnect_0/M00_AXI] connect_bd_intf_net -intf_net smartconnect_0_M01_AXI [get_bd_intf_pins mailbox_0/S0_AXI] [get_bd_intf_pins smartconnect_0/M01_AXI] connect_bd_intf_net -intf_net smartconnect_0_M02_AXI [get_bd_intf_pins axi_bram_ctrl_calibration_addr/S_AXI] [get_bd_intf_pins smartconnect_0/M02_AXI] connect_bd_intf_net -intf_net smartconnect_0_M03_AXI [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_0/S_AXI] [get_bd_intf_pins smartconnect_0/M03_AXI] - connect_bd_intf_net -intf_net smartconnect_0_M04_AXI [get_bd_intf_pins smartconnect_0/M04_AXI] [get_bd_intf_pins transfer_hbm_0/s_axi_control] - connect_bd_intf_net -intf_net smartconnect_0_M05_AXI [get_bd_intf_pins axi_bram_ctrl_hbm_transfer_1/S_AXI] [get_bd_intf_pins smartconnect_0/M05_AXI] - connect_bd_intf_net -intf_net smartconnect_1_M00_AXI [get_bd_intf_pins m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/M00_AXI] connect_bd_intf_net -intf_net timer_hbm_0_data_out [get_bd_intf_pins axis_data_fifo_3/S_AXIS] [get_bd_intf_pins timer_hbm_0/data_out] connect_bd_intf_net -intf_net timer_host_0_data_out [get_bd_intf_pins axis_register_slice_data_1/S_AXIS] [get_bd_intf_pins timer_host_0/data_out] - connect_bd_intf_net -intf_net transfer_hbm_0_m_axi_d_hbm_p0 [get_bd_intf_pins smartconnect_1/S01_AXI] [get_bd_intf_pins transfer_hbm_0/m_axi_d_hbm_p0] - connect_bd_intf_net -intf_net transfer_hbm_0_m_axi_uram [get_bd_intf_pins axi_bram_ctrl_hbm_transfer_0/S_AXI] [get_bd_intf_pins transfer_hbm_0/m_axi_uram] - connect_bd_intf_net -intf_net writer_split_0_addr_out_1 [get_bd_intf_pins axis_addr_fifo_3/S_AXIS] [get_bd_intf_pins writer_split_0/addr_out_1] - connect_bd_intf_net -intf_net writer_split_0_addr_out_2 [get_bd_intf_pins axis_addr_fifo_4/S_AXIS] [get_bd_intf_pins writer_split_0/addr_out_2] - connect_bd_intf_net -intf_net writer_split_0_data_out_1 [get_bd_intf_pins axis_data_fifo_6/S_AXIS] [get_bd_intf_pins writer_split_0/data_out_1] - connect_bd_intf_net -intf_net writer_split_0_data_out_2 [get_bd_intf_pins axis_data_fifo_7/S_AXIS] [get_bd_intf_pins writer_split_0/data_out_2] # Create port connections connect_bd_net -net action_config_0_clear_counters [get_bd_pins action_config_0/clear_counters] [get_bd_pins network_stack/clear_counters] @@ -563,7 +455,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net action_config_0_nmodules [get_bd_pins action_config_0/nmodules] [get_bd_pins data_collection_fsm_0/nmodules] connect_bd_net -net action_config_0_nstorage_cells [get_bd_pins action_config_0/nstorage_cells] [get_bd_pins data_collection_fsm_0/nstorage_cells] connect_bd_net -net action_config_0_one_over_energy [get_bd_pins action_config_0/one_over_energy] [get_bd_pins data_collection_fsm_0/one_over_energy] - connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aclk] [get_bd_pins axi_bram_ctrl_hbm_transfer_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_hbm_transfer_1/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_addr_fifo_3/s_axis_aclk] [get_bd_pins axis_addr_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_6/s_axis_aclk] [get_bd_pins axis_data_fifo_7/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins internal_packet_generator_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins save_to_hbm_0/ap_clk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins smartconnect_1/aclk] [get_bd_pins timer_hbm_0/ap_clk] [get_bd_pins timer_host_0/ap_clk] [get_bd_pins transfer_hbm_0/ap_clk] [get_bd_pins writer_split_0/ap_clk] + connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins internal_packet_generator_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins timer_hbm_0/ap_clk] [get_bd_pins timer_host_0/ap_clk] connect_bd_net -net axis_addr_fifo_2_almost_empty [get_bd_pins action_config_0/calib_addr_fifo_empty] [get_bd_pins axis_addr_fifo_1/almost_empty] connect_bd_net -net axis_addr_fifo_2_almost_full [get_bd_pins action_config_0/calib_addr_fifo_full] [get_bd_pins axis_addr_fifo_1/almost_full] connect_bd_net -net axis_addr_fifo_4_almost_empty [get_bd_pins action_config_0/last_addr_fifo_empty] [get_bd_pins axis_addr_fifo_2/almost_empty] @@ -602,9 +494,8 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net network_stack_packets_sls_ap_vld [get_bd_pins action_config_0/packets_sls_valid] [get_bd_pins network_stack/packets_sls_ap_vld] connect_bd_net -net network_stack_packets_udp [get_bd_pins action_config_0/packets_udp] [get_bd_pins network_stack/packets_udp] connect_bd_net -net network_stack_packets_udp_ap_vld [get_bd_pins action_config_0/packets_udp_valid] [get_bd_pins network_stack/packets_udp_ap_vld] - connect_bd_net -net one_dout [get_bd_pins one/dout] [get_bd_pins save_to_hbm_0/completion_out_TREADY] - connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axi_bram_ctrl_hbm_transfer_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_hbm_transfer_1/s_axi_aresetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_addr_fifo_2/s_axis_aresetn] [get_bd_pins axis_addr_fifo_3/s_axis_aresetn] [get_bd_pins axis_addr_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_5/s_axis_aresetn] [get_bd_pins axis_data_fifo_6/s_axis_aresetn] [get_bd_pins axis_data_fifo_7/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_0/aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_0/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] [get_bd_pins smartconnect_1/aresetn] - connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins internal_packet_generator_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins save_to_hbm_0/ap_rst_n] [get_bd_pins timer_hbm_0/ap_rst_n] [get_bd_pins timer_host_0/ap_rst_n] [get_bd_pins transfer_hbm_0/ap_rst_n] [get_bd_pins writer_split_0/ap_rst_n] + connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_addr_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_5/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_0/aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_0/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] + connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins internal_packet_generator_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins timer_hbm_0/ap_rst_n] [get_bd_pins timer_host_0/ap_rst_n] connect_bd_net -net timer_hbm_0_counter [get_bd_pins action_config_0/stalls_hbm] [get_bd_pins timer_hbm_0/counter] connect_bd_net -net timer_hbm_0_counter_ap_vld [get_bd_pins action_config_0/stalls_hbm_valid] [get_bd_pins timer_hbm_0/counter_ap_vld] connect_bd_net -net timer_host_0_counter [get_bd_pins action_config_0/stalls_host] [get_bd_pins timer_host_0/counter] diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index 9333020b..8d98d8f2 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -208,21 +208,13 @@ void HLSSimulatedDevice::HLSMainThread() { STREAM_512 raw3; STREAM_512 raw4; - hls::stream > pedestalG0_subtracted; - STREAM_512 converted_1; STREAM_512 converted_2; - STREAM_512 converted_3; - STREAM_512 converted_4; - STREAM_512 converted_5; hls::stream addr0; hls::stream addr1; hls::stream addr2; hls::stream addr3; - hls::stream addr4; - hls::stream addr5; - hls::stream addr6; hls::stream > udp_metadata; ap_uint<1> idle_data_collection; @@ -315,26 +307,9 @@ void HLSSimulatedDevice::HLSMainThread() { // Timer procedure - count how many times write_data is not accepting input (to help track down latency issues) hls_cores.emplace_back([&] { timer_host(converted_1, converted_2, counter_host); }); - // Temporary - split streams so data can be written to both HBM and internal memory - hls_cores.emplace_back([&] { writer_split(converted_2, converted_3, converted_4, - addr3, addr4, addr5); }); - - hls::stream save_to_hbm_completion; - ap_uint<8> save_to_hbm_err_reg; - uint64_t save_to_hbm_packets_processed; - ap_uint<1> save_to_hbm_idle; - - // 3. Write images to HBM - hls_cores.emplace_back([&] { save_to_hbm(converted_3, addr4, save_to_hbm_completion, - hbm.data(), - hbm.data(), - save_to_hbm_packets_processed, - save_to_hbm_idle, - save_to_hbm_err_reg); }); - - // 4. Prepare data to write to host memory + // 3. Prepare data to write to host memory hls_cores.emplace_back([&] { - host_writer(converted_4, addr5, datamover_out.GetDataStream(), + host_writer(converted_2, addr3, datamover_out.GetDataStream(), datamover_out.GetCtrlStream(), work_request_stream, completion_stream, packets_processed, host_writer_idle, err_reg); }); @@ -353,12 +328,6 @@ void HLSSimulatedDevice::HLSMainThread() { if (!addr3.empty()) throw std::runtime_error("Addr3 queue not empty"); - if (!addr4.empty()) - throw std::runtime_error("Addr4 queue not empty"); - - if (!addr5.empty()) - throw std::runtime_error("Addr5 queue not empty"); - if (!raw1.empty()) throw std::runtime_error("Raw1 queue not empty"); @@ -371,21 +340,12 @@ void HLSSimulatedDevice::HLSMainThread() { if (!raw4.empty()) throw std::runtime_error("Raw4 queue not empty"); - if (!pedestalG0_subtracted.empty()) - throw std::runtime_error("PedestalG0_subtracted queue not empty"); - if (!converted_1.empty()) throw std::runtime_error("Converted_1 queue not empty"); if (!converted_2.empty()) throw std::runtime_error("Converted_2 queue not empty"); - if (!converted_3.empty()) - throw std::runtime_error("Converted_3 queue not empty"); - - if (!converted_4.empty()) - throw std::runtime_error("Converted_4 queue not empty"); - if (!datamover_in.GetDataStream().empty()) throw std::runtime_error("Datamover queue is not empty"); @@ -406,22 +366,3 @@ void HLSSimulatedDevice::HW_GetStatus(ActionStatus *status) const { status->max_modules = max_modules; status->hbm_size_bytes = hbm_if_size; } - -void HLSSimulatedDevice::HBMTransfer(void *uram, uint64_t hbm_interface, uint64_t hbm_offset, bool hbm_to_uram, - uint8_t stride, uint8_t uram_offset) { - if (hbm_interface >= hbm_if_count) - throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "HBM interface out of bounds"); - if (hbm_offset > hbm_if_size - (RAW_MODULE_SIZE * sizeof(uint16_t))) - throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "HBM offset out of bounds"); - if ((stride != 1) && (stride != 2) && (stride != 4)) - throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Only stride of 1, 2 and 4 allowed"); - if (uram_offset >= stride) - throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "UltraRAM stride out of bounds"); - - transfer_hbm((ap_uint<256> *) hbm.data(), - (ap_uint<256> *) uram, - (hbm_interface * hbm_if_size + hbm_offset) / 32, - hbm_to_uram, - stride, - uram_offset); -} \ No newline at end of file diff --git a/receiver/HLSSimulatedDevice.h b/receiver/HLSSimulatedDevice.h index 3fa13a0b..e3d7185e 100644 --- a/receiver/HLSSimulatedDevice.h +++ b/receiver/HLSSimulatedDevice.h @@ -61,8 +61,6 @@ public: void CreateFinalPacket(const DiffractionExperiment& experiment); AXI_STREAM &OutputStream(); void Cancel() override; - - void HBMTransfer(void *uram, uint64_t hbm_interface, uint64_t hbm_offset, bool hbm_to_uram, uint8_t stride, uint8_t uram_offset); }; diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index 609186e1..4b1ed31c 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -1041,82 +1041,3 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_storage_cell_convert_G1", } } -TEST_CASE("HLS_C_transfer_hbm_1_interface", "[FPGA][Full]") { - std::vector test_frame_1(RAW_MODULE_SIZE); - std::vector test_frame_2(RAW_MODULE_SIZE); - - std::mt19937 g1(1387); - std::uniform_int_distribution dist(0, 65535); - - for (auto &i: test_frame_1) - i = dist(g1); - - HLSSimulatedDevice test(0, 64); - - REQUIRE(test_frame_1 != test_frame_2); - - test.HBMTransfer(test_frame_1.data(), 14, 16*1024, false, 1, 0); - test.HBMTransfer(test_frame_2.data(), 14, 16*1024, true, 1, 0); - - REQUIRE(test_frame_1 == test_frame_2); -} - -TEST_CASE("HLS_C_transfer_hbm_2_interfaces", "[FPGA][Full]") { - std::vector test_frame_1(RAW_MODULE_SIZE); - std::vector test_frame_2(RAW_MODULE_SIZE); - - std::mt19937 g1(1388); - std::uniform_int_distribution dist(0, 65535); - - for (auto &i: test_frame_1) - i = dist(g1); - - HLSSimulatedDevice test(0, 64); - - REQUIRE(test_frame_1 != test_frame_2); - - test.HBMTransfer(test_frame_1.data(), 14, 16*1024, false, 2, 0); - test.HBMTransfer(test_frame_1.data(), 15, 16*1024, false, 2, 1); - test.HBMTransfer(test_frame_2.data(), 14, 16*1024, true, 2, 0); - test.HBMTransfer(test_frame_2.data(), 15, 16*1024, true, 2, 1); - - REQUIRE(test_frame_1 == test_frame_2); -} - -TEST_CASE("HLS_C_Simulation_internal_packet_generator_write_to_hbm", "[FPGA][Full]") { - const uint16_t nmodules = 1; - - DiffractionExperiment x((DetectorGeometry(nmodules))); - - x.Mode(DetectorMode::Raw); - x.UseInternalPacketGenerator(true).ImagesPerTrigger(4).PedestalG0Frames(0); - - HLSSimulatedDevice test(0, 64); - test.SetFPGANonBlockingMode(false); - - std::vector test_frame_1(RAW_MODULE_SIZE); - std::vector test_frame_2(RAW_MODULE_SIZE); - - std::mt19937 g1(1387); - std::uniform_int_distribution dist(0, 65535); - - for (auto &i: test_frame_1) - i = dist(g1); - - REQUIRE_NOTHROW(test.SetCustomInternalGeneratorFrame(test_frame_1)); - REQUIRE_NOTHROW(test.StartAction(x)); - REQUIRE_NOTHROW(test.WaitForActionComplete()); - - REQUIRE(test.OutputStream().size() == 1); - - JFJochProtoBuf::AcquisitionDeviceStatistics device_statistics; - REQUIRE_NOTHROW(test.SaveStatistics(x, device_statistics)); - REQUIRE(device_statistics.bytes_received() == 128 * nmodules * 4 * JUNGFRAU_PACKET_SIZE_BYTES); - - REQUIRE(test_frame_1 != test_frame_2); - - test.HBMTransfer(test_frame_2.data(), 12, 2*512*1024, true, 2, 0); - test.HBMTransfer(test_frame_2.data(), 14, 2*512*1024, true, 2, 1); - - REQUIRE(test_frame_1 == test_frame_2); -} From f98b5fe389f95f7b1781cafa8326d94c7bcce2ba Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 11 Sep 2023 20:30:46 +0200 Subject: [PATCH 198/224] FPGA: use only two HBM channels to write calibration in JF conversion --- fpga/hls/jf_conversion.cpp | 84 +++++++++++++++++++------------------- 1 file changed, 42 insertions(+), 42 deletions(-) diff --git a/fpga/hls/jf_conversion.cpp b/fpga/hls/jf_conversion.cpp index 259acd2e..e25a1d28 100644 --- a/fpga/hls/jf_conversion.cpp +++ b/fpga/hls/jf_conversion.cpp @@ -118,27 +118,27 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=off \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 #pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 + max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=9 #pragma HLS INTERFACE m_axi port=d_hbm_p2 bundle=d_hbm_p2 depth=512 offset=off \ max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 #pragma HLS INTERFACE m_axi port=d_hbm_p3 bundle=d_hbm_p3 depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 + max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=9 #pragma HLS INTERFACE m_axi port=d_hbm_p4 bundle=d_hbm_p4 depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 + max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=9 #pragma HLS INTERFACE m_axi port=d_hbm_p5 bundle=d_hbm_p5 depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 + max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=9 #pragma HLS INTERFACE m_axi port=d_hbm_p6 bundle=d_hbm_p6 depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 + max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=9 #pragma HLS INTERFACE m_axi port=d_hbm_p7 bundle=d_hbm_p7 depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 + max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=9 #pragma HLS INTERFACE m_axi port=d_hbm_p8 bundle=d_hbm_p8 depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 + max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=9 #pragma HLS INTERFACE m_axi port=d_hbm_p9 bundle=d_hbm_p9 depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 + max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=9 #pragma HLS INTERFACE m_axi port=d_hbm_p10 bundle=d_hbm_p10 depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 + max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=9 #pragma HLS INTERFACE m_axi port=d_hbm_p11 bundle=d_hbm_p11 depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 + max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=9 packet_512_t packet_in; @@ -180,13 +180,13 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, data_in >> packet_in; if (i % HBM_BURST == 0) { d_hbm_p0.write_request(offset_hbm_0 + i, HBM_BURST); - d_hbm_p1.write_request(offset_hbm_1 + i, HBM_BURST); + d_hbm_p2.write_request(offset_hbm_1 + i, HBM_BURST); } d_hbm_p0.write(packet_in.data(255, 0)); - d_hbm_p1.write(packet_in.data(511, 256)); + d_hbm_p2.write(packet_in.data(511, 256)); if (i % HBM_BURST == HBM_BURST - 1) { d_hbm_p0.write_response(); - d_hbm_p1.write_response(); + d_hbm_p2.write_response(); } } @@ -195,14 +195,14 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS PIPELINE II=1 data_in >> packet_in; if (i % HBM_BURST == 0) { - d_hbm_p2.write_request(offset_hbm_2 + i, HBM_BURST); - d_hbm_p3.write_request(offset_hbm_3 + i, HBM_BURST); + d_hbm_p0.write_request(offset_hbm_2 + i, HBM_BURST); + d_hbm_p2.write_request(offset_hbm_3 + i, HBM_BURST); } - d_hbm_p2.write(packet_in.data(255, 0)); - d_hbm_p3.write(packet_in.data(511, 256)); + d_hbm_p0.write(packet_in.data(255, 0)); + d_hbm_p2.write(packet_in.data(511, 256)); if (i % HBM_BURST == HBM_BURST - 1) { + d_hbm_p0.write_response(); d_hbm_p2.write_response(); - d_hbm_p3.write_response(); } } @@ -211,14 +211,14 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS PIPELINE II=1 data_in >> packet_in; if (i % HBM_BURST == 0) { - d_hbm_p4.write_request(offset_hbm_4 + i, HBM_BURST); - d_hbm_p5.write_request(offset_hbm_5 + i, HBM_BURST); + d_hbm_p0.write_request(offset_hbm_4 + i, HBM_BURST); + d_hbm_p2.write_request(offset_hbm_5 + i, HBM_BURST); } - d_hbm_p4.write(packet_in.data(255, 0)); - d_hbm_p5.write(packet_in.data(511, 256)); + d_hbm_p0.write(packet_in.data(255, 0)); + d_hbm_p2.write(packet_in.data(511, 256)); if (i % HBM_BURST == HBM_BURST - 1) { - d_hbm_p4.write_response(); - d_hbm_p5.write_response(); + d_hbm_p0.write_response(); + d_hbm_p2.write_response(); } } @@ -227,14 +227,14 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS PIPELINE II=1 data_in >> packet_in; if (i % HBM_BURST == 0) { - d_hbm_p6.write_request(offset_hbm_6 + i, HBM_BURST); - d_hbm_p7.write_request(offset_hbm_7 + i, HBM_BURST); + d_hbm_p0.write_request(offset_hbm_6 + i, HBM_BURST); + d_hbm_p2.write_request(offset_hbm_7 + i, HBM_BURST); } - d_hbm_p6.write(packet_in.data(255, 0)); - d_hbm_p7.write(packet_in.data(511, 256)); + d_hbm_p0.write(packet_in.data(255, 0)); + d_hbm_p2.write(packet_in.data(511, 256)); if (i % HBM_BURST == HBM_BURST - 1) { - d_hbm_p6.write_response(); - d_hbm_p7.write_response(); + d_hbm_p0.write_response(); + d_hbm_p2.write_response(); } } @@ -243,14 +243,14 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS PIPELINE II=1 data_in >> packet_in; if (i % HBM_BURST == 0) { - d_hbm_p8.write_request(offset_hbm_8 + i, HBM_BURST); - d_hbm_p9.write_request(offset_hbm_9 + i, HBM_BURST); + d_hbm_p0.write_request(offset_hbm_8 + i, HBM_BURST); + d_hbm_p2.write_request(offset_hbm_9 + i, HBM_BURST); } - d_hbm_p8.write(packet_in.data(255, 0)); - d_hbm_p9.write(packet_in.data(511, 256)); + d_hbm_p0.write(packet_in.data(255, 0)); + d_hbm_p2.write(packet_in.data(511, 256)); if (i % HBM_BURST == HBM_BURST - 1) { - d_hbm_p8.write_response(); - d_hbm_p9.write_response(); + d_hbm_p0.write_response(); + d_hbm_p2.write_response(); } } @@ -259,14 +259,14 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS PIPELINE II=1 data_in >> packet_in; if (i % HBM_BURST == 0) { - d_hbm_p10.write_request(offset_hbm_10 + i, HBM_BURST); - d_hbm_p11.write_request(offset_hbm_11 + i, HBM_BURST); + d_hbm_p0.write_request(offset_hbm_10 + i, HBM_BURST); + d_hbm_p2.write_request(offset_hbm_11 + i, HBM_BURST); } - d_hbm_p10.write(packet_in.data(255, 0)); - d_hbm_p11.write(packet_in.data(511, 256)); + d_hbm_p0.write(packet_in.data(255, 0)); + d_hbm_p2.write(packet_in.data(511, 256)); if (i % HBM_BURST == HBM_BURST - 1) { - d_hbm_p10.write_response(); - d_hbm_p11.write_response(); + d_hbm_p0.write_response(); + d_hbm_p2.write_response(); } } From 8c3a25a8ad157837e1daa77c56fab898e45c03cd Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Mon, 11 Sep 2023 21:35:15 +0200 Subject: [PATCH 199/224] FPGA: load calibration operates directly on HBM --- fpga/hls/CMakeLists.txt | 2 - fpga/hls/hls_jfjoch.h | 32 +------- fpga/hls/internal_packet_generator.cpp | 9 --- fpga/hls/jf_conversion.cpp | 101 +------------------------ fpga/hls/load_calibration.cpp | 75 ++++++++++-------- fpga/hls/timer.cpp | 56 -------------- fpga/scripts/bd_pcie.tcl | 4 - fpga/scripts/hbm_u55c.tcl | 10 ++- fpga/scripts/jfjoch.tcl | 48 +++++++----- receiver/HLSSimulatedDevice.cpp | 8 +- 10 files changed, 90 insertions(+), 255 deletions(-) diff --git a/fpga/hls/CMakeLists.txt b/fpga/hls/CMakeLists.txt index 098f9084..e4c37aca 100644 --- a/fpga/hls/CMakeLists.txt +++ b/fpga/hls/CMakeLists.txt @@ -34,7 +34,6 @@ ENDFUNCTION(MAKE_HLS_MODULE) MAKE_HLS_MODULE(data_collection_fsm.cpp data_collection_fsm) MAKE_HLS_MODULE(timer.cpp timer_host) -MAKE_HLS_MODULE(timer.cpp timer_hbm) MAKE_HLS_MODULE(jf_conversion.cpp jf_conversion) MAKE_HLS_MODULE(load_calibration.cpp load_calibration) MAKE_HLS_MODULE(host_writer.cpp host_writer) @@ -48,7 +47,6 @@ MAKE_HLS_MODULE(sls_detector.cpp sls_detector) SET (HLS_IPS psi_ch_hls_data_collection_fsm_1_0.zip psi_ch_hls_timer_host_1_0.zip - psi_ch_hls_timer_hbm_1_0.zip psi_ch_hls_jf_conversion_1_0.zip psi_ch_hls_load_calibration_1_0.zip psi_ch_hls_internal_packet_generator_1_0.zip diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index 6fe5eade..dd43e7d4 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -102,6 +102,8 @@ void data_collection_fsm(AXI_STREAM ð_in, ap_uint<32> hbm_size_bytes); void load_calibration(STREAM_512 &data_in, STREAM_512 &data_out, + ap_uint<256> *d_hbm_p0, + ap_uint<256> *d_hbm_p1, hls::stream &datamover_in_cmd, hls::stream > &host_memory_in, uint64_t in_mem_location[LOAD_CALIBRATION_BRAM_SIZE]); @@ -126,37 +128,14 @@ void host_writer(STREAM_512 &data_in, volatile ap_uint<1> &idle, ap_uint<8> &err_reg); -void timer_hbm(STREAM_512 &in, STREAM_512 &data_out, uint64_t &counter); void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, uint64_t &counter); -void writer_split(STREAM_512 &data_in, - STREAM_512 &data_out_1, - STREAM_512 &data_out_2, - hls::stream &addr_in, - hls::stream &addr_out_1, - hls::stream &addr_out_2); - void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, hls::stream &addr_in, hls::stream &addr_out, ap_uint<512> module_cache[RAW_MODULE_SIZE * sizeof(uint16_t) / 512 * 8], volatile ap_uint<1> &in_cancel); -void save_to_hbm(STREAM_512 &data_in, - hls::stream &addr_in, - hls::stream &completion_out, - hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, - volatile uint64_t &packets_processed, - volatile ap_uint<1> &idle, - ap_uint<8> &err_reg); - -void load_from_hbm(STREAM_512 &data_out, - hls::stream &completion_in, - hls::stream &completion_out, - hls::burst_maxi d_hbm_p0, - hls::burst_maxi d_hbm_p1, - ap_uint<32> hbm_size); - template ap_uint pack32(ap_int in[32]) { #pragma HLS INLINE ap_uint out; @@ -258,11 +237,4 @@ void sls_detector(AXI_STREAM &udp_payload_in, uint32_t& counter_eth_error, uint32_t& counter_len_error, volatile ap_uint<1> &in_clear_counters); - -void transfer_hbm(ap_uint<256> *d_hbm_p0, - ap_uint<256> *uram, - uint32_t hbm_offset, - bool hbm_to_uram, - uint8_t stride, - uint8_t uram_offset); #endif diff --git a/fpga/hls/internal_packet_generator.cpp b/fpga/hls/internal_packet_generator.cpp index 8e6a0c11..4f8b061e 100644 --- a/fpga/hls/internal_packet_generator.cpp +++ b/fpga/hls/internal_packet_generator.cpp @@ -35,15 +35,6 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, addr_in >> addr; addr_out << addr; - if (conversion) { - forward_gain: - for (int i = 0; i < modules * (3 + storage_cells * 3) * (RAW_MODULE_SIZE * 2 / 64); i++) { -#pragma HLS PIPELINE II=1 - data_in >> packet_in; - data_out << packet_in; - } - } - if (internal_packet_generator) { uint32_t frame_number = 1; uint8_t module_number = 0; diff --git a/fpga/hls/jf_conversion.cpp b/fpga/hls/jf_conversion.cpp index e25a1d28..48cad566 100644 --- a/fpga/hls/jf_conversion.cpp +++ b/fpga/hls/jf_conversion.cpp @@ -116,11 +116,11 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS INTERFACE register both axis port=addr_out #pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 + max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=9 #pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=off \ max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=9 #pragma HLS INTERFACE m_axi port=d_hbm_p2 bundle=d_hbm_p2 depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=9 + max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=9 #pragma HLS INTERFACE m_axi port=d_hbm_p3 bundle=d_hbm_p3 depth=512 offset=off \ max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=9 #pragma HLS INTERFACE m_axi port=d_hbm_p4 bundle=d_hbm_p4 depth=512 offset=off \ @@ -173,103 +173,6 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, data_out << packet_in; if (conversion) { - // Load calibration into HBM - save_gainG0: - for (int i = 0; i < modules * (RAW_MODULE_SIZE * 2 / 64); i++) { -#pragma HLS PIPELINE II=1 - data_in >> packet_in; - if (i % HBM_BURST == 0) { - d_hbm_p0.write_request(offset_hbm_0 + i, HBM_BURST); - d_hbm_p2.write_request(offset_hbm_1 + i, HBM_BURST); - } - d_hbm_p0.write(packet_in.data(255, 0)); - d_hbm_p2.write(packet_in.data(511, 256)); - if (i % HBM_BURST == HBM_BURST - 1) { - d_hbm_p0.write_response(); - d_hbm_p2.write_response(); - } - } - - save_gainG1: - for (int i = 0; i < modules * (RAW_MODULE_SIZE * 2 / 64); i++) { -#pragma HLS PIPELINE II=1 - data_in >> packet_in; - if (i % HBM_BURST == 0) { - d_hbm_p0.write_request(offset_hbm_2 + i, HBM_BURST); - d_hbm_p2.write_request(offset_hbm_3 + i, HBM_BURST); - } - d_hbm_p0.write(packet_in.data(255, 0)); - d_hbm_p2.write(packet_in.data(511, 256)); - if (i % HBM_BURST == HBM_BURST - 1) { - d_hbm_p0.write_response(); - d_hbm_p2.write_response(); - } - } - - save_gainG2: - for (int i = 0; i < modules * (RAW_MODULE_SIZE * 2 / 64); i++) { -#pragma HLS PIPELINE II=1 - data_in >> packet_in; - if (i % HBM_BURST == 0) { - d_hbm_p0.write_request(offset_hbm_4 + i, HBM_BURST); - d_hbm_p2.write_request(offset_hbm_5 + i, HBM_BURST); - } - d_hbm_p0.write(packet_in.data(255, 0)); - d_hbm_p2.write(packet_in.data(511, 256)); - if (i % HBM_BURST == HBM_BURST - 1) { - d_hbm_p0.write_response(); - d_hbm_p2.write_response(); - } - } - - save_pedeG0: - for (int i = 0; i < modules * storage_cells * (RAW_MODULE_SIZE * 2 / 64); i++) { -#pragma HLS PIPELINE II=1 - data_in >> packet_in; - if (i % HBM_BURST == 0) { - d_hbm_p0.write_request(offset_hbm_6 + i, HBM_BURST); - d_hbm_p2.write_request(offset_hbm_7 + i, HBM_BURST); - } - d_hbm_p0.write(packet_in.data(255, 0)); - d_hbm_p2.write(packet_in.data(511, 256)); - if (i % HBM_BURST == HBM_BURST - 1) { - d_hbm_p0.write_response(); - d_hbm_p2.write_response(); - } - } - - save_pedeG1: - for (int i = 0; i < modules * storage_cells * (RAW_MODULE_SIZE * 2 / 64); i++) { -#pragma HLS PIPELINE II=1 - data_in >> packet_in; - if (i % HBM_BURST == 0) { - d_hbm_p0.write_request(offset_hbm_8 + i, HBM_BURST); - d_hbm_p2.write_request(offset_hbm_9 + i, HBM_BURST); - } - d_hbm_p0.write(packet_in.data(255, 0)); - d_hbm_p2.write(packet_in.data(511, 256)); - if (i % HBM_BURST == HBM_BURST - 1) { - d_hbm_p0.write_response(); - d_hbm_p2.write_response(); - } - } - - save_pedeG2: - for (int i = 0; i < modules * storage_cells * (RAW_MODULE_SIZE * 2 / 64); i++) { -#pragma HLS PIPELINE II=1 - data_in >> packet_in; - if (i % HBM_BURST == 0) { - d_hbm_p0.write_request(offset_hbm_10 + i, HBM_BURST); - d_hbm_p2.write_request(offset_hbm_11 + i, HBM_BURST); - } - d_hbm_p0.write(packet_in.data(255, 0)); - d_hbm_p2.write(packet_in.data(511, 256)); - if (i % HBM_BURST == HBM_BURST - 1) { - d_hbm_p0.write_response(); - d_hbm_p2.write_response(); - } - } - ap_uint<7> counter = 0; addr_in >> addr; pixel_conversion: diff --git a/fpga/hls/load_calibration.cpp b/fpga/hls/load_calibration.cpp index 40598361..a5b6a167 100644 --- a/fpga/hls/load_calibration.cpp +++ b/fpga/hls/load_calibration.cpp @@ -6,32 +6,12 @@ // Loads calibration from host memory based on 64-bit memory addresses loaded in in_mem_location // Expected structure in in_mem_location array: // -// * pixel mask for all modules(1 bit/pixel) -// * internal packet generator frame // * gain factors for module m at location: 2 + gain level * NMODULES + m // * pedestal factors for module m and storage cell s at location: 2 + 3 * NMODULES + (gain level * 16 + s ) * NMODULES + m -void load_data(STREAM_512 &data_out, - hls::stream &datamover_in_cmd, - hls::stream > &host_memory_in, - uint64_t memory_addr, - uint64_t size_in_512bit_packets) { - setup_datamover(datamover_in_cmd, memory_addr, size_in_512bit_packets * 64); - read_internal_pkt_gen_content: - for (int j = 0; j < size_in_512bit_packets; j++) { -#pragma HLS PIPELINE II=1 - ap_axiu<512,1,1,1> data_packet; - host_memory_in >> data_packet; - packet_512_t packet_out; - packet_out.last = 0; - packet_out.user = 0; - packet_out.id = 0; - packet_out.data = data_packet.data; - data_out << packet_out; - } -} - void load_calibration(STREAM_512 &data_in, STREAM_512 &data_out, + ap_uint<256> *d_hbm_p0, + ap_uint<256> *d_hbm_p1, hls::stream &datamover_in_cmd, hls::stream > &host_memory_in, uint64_t in_mem_location[LOAD_CALIBRATION_BRAM_SIZE]) { @@ -42,21 +22,39 @@ void load_calibration(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS INTERFACE register both axis port=data_out #pragma HLS INTERFACE bram port=in_mem_location storage_type=rom_1p +#pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=off \ + max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 +#pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=off \ + max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 + packet_512_t packet_in; data_in >> packet_in; - ap_uint<5> modules = ACT_REG_NMODULES(packet_in.data); - ap_uint<5> storage_cells = ACT_REG_NSTORAGE_CELLS(packet_in.data); - ap_uint<1> conversion = (ACT_REG_MODE(packet_in.data) & MODE_CONV) ? 1 : 0; - data_out << packet_in; + ap_uint<5> modules = ACT_REG_NMODULES(packet_in.data); + ap_uint<5> storage_cells = ACT_REG_NSTORAGE_CELLS(packet_in.data); + ap_uint<1> conversion = (ACT_REG_MODE(packet_in.data) & MODE_CONV) ? 1 : 0; + ap_uint<32> hbm_size_256b = ACT_REG_HBM_SIZE_256b(packet_in.data); if (conversion) { read_gain: for (int c = 0; c < 3; c++) { // 3 gain levels for (int m = 0; m < modules; m++) { - load_data(data_out, datamover_in_cmd, host_memory_in, in_mem_location[m + c * modules + 1], - RAW_MODULE_SIZE * sizeof(int16_t) / 64); + + size_t offset_hbm_0 = (2 * c) * hbm_size_256b + m * RAW_MODULE_SIZE * sizeof(int16_t) / 64; + size_t offset_hbm_1 = (2 * c + 1) * hbm_size_256b + m * RAW_MODULE_SIZE * sizeof(int16_t) / 64; + + setup_datamover(datamover_in_cmd, in_mem_location[m + c * modules + 1], + RAW_MODULE_SIZE * sizeof(int16_t)); + for (int i = 0; i < RAW_MODULE_SIZE * sizeof(int16_t) / 64; i++) { +#pragma HLS PIPELINE II=1 + ap_axiu<512, 1, 1, 1> data_packet; + host_memory_in >> data_packet; + + d_hbm_p0[offset_hbm_0 + i] = data_packet.data(255, 0); + d_hbm_p1[offset_hbm_1 + i] = data_packet.data(511, 256); + } + } } @@ -65,14 +63,29 @@ void load_calibration(STREAM_512 &data_in, STREAM_512 &data_out, ap_uint<16> offset = (c * 16 + 3) * modules + 1; for (int s = 0; s < storage_cells; s++) { for (int m = 0; m < modules; m++) { - load_data(data_out, datamover_in_cmd, host_memory_in, - in_mem_location[offset + s * modules + m], - RAW_MODULE_SIZE * sizeof(int16_t) / 64); + size_t offset_hbm_0 = (6 + 2 * c) * hbm_size_256b + + (s * modules + m) * RAW_MODULE_SIZE * sizeof(int16_t) / 64; + size_t offset_hbm_1 = (6 + 2 * c + 1) * hbm_size_256b + + (s * modules + m) * RAW_MODULE_SIZE * sizeof(int16_t) / 64; + + setup_datamover(datamover_in_cmd, in_mem_location[offset + s * modules + m], + RAW_MODULE_SIZE * sizeof(int16_t)); + + for (int i = 0; i < RAW_MODULE_SIZE * sizeof(int16_t) / 64; i++) { +#pragma HLS PIPELINE II=1 + ap_axiu<512, 1, 1, 1> data_packet; + host_memory_in >> data_packet; + + d_hbm_p0[offset_hbm_0 + i] = data_packet.data(255, 0); + d_hbm_p1[offset_hbm_1 + i] = data_packet.data(511, 256); + } } } } } + data_out << packet_in; + data_in >> packet_in; while (!packet_in.user) { #pragma HLS PIPELINE II=1 diff --git a/fpga/hls/timer.cpp b/fpga/hls/timer.cpp index 53f27b98..78ea1d97 100644 --- a/fpga/hls/timer.cpp +++ b/fpga/hls/timer.cpp @@ -1,64 +1,8 @@ // Copyright (2019-2022) Paul Scherrer Institute // SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later -#ifdef __SYNTHESIS__ -#include "ap_utils.h" -#else -#define ap_wait() -#endif - #include "hls_jfjoch.h" -#define HBM_CALIB_DELAY 256 - -void timer_hbm(STREAM_512 &data_in, STREAM_512 &data_out, uint64_t &counter) { -#pragma HLS INTERFACE register both axis port=data_in -#pragma HLS INTERFACE register both axis port=data_out -#pragma HLS INTERFACE register ap_vld port=counter -#pragma HLS INTERFACE ap_ctrl_none port=return - packet_512_t packet_in; - - // Read and forward packet #0 - data_in >> packet_in; - uint64_t counter_internal = 0; - counter = 0; // Counter is regenerated when action is starting, not earlier - ap_uint<5> modules = ACT_REG_NMODULES(packet_in.data); - ap_uint<5> storage_cells = ACT_REG_NSTORAGE_CELLS(packet_in.data); - ap_uint<1> conversion = (ACT_REG_MODE(packet_in.data) & MODE_CONV) ? 1 : 0; - - data_out << packet_in; - - // Don't care about pipeline stalls when gain & pedestal are transferred - - if (conversion) { - forward_calibration: - for (int i = 0; i < modules * (3 + 3 * storage_cells) * (RAW_MODULE_SIZE * 2 / 64); i++) { -#pragma HLS PIPELINE II=1 - data_in >> packet_in; - data_out << packet_in; - } - } - - for (int i = 0; i < HBM_CALIB_DELAY; i++) { - ap_wait(); - } - - data_in >> packet_in; - - while (!packet_in.user) { -#pragma HLS PIPELINE - if (data_out.full()) { - if (counter_internal < UINT64_MAX) - counter_internal++; - counter = counter_internal; - } else { - data_out << packet_in; - data_in >> packet_in; - } - } - data_out << packet_in; -} - void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, uint64_t &counter) { #pragma HLS INTERFACE register both axis port=data_in #pragma HLS INTERFACE register both axis port=data_out diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index f679a389..aa812ca7 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -153,11 +153,7 @@ psi.ch:hls:internal_packet_generator:1.0\ psi.ch:hls:jf_conversion:1.0\ psi.ch:hls:load_calibration:1.0\ xilinx.com:ip:mailbox:2.1\ -psi.ch:hls:save_to_hbm:1.0\ -psi.ch:hls:timer_hbm:1.0\ psi.ch:hls:timer_host:1.0\ -psi.ch:hls:transfer_hbm:1.0\ -psi.ch:hls:writer_split:1.0\ xilinx.com:ip:cmac_usplus:3.1\ xilinx.com:ip:util_vector_logic:2.0\ xilinx.com:ip:axi_firewall:1.2\ diff --git a/fpga/scripts/hbm_u55c.tcl b/fpga/scripts/hbm_u55c.tcl index baf9eff1..e435dfed 100644 --- a/fpga/scripts/hbm_u55c.tcl +++ b/fpga/scripts/hbm_u55c.tcl @@ -55,7 +55,7 @@ proc create_hier_cell_hbm_infrastructure { parentCell nameHier } { CONFIG.USER_APB_PCLK_0 {100} \ CONFIG.USER_APB_PCLK_PERIOD_0 {10.0} \ CONFIG.USER_AUTO_POPULATE {yes} \ - CONFIG.USER_CLK_SEL_LIST0 {AXI_07_ACLK} \ + CONFIG.USER_CLK_SEL_LIST0 {AXI_05_ACLK} \ CONFIG.USER_CLK_SEL_LIST1 {AXI_16_ACLK} \ CONFIG.USER_DFI_CLK0_FREQ {450.000} \ CONFIG.USER_HBM_CP_0 {6} \ @@ -236,6 +236,10 @@ proc create_hier_cell_hbm_infrastructure { parentCell nameHier } { CONFIG.USER_PHY_ENABLE_13 {FALSE} \ CONFIG.USER_PHY_ENABLE_14 {FALSE} \ CONFIG.USER_PHY_ENABLE_15 {FALSE} \ + CONFIG.USER_SAXI_12 {false} \ + CONFIG.USER_SAXI_13 {false} \ + CONFIG.USER_SAXI_14 {false} \ + CONFIG.USER_SAXI_15 {false} \ CONFIG.USER_SWITCH_ENABLE_00 {TRUE} \ CONFIG.USER_SWITCH_ENABLE_01 {FALSE} \ CONFIG.USER_TEMP_POLL_CNT_0 {100000} \ @@ -253,7 +257,7 @@ proc create_hier_cell_hbm_infrastructure { parentCell nameHier } { CONFIG.USER_tRREFD_0 {0x8} \ CONFIG.USER_tWR_0 {0x0F} \ CONFIG.USER_tXP_0 {0x07} \ - ] $hbm + ] $hbm connect_bd_net [get_bd_pins hbm_temperature_0] [get_bd_pins hbm/DRAM_0_STAT_TEMP] connect_bd_net -net hbm_DRAM_0_STAT_CATTRIP [get_bd_pins hbm/DRAM_0_STAT_CATTRIP] [get_bd_pins hbm_cattrip] @@ -261,7 +265,7 @@ proc create_hier_cell_hbm_infrastructure { parentCell nameHier } { connect_bd_net [get_bd_pins axi_resetn] [get_bd_pins hbm/APB_0_PRESET_N] connect_bd_net [get_bd_pins refclk100] [get_bd_pins hbm/APB_0_PCLK] [get_bd_pins hbm/HBM_REF_CLK_0] - for {set i 0} {$i < 16} {incr i} { + for {set i 0} {$i < 12} {incr i} { create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_hbm_$i set cell [create_bd_cell -type ip -vlnv {xilinx.com:ip:axi_register_slice:*} axi_register_slice_$i ] diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index e81593ab..037f94ec 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -4,7 +4,7 @@ # Hierarchical cell: jungfraujoch proc create_hier_cell_jungfraujoch { parentCell nameHier } { - variable script_folder +variable script_folder if { $parentCell eq "" || $nameHier eq "" } { catch {common::send_gid_msg -ssname BD::TCL -id 2092 -severity "ERROR" "create_hier_cell_jungfraujoch_0() - Empty argument(s)!"} @@ -366,15 +366,21 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { set smartconnect_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_0 ] set_property -dict [ list \ CONFIG.NUM_CLKS {1} \ - CONFIG.NUM_MI {6} \ + CONFIG.NUM_MI {4} \ CONFIG.NUM_SI {1} \ ] $smartconnect_0 - # Create instance: timer_hbm_0, and set properties - set timer_hbm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:timer_hbm:1.0 timer_hbm_0 ] + # Create instance: smartconnect_1, and set properties + set smartconnect_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_1 ] - # Create instance: timer_host_0, and set properties - set timer_host_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:timer_host:1.0 timer_host_0 ] + # Create instance: smartconnect_2, and set properties + set smartconnect_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_2 ] + + # Create instance: timer_hbm, and set properties + set timer_hbm [ create_bd_cell -type ip -vlnv psi.ch:hls:timer_host:1.0 timer_hbm ] + + # Create instance: timer_host, and set properties + set timer_host [ create_bd_cell -type ip -vlnv psi.ch:hls:timer_host:1.0 timer_host ] # Create interface connections connect_bd_intf_net -intf_net Conn2 [get_bd_intf_pins eth_out] [get_bd_intf_pins network_stack/M00_AXIS] @@ -388,9 +394,9 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net axis_addr_fifo_2_M_AXIS1 [get_bd_intf_pins axis_addr_fifo_2/M_AXIS] [get_bd_intf_pins host_writer_0/addr_in] connect_bd_intf_net -intf_net axis_data_fifo_0_M_AXIS [get_bd_intf_pins axis_data_fifo_0/M_AXIS] [get_bd_intf_pins load_calibration_0/data_in] connect_bd_intf_net -intf_net axis_data_fifo_1_M_AXIS [get_bd_intf_pins axis_data_fifo_1/M_AXIS] [get_bd_intf_pins internal_packet_generator_0/data_in] - connect_bd_intf_net -intf_net axis_data_fifo_2_M_AXIS [get_bd_intf_pins axis_data_fifo_2/M_AXIS] [get_bd_intf_pins timer_hbm_0/data_in] + connect_bd_intf_net -intf_net axis_data_fifo_2_M_AXIS [get_bd_intf_pins axis_data_fifo_2/M_AXIS] [get_bd_intf_pins timer_hbm/data_in] connect_bd_intf_net -intf_net axis_data_fifo_4_M_AXIS [get_bd_intf_pins axis_data_fifo_3/M_AXIS] [get_bd_intf_pins jf_conversion_0/data_in] - connect_bd_intf_net -intf_net axis_data_fifo_4_M_AXIS1 [get_bd_intf_pins axis_data_fifo_4/M_AXIS] [get_bd_intf_pins timer_host_0/data_in] + connect_bd_intf_net -intf_net axis_data_fifo_4_M_AXIS1 [get_bd_intf_pins axis_data_fifo_4/M_AXIS] [get_bd_intf_pins timer_host/data_in] connect_bd_intf_net -intf_net axis_data_fifo_5_M_AXIS [get_bd_intf_pins axis_data_fifo_5/M_AXIS] [get_bd_intf_pins host_writer_0/data_in] connect_bd_intf_net -intf_net axis_data_fifo_c2h_cmd_M_AXIS [get_bd_intf_pins m_axis_c2h_datamover_cmd] [get_bd_intf_pins axis_data_fifo_c2h_cmd/M_AXIS] connect_bd_intf_net -intf_net axis_data_fifo_c2h_data_M_AXIS [get_bd_intf_pins m_axis_c2h_data] [get_bd_intf_pins axis_data_fifo_c2h_data/M_AXIS] @@ -417,9 +423,9 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net internal_packet_generator_0_m_axi_frame [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_1/S_AXI] [get_bd_intf_pins internal_packet_generator_0/m_axi_frame] connect_bd_intf_net -intf_net jf_conversion_0_addr_out [get_bd_intf_pins axis_register_slice_addr_1/S_AXIS] [get_bd_intf_pins jf_conversion_0/addr_out] connect_bd_intf_net -intf_net jf_conversion_0_data_out [get_bd_intf_pins axis_data_fifo_4/S_AXIS] [get_bd_intf_pins jf_conversion_0/data_out] - connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p0 [get_bd_intf_pins m_axi_d_hbm_p0] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p0] + connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p0 [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/S00_AXI] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p1 [get_bd_intf_pins m_axi_d_hbm_p1] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p1] - connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p2 [get_bd_intf_pins m_axi_d_hbm_p2] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p2] + connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p2 [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p2] [get_bd_intf_pins smartconnect_2/S00_AXI] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p3 [get_bd_intf_pins m_axi_d_hbm_p3] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p3] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p4 [get_bd_intf_pins m_axi_d_hbm_p4] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p4] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p5 [get_bd_intf_pins m_axi_d_hbm_p5] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p5] @@ -432,6 +438,8 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net load_calibration_0_data_out [get_bd_intf_pins axis_data_fifo_1/S_AXIS] [get_bd_intf_pins load_calibration_0/data_out] connect_bd_intf_net -intf_net load_calibration_0_datamover_in_cmd [get_bd_intf_pins axis_data_fifo_h2c_cmd/S_AXIS] [get_bd_intf_pins load_calibration_0/datamover_in_cmd] connect_bd_intf_net -intf_net load_calibration_0_in_mem_location_PORTA [get_bd_intf_pins calibration_addr_bram/BRAM_PORTA] [get_bd_intf_pins load_calibration_0/in_mem_location_PORTA] + connect_bd_intf_net -intf_net load_calibration_0_m_axi_d_hbm_p0 [get_bd_intf_pins load_calibration_0/m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/S01_AXI] + connect_bd_intf_net -intf_net load_calibration_0_m_axi_d_hbm_p1 [get_bd_intf_pins load_calibration_0/m_axi_d_hbm_p1] [get_bd_intf_pins smartconnect_2/S01_AXI] connect_bd_intf_net -intf_net mailbox_0_M1_AXIS [get_bd_intf_pins axis_work_request_fifo_0/S_AXIS] [get_bd_intf_pins mailbox_0/M1_AXIS] connect_bd_intf_net -intf_net network_stack_udp_addr_out [get_bd_intf_pins axis_udp_addr_fifo_0/S_AXIS] [get_bd_intf_pins network_stack/udp_addr_out] connect_bd_intf_net -intf_net network_stack_udp_out [get_bd_intf_pins axis_udp_fifo_0/S_AXIS] [get_bd_intf_pins network_stack/udp_out] @@ -440,8 +448,10 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_intf_net -intf_net smartconnect_0_M01_AXI [get_bd_intf_pins mailbox_0/S0_AXI] [get_bd_intf_pins smartconnect_0/M01_AXI] connect_bd_intf_net -intf_net smartconnect_0_M02_AXI [get_bd_intf_pins axi_bram_ctrl_calibration_addr/S_AXI] [get_bd_intf_pins smartconnect_0/M02_AXI] connect_bd_intf_net -intf_net smartconnect_0_M03_AXI [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_0/S_AXI] [get_bd_intf_pins smartconnect_0/M03_AXI] - connect_bd_intf_net -intf_net timer_hbm_0_data_out [get_bd_intf_pins axis_data_fifo_3/S_AXIS] [get_bd_intf_pins timer_hbm_0/data_out] - connect_bd_intf_net -intf_net timer_host_0_data_out [get_bd_intf_pins axis_register_slice_data_1/S_AXIS] [get_bd_intf_pins timer_host_0/data_out] + connect_bd_intf_net -intf_net smartconnect_1_M00_AXI [get_bd_intf_pins m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/M00_AXI] + connect_bd_intf_net -intf_net smartconnect_2_M00_AXI [get_bd_intf_pins m_axi_d_hbm_p2] [get_bd_intf_pins smartconnect_2/M00_AXI] + connect_bd_intf_net -intf_net timer_hbm_data_out [get_bd_intf_pins axis_data_fifo_3/S_AXIS] [get_bd_intf_pins timer_hbm/data_out] + connect_bd_intf_net -intf_net timer_host_data_out [get_bd_intf_pins axis_register_slice_data_1/S_AXIS] [get_bd_intf_pins timer_host/data_out] # Create port connections connect_bd_net -net action_config_0_clear_counters [get_bd_pins action_config_0/clear_counters] [get_bd_pins network_stack/clear_counters] @@ -455,7 +465,7 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net action_config_0_nmodules [get_bd_pins action_config_0/nmodules] [get_bd_pins data_collection_fsm_0/nmodules] connect_bd_net -net action_config_0_nstorage_cells [get_bd_pins action_config_0/nstorage_cells] [get_bd_pins data_collection_fsm_0/nstorage_cells] connect_bd_net -net action_config_0_one_over_energy [get_bd_pins action_config_0/one_over_energy] [get_bd_pins data_collection_fsm_0/one_over_energy] - connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins internal_packet_generator_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins timer_hbm_0/ap_clk] [get_bd_pins timer_host_0/ap_clk] + connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins internal_packet_generator_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins smartconnect_1/aclk] [get_bd_pins smartconnect_2/aclk] [get_bd_pins timer_hbm/ap_clk] [get_bd_pins timer_host/ap_clk] connect_bd_net -net axis_addr_fifo_2_almost_empty [get_bd_pins action_config_0/calib_addr_fifo_empty] [get_bd_pins axis_addr_fifo_1/almost_empty] connect_bd_net -net axis_addr_fifo_2_almost_full [get_bd_pins action_config_0/calib_addr_fifo_full] [get_bd_pins axis_addr_fifo_1/almost_full] connect_bd_net -net axis_addr_fifo_4_almost_empty [get_bd_pins action_config_0/last_addr_fifo_empty] [get_bd_pins axis_addr_fifo_2/almost_empty] @@ -494,12 +504,12 @@ proc create_hier_cell_jungfraujoch { parentCell nameHier } { connect_bd_net -net network_stack_packets_sls_ap_vld [get_bd_pins action_config_0/packets_sls_valid] [get_bd_pins network_stack/packets_sls_ap_vld] connect_bd_net -net network_stack_packets_udp [get_bd_pins action_config_0/packets_udp] [get_bd_pins network_stack/packets_udp] connect_bd_net -net network_stack_packets_udp_ap_vld [get_bd_pins action_config_0/packets_udp_valid] [get_bd_pins network_stack/packets_udp_ap_vld] - connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_addr_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_5/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_0/aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_0/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] - connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins internal_packet_generator_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins timer_hbm_0/ap_rst_n] [get_bd_pins timer_host_0/ap_rst_n] - connect_bd_net -net timer_hbm_0_counter [get_bd_pins action_config_0/stalls_hbm] [get_bd_pins timer_hbm_0/counter] - connect_bd_net -net timer_hbm_0_counter_ap_vld [get_bd_pins action_config_0/stalls_hbm_valid] [get_bd_pins timer_hbm_0/counter_ap_vld] - connect_bd_net -net timer_host_0_counter [get_bd_pins action_config_0/stalls_host] [get_bd_pins timer_host_0/counter] - connect_bd_net -net timer_host_0_counter_ap_vld [get_bd_pins action_config_0/stalls_host_valid] [get_bd_pins timer_host_0/counter_ap_vld] + connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_addr_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_5/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_0/aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_0/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] [get_bd_pins smartconnect_1/aresetn] [get_bd_pins smartconnect_2/aresetn] + connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins internal_packet_generator_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins timer_hbm/ap_rst_n] [get_bd_pins timer_host/ap_rst_n] + connect_bd_net -net timer_hbm_counter [get_bd_pins action_config_0/stalls_hbm] [get_bd_pins timer_hbm/counter] + connect_bd_net -net timer_hbm_counter_ap_vld [get_bd_pins action_config_0/stalls_hbm_valid] [get_bd_pins timer_hbm/counter_ap_vld] + connect_bd_net -net timer_host_counter [get_bd_pins action_config_0/stalls_host] [get_bd_pins timer_host/counter] + connect_bd_net -net timer_host_counter_ap_vld [get_bd_pins action_config_0/stalls_host_valid] [get_bd_pins timer_host/counter_ap_vld] # Restore current instance current_bd_instance $oldCurInst diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index 8d98d8f2..77991a10 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -277,7 +277,11 @@ void HLSSimulatedDevice::HLSMainThread() { }); // Load external calibration - hls_cores.emplace_back([&] { load_calibration(raw1, raw2, datamover_in.GetCtrlStream(), datamover_in.GetDataStream(), + hls_cores.emplace_back([&] { load_calibration(raw1, raw2, + hbm.data(), + hbm.data(), + datamover_in.GetCtrlStream(), + datamover_in.GetDataStream(), calibration_addr_bram); }); // Generate internal packets @@ -286,7 +290,7 @@ void HLSSimulatedDevice::HLSMainThread() { cancel_data_collection); }); // Timer procedure - count how many times pedestal_corr/gain_corr is not accepting input (to help track down latency issues) - hls_cores.emplace_back([&] { timer_hbm(raw3, raw4, counter_hbm); }); + hls_cores.emplace_back([&] { timer_host(raw3, raw4, counter_hbm); }); // 2. Apply pedestal & gain corrections hls_cores.emplace_back([&] { jf_conversion(raw4, converted_1, From 2b29381f87858d6f8a54d7ee348e53ec2d124e75 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 12 Sep 2023 08:16:44 +0200 Subject: [PATCH 200/224] FPGA: update in timer code --- fpga/hls/timer.cpp | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/fpga/hls/timer.cpp b/fpga/hls/timer.cpp index 78ea1d97..8973c2e2 100644 --- a/fpga/hls/timer.cpp +++ b/fpga/hls/timer.cpp @@ -16,17 +16,16 @@ void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, uint64_t &counter) { data_out << packet_in; data_in >> packet_in; - while (!packet_in.user) { -#pragma HLS PIPELINE +#pragma HLS PIPELINE II=1 if (data_out.full()) { if (counter_internal < UINT64_MAX) counter_internal++; - counter = counter_internal; } else { data_out << packet_in; data_in >> packet_in; } + counter = counter_internal; } data_out << packet_in; } From 7a635f1ee817d9adb53dc7809f013300750a06a0 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 12 Sep 2023 09:16:45 +0200 Subject: [PATCH 201/224] FPGA: load_calibration clean-up + simplification --- common/Definitions.h | 2 +- fpga/hls/load_calibration.cpp | 55 +++++++++++++----------------- receiver/FPGAAcquisitionDevice.cpp | 20 +++++------ 3 files changed, 34 insertions(+), 43 deletions(-) diff --git a/common/Definitions.h b/common/Definitions.h index e9886dcf..0ec88938 100644 --- a/common/Definitions.h +++ b/common/Definitions.h @@ -50,7 +50,7 @@ // For FPGA #define ACTION_TYPE 0x52324158 -#define RELEASE_LEVEL 0x003A +#define RELEASE_LEVEL 0x003B #define MODE_CONV 0x0001L #define MODE_INTERNAL_PACKET_GEN 0x0002L diff --git a/fpga/hls/load_calibration.cpp b/fpga/hls/load_calibration.cpp index a5b6a167..a5d6a3e5 100644 --- a/fpga/hls/load_calibration.cpp +++ b/fpga/hls/load_calibration.cpp @@ -36,50 +36,41 @@ void load_calibration(STREAM_512 &data_in, STREAM_512 &data_out, ap_uint<32> hbm_size_256b = ACT_REG_HBM_SIZE_256b(packet_in.data); if (conversion) { - read_gain: + ap_uint<16> addr = 0; for (int c = 0; c < 3; c++) { - // 3 gain levels - for (int m = 0; m < modules; m++) { - - size_t offset_hbm_0 = (2 * c) * hbm_size_256b + m * RAW_MODULE_SIZE * sizeof(int16_t) / 64; - size_t offset_hbm_1 = (2 * c + 1) * hbm_size_256b + m * RAW_MODULE_SIZE * sizeof(int16_t) / 64; - - setup_datamover(datamover_in_cmd, in_mem_location[m + c * modules + 1], - RAW_MODULE_SIZE * sizeof(int16_t)); - for (int i = 0; i < RAW_MODULE_SIZE * sizeof(int16_t) / 64; i++) { + size_t offset_hbm_0 = (2 * c) * hbm_size_256b; + size_t offset_hbm_1 = (2 * c + 1) * hbm_size_256b; + read_gain: + for (int i = 0; i < modules * RAW_MODULE_SIZE * sizeof(int16_t) / 64; i++) { #pragma HLS PIPELINE II=1 - ap_axiu<512, 1, 1, 1> data_packet; - host_memory_in >> data_packet; - - d_hbm_p0[offset_hbm_0 + i] = data_packet.data(255, 0); - d_hbm_p1[offset_hbm_1 + i] = data_packet.data(511, 256); + if (i % (RAW_MODULE_SIZE * sizeof(uint16_t) / 64) == 0) { + setup_datamover(datamover_in_cmd, in_mem_location[addr], RAW_MODULE_SIZE * sizeof(int16_t)); + addr++; } + ap_axiu<512, 1, 1, 1> data_packet; + host_memory_in >> data_packet; + d_hbm_p0[offset_hbm_0 + i] = data_packet.data(255, 0); + d_hbm_p1[offset_hbm_1 + i] = data_packet.data(511, 256); } } read_pedestal: for (int c = 0; c < 3; c++) { - ap_uint<16> offset = (c * 16 + 3) * modules + 1; - for (int s = 0; s < storage_cells; s++) { - for (int m = 0; m < modules; m++) { - size_t offset_hbm_0 = (6 + 2 * c) * hbm_size_256b - + (s * modules + m) * RAW_MODULE_SIZE * sizeof(int16_t) / 64; - size_t offset_hbm_1 = (6 + 2 * c + 1) * hbm_size_256b - + (s * modules + m) * RAW_MODULE_SIZE * sizeof(int16_t) / 64; + size_t offset_hbm_0 = (6 + 2 * c) * hbm_size_256b; + size_t offset_hbm_1 = (6 + 2 * c + 1) * hbm_size_256b; - setup_datamover(datamover_in_cmd, in_mem_location[offset + s * modules + m], - RAW_MODULE_SIZE * sizeof(int16_t)); - - for (int i = 0; i < RAW_MODULE_SIZE * sizeof(int16_t) / 64; i++) { + for (int i = 0; i < storage_cells * modules * RAW_MODULE_SIZE * sizeof(int16_t) / 64; i++) { #pragma HLS PIPELINE II=1 - ap_axiu<512, 1, 1, 1> data_packet; - host_memory_in >> data_packet; - - d_hbm_p0[offset_hbm_0 + i] = data_packet.data(255, 0); - d_hbm_p1[offset_hbm_1 + i] = data_packet.data(511, 256); - } + if (i % (RAW_MODULE_SIZE * sizeof(uint16_t) / 64) == 0) { + setup_datamover(datamover_in_cmd, in_mem_location[addr], RAW_MODULE_SIZE * sizeof(int16_t)); + addr++; } + ap_axiu<512, 1, 1, 1> data_packet; + host_memory_in >> data_packet; + + d_hbm_p0[offset_hbm_0 + i] = data_packet.data(255, 0); + d_hbm_p1[offset_hbm_1 + i] = data_packet.data(511, 256); } } } diff --git a/receiver/FPGAAcquisitionDevice.cpp b/receiver/FPGAAcquisitionDevice.cpp index 05d23efe..36c089ad 100644 --- a/receiver/FPGAAcquisitionDevice.cpp +++ b/receiver/FPGAAcquisitionDevice.cpp @@ -67,14 +67,14 @@ void FPGAAcquisitionDevice::InitializeCalibration(const DiffractionExperiment &e size_t modules = experiment.GetModulesNum(data_stream); - if (1 + modules * (3 + 3 * experiment.GetStorageCellNumber()) > buffer_device.size()) + if (modules * (3 + 3 * experiment.GetStorageCellNumber()) > buffer_device.size()) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Not enough host/FPGA buffers to load all calibration constants"); for (int m = 0; m < modules; m++) { - calib.GainCalibration(m).ExportG0(buffer_device[1 + m]); - calib.GainCalibration(m).ExportG1(buffer_device[1 + m + modules]); - calib.GainCalibration(m).ExportG2(buffer_device[1 + m + modules * 2]); + calib.GainCalibration(m).ExportG0(buffer_device[m]); + calib.GainCalibration(m).ExportG1(buffer_device[m + modules]); + calib.GainCalibration(m).ExportG2(buffer_device[m + modules * 2]); } for (int s = 0; s < experiment.GetStorageCellNumber(); s++) { @@ -85,13 +85,13 @@ void FPGAAcquisitionDevice::InitializeCalibration(const DiffractionExperiment &e auto pedestal_g2 = calib.Pedestal(offset + m, 2, s).GetPedestal(); for (int i = 0; i < RAW_MODULE_SIZE; i++) { if (experiment.GetApplyPixelMaskInFPGA() && (mask[(offset + m) * RAW_MODULE_SIZE + i] != 0)) { - buffer_device[1 + m + (3 + 0 * 16 + s) * modules][i] = 16384; - buffer_device[1 + m + (3 + 1 * 16 + s) * modules][i] = 16384; - buffer_device[1 + m + (3 + 2 * 16 + s) * modules][i] = 16384; + buffer_device[m + (3 + 0 * experiment.GetStorageCellNumber() + s) * modules][i] = 16384; + buffer_device[m + (3 + 1 * experiment.GetStorageCellNumber() + s) * modules][i] = 16384; + buffer_device[m + (3 + 2 * experiment.GetStorageCellNumber() + s) * modules][i] = 16384; } else { - buffer_device[1 + m + (3 + 0 * 16 + s) * modules][i] = pedestal_g0[i]; - buffer_device[1 + m + (3 + 1 * 16 + s) * modules][i] = pedestal_g1[i]; - buffer_device[1 + m + (3 + 2 * 16 + s) * modules][i] = pedestal_g2[i]; + buffer_device[m + (3 + 0 * experiment.GetStorageCellNumber() + s) * modules][i] = pedestal_g0[i]; + buffer_device[m + (3 + 1 * experiment.GetStorageCellNumber() + s) * modules][i] = pedestal_g1[i]; + buffer_device[m + (3 + 2 * experiment.GetStorageCellNumber() + s) * modules][i] = pedestal_g2[i]; } } From 9d01630cfc18cd2e100dbcb5a3ff7f1d7afb1822 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 12 Sep 2023 14:34:42 +0200 Subject: [PATCH 202/224] FPGA: load calibration works as dedicated function of the card --- fpga/hls/hls_jfjoch.h | 6 +- fpga/hls/load_calibration.cpp | 97 +++++++++++++----------------- fpga/pcie_driver/jfjoch_drv.c | 5 -- fpga/pcie_driver/jfjoch_drv.h | 10 ++- fpga/pcie_driver/jfjoch_function.c | 36 +++++++++++ fpga/pcie_driver/jfjoch_ioctl.c | 4 ++ fpga/pcie_driver/jfjoch_ioctl.h | 1 + fpga/pcie_driver/jfjoch_memory.c | 19 ------ fpga/scripts/bd_pcie.tcl | 4 +- fpga/scripts/jfjoch.tcl | 79 +++++++----------------- receiver/FPGAAcquisitionDevice.cpp | 18 +++--- receiver/FPGAAcquisitionDevice.h | 1 + receiver/HLSSimulatedDevice.cpp | 52 +++++++++------- receiver/HLSSimulatedDevice.h | 1 + receiver/PCIExpressDevice.cpp | 12 +++- receiver/PCIExpressDevice.h | 1 + tests/FPGAIntegrationTest.cpp | 2 + 17 files changed, 177 insertions(+), 171 deletions(-) diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index dd43e7d4..c98fbf1b 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -101,9 +101,11 @@ void data_collection_fsm(AXI_STREAM ð_in, ap_uint<4> nstorage_cells, ap_uint<32> hbm_size_bytes); -void load_calibration(STREAM_512 &data_in, STREAM_512 &data_out, - ap_uint<256> *d_hbm_p0, +void load_calibration(ap_uint<256> *d_hbm_p0, ap_uint<256> *d_hbm_p1, + ap_uint<8> modules, + ap_uint<5> storage_cells, + ap_uint<32> hbm_size_bytes, hls::stream &datamover_in_cmd, hls::stream > &host_memory_in, uint64_t in_mem_location[LOAD_CALIBRATION_BRAM_SIZE]); diff --git a/fpga/hls/load_calibration.cpp b/fpga/hls/load_calibration.cpp index a5d6a3e5..67d1df3f 100644 --- a/fpga/hls/load_calibration.cpp +++ b/fpga/hls/load_calibration.cpp @@ -9,79 +9,68 @@ // * gain factors for module m at location: 2 + gain level * NMODULES + m // * pedestal factors for module m and storage cell s at location: 2 + 3 * NMODULES + (gain level * 16 + s ) * NMODULES + m -void load_calibration(STREAM_512 &data_in, STREAM_512 &data_out, - ap_uint<256> *d_hbm_p0, +void load_calibration(ap_uint<256> *d_hbm_p0, ap_uint<256> *d_hbm_p1, + ap_uint<8> modules, + ap_uint<5> storage_cells, + ap_uint<32> hbm_size_bytes, hls::stream &datamover_in_cmd, hls::stream > &host_memory_in, - uint64_t in_mem_location[LOAD_CALIBRATION_BRAM_SIZE]) { -#pragma HLS INTERFACE ap_ctrl_none port=return + uint64_t in_mem_location[(3 * 16 + 3) * MAX_MODULES_FPGA]) { +#pragma HLS INTERFACE mode=s_axilite port=return +#pragma HLS INTERFACE mode=s_axilite port=in_mem_location #pragma HLS INTERFACE register both axis port=datamover_in_cmd #pragma HLS INTERFACE register both axis port=host_memory_in -#pragma HLS INTERFACE register both axis port=data_in -#pragma HLS INTERFACE register both axis port=data_out -#pragma HLS INTERFACE bram port=in_mem_location storage_type=rom_1p + +#pragma HLS INTERFACE mode=s_axilite port=modules +#pragma HLS INTERFACE mode=s_axilite port=storage_cells +#pragma HLS INTERFACE mode=ap_none port=hbm_size_bytes #pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=off \ max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 #pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=off \ max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 - packet_512_t packet_in; + if (storage_cells > 16) + return; + if (modules > MAX_MODULES_FPGA) + return; - data_in >> packet_in; - ap_uint<5> modules = ACT_REG_NMODULES(packet_in.data); - ap_uint<5> storage_cells = ACT_REG_NSTORAGE_CELLS(packet_in.data); - ap_uint<1> conversion = (ACT_REG_MODE(packet_in.data) & MODE_CONV) ? 1 : 0; - ap_uint<32> hbm_size_256b = ACT_REG_HBM_SIZE_256b(packet_in.data); - - if (conversion) { - ap_uint<16> addr = 0; - for (int c = 0; c < 3; c++) { - size_t offset_hbm_0 = (2 * c) * hbm_size_256b; - size_t offset_hbm_1 = (2 * c + 1) * hbm_size_256b; - read_gain: - for (int i = 0; i < modules * RAW_MODULE_SIZE * sizeof(int16_t) / 64; i++) { + ap_uint<16> addr = 0; + for (int c = 0; c < 3; c++) { + size_t offset_hbm_0 = (2 * c) * hbm_size_bytes / 32; + size_t offset_hbm_1 = (2 * c + 1) * hbm_size_bytes / 32; + read_gain: + for (int i = 0; i < modules * RAW_MODULE_SIZE * sizeof(int16_t) / 64; i++) { #pragma HLS PIPELINE II=1 - if (i % (RAW_MODULE_SIZE * sizeof(uint16_t) / 64) == 0) { - setup_datamover(datamover_in_cmd, in_mem_location[addr], RAW_MODULE_SIZE * sizeof(int16_t)); - addr++; - } - ap_axiu<512, 1, 1, 1> data_packet; - host_memory_in >> data_packet; - - d_hbm_p0[offset_hbm_0 + i] = data_packet.data(255, 0); - d_hbm_p1[offset_hbm_1 + i] = data_packet.data(511, 256); + if (i % (RAW_MODULE_SIZE * sizeof(uint16_t) / 64) == 0) { + setup_datamover(datamover_in_cmd, in_mem_location[addr], RAW_MODULE_SIZE * sizeof(int16_t)); + addr++; } - } + ap_axiu<512, 1, 1, 1> data_packet; + host_memory_in >> data_packet; - read_pedestal: - for (int c = 0; c < 3; c++) { - size_t offset_hbm_0 = (6 + 2 * c) * hbm_size_256b; - size_t offset_hbm_1 = (6 + 2 * c + 1) * hbm_size_256b; - - for (int i = 0; i < storage_cells * modules * RAW_MODULE_SIZE * sizeof(int16_t) / 64; i++) { -#pragma HLS PIPELINE II=1 - if (i % (RAW_MODULE_SIZE * sizeof(uint16_t) / 64) == 0) { - setup_datamover(datamover_in_cmd, in_mem_location[addr], RAW_MODULE_SIZE * sizeof(int16_t)); - addr++; - } - ap_axiu<512, 1, 1, 1> data_packet; - host_memory_in >> data_packet; - - d_hbm_p0[offset_hbm_0 + i] = data_packet.data(255, 0); - d_hbm_p1[offset_hbm_1 + i] = data_packet.data(511, 256); - } + d_hbm_p0[offset_hbm_0 | i] = data_packet.data(255, 0); + d_hbm_p1[offset_hbm_1 | i] = data_packet.data(511, 256); } } - data_out << packet_in; + read_pedestal: + for (int c = 0; c < 3; c++) { + size_t offset_hbm_0 = (6 + 2 * c) * hbm_size_bytes / 32; + size_t offset_hbm_1 = (6 + 2 * c + 1) * hbm_size_bytes / 32; - data_in >> packet_in; - while (!packet_in.user) { + for (int i = 0; i < modules * storage_cells * RAW_MODULE_SIZE * sizeof(int16_t) / 64; i++) { #pragma HLS PIPELINE II=1 - data_out << packet_in; - data_in >> packet_in; + if (i % (RAW_MODULE_SIZE * sizeof(uint16_t) / 64) == 0) { + setup_datamover(datamover_in_cmd, in_mem_location[addr], RAW_MODULE_SIZE * sizeof(int16_t)); + addr++; + } + ap_axiu<512, 1, 1, 1> data_packet; + host_memory_in >> data_packet; + + d_hbm_p0[offset_hbm_0 | i] = data_packet.data(255, 0); + d_hbm_p1[offset_hbm_1 | i] = data_packet.data(511, 256); + } } - data_out << packet_in; } diff --git a/fpga/pcie_driver/jfjoch_drv.c b/fpga/pcie_driver/jfjoch_drv.c index 21e6fbd9..bfb846d4 100644 --- a/fpga/pcie_driver/jfjoch_drv.c +++ b/fpga/pcie_driver/jfjoch_drv.c @@ -82,10 +82,6 @@ static int jfjoch_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id drvdata->git_sha1 = status.git_sha1; drvdata->max_modules = status.max_modules; - err = jfjoch_setup_calibration(pdev); - if (err) - goto deregister_misc; - jfjoch_setup_cms(drvdata); jfjoch_setup_network(drvdata); @@ -114,7 +110,6 @@ void jfjoch_reset(struct jfjoch_drvdata *drvdata) { pci_reset_function(drvdata->pdev); jfjoch_setup_cms(drvdata); - jfjoch_setup_calibration(drvdata->pdev); dev_info(drvdata->miscdev.this_device, "Jungfraujoch FPGA restarted"); } diff --git a/fpga/pcie_driver/jfjoch_drv.h b/fpga/pcie_driver/jfjoch_drv.h index 181e5717..fed30437 100644 --- a/fpga/pcie_driver/jfjoch_drv.h +++ b/fpga/pcie_driver/jfjoch_drv.h @@ -37,12 +37,18 @@ // Offset for BAR #0 for action configuration #define ACTION_CONFIG_OFFSET (0x010000) #define MAILBOX_OFFSET (0x030000) -#define CALIB_BRAM_OFFSET (0x060000) +#define LOAD_CALIBRATION_OFFSET (0x060000) #define CMS_OFFSET (0x0C0000) #define CMAC_OFFSET (0x020000) #define PCIE_OFFSET (0x090000) #define INT_PKT_GEN_OFFSET (0x100000) +#define ADDR_LOAD_CALIBRATION_CTRL (0x000000) +#define ADDR_LOAD_CALIBRATION_MOD (0x000010) +#define ADDR_LOAD_CALIBRATION_SC (0x000018) +#define ADDR_LOAD_CALIBRATION_MEM (0x002000) + + #define ADDR_CMS_CONTROL_REG 0x028018 #define ADDR_CMS_MB_RESETN_REG 0x020000 #define ADDR_CMS_FPGA_TEMP_INS_REG 0x028100 // in C @@ -86,7 +92,6 @@ int jfjoch_cdev_mmap(struct file *file, struct vm_area_struct *vma); int jfjoch_cdev_release(struct inode *inode, struct file *file); int jfjoch_cdev_open(struct inode *inode, struct file *file); -int jfjoch_setup_calibration(struct pci_dev *pdev); void jfjoch_setup_cms(struct jfjoch_drvdata *drvdata); void jfjoch_setup_network(struct jfjoch_drvdata *drvdata); @@ -105,6 +110,7 @@ void jfjoch_set_ipv4_addr(struct jfjoch_drvdata *drvdata, const u32 *addr); void jfjoch_get_ipv4_addr(struct jfjoch_drvdata *drvdata, u32 *addr); void jfjoch_load_int_pkt_gen(struct jfjoch_drvdata *drvdata, char* output); void jfjoch_save_int_pkt_gen(struct jfjoch_drvdata *drvdata, const char* input); +int jfjoch_load_calibration(struct jfjoch_drvdata *drvdata, struct ActionConfig *config); u64 jfjoch_read_mac_addr(struct jfjoch_drvdata *drvdata); diff --git a/fpga/pcie_driver/jfjoch_function.c b/fpga/pcie_driver/jfjoch_function.c index 743afa96..95f77080 100644 --- a/fpga/pcie_driver/jfjoch_function.c +++ b/fpga/pcie_driver/jfjoch_function.c @@ -294,4 +294,40 @@ void jfjoch_get_env_data(struct jfjoch_drvdata *drvdata, struct ActionEnvParams void jfjoch_clr_net_counters(struct jfjoch_drvdata *drvdata) { iowrite32(1 << 3, drvdata->bar0 + ACTION_CONFIG_OFFSET); iowrite32(0, drvdata->bar0 + ACTION_CONFIG_OFFSET); +} + +int jfjoch_load_calibration(struct jfjoch_drvdata *drvdata, struct ActionConfig *config) { + struct device *const dev = &drvdata->pdev->dev; + u32 i; + u32 cell_count = config->nmodules * (3 + 3 * config->nstorage_cells); + + if (cell_count > drvdata->nbuf) { + dev_err(dev, "Not enough buffers to support this card\n"); + return -EINVAL; + } + + for (i = 0; i < cell_count; i++) { + u64 addr = drvdata->bufs[i].dma_address; + iowrite32(PCI_DMA_L(addr), drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_MEM + i * 2 * 4); + iowrite32(PCI_DMA_H(addr), drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_MEM + (i * 2 + 1) * 4); + } + + iowrite32(config->nmodules, drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_MOD); + iowrite32(config->nstorage_cells, drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_SC); + iowrite32(0x1, drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_CTRL); + + i = 0; + while (i < 1000) { + if (ioread32(drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_CTRL) & (1 << 1)) + break; + msleep(10); + i++; + } + + if (i == 1000) { + dev_err(dev, "Load calibration didn't finish in 10 seconds\n"); + return -ETIMEDOUT; + } + + return 0; } \ No newline at end of file diff --git a/fpga/pcie_driver/jfjoch_ioctl.c b/fpga/pcie_driver/jfjoch_ioctl.c index bad7b9cc..d66db572 100644 --- a/fpga/pcie_driver/jfjoch_ioctl.c +++ b/fpga/pcie_driver/jfjoch_ioctl.c @@ -38,6 +38,10 @@ long jfjoch_cdev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { return -EFAULT; jfjoch_set_config(drvdata, &config); return 0; + case IOCTL_JFJOCH_LOAD_CALIB: + if (copy_from_user(&config, (char *) arg, sizeof(struct ActionConfig)) != 0) + return -EFAULT; + return jfjoch_load_calibration(drvdata, &config); case IOCTL_JFJOCH_GET_ENV_DATA: jfjoch_get_env_data(drvdata, &env_params); if (copy_to_user((char *) arg, &env_params, sizeof(struct ActionEnvParams)) != 0) diff --git a/fpga/pcie_driver/jfjoch_ioctl.h b/fpga/pcie_driver/jfjoch_ioctl.h index c85f70ef..5ccdfed2 100644 --- a/fpga/pcie_driver/jfjoch_ioctl.h +++ b/fpga/pcie_driver/jfjoch_ioctl.h @@ -35,5 +35,6 @@ #define IOCTL_JFJOCH_GET_IPV4 _IOR(IOCTL_JFJOCH_MAGIC, 18, uint32_t) #define IOCTL_JFJOCH_SET_INT_PKT _IOW(IOCTL_JFJOCH_MAGIC, 19, char *) #define IOCTL_JFJOCH_GET_INT_PKT _IOR(IOCTL_JFJOCH_MAGIC, 20, char *) +#define IOCTL_JFJOCH_LOAD_CALIB _IOW(IOCTL_JFJOCH_MAGIC, 21, struct ActionConfig) #endif //JUNGFRAUJOCH_JFJOCH_IOCTL_H diff --git a/fpga/pcie_driver/jfjoch_memory.c b/fpga/pcie_driver/jfjoch_memory.c index b6f2e1c2..7558888d 100644 --- a/fpga/pcie_driver/jfjoch_memory.c +++ b/fpga/pcie_driver/jfjoch_memory.c @@ -53,25 +53,6 @@ void jfjoch_free_phys_continous_buf(struct pci_dev *pdev) { kfree(drvdata->bufs); } -int jfjoch_setup_calibration(struct pci_dev *pdev) { - struct jfjoch_drvdata *drvdata = pci_get_drvdata(pdev); - u32 i; - u32 cell_count = drvdata->max_modules * (3 + 3 * 16) + 1; - - if ((cell_count > nbuffer) || (cell_count >= LOAD_CALIBRATION_BRAM_SIZE)) { - dev_err(&pdev->dev, "Not enough buffers to support this card\n"); - return -EINVAL; - } - - for (i = 0; i < cell_count; i++) { - u64 addr = drvdata->bufs[i].dma_address; - iowrite32(PCI_DMA_L(addr), drvdata->bar0 + CALIB_BRAM_OFFSET + i * 2 * 4); - iowrite32(PCI_DMA_H(addr), drvdata->bar0 + CALIB_BRAM_OFFSET + (i * 2 + 1) * 4); - } - - return 0; -} - int jfjoch_cdev_mmap(struct file *file, struct vm_area_struct *vma) { unsigned long offset, buffer_number, len; diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index aa812ca7..be36695f 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -146,10 +146,10 @@ xilinx.com:ip:hbm:1.0\ xilinx.com:ip:axi_bram_ctrl:4.1\ xilinx.com:ip:axis_data_fifo:2.0\ xilinx.com:ip:axis_register_slice:1.1\ -xilinx.com:ip:blk_mem_gen:8.4\ psi.ch:hls:data_collection_fsm:1.0\ psi.ch:hls:host_writer:1.0\ psi.ch:hls:internal_packet_generator:1.0\ +xilinx.com:ip:blk_mem_gen:8.4\ psi.ch:hls:jf_conversion:1.0\ psi.ch:hls:load_calibration:1.0\ xilinx.com:ip:mailbox:2.1\ @@ -435,7 +435,7 @@ proc create_root_design { parentCell } { assign_bd_address -offset 0x00030000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/mailbox_0/S0_AXI/Reg] -force assign_bd_address -offset 0x00040000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs axi_quad_spi_0/AXI_LITE/Reg] -force assign_bd_address -offset 0x00050000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs axi_intc_0/S_AXI/Reg] -force - assign_bd_address -offset 0x00060000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_calibration_addr/S_AXI/Mem0] -force + assign_bd_address -offset 0x00060000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/load_calibration_0/s_axi_control/Reg] -force assign_bd_address -offset 0x00070000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/axi_firewall_0/S_AXI_CTL/Control] -force assign_bd_address -offset 0x00090000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/xdma_0/S_AXI_LITE/CTL0] -force assign_bd_address -offset 0x000C0000 -range 0x00040000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs cms_subsystem_0/s_axi_ctrl/Mem] -force diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index 037f94ec..b0d60acc 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -2,9 +2,9 @@ ## SPDX-License-Identifier: CERN-OHL-S-2.0 # Hierarchical cell: jungfraujoch -proc create_hier_cell_jungfraujoch { parentCell nameHier } { +proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { -variable script_folder + variable script_folder if { $parentCell eq "" || $nameHier eq "" } { catch {common::send_gid_msg -ssname BD::TCL -id 2092 -severity "ERROR" "create_hier_cell_jungfraujoch_0() - Empty argument(s)!"} @@ -95,14 +95,6 @@ variable script_folder CONFIG.MAX_MODULES_FPGA_PARAM {0x00000010} \ ] $action_config_0 - # Create instance: axi_bram_ctrl_calibration_addr, and set properties - set axi_bram_ctrl_calibration_addr [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_calibration_addr ] - set_property -dict [ list \ - CONFIG.PROTOCOL {AXI4LITE} \ - CONFIG.READ_LATENCY {1} \ - CONFIG.SINGLE_PORT_BRAM {1} \ - ] $axi_bram_ctrl_calibration_addr - # Create instance: axi_bram_ctrl_internal_packet_generator_0, and set properties set axi_bram_ctrl_internal_packet_generator_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.1 axi_bram_ctrl_internal_packet_generator_0 ] set_property -dict [ list \ @@ -165,6 +157,8 @@ variable script_folder set_property -dict [ list \ CONFIG.FIFO_DEPTH {256} \ CONFIG.FIFO_MEMORY_TYPE {block} \ + CONFIG.HAS_AEMPTY {1} \ + CONFIG.HAS_AFULL {1} \ ] $axis_data_fifo_2 # Create instance: axis_data_fifo_3, and set properties @@ -172,25 +166,16 @@ variable script_folder set_property -dict [ list \ CONFIG.FIFO_DEPTH {256} \ CONFIG.FIFO_MEMORY_TYPE {block} \ - CONFIG.HAS_AEMPTY {1} \ - CONFIG.HAS_AFULL {1} \ ] $axis_data_fifo_3 # Create instance: axis_data_fifo_4, and set properties set axis_data_fifo_4 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_4 ] - set_property -dict [ list \ - CONFIG.FIFO_DEPTH {256} \ - CONFIG.FIFO_MEMORY_TYPE {block} \ - ] $axis_data_fifo_4 - - # Create instance: axis_data_fifo_5, and set properties - set axis_data_fifo_5 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_5 ] set_property -dict [ list \ CONFIG.FIFO_DEPTH {32768} \ CONFIG.FIFO_MEMORY_TYPE {ultra} \ CONFIG.HAS_AEMPTY {1} \ CONFIG.HAS_AFULL {1} \ - ] $axis_data_fifo_5 + ] $axis_data_fifo_4 # Create instance: axis_data_fifo_c2h_cmd, and set properties set axis_data_fifo_c2h_cmd [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_c2h_cmd ] @@ -302,20 +287,6 @@ variable script_folder CONFIG.HAS_PROG_FULL {0} \ ] $axis_work_request_fifo_0 - # Create instance: calibration_addr_bram, and set properties - set calibration_addr_bram [ create_bd_cell -type ip -vlnv xilinx.com:ip:blk_mem_gen:8.4 calibration_addr_bram ] - set_property -dict [ list \ - CONFIG.Assume_Synchronous_Clk {true} \ - CONFIG.Enable_B {Use_ENB_Pin} \ - CONFIG.Memory_Type {True_Dual_Port_RAM} \ - CONFIG.Port_A_Write_Rate {50} \ - CONFIG.Port_B_Clock {100} \ - CONFIG.Port_B_Enable_Rate {100} \ - CONFIG.Port_B_Write_Rate {50} \ - CONFIG.Use_Byte_Write_Enable {true} \ - CONFIG.Use_RSTB_Pin {true} \ - ] $calibration_addr_bram - # Create instance: data_collection_fsm_0, and set properties set data_collection_fsm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:data_collection_fsm:1.0 data_collection_fsm_0 ] @@ -386,27 +357,25 @@ variable script_folder connect_bd_intf_net -intf_net Conn2 [get_bd_intf_pins eth_out] [get_bd_intf_pins network_stack/M00_AXIS] connect_bd_intf_net -intf_net Conn3 [get_bd_intf_pins eth_in] [get_bd_intf_pins network_stack/eth_in] connect_bd_intf_net -intf_net S_AXIS_1 [get_bd_intf_pins s_axis_h2c_data] [get_bd_intf_pins axis_data_fifo_h2c_data/S_AXIS] - connect_bd_intf_net -intf_net axi_bram_ctrl_0_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_calibration_addr/BRAM_PORTA] [get_bd_intf_pins calibration_addr_bram/BRAM_PORTB] connect_bd_intf_net -intf_net axi_bram_ctrl_internal_packet_generator_1_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_1/BRAM_PORTA] [get_bd_intf_pins internal_packet_generator_uram/BRAM_PORTB] connect_bd_intf_net -intf_net axi_bram_ctrl_internal_packet_generator_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_0/BRAM_PORTA] [get_bd_intf_pins internal_packet_generator_uram/BRAM_PORTA] connect_bd_intf_net -intf_net axis_addr_fifo_0_M_AXIS [get_bd_intf_pins axis_addr_fifo_0/M_AXIS] [get_bd_intf_pins internal_packet_generator_0/addr_in] connect_bd_intf_net -intf_net axis_addr_fifo_2_M_AXIS [get_bd_intf_pins axis_addr_fifo_1/M_AXIS] [get_bd_intf_pins jf_conversion_0/addr_in] connect_bd_intf_net -intf_net axis_addr_fifo_2_M_AXIS1 [get_bd_intf_pins axis_addr_fifo_2/M_AXIS] [get_bd_intf_pins host_writer_0/addr_in] - connect_bd_intf_net -intf_net axis_data_fifo_0_M_AXIS [get_bd_intf_pins axis_data_fifo_0/M_AXIS] [get_bd_intf_pins load_calibration_0/data_in] - connect_bd_intf_net -intf_net axis_data_fifo_1_M_AXIS [get_bd_intf_pins axis_data_fifo_1/M_AXIS] [get_bd_intf_pins internal_packet_generator_0/data_in] - connect_bd_intf_net -intf_net axis_data_fifo_2_M_AXIS [get_bd_intf_pins axis_data_fifo_2/M_AXIS] [get_bd_intf_pins timer_hbm/data_in] - connect_bd_intf_net -intf_net axis_data_fifo_4_M_AXIS [get_bd_intf_pins axis_data_fifo_3/M_AXIS] [get_bd_intf_pins jf_conversion_0/data_in] - connect_bd_intf_net -intf_net axis_data_fifo_4_M_AXIS1 [get_bd_intf_pins axis_data_fifo_4/M_AXIS] [get_bd_intf_pins timer_host/data_in] - connect_bd_intf_net -intf_net axis_data_fifo_5_M_AXIS [get_bd_intf_pins axis_data_fifo_5/M_AXIS] [get_bd_intf_pins host_writer_0/data_in] + connect_bd_intf_net -intf_net axis_data_fifo_0_M_AXIS [get_bd_intf_pins axis_data_fifo_0/M_AXIS] [get_bd_intf_pins internal_packet_generator_0/data_in] + connect_bd_intf_net -intf_net axis_data_fifo_2_M_AXIS [get_bd_intf_pins axis_data_fifo_1/M_AXIS] [get_bd_intf_pins timer_hbm/data_in] + connect_bd_intf_net -intf_net axis_data_fifo_4_M_AXIS [get_bd_intf_pins axis_data_fifo_2/M_AXIS] [get_bd_intf_pins jf_conversion_0/data_in] + connect_bd_intf_net -intf_net axis_data_fifo_4_M_AXIS1 [get_bd_intf_pins axis_data_fifo_3/M_AXIS] [get_bd_intf_pins timer_host/data_in] + connect_bd_intf_net -intf_net axis_data_fifo_5_M_AXIS [get_bd_intf_pins axis_data_fifo_4/M_AXIS] [get_bd_intf_pins host_writer_0/data_in] connect_bd_intf_net -intf_net axis_data_fifo_c2h_cmd_M_AXIS [get_bd_intf_pins m_axis_c2h_datamover_cmd] [get_bd_intf_pins axis_data_fifo_c2h_cmd/M_AXIS] connect_bd_intf_net -intf_net axis_data_fifo_c2h_data_M_AXIS [get_bd_intf_pins m_axis_c2h_data] [get_bd_intf_pins axis_data_fifo_c2h_data/M_AXIS] connect_bd_intf_net -intf_net axis_data_fifo_h2c_cmd_M_AXIS [get_bd_intf_pins m_axis_h2c_datamover_cmd] [get_bd_intf_pins axis_data_fifo_h2c_cmd/M_AXIS] connect_bd_intf_net -intf_net axis_data_fifo_h2c_data_M_AXIS [get_bd_intf_pins axis_data_fifo_h2c_data/M_AXIS] [get_bd_intf_pins axis_register_slice_data_in_0/S_AXIS] connect_bd_intf_net -intf_net axis_register_slice_0_M_AXIS [get_bd_intf_pins axis_addr_fifo_2/S_AXIS] [get_bd_intf_pins axis_register_slice_addr_1/M_AXIS] connect_bd_intf_net -intf_net axis_register_slice_0_M_AXIS1 [get_bd_intf_pins axis_register_slice_data_in_0/M_AXIS] [get_bd_intf_pins load_calibration_0/host_memory_in] - connect_bd_intf_net -intf_net axis_register_slice_1_M_AXIS [get_bd_intf_pins axis_data_fifo_5/S_AXIS] [get_bd_intf_pins axis_register_slice_data_1/M_AXIS] + connect_bd_intf_net -intf_net axis_register_slice_1_M_AXIS [get_bd_intf_pins axis_data_fifo_4/S_AXIS] [get_bd_intf_pins axis_register_slice_data_1/M_AXIS] connect_bd_intf_net -intf_net axis_register_slice_2_M_AXIS [get_bd_intf_pins axis_addr_fifo_1/S_AXIS] [get_bd_intf_pins axis_register_slice_addr_0/M_AXIS] - connect_bd_intf_net -intf_net axis_register_slice_data_0_M_AXIS [get_bd_intf_pins axis_data_fifo_2/S_AXIS] [get_bd_intf_pins axis_register_slice_data_0/M_AXIS] + connect_bd_intf_net -intf_net axis_register_slice_data_0_M_AXIS [get_bd_intf_pins axis_data_fifo_1/S_AXIS] [get_bd_intf_pins axis_register_slice_data_0/M_AXIS] connect_bd_intf_net -intf_net axis_register_slice_host_mem_M_AXIS [get_bd_intf_pins axis_data_fifo_c2h_data/S_AXIS] [get_bd_intf_pins axis_register_slice_host_mem/M_AXIS] connect_bd_intf_net -intf_net axis_register_slice_udp_M_AXIS [get_bd_intf_pins axis_register_slice_udp/M_AXIS] [get_bd_intf_pins data_collection_fsm_0/eth_in] connect_bd_intf_net -intf_net axis_udp_addr_fifo_0_M_AXIS [get_bd_intf_pins axis_udp_addr_fifo_0/M_AXIS] [get_bd_intf_pins data_collection_fsm_0/addr_in] @@ -422,7 +391,7 @@ variable script_folder connect_bd_intf_net -intf_net internal_packet_generator_0_data_out [get_bd_intf_pins axis_register_slice_data_0/S_AXIS] [get_bd_intf_pins internal_packet_generator_0/data_out] connect_bd_intf_net -intf_net internal_packet_generator_0_m_axi_frame [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_1/S_AXI] [get_bd_intf_pins internal_packet_generator_0/m_axi_frame] connect_bd_intf_net -intf_net jf_conversion_0_addr_out [get_bd_intf_pins axis_register_slice_addr_1/S_AXIS] [get_bd_intf_pins jf_conversion_0/addr_out] - connect_bd_intf_net -intf_net jf_conversion_0_data_out [get_bd_intf_pins axis_data_fifo_4/S_AXIS] [get_bd_intf_pins jf_conversion_0/data_out] + connect_bd_intf_net -intf_net jf_conversion_0_data_out [get_bd_intf_pins axis_data_fifo_3/S_AXIS] [get_bd_intf_pins jf_conversion_0/data_out] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p0 [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/S00_AXI] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p1 [get_bd_intf_pins m_axi_d_hbm_p1] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p1] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p2 [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p2] [get_bd_intf_pins smartconnect_2/S00_AXI] @@ -435,9 +404,7 @@ variable script_folder connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p9 [get_bd_intf_pins m_axi_d_hbm_p9] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p9] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p10 [get_bd_intf_pins m_axi_d_hbm_p10] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p10] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p11 [get_bd_intf_pins m_axi_d_hbm_p11] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p11] - connect_bd_intf_net -intf_net load_calibration_0_data_out [get_bd_intf_pins axis_data_fifo_1/S_AXIS] [get_bd_intf_pins load_calibration_0/data_out] connect_bd_intf_net -intf_net load_calibration_0_datamover_in_cmd [get_bd_intf_pins axis_data_fifo_h2c_cmd/S_AXIS] [get_bd_intf_pins load_calibration_0/datamover_in_cmd] - connect_bd_intf_net -intf_net load_calibration_0_in_mem_location_PORTA [get_bd_intf_pins calibration_addr_bram/BRAM_PORTA] [get_bd_intf_pins load_calibration_0/in_mem_location_PORTA] connect_bd_intf_net -intf_net load_calibration_0_m_axi_d_hbm_p0 [get_bd_intf_pins load_calibration_0/m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/S01_AXI] connect_bd_intf_net -intf_net load_calibration_0_m_axi_d_hbm_p1 [get_bd_intf_pins load_calibration_0/m_axi_d_hbm_p1] [get_bd_intf_pins smartconnect_2/S01_AXI] connect_bd_intf_net -intf_net mailbox_0_M1_AXIS [get_bd_intf_pins axis_work_request_fifo_0/S_AXIS] [get_bd_intf_pins mailbox_0/M1_AXIS] @@ -446,11 +413,11 @@ variable script_folder connect_bd_intf_net -intf_net s_axi_1 [get_bd_intf_pins s_axi] [get_bd_intf_pins smartconnect_0/S00_AXI] connect_bd_intf_net -intf_net smartconnect_0_M00_AXI [get_bd_intf_pins action_config_0/s_axi] [get_bd_intf_pins smartconnect_0/M00_AXI] connect_bd_intf_net -intf_net smartconnect_0_M01_AXI [get_bd_intf_pins mailbox_0/S0_AXI] [get_bd_intf_pins smartconnect_0/M01_AXI] - connect_bd_intf_net -intf_net smartconnect_0_M02_AXI [get_bd_intf_pins axi_bram_ctrl_calibration_addr/S_AXI] [get_bd_intf_pins smartconnect_0/M02_AXI] + connect_bd_intf_net -intf_net smartconnect_0_M02_AXI [get_bd_intf_pins load_calibration_0/s_axi_control] [get_bd_intf_pins smartconnect_0/M02_AXI] connect_bd_intf_net -intf_net smartconnect_0_M03_AXI [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_0/S_AXI] [get_bd_intf_pins smartconnect_0/M03_AXI] connect_bd_intf_net -intf_net smartconnect_1_M00_AXI [get_bd_intf_pins m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/M00_AXI] connect_bd_intf_net -intf_net smartconnect_2_M00_AXI [get_bd_intf_pins m_axi_d_hbm_p2] [get_bd_intf_pins smartconnect_2/M00_AXI] - connect_bd_intf_net -intf_net timer_hbm_data_out [get_bd_intf_pins axis_data_fifo_3/S_AXIS] [get_bd_intf_pins timer_hbm/data_out] + connect_bd_intf_net -intf_net timer_hbm_data_out [get_bd_intf_pins axis_data_fifo_2/S_AXIS] [get_bd_intf_pins timer_hbm/data_out] connect_bd_intf_net -intf_net timer_host_data_out [get_bd_intf_pins axis_register_slice_data_1/S_AXIS] [get_bd_intf_pins timer_host/data_out] # Create port connections @@ -461,19 +428,19 @@ variable script_folder connect_bd_net -net action_config_0_fpga_ipv4_addr [get_bd_pins action_config_0/fpga_ipv4_addr] [get_bd_pins network_stack/fpga_ipv4_addr] connect_bd_net -net action_config_0_fpga_mac_addr [get_bd_pins action_config_0/fpga_mac_addr] [get_bd_pins network_stack/fpga_mac_addr] connect_bd_net -net action_config_0_frames_per_trigger [get_bd_pins action_config_0/nframes] [get_bd_pins data_collection_fsm_0/nframes] - connect_bd_net -net action_config_0_hbm_size_bytes [get_bd_pins action_config_0/hbm_size_bytes] [get_bd_pins data_collection_fsm_0/hbm_size_bytes] + connect_bd_net -net action_config_0_hbm_size_bytes [get_bd_pins action_config_0/hbm_size_bytes] [get_bd_pins data_collection_fsm_0/hbm_size_bytes] [get_bd_pins load_calibration_0/hbm_size_bytes] connect_bd_net -net action_config_0_nmodules [get_bd_pins action_config_0/nmodules] [get_bd_pins data_collection_fsm_0/nmodules] connect_bd_net -net action_config_0_nstorage_cells [get_bd_pins action_config_0/nstorage_cells] [get_bd_pins data_collection_fsm_0/nstorage_cells] connect_bd_net -net action_config_0_one_over_energy [get_bd_pins action_config_0/one_over_energy] [get_bd_pins data_collection_fsm_0/one_over_energy] - connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_5/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins internal_packet_generator_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins smartconnect_1/aclk] [get_bd_pins smartconnect_2/aclk] [get_bd_pins timer_hbm/ap_clk] [get_bd_pins timer_host/ap_clk] + connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins internal_packet_generator_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins smartconnect_1/aclk] [get_bd_pins smartconnect_2/aclk] [get_bd_pins timer_hbm/ap_clk] [get_bd_pins timer_host/ap_clk] connect_bd_net -net axis_addr_fifo_2_almost_empty [get_bd_pins action_config_0/calib_addr_fifo_empty] [get_bd_pins axis_addr_fifo_1/almost_empty] connect_bd_net -net axis_addr_fifo_2_almost_full [get_bd_pins action_config_0/calib_addr_fifo_full] [get_bd_pins axis_addr_fifo_1/almost_full] connect_bd_net -net axis_addr_fifo_4_almost_empty [get_bd_pins action_config_0/last_addr_fifo_empty] [get_bd_pins axis_addr_fifo_2/almost_empty] connect_bd_net -net axis_addr_fifo_4_almost_full [get_bd_pins action_config_0/last_addr_fifo_full] [get_bd_pins axis_addr_fifo_2/almost_full] - connect_bd_net -net axis_data_fifo_10_almost_empty [get_bd_pins action_config_0/last_data_fifo_empty] [get_bd_pins axis_data_fifo_5/almost_empty] - connect_bd_net -net axis_data_fifo_10_almost_full [get_bd_pins action_config_0/last_data_fifo_full] [get_bd_pins axis_data_fifo_5/almost_full] - connect_bd_net -net axis_data_fifo_4_almost_empty [get_bd_pins action_config_0/calib_data_fifo_empty] [get_bd_pins axis_data_fifo_3/almost_empty] - connect_bd_net -net axis_data_fifo_4_almost_full [get_bd_pins action_config_0/calib_data_fifo_full] [get_bd_pins axis_data_fifo_3/almost_full] + connect_bd_net -net axis_data_fifo_10_almost_empty [get_bd_pins action_config_0/last_data_fifo_empty] [get_bd_pins axis_data_fifo_4/almost_empty] + connect_bd_net -net axis_data_fifo_10_almost_full [get_bd_pins action_config_0/last_data_fifo_full] [get_bd_pins axis_data_fifo_4/almost_full] + connect_bd_net -net axis_data_fifo_4_almost_empty [get_bd_pins action_config_0/calib_data_fifo_empty] [get_bd_pins axis_data_fifo_2/almost_empty] + connect_bd_net -net axis_data_fifo_4_almost_full [get_bd_pins action_config_0/calib_data_fifo_full] [get_bd_pins axis_data_fifo_2/almost_full] connect_bd_net -net axis_data_fifo_c2h_cmd_almost_empty [get_bd_pins action_config_0/host_mem_cmd_fifo_empty] [get_bd_pins axis_data_fifo_c2h_cmd/almost_empty] connect_bd_net -net axis_data_fifo_c2h_cmd_almost_full [get_bd_pins action_config_0/host_mem_cmd_fifo_full] [get_bd_pins axis_data_fifo_c2h_cmd/almost_full] connect_bd_net -net axis_data_fifo_c2h_data_almost_empty [get_bd_pins action_config_0/host_mem_data_fifo_empty] [get_bd_pins axis_data_fifo_c2h_data/almost_empty] @@ -504,8 +471,8 @@ variable script_folder connect_bd_net -net network_stack_packets_sls_ap_vld [get_bd_pins action_config_0/packets_sls_valid] [get_bd_pins network_stack/packets_sls_ap_vld] connect_bd_net -net network_stack_packets_udp [get_bd_pins action_config_0/packets_udp] [get_bd_pins network_stack/packets_udp] connect_bd_net -net network_stack_packets_udp_ap_vld [get_bd_pins action_config_0/packets_udp_valid] [get_bd_pins network_stack/packets_udp_ap_vld] - connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_addr_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_5/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_0/aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_0/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] [get_bd_pins smartconnect_1/aresetn] [get_bd_pins smartconnect_2/aresetn] - connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_calibration_addr/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins internal_packet_generator_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins timer_hbm/ap_rst_n] [get_bd_pins timer_host/ap_rst_n] + connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_addr_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_0/aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_0/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] [get_bd_pins smartconnect_1/aresetn] [get_bd_pins smartconnect_2/aresetn] + connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins internal_packet_generator_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins timer_hbm/ap_rst_n] [get_bd_pins timer_host/ap_rst_n] connect_bd_net -net timer_hbm_counter [get_bd_pins action_config_0/stalls_hbm] [get_bd_pins timer_hbm/counter] connect_bd_net -net timer_hbm_counter_ap_vld [get_bd_pins action_config_0/stalls_hbm_valid] [get_bd_pins timer_hbm/counter_ap_vld] connect_bd_net -net timer_host_counter [get_bd_pins action_config_0/stalls_host] [get_bd_pins timer_host/counter] diff --git a/receiver/FPGAAcquisitionDevice.cpp b/receiver/FPGAAcquisitionDevice.cpp index 36c089ad..d22d2e43 100644 --- a/receiver/FPGAAcquisitionDevice.cpp +++ b/receiver/FPGAAcquisitionDevice.cpp @@ -66,8 +66,9 @@ void FPGAAcquisitionDevice::InitializeCalibration(const DiffractionExperiment &e "Mismatch regarding storage cell count in calibration and experiment description"); size_t modules = experiment.GetModulesNum(data_stream); + size_t storage_cells = experiment.GetStorageCellNumber(); - if (modules * (3 + 3 * experiment.GetStorageCellNumber()) > buffer_device.size()) + if (modules * (3 + 3 * storage_cells) > buffer_device.size()) throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Not enough host/FPGA buffers to load all calibration constants"); @@ -77,7 +78,7 @@ void FPGAAcquisitionDevice::InitializeCalibration(const DiffractionExperiment &e calib.GainCalibration(m).ExportG2(buffer_device[m + modules * 2]); } - for (int s = 0; s < experiment.GetStorageCellNumber(); s++) { + for (int s = 0; s < storage_cells; s++) { auto mask = calib.CalculateMask(experiment, s); for (int m = 0; m < modules; m++) { auto pedestal_g0 = calib.Pedestal(offset + m, 0, s).GetPedestal(); @@ -85,18 +86,19 @@ void FPGAAcquisitionDevice::InitializeCalibration(const DiffractionExperiment &e auto pedestal_g2 = calib.Pedestal(offset + m, 2, s).GetPedestal(); for (int i = 0; i < RAW_MODULE_SIZE; i++) { if (experiment.GetApplyPixelMaskInFPGA() && (mask[(offset + m) * RAW_MODULE_SIZE + i] != 0)) { - buffer_device[m + (3 + 0 * experiment.GetStorageCellNumber() + s) * modules][i] = 16384; - buffer_device[m + (3 + 1 * experiment.GetStorageCellNumber() + s) * modules][i] = 16384; - buffer_device[m + (3 + 2 * experiment.GetStorageCellNumber() + s) * modules][i] = 16384; + buffer_device[(3 + 0 * storage_cells + s) * modules + m][i] = 16384; + buffer_device[(3 + 1 * storage_cells + s) * modules + m][i] = 16384; + buffer_device[(3 + 2 * storage_cells + s) * modules + m][i] = 16384; } else { - buffer_device[m + (3 + 0 * experiment.GetStorageCellNumber() + s) * modules][i] = pedestal_g0[i]; - buffer_device[m + (3 + 1 * experiment.GetStorageCellNumber() + s) * modules][i] = pedestal_g1[i]; - buffer_device[m + (3 + 2 * experiment.GetStorageCellNumber() + s) * modules][i] = pedestal_g2[i]; + buffer_device[(3 + 0 * storage_cells + s) * modules + m][i] = pedestal_g0[i]; + buffer_device[(3 + 1 * storage_cells + s) * modules + m][i] = pedestal_g1[i]; + buffer_device[(3 + 2 * storage_cells + s) * modules + m][i] = pedestal_g2[i]; } } } } + HW_LoadCalibration(modules, storage_cells); } diff --git a/receiver/FPGAAcquisitionDevice.h b/receiver/FPGAAcquisitionDevice.h index 9605245a..23354e54 100644 --- a/receiver/FPGAAcquisitionDevice.h +++ b/receiver/FPGAAcquisitionDevice.h @@ -28,6 +28,7 @@ class FPGAAcquisitionDevice : public AcquisitionDevice { volatile bool stop_work_requests = false; void SendWorkRequestThread(); + virtual void HW_LoadCalibration(uint32_t modules, uint32_t storage_cells) = 0; virtual bool HW_ReadMailbox(uint32_t values[16]) = 0; virtual bool HW_SendWorkRequest(uint32_t handle) = 0; void StartSendingWorkRequests() override; diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index 77991a10..a91fe01d 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -40,13 +40,6 @@ HLSSimulatedDevice::HLSSimulatedDevice(uint16_t data_stream, size_t in_frame_buf MapBuffersStandard(in_frame_buffer_size_modules, (3 + 3 * 16) * max_modules + 2, numa_node); - - auto in_mem_location32 = (uint32_t *) calibration_addr_bram; - - for (int i = 0; i < max_modules * (3 + 3 * 16) + 2; i++) { - in_mem_location32[2 * i ] = ((uint64_t) buffer_device[i]) & UINT32_MAX; - in_mem_location32[2 * i + 1] = ((uint64_t) buffer_device[i]) >> 32; - } } void HLSSimulatedDevice::CreateFinalPacket(const DiffractionExperiment& experiment) { @@ -206,7 +199,6 @@ void HLSSimulatedDevice::HLSMainThread() { STREAM_512 raw1; STREAM_512 raw2; STREAM_512 raw3; - STREAM_512 raw4; STREAM_512 converted_1; STREAM_512 converted_2; @@ -276,24 +268,16 @@ void HLSSimulatedDevice::HLSMainThread() { } }); - // Load external calibration - hls_cores.emplace_back([&] { load_calibration(raw1, raw2, - hbm.data(), - hbm.data(), - datamover_in.GetCtrlStream(), - datamover_in.GetDataStream(), - calibration_addr_bram); }); - // Generate internal packets - hls_cores.emplace_back([&] { internal_packet_generator(raw2, raw3, addr1, addr2, + hls_cores.emplace_back([&] { internal_packet_generator(raw1, raw2, addr1, addr2, reinterpret_cast *>(internal_pkt_gen_frame.data()), cancel_data_collection); }); // Timer procedure - count how many times pedestal_corr/gain_corr is not accepting input (to help track down latency issues) - hls_cores.emplace_back([&] { timer_host(raw3, raw4, counter_hbm); }); + hls_cores.emplace_back([&] { timer_host(raw2, raw3, counter_hbm); }); // 2. Apply pedestal & gain corrections - hls_cores.emplace_back([&] { jf_conversion(raw4, converted_1, + hls_cores.emplace_back([&] { jf_conversion(raw3, converted_1, addr2, addr3, hbm.data(), hbm.data(), @@ -341,9 +325,6 @@ void HLSSimulatedDevice::HLSMainThread() { if (!raw3.empty()) throw std::runtime_error("Raw3 queue not empty"); - if (!raw4.empty()) - throw std::runtime_error("Raw4 queue not empty"); - if (!converted_1.empty()) throw std::runtime_error("Converted_1 queue not empty"); @@ -370,3 +351,30 @@ void HLSSimulatedDevice::HW_GetStatus(ActionStatus *status) const { status->max_modules = max_modules; status->hbm_size_bytes = hbm_if_size; } + +void HLSSimulatedDevice::HW_LoadCalibration(uint32_t modules, uint32_t storage_cells) { + + if (logger) + logger->Info("Load calibration start"); + + auto in_mem_location32 = (uint32_t *) calibration_addr_bram; + + for (int i = 0; i < modules * (3 + 3 * storage_cells); i++) { + in_mem_location32[2 * i ] = ((uint64_t) buffer_device[i]) & UINT32_MAX; + in_mem_location32[2 * i + 1] = ((uint64_t) buffer_device[i]) >> 32; + } + + load_calibration(hbm.data(), + hbm.data(), + modules, + storage_cells, + hbm_if_size, + datamover_in.GetCtrlStream(), + datamover_in.GetDataStream(), + calibration_addr_bram); + if (logger) + logger->Info("Load calibration done"); + + if (!datamover_in.GetDataStream().empty()) + throw std::runtime_error("Datamover queue is not empty"); +} \ No newline at end of file diff --git a/receiver/HLSSimulatedDevice.h b/receiver/HLSSimulatedDevice.h index e3d7185e..1cb70032 100644 --- a/receiver/HLSSimulatedDevice.h +++ b/receiver/HLSSimulatedDevice.h @@ -46,6 +46,7 @@ class HLSSimulatedDevice : public FPGAAcquisitionDevice { bool HW_IsIdle() const override; bool HW_ReadMailbox(uint32_t values[16]); bool HW_SendWorkRequest(uint32_t handle) override; + void HW_LoadCalibration(uint32_t modules, uint32_t storage_cells) override; void HW_GetStatus(ActionStatus *status) const override; void HLSMainThread() ; public: diff --git a/receiver/PCIExpressDevice.cpp b/receiver/PCIExpressDevice.cpp index 5daebf42..a074f180 100644 --- a/receiver/PCIExpressDevice.cpp +++ b/receiver/PCIExpressDevice.cpp @@ -31,7 +31,7 @@ PCIExpressDevice::PCIExpressDevice(const std::string &device_name, uint16_t data uint32_t num_buf = GetNumKernelBuffers(); - if (num_buf < max_modules * (3 + 3 * 16) + 2) + if (num_buf < max_modules * (3 + 3 * 16)) throw JFJochException(JFJochExceptionCategory::PCIeError, "Need to increase number of host-device buffers"); @@ -211,3 +211,13 @@ void PCIExpressDevice::HW_ReadInternalPacketGen(uint16_t *tmp) const { throw JFJochException(JFJochExceptionCategory::PCIeError, "Failed getting internal packet generator frame", errno); } + +void PCIExpressDevice::HW_LoadCalibration(uint32_t in_modules, uint32_t in_storage_cells) { + ActionConfig config{ + .nmodules = in_modules, + .nstorage_cells = in_storage_cells + }; + if (ioctl(fd, IOCTL_JFJOCH_LOAD_CALIB, &config) != 0) + throw JFJochException(JFJochExceptionCategory::PCIeError, + "Failed writing config", errno); +} \ No newline at end of file diff --git a/receiver/PCIExpressDevice.h b/receiver/PCIExpressDevice.h index 84ba403a..8af755b5 100644 --- a/receiver/PCIExpressDevice.h +++ b/receiver/PCIExpressDevice.h @@ -15,6 +15,7 @@ class PCIExpressDevice : public FPGAAcquisitionDevice { bool HW_IsIdle() const final; void HW_WriteActionRegister(const ActionConfig *job) override; void HW_ReadActionRegister(ActionConfig *job) override; + void HW_LoadCalibration(uint32_t modules, uint32_t storage_cells) override; void FPGA_EndAction() override; void Reset(); diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index 4b1ed31c..8268a552 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -546,6 +546,8 @@ TEST_CASE("HLS_C_Simulation_check_2_trigger_convert", "[FPGA][Full]") { x.PedestalG0Frames(0).NumTriggers(2).ImagesPerTrigger(5); HLSSimulatedDevice test(0, 64); + Logger logger("bla"); + test.EnableLogging(&logger); JFCalibration c(x); REQUIRE_NOTHROW(c.Pedestal(0, 0).LoadPedestal(pedestal_g0)); From 862619509196de5ec6699b25a7d0ba1f57a3fc0e Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 12 Sep 2023 16:28:29 +0200 Subject: [PATCH 203/224] FPGA: fix to deadlock --- fpga/hls/load_calibration.cpp | 100 +++++++++++++++++----------------- fpga/scripts/jfjoch.tcl | 4 +- 2 files changed, 51 insertions(+), 53 deletions(-) diff --git a/fpga/hls/load_calibration.cpp b/fpga/hls/load_calibration.cpp index 67d1df3f..cef711d9 100644 --- a/fpga/hls/load_calibration.cpp +++ b/fpga/hls/load_calibration.cpp @@ -9,14 +9,30 @@ // * gain factors for module m at location: 2 + gain level * NMODULES + m // * pedestal factors for module m and storage cell s at location: 2 + 3 * NMODULES + (gain level * 16 + s ) * NMODULES + m +void read_module(ap_uint<256> *d_hbm_p0, + ap_uint<256> *d_hbm_p1, + hls::stream > &host_memory_in, + size_t offset_hbm_0, + size_t offset_hbm_1) { +#pragma HLS INLINE OFF + for (int i = 0; i < RAW_MODULE_SIZE * sizeof(int16_t) / 64; i++) { +#pragma HLS PIPELINE II=1 + ap_axiu<512, 1, 1, 1> data_packet; + host_memory_in >> data_packet; + + d_hbm_p0[offset_hbm_0 + i] = data_packet.data(255, 0); + d_hbm_p1[offset_hbm_1 + i] = data_packet.data(511, 256); + } +} + void load_calibration(ap_uint<256> *d_hbm_p0, - ap_uint<256> *d_hbm_p1, - ap_uint<8> modules, - ap_uint<5> storage_cells, - ap_uint<32> hbm_size_bytes, - hls::stream &datamover_in_cmd, - hls::stream > &host_memory_in, - uint64_t in_mem_location[(3 * 16 + 3) * MAX_MODULES_FPGA]) { + ap_uint<256> *d_hbm_p1, + ap_uint<8> modules, + ap_uint<5> storage_cells, + ap_uint<32> hbm_size_bytes, + hls::stream &datamover_in_cmd, + hls::stream > &host_memory_in, + uint64_t in_mem_location[(3 * 16 + 3) * MAX_MODULES_FPGA]) { #pragma HLS INTERFACE mode=s_axilite port=return #pragma HLS INTERFACE mode=s_axilite port=in_mem_location #pragma HLS INTERFACE register both axis port=datamover_in_cmd @@ -26,51 +42,33 @@ void load_calibration(ap_uint<256> *d_hbm_p0, #pragma HLS INTERFACE mode=s_axilite port=storage_cells #pragma HLS INTERFACE mode=ap_none port=hbm_size_bytes -#pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=off \ - max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 -#pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=off \ - max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 +#pragma HLS INTERFACE mode=m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=off \ + max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 +#pragma HLS INTERFACE mode=m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=off \ + max_read_burst_length=2 max_write_burst_length=16 latency=120 num_write_outstanding=8 num_read_outstanding=2 - if (storage_cells > 16) - return; - if (modules > MAX_MODULES_FPGA) - return; + if (storage_cells > 16) + return; + if (modules > MAX_MODULES_FPGA) + return; - ap_uint<16> addr = 0; - for (int c = 0; c < 3; c++) { - size_t offset_hbm_0 = (2 * c) * hbm_size_bytes / 32; - size_t offset_hbm_1 = (2 * c + 1) * hbm_size_bytes / 32; - read_gain: - for (int i = 0; i < modules * RAW_MODULE_SIZE * sizeof(int16_t) / 64; i++) { -#pragma HLS PIPELINE II=1 - if (i % (RAW_MODULE_SIZE * sizeof(uint16_t) / 64) == 0) { - setup_datamover(datamover_in_cmd, in_mem_location[addr], RAW_MODULE_SIZE * sizeof(int16_t)); - addr++; - } - ap_axiu<512, 1, 1, 1> data_packet; - host_memory_in >> data_packet; + for (int c = 0; c < 3; c++) { + for (int m = 0; m < modules; m++) { +#pragma HLS PIPELINE OFF + setup_datamover(datamover_in_cmd, in_mem_location[c * modules + m], RAW_MODULE_SIZE * sizeof(int16_t)); + size_t offset_hbm_0 = (2 * c) * hbm_size_bytes / 32 + m * RAW_MODULE_SIZE * sizeof(int16_t) / 64; + size_t offset_hbm_1 = (2 * c + 1) * hbm_size_bytes / 32 + m * RAW_MODULE_SIZE * sizeof(int16_t) / 64; + read_module(d_hbm_p0, d_hbm_p1, host_memory_in, offset_hbm_0, offset_hbm_1); + } + } - d_hbm_p0[offset_hbm_0 | i] = data_packet.data(255, 0); - d_hbm_p1[offset_hbm_1 | i] = data_packet.data(511, 256); - } - } - - read_pedestal: - for (int c = 0; c < 3; c++) { - size_t offset_hbm_0 = (6 + 2 * c) * hbm_size_bytes / 32; - size_t offset_hbm_1 = (6 + 2 * c + 1) * hbm_size_bytes / 32; - - for (int i = 0; i < modules * storage_cells * RAW_MODULE_SIZE * sizeof(int16_t) / 64; i++) { -#pragma HLS PIPELINE II=1 - if (i % (RAW_MODULE_SIZE * sizeof(uint16_t) / 64) == 0) { - setup_datamover(datamover_in_cmd, in_mem_location[addr], RAW_MODULE_SIZE * sizeof(int16_t)); - addr++; - } - ap_axiu<512, 1, 1, 1> data_packet; - host_memory_in >> data_packet; - - d_hbm_p0[offset_hbm_0 | i] = data_packet.data(255, 0); - d_hbm_p1[offset_hbm_1 | i] = data_packet.data(511, 256); - } - } + for (int c = 0; c < 3; c++) { + for (int m = 0; m < modules * storage_cells; m++) { +#pragma HLS PIPELINE OFF + setup_datamover(datamover_in_cmd, in_mem_location[3 * modules + c * modules * storage_cells + m], RAW_MODULE_SIZE * sizeof(int16_t)); + size_t offset_hbm_0 = (6 + 2 * c) * hbm_size_bytes / 32 + m * RAW_MODULE_SIZE * sizeof(int16_t) / 64; + size_t offset_hbm_1 = (6 + 2 * c + 1) * hbm_size_bytes / 32 + m * RAW_MODULE_SIZE * sizeof(int16_t) / 64; + read_module(d_hbm_p0, d_hbm_p1, host_memory_in, offset_hbm_0, offset_hbm_1); + } + } } diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index b0d60acc..fe9d181d 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -198,13 +198,13 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { # Create instance: axis_data_fifo_h2c_cmd, and set properties set axis_data_fifo_h2c_cmd [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_h2c_cmd ] set_property -dict [ list \ - CONFIG.FIFO_DEPTH {64} \ + CONFIG.FIFO_DEPTH {2048} \ ] $axis_data_fifo_h2c_cmd # Create instance: axis_data_fifo_h2c_data, and set properties set axis_data_fifo_h2c_data [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_h2c_data ] set_property -dict [ list \ - CONFIG.FIFO_DEPTH {128} \ + CONFIG.FIFO_DEPTH {256} \ CONFIG.FIFO_MEMORY_TYPE {block} \ CONFIG.HAS_AEMPTY {1} \ CONFIG.HAS_AFULL {1} \ From 5e137a514a6e425fff9074a8301f7ed123cb2141 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 12 Sep 2023 20:35:48 +0200 Subject: [PATCH 204/224] FPGA: add more FIFOs to monitoring --- fpga/hdl/action_config.v | 28 ++++++++++++++++++---------- fpga/scripts/jfjoch.tcl | 18 ++++++++++++------ receiver/FPGAAcquisitionDevice.cpp | 12 +++++++----- 3 files changed, 37 insertions(+), 21 deletions(-) diff --git a/fpga/hdl/action_config.v b/fpga/hdl/action_config.v index f8ad79cb..becd74f9 100644 --- a/fpga/hdl/action_config.v +++ b/fpga/hdl/action_config.v @@ -5,8 +5,8 @@ // parameters imported from source files `define ACTION_TYPE 32'h52324158 -`define RELEASE_LEVEL 32'h003A -`define GIT_SHA1 32'hd4bcfb9f +`define RELEASE_LEVEL 32'h +`define GIT_SHA1 32'h `define MAX_MODULES_FPGA 32'd16 `define HBM_SIZE_BYTES 32'h20000000 @@ -104,10 +104,14 @@ module action_config input udp_fifo_empty , input udp_fifo_full , - input host_mem_data_fifo_empty , - input host_mem_data_fifo_full , - input host_mem_cmd_fifo_empty , - input host_mem_cmd_fifo_full , + input c2h_data_fifo_empty , + input c2h_data_fifo_full , + input c2h_cmd_fifo_empty , + input c2h_cmd_fifo_full , + input h2c_data_fifo_empty , + input h2c_data_fifo_full , + input h2c_cmd_fifo_empty , + input h2c_cmd_fifo_full , input work_req_fifo_empty , input work_req_fifo_full , input work_compl_fifo_empty , @@ -560,10 +564,10 @@ always @(posedge clk) begin reg_fifo_status[3] <= calib_addr_fifo_full; reg_fifo_status[6] <= udp_fifo_empty; reg_fifo_status[7] <= udp_fifo_full; - reg_fifo_status[8] <= host_mem_data_fifo_empty; - reg_fifo_status[9] <= host_mem_data_fifo_full; - reg_fifo_status[10] <= host_mem_cmd_fifo_empty; - reg_fifo_status[11] <= host_mem_cmd_fifo_full; + reg_fifo_status[8] <= c2h_data_fifo_empty; + reg_fifo_status[9] <= c2h_data_fifo_full; + reg_fifo_status[10] <= c2h_cmd_fifo_empty; + reg_fifo_status[11] <= c2h_cmd_fifo_full; reg_fifo_status[12] <= work_req_fifo_empty; reg_fifo_status[13] <= work_req_fifo_full; reg_fifo_status[14] <= work_compl_fifo_empty; @@ -572,6 +576,10 @@ always @(posedge clk) begin reg_fifo_status[17] <= last_data_fifo_full; reg_fifo_status[18] <= last_addr_fifo_empty; reg_fifo_status[19] <= last_addr_fifo_full; + reg_fifo_status[20] <= h2c_data_fifo_empty; + reg_fifo_status[21] <= h2c_data_fifo_full; + reg_fifo_status[22] <= h2c_cmd_fifo_empty; + reg_fifo_status[23] <= h2c_cmd_fifo_full; end end diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index fe9d181d..a1214193 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -198,7 +198,9 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { # Create instance: axis_data_fifo_h2c_cmd, and set properties set axis_data_fifo_h2c_cmd [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_h2c_cmd ] set_property -dict [ list \ - CONFIG.FIFO_DEPTH {2048} \ + CONFIG.FIFO_DEPTH {64} \ + CONFIG.HAS_AEMPTY {1} \ + CONFIG.HAS_AFULL {1} \ ] $axis_data_fifo_h2c_cmd # Create instance: axis_data_fifo_h2c_data, and set properties @@ -441,10 +443,14 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { connect_bd_net -net axis_data_fifo_10_almost_full [get_bd_pins action_config_0/last_data_fifo_full] [get_bd_pins axis_data_fifo_4/almost_full] connect_bd_net -net axis_data_fifo_4_almost_empty [get_bd_pins action_config_0/calib_data_fifo_empty] [get_bd_pins axis_data_fifo_2/almost_empty] connect_bd_net -net axis_data_fifo_4_almost_full [get_bd_pins action_config_0/calib_data_fifo_full] [get_bd_pins axis_data_fifo_2/almost_full] - connect_bd_net -net axis_data_fifo_c2h_cmd_almost_empty [get_bd_pins action_config_0/host_mem_cmd_fifo_empty] [get_bd_pins axis_data_fifo_c2h_cmd/almost_empty] - connect_bd_net -net axis_data_fifo_c2h_cmd_almost_full [get_bd_pins action_config_0/host_mem_cmd_fifo_full] [get_bd_pins axis_data_fifo_c2h_cmd/almost_full] - connect_bd_net -net axis_data_fifo_c2h_data_almost_empty [get_bd_pins action_config_0/host_mem_data_fifo_empty] [get_bd_pins axis_data_fifo_c2h_data/almost_empty] - connect_bd_net -net axis_data_fifo_c2h_data_almost_full [get_bd_pins action_config_0/host_mem_data_fifo_full] [get_bd_pins axis_data_fifo_c2h_data/almost_full] + connect_bd_net -net axis_data_fifo_c2h_cmd_almost_empty [get_bd_pins action_config_0/c2h_cmd_fifo_empty] [get_bd_pins axis_data_fifo_c2h_cmd/almost_empty] + connect_bd_net -net axis_data_fifo_c2h_cmd_almost_full [get_bd_pins action_config_0/c2h_cmd_fifo_full] [get_bd_pins axis_data_fifo_c2h_cmd/almost_full] + connect_bd_net -net axis_data_fifo_c2h_data_almost_empty [get_bd_pins action_config_0/c2h_data_fifo_empty] [get_bd_pins axis_data_fifo_c2h_data/almost_empty] + connect_bd_net -net axis_data_fifo_c2h_data_almost_full [get_bd_pins action_config_0/c2h_data_fifo_full] [get_bd_pins axis_data_fifo_c2h_data/almost_full] + connect_bd_net -net axis_data_fifo_h2c_cmd_almost_empty [get_bd_pins action_config_0/h2c_cmd_fifo_empty] [get_bd_pins axis_data_fifo_h2c_cmd/almost_empty] + connect_bd_net -net axis_data_fifo_h2c_cmd_almost_full [get_bd_pins action_config_0/h2c_cmd_fifo_full] [get_bd_pins axis_data_fifo_h2c_cmd/almost_full] + connect_bd_net -net axis_data_fifo_h2c_data_almost_empty [get_bd_pins action_config_0/h2c_data_fifo_empty] [get_bd_pins axis_data_fifo_h2c_data/almost_empty] + connect_bd_net -net axis_data_fifo_h2c_data_almost_full [get_bd_pins action_config_0/h2c_data_fifo_full] [get_bd_pins axis_data_fifo_h2c_data/almost_full] connect_bd_net -net axis_udp_fifo_0_almost_empty [get_bd_pins action_config_0/udp_fifo_empty] [get_bd_pins axis_udp_fifo_0/almost_empty] connect_bd_net -net axis_udp_fifo_0_almost_full [get_bd_pins action_config_0/udp_fifo_full] [get_bd_pins axis_udp_fifo_0/almost_full] connect_bd_net -net axis_work_completion_fifo_0_almost_empty [get_bd_pins action_config_0/work_compl_fifo_empty] [get_bd_pins axis_work_completion_fifo_0/almost_empty] @@ -480,4 +486,4 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { # Restore current instance current_bd_instance $oldCurInst -} \ No newline at end of file +} diff --git a/receiver/FPGAAcquisitionDevice.cpp b/receiver/FPGAAcquisitionDevice.cpp index d22d2e43..ee0d770c 100644 --- a/receiver/FPGAAcquisitionDevice.cpp +++ b/receiver/FPGAAcquisitionDevice.cpp @@ -195,15 +195,17 @@ JFJochProtoBuf::FPGAStatus FPGAAcquisitionDevice::GetStatus() const { ret.set_git_sha1(status.git_sha1); ret.set_hbm_size_bytes(status.hbm_size_bytes); + FIFO_check(ret, "UDP", status.fifo_status, 6, 7); FIFO_check(ret, "Conversion input (data)", status.fifo_status, 0, 1); FIFO_check(ret, "Conversion input (cmd)", status.fifo_status, 2, 3); - FIFO_check(ret, "UDP", status.fifo_status, 6, 7); FIFO_check(ret, "Work Request", status.fifo_status, 12, 13); FIFO_check(ret, "Work Completion", status.fifo_status, 14, 15); - FIFO_check(ret, "Host mem (data)", status.fifo_status, 8, 9); - FIFO_check(ret, "Host mem (cmd)", status.fifo_status, 10, 11); - FIFO_check(ret, "Data FIFO #8", status.fifo_status, 16, 17); - FIFO_check(ret, "Addr FIFO #3", status.fifo_status, 18, 19); + FIFO_check(ret, "Writer input (data)", status.fifo_status, 16, 17); + FIFO_check(ret, "Writer input (cmd)", status.fifo_status, 18, 19); + FIFO_check(ret, "C2H (data)", status.fifo_status, 8, 9); + FIFO_check(ret, "C2H (cmd)", status.fifo_status, 10, 11); + FIFO_check(ret, "H2C (data)", status.fifo_status, 20, 21); + FIFO_check(ret, "H2C (cmd)", status.fifo_status, 22, 23); ret.set_fpga_idle(HW_IsIdle()); From b7239331acbaab81f37022d1a6c244d4327170c5 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 12 Sep 2023 21:10:15 +0200 Subject: [PATCH 205/224] FPGA: remove script from OC-Accel --- fpga/scripts/snap_env.sh | 3 --- 1 file changed, 3 deletions(-) delete mode 100644 fpga/scripts/snap_env.sh diff --git a/fpga/scripts/snap_env.sh b/fpga/scripts/snap_env.sh deleted file mode 100644 index b049f37c..00000000 --- a/fpga/scripts/snap_env.sh +++ /dev/null @@ -1,3 +0,0 @@ -export ACTION_ROOT=@ACTION_ROOT@ -export TIMING_LABLIMIT="-100" -export OCSE_ROOT=@OCSE_ROOT@ From 56993d359794c818196cd4e6836d65a0c1402bfa Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 12 Sep 2023 21:15:18 +0200 Subject: [PATCH 206/224] FPGA: minor clean-up of network routines --- fpga/hls/ethernet.cpp | 7 +++---- fpga/hls/hls_jfjoch.h | 24 ------------------------ fpga/hls/icmp.cpp | 8 ++++---- fpga/hls/ipv4.cpp | 2 +- 4 files changed, 8 insertions(+), 33 deletions(-) diff --git a/fpga/hls/ethernet.cpp b/fpga/hls/ethernet.cpp index 9030761c..21b5c187 100644 --- a/fpga/hls/ethernet.cpp +++ b/fpga/hls/ethernet.cpp @@ -37,10 +37,9 @@ void ethernet(AXI_STREAM ð_in, if (state == INSPECT_HEADER) { dest = DEST_IGNORE; if (fpga_mac_addr != 0) { - ap_uint < 48 > dest_mac = get_mac_addr(packet_in.data, 0); - ap_uint < 48 > src_mac = get_mac_addr(packet_in.data, 48); - - ap_uint < 16 > ether_type = get_header_field_16(packet_in.data, 12 * 8); + ap_uint<48> dest_mac = packet_in.data(47, 0); + ap_uint<48> src_mac = packet_in.data(95, 48); + ap_uint<16> ether_type = get_header_field_16(packet_in.data, 12 * 8); if ((dest_mac == fpga_mac_addr) && (ether_type == ETHER_IP)) { state = FORWARD; diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index c98fbf1b..00652bf1 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -70,21 +70,6 @@ struct axis_addr { ap_uint<1> last; }; -struct axis_completion { - ap_uint<128> packet_mask; - ap_uint<64> frame_number; - ap_uint<64> exptime; - ap_uint<64> timestamp; - ap_uint<64> bunchid; - ap_uint<32> debug; - ap_uint<32> data_collection_id; - ap_uint<32> handle; - ap_uint<16> packet_count; - ap_uint<5> module; - ap_uint<1> flushing; - ap_uint<1> last; -}; - void setup_datamover (hls::stream &datamover_cmd_stream, uint64_t address, size_t bytes_to_write); void data_collection_fsm(AXI_STREAM ð_in, @@ -175,14 +160,6 @@ inline ap_uint<16> get_header_field_16(ap_uint<512> data, size_t position) { return retval; } -inline ap_uint<48> get_mac_addr(ap_uint<512> data, size_t position) { - return data(position+47,position); -} - -inline ap_uint<32> get_header_field_32_network_order(ap_uint<512> data, size_t position) { - return data(position+31, position); -} - static const uint8_t ECHO_REQUEST = 0x08; static const uint8_t ECHO_REPLY = 0x00; static const uint8_t PROTOCOL_ICMP = 0x01; @@ -195,7 +172,6 @@ static const uint32_t eth_payload_pos = 14 * 8; // 112 bits static const uint32_t ipv4_payload_pos = eth_payload_pos + 160; // 112 + 160 = 272 bits static const uint32_t udp_payload_pos = ipv4_payload_pos + 64; // 112 + 160 + 64 = 336 bits (42 bytes) - // Network cores #define UDP_METADATA_STREAM_WIDTH 48 #define udp_metadata_dest_port(x) x(15, 0) diff --git a/fpga/hls/icmp.cpp b/fpga/hls/icmp.cpp index 563fc18a..5b1e8b11 100755 --- a/fpga/hls/icmp.cpp +++ b/fpga/hls/icmp.cpp @@ -111,8 +111,8 @@ void icmp(AXI_STREAM& eth_in, AXI_STREAM& eth_out, uint64_t& counter, if (eth_in.read_nb(packet)) { if (state == INSPECT_HEADER) { - ap_uint < 48 > dest_mac = get_mac_addr(packet.data, 0); - ap_uint < 48 > src_mac = get_mac_addr(packet.data, 48); + ap_uint<48> dest_mac = packet.data(47, 0); + ap_uint<48> src_mac = packet.data(95, 48); // Swap MAC addresses for reply packet.data(47, 0) = src_mac; @@ -127,8 +127,8 @@ void icmp(AXI_STREAM& eth_in, AXI_STREAM& eth_out, uint64_t& counter, if ((icmp_type == ECHO_REQUEST) && (icmp_code == 0)) { - ap_uint < 32 > ipv4_src_ip = packet.data(eth_payload_pos + 127, eth_payload_pos + 96); - ap_uint < 32 > ipv4_dest_ip = packet.data(eth_payload_pos + 159, eth_payload_pos + 128); + ap_uint<32> ipv4_src_ip = packet.data(eth_payload_pos + 127, eth_payload_pos + 96); + ap_uint<32> ipv4_dest_ip = packet.data(eth_payload_pos + 159, eth_payload_pos + 128); packet.data(eth_payload_pos + 71, eth_payload_pos + 64) = 128; // IP time to live packet.data(eth_payload_pos + 95, eth_payload_pos + 80) = 0; diff --git a/fpga/hls/ipv4.cpp b/fpga/hls/ipv4.cpp index 281f3b1d..225cefdf 100644 --- a/fpga/hls/ipv4.cpp +++ b/fpga/hls/ipv4.cpp @@ -28,7 +28,7 @@ void ipv4(AXI_STREAM ð_in, ap_uint<4> ip_version = packet_in.data(eth_payload_pos + 8 - 1, eth_payload_pos + 4); ap_uint<8> ipv4_protocol = packet_in.data(eth_payload_pos + 80 - 1, eth_payload_pos + 72); - ap_uint<32> ipv4_dest_ip = get_header_field_32_network_order(packet_in.data, eth_payload_pos + 128); + ap_uint<32> ipv4_dest_ip = packet_in.data(eth_payload_pos + 128 + 31, eth_payload_pos + 128); ap_uint<16> ipv4_header_checksum_check = computeCheckSum20B(packet_in.data(eth_payload_pos + 159, eth_payload_pos)); if ((ip_version == 4) && (ipv4_dest_ip == fpga_ipv4_addr) && (ipv4_header_checksum_check == 0)) { From 0b4320c3815a4d4aa6714d33c125e7c87520dc3f Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 13 Sep 2023 07:58:20 +0200 Subject: [PATCH 207/224] PCIe driver: enable DMA --- fpga/pcie_driver/jfjoch_function.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/fpga/pcie_driver/jfjoch_function.c b/fpga/pcie_driver/jfjoch_function.c index 95f77080..1c516252 100644 --- a/fpga/pcie_driver/jfjoch_function.c +++ b/fpga/pcie_driver/jfjoch_function.c @@ -19,15 +19,10 @@ void jfjoch_start(struct jfjoch_drvdata *drvdata) { | XDMA_CTRL_STM_MODE_WB; // Disable stream writeback // Set PCIe beats counters - iowrite32((1 << 1), drvdata->bar0 + PCIE_OFFSET + (0<<12) + 0xC0); - iowrite32((1 << 2), drvdata->bar0 + PCIE_OFFSET + (0<<12) + 0xC0); - iowrite32((1 << 1), drvdata->bar0 + PCIE_OFFSET + (1<<12) + 0xC0); iowrite32((1 << 2), drvdata->bar0 + PCIE_OFFSET + (1<<12) + 0xC0); // Start DMA - // RUN + enable logging of certain error conditions ==> H2C channel 0 control register - iowrite32(run_val, drvdata->bar0 + PCIE_OFFSET + (0<<12) + 0x04); // RUN ==> C2H channel 0 control register iowrite32(run_val, drvdata->bar0 + PCIE_OFFSET + (1<<12) + 0x04); @@ -44,8 +39,6 @@ void jfjoch_end(struct jfjoch_drvdata *drvdata) { // Write cancel register iowrite32(0x4, drvdata->bar0 + ACTION_CONFIG_OFFSET); - // RUN ==> H2C channel 0 control register - iowrite32(0, drvdata->bar0 + PCIE_OFFSET + (0<<12) + 0x04); // RUN ==> C2H channel 0 control register iowrite32(0, drvdata->bar0 + PCIE_OFFSET + (1<<12) + 0x04); } @@ -312,6 +305,14 @@ int jfjoch_load_calibration(struct jfjoch_drvdata *drvdata, struct ActionConfig iowrite32(PCI_DMA_H(addr), drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_MEM + (i * 2 + 1) * 4); } + // Start DMA + // RUN + enable logging of certain error conditions ==> H2C channel 0 control register + u32 run_val = XDMA_CTRL_RUN_STOP | XDMA_CTRL_IE_DESC_ALIGN_MISMATCH | XDMA_CTRL_IE_DESC_ERROR | XDMA_CTRL_IE_READ_ERROR + | XDMA_CTRL_IE_WRITE_ERROR | XDMA_CTRL_IE_DESC_COMPLETED | XDMA_CTRL_STM_MODE_WB; + iowrite32((1 << 1), drvdata->bar0 + PCIE_OFFSET + (0<<12) + 0xC0); + iowrite32((1 << 2), drvdata->bar0 + PCIE_OFFSET + (0<<12) + 0xC0); + iowrite32(run_val, drvdata->bar0 + PCIE_OFFSET + (0<<12) + 0x04); + iowrite32(config->nmodules, drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_MOD); iowrite32(config->nstorage_cells, drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_SC); iowrite32(0x1, drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_CTRL); @@ -324,6 +325,9 @@ int jfjoch_load_calibration(struct jfjoch_drvdata *drvdata, struct ActionConfig i++; } + // STOP H2C channel + iowrite32(0, drvdata->bar0 + PCIE_OFFSET + (0<<12) + 0x04); + if (i == 1000) { dev_err(dev, "Load calibration didn't finish in 10 seconds\n"); return -ETIMEDOUT; From 33a15e87df82f65426145b8e54c8091cdaea3771 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 13 Sep 2023 08:00:55 +0200 Subject: [PATCH 208/224] PCIe driver: minor fixes --- fpga/pcie_driver/jfjoch_drv.h | 2 ++ fpga/pcie_driver/jfjoch_function.c | 14 ++++---------- 2 files changed, 6 insertions(+), 10 deletions(-) diff --git a/fpga/pcie_driver/jfjoch_drv.h b/fpga/pcie_driver/jfjoch_drv.h index fed30437..e5d29cd0 100644 --- a/fpga/pcie_driver/jfjoch_drv.h +++ b/fpga/pcie_driver/jfjoch_drv.h @@ -48,6 +48,8 @@ #define ADDR_LOAD_CALIBRATION_SC (0x000018) #define ADDR_LOAD_CALIBRATION_MEM (0x002000) +#define JFJOCH_DMA_SETTINGS (XDMA_CTRL_RUN_STOP | XDMA_CTRL_IE_DESC_ALIGN_MISMATCH | XDMA_CTRL_IE_DESC_ERROR | XDMA_CTRL_IE_READ_ERROR \ + | XDMA_CTRL_IE_WRITE_ERROR | XDMA_CTRL_IE_DESC_COMPLETED | XDMA_CTRL_STM_MODE_WB) #define ADDR_CMS_CONTROL_REG 0x028018 #define ADDR_CMS_MB_RESETN_REG 0x020000 diff --git a/fpga/pcie_driver/jfjoch_function.c b/fpga/pcie_driver/jfjoch_function.c index 1c516252..f5f8e451 100644 --- a/fpga/pcie_driver/jfjoch_function.c +++ b/fpga/pcie_driver/jfjoch_function.c @@ -14,17 +14,13 @@ DEFINE_MUTEX(send_wr_mutex); DEFINE_MUTEX(read_wc_mutex); void jfjoch_start(struct jfjoch_drvdata *drvdata) { - u32 run_val = XDMA_CTRL_RUN_STOP | XDMA_CTRL_IE_DESC_ALIGN_MISMATCH | XDMA_CTRL_IE_DESC_ERROR | XDMA_CTRL_IE_READ_ERROR - | XDMA_CTRL_IE_WRITE_ERROR | XDMA_CTRL_IE_DESC_COMPLETED - | XDMA_CTRL_STM_MODE_WB; // Disable stream writeback - // Set PCIe beats counters iowrite32((1 << 1), drvdata->bar0 + PCIE_OFFSET + (1<<12) + 0xC0); iowrite32((1 << 2), drvdata->bar0 + PCIE_OFFSET + (1<<12) + 0xC0); // Start DMA - // RUN ==> C2H channel 0 control register - iowrite32(run_val, drvdata->bar0 + PCIE_OFFSET + (1<<12) + 0x04); + // Run C2H + iowrite32(JFJOCH_DMA_SETTINGS, drvdata->bar0 + PCIE_OFFSET + (1<<12) + 0x04); // Set Mailbox FIFOs, so interrupt threshold is 16 messages // => This way it ensures that one can always execute read/write operation on the FIFO @@ -306,12 +302,10 @@ int jfjoch_load_calibration(struct jfjoch_drvdata *drvdata, struct ActionConfig } // Start DMA - // RUN + enable logging of certain error conditions ==> H2C channel 0 control register - u32 run_val = XDMA_CTRL_RUN_STOP | XDMA_CTRL_IE_DESC_ALIGN_MISMATCH | XDMA_CTRL_IE_DESC_ERROR | XDMA_CTRL_IE_READ_ERROR - | XDMA_CTRL_IE_WRITE_ERROR | XDMA_CTRL_IE_DESC_COMPLETED | XDMA_CTRL_STM_MODE_WB; + // Clear counters and RUN H2C iowrite32((1 << 1), drvdata->bar0 + PCIE_OFFSET + (0<<12) + 0xC0); iowrite32((1 << 2), drvdata->bar0 + PCIE_OFFSET + (0<<12) + 0xC0); - iowrite32(run_val, drvdata->bar0 + PCIE_OFFSET + (0<<12) + 0x04); + iowrite32(JFJOCH_DMA_SETTINGS, drvdata->bar0 + PCIE_OFFSET + (0<<12) + 0x04); iowrite32(config->nmodules, drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_MOD); iowrite32(config->nstorage_cells, drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_SC); From 95d20085dd46548ccdf034111480d50635c0660f Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 13 Sep 2023 10:35:02 +0200 Subject: [PATCH 209/224] FPGA: Use volatile variable for counter --- fpga/hls/hls_jfjoch.h | 4 +++- fpga/hls/timer.cpp | 2 +- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index 00652bf1..a16f3952 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -115,7 +115,9 @@ void host_writer(STREAM_512 &data_in, volatile ap_uint<1> &idle, ap_uint<8> &err_reg); -void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, uint64_t &counter); +void timer_host(STREAM_512 &data_in, + STREAM_512 &data_out, + volatile uint64_t &counter); void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, hls::stream &addr_in, diff --git a/fpga/hls/timer.cpp b/fpga/hls/timer.cpp index 8973c2e2..a0c6ad27 100644 --- a/fpga/hls/timer.cpp +++ b/fpga/hls/timer.cpp @@ -3,7 +3,7 @@ #include "hls_jfjoch.h" -void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, uint64_t &counter) { +void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, volatile uint64_t &counter) { #pragma HLS INTERFACE register both axis port=data_in #pragma HLS INTERFACE register both axis port=data_out #pragma HLS INTERFACE register ap_vld port=counter From 496d016c3164e0f6f3ba1801ae20a2be949ad3d9 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 13 Sep 2023 20:06:09 +0200 Subject: [PATCH 210/224] FPGA: Replace internal_packet_generator with frame_generator (generating UDP packets, instead of internal JFJoch packets) --- fpga/hls/CMakeLists.txt | 10 +-- fpga/hls/data_collection_fsm.cpp | 5 +- fpga/hls/frame_generator.cpp | 118 +++++++++++++++++++++++++ fpga/hls/hls_jfjoch.h | 18 ++-- fpga/hls/internal_packet_generator.cpp | 90 ------------------- fpga/hls/load_from_hbm.cpp | 53 ----------- fpga/scripts/bd_pcie.tcl | 7 +- fpga/scripts/jfjoch.tcl | 74 +++++----------- receiver/HLSSimulatedDevice.cpp | 34 ++++--- tests/FPGAIntegrationTest.cpp | 13 ++- 10 files changed, 194 insertions(+), 228 deletions(-) create mode 100644 fpga/hls/frame_generator.cpp delete mode 100644 fpga/hls/internal_packet_generator.cpp delete mode 100644 fpga/hls/load_from_hbm.cpp diff --git a/fpga/hls/CMakeLists.txt b/fpga/hls/CMakeLists.txt index e4c37aca..77ac469e 100644 --- a/fpga/hls/CMakeLists.txt +++ b/fpga/hls/CMakeLists.txt @@ -5,14 +5,14 @@ ADD_LIBRARY( HLSSimulation STATIC hls_jfjoch.h ../../common/Definitions.h load_calibration.cpp - internal_packet_generator.cpp host_writer.cpp ethernet.cpp ipv4.cpp icmp.cpp arp.cpp ip_header_checksum.h udp.cpp - sls_detector.cpp) + sls_detector.cpp + frame_generator.cpp) TARGET_INCLUDE_DIRECTORIES(HLSSimulation PUBLIC ../include) TARGET_LINK_LIBRARIES(HLSSimulation CommonFunctions) @@ -37,26 +37,26 @@ MAKE_HLS_MODULE(timer.cpp timer_host) MAKE_HLS_MODULE(jf_conversion.cpp jf_conversion) MAKE_HLS_MODULE(load_calibration.cpp load_calibration) MAKE_HLS_MODULE(host_writer.cpp host_writer) -MAKE_HLS_MODULE(internal_packet_generator.cpp internal_packet_generator) MAKE_HLS_MODULE(icmp.cpp icmp) MAKE_HLS_MODULE(ipv4.cpp ipv4) MAKE_HLS_MODULE(ethernet.cpp ethernet) MAKE_HLS_MODULE(arp.cpp arp) MAKE_HLS_MODULE(udp.cpp udp) MAKE_HLS_MODULE(sls_detector.cpp sls_detector) +MAKE_HLS_MODULE(frame_generator.cpp frame_generator) SET (HLS_IPS psi_ch_hls_data_collection_fsm_1_0.zip psi_ch_hls_timer_host_1_0.zip psi_ch_hls_jf_conversion_1_0.zip psi_ch_hls_load_calibration_1_0.zip - psi_ch_hls_internal_packet_generator_1_0.zip psi_ch_hls_ethernet_1_0.zip psi_ch_hls_ipv4_1_0.zip psi_ch_hls_arp_1_0.zip psi_ch_hls_udp_1_0.zip psi_ch_hls_sls_detector_1_0.zip psi_ch_hls_icmp_1_0.zip - psi_ch_hls_host_writer_1_0.zip) + psi_ch_hls_host_writer_1_0.zip + psi_ch_hls_frame_generator_1_0.zip) SET (HLS_IPS ${HLS_IPS} PARENT_SCOPE) ADD_CUSTOM_TARGET(hls DEPENDS ${HLS_IPS}) diff --git a/fpga/hls/data_collection_fsm.cpp b/fpga/hls/data_collection_fsm.cpp index f3034444..35251d99 100644 --- a/fpga/hls/data_collection_fsm.cpp +++ b/fpga/hls/data_collection_fsm.cpp @@ -88,10 +88,7 @@ void data_collection_fsm(AXI_STREAM ð_in, addr.last = 0; addr_out << addr; - if (mode & MODE_INTERNAL_PACKET_GEN) - rcv_state = RCV_LAST; - else - rcv_state = RCV_INIT; + rcv_state = RCV_INIT; break; case RCV_INIT: out_idle = 0; diff --git a/fpga/hls/frame_generator.cpp b/fpga/hls/frame_generator.cpp new file mode 100644 index 00000000..db2df327 --- /dev/null +++ b/fpga/hls/frame_generator.cpp @@ -0,0 +1,118 @@ +// Copyright (2019-2023) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#include "hls_jfjoch.h" +#include "ip_header_checksum.h" + +void generate_packet(STREAM_512 &data_out, + ap_uint<512> *uram, + ap_uint<32> frame, + ap_uint<8> module, + ap_uint<7> eth_packet, + ap_uint<48> src_mac_addr, + ap_uint<48> dest_mac_addr, + ap_uint<32> src_ipv4_addr, + ap_uint<32> dest_ipv4_addr, + ap_uint<64> bunchid, + ap_uint<32> exptime, + ap_uint<64> timestamp, + ap_uint<32> debug) { +#pragma HLS PIPELINE II=130 + ap_uint<720> header = 0; + + header(47 , 0) = dest_mac_addr; + header(95 , 48) = src_mac_addr; + header(111, 96) = 0x0008; // ETHER_IP = IPv4 + header(eth_payload_pos+3 , eth_payload_pos ) = 0x5; // header len of 5 + header(eth_payload_pos+7 , eth_payload_pos+4 ) = 0x4; // IPv4 + header(eth_payload_pos+31 , eth_payload_pos+16 ) = 0x4C20; // total length = 8268 + header(eth_payload_pos+79 , eth_payload_pos+72 ) = PROTOCOL_UDP; // UDP + header(eth_payload_pos+127, eth_payload_pos+96 ) = src_ipv4_addr; + header(eth_payload_pos+159, eth_payload_pos+128) = dest_ipv4_addr; + header(eth_payload_pos+95 , eth_payload_pos+80 ) = computeCheckSum20B(header(eth_payload_pos + 159, eth_payload_pos)); + + header(ipv4_payload_pos+47, ipv4_payload_pos+32) = 0x3820; // UDP length = 8248 + header(udp_payload_pos+63, udp_payload_pos) = frame + 1; + header(udp_payload_pos+95, udp_payload_pos+64) = exptime; + header(udp_payload_pos+127, udp_payload_pos+96) = eth_packet; + header(udp_payload_pos+2*64+63, udp_payload_pos+2*64) = bunchid; + header(udp_payload_pos+3*64+63, udp_payload_pos+3*64) = timestamp; + header(udp_payload_pos+4*64+31, udp_payload_pos+4*64+16) = 2 * module; + header(udp_payload_pos+5*64+31, udp_payload_pos+5*64) = debug; + + packet_512_t packet; + packet.data = header(511 ,0); + packet.last = 0; + packet.dest = 0; + packet.id = 0; + packet.strb = UINT64_MAX; + packet.keep = UINT64_MAX; + packet.user = 0; + + data_out << packet; + + ap_uint<208> remainder = header(719, 512); + for (int i = 0; i < 128; i++) { + ap_uint<512> tmp = uram[eth_packet * 128 + i]; + //tmp(255, 0) = d_hbm_p0[eth_packet * 128 + i]; + //tmp(511, 256) = d_hbm_p1[eth_packet * 128 + i]; + packet.data(207, 0) = remainder; + packet.data(511, 208) = tmp(303, 0); + data_out << packet; + remainder = tmp(511, 304); + } + packet.data(207, 0) = remainder; + packet.data(511, 208) = 0; + packet.keep(63, 26) = 0; + packet.last = 1; + data_out << packet; +} + +void frame_generator(STREAM_512 &data_out, + ap_uint<512> *uram, + ap_uint<32> frames, + ap_uint<5> modules, + ap_uint<48> src_mac_addr, + ap_uint<48> dest_mac_addr, + ap_uint<32> src_ipv4_addr, + ap_uint<32> dest_ipv4_addr, + ap_uint<64> bunchid, + ap_uint<32> exptime, + ap_uint<32> debug) { +#pragma HLS INTERFACE mode=s_axilite port=return +#pragma HLS INTERFACE mode=s_axilite port=frames +#pragma HLS INTERFACE mode=s_axilite port=modules +#pragma HLS INTERFACE mode=s_axilite port=bunchid +#pragma HLS INTERFACE mode=s_axilite port=exptime +#pragma HLS INTERFACE mode=s_axilite port=debug +#pragma HLS INTERFACE mode=s_axilite port=dest_mac_addr +#pragma HLS INTERFACE mode=s_axilite port=dest_ipv4_addr +#pragma HLS INTERFACE mode=ap_none port=src_mac_addr +#pragma HLS INTERFACE mode=ap_none port=src_ipv4_addr + +#pragma HLS INTERFACE register both axis port=data_out +#pragma HLS INTERFACE m_axi port=uram bundle=uram depth=512 offset=off \ + max_read_burst_length=64 max_write_burst_length=2 latency=5 num_write_outstanding=2 num_read_outstanding=2 +//#pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=off \ +// max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=9 +//#pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=off \ +// max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=9 + + for (uint32_t f = 0; f < frames; f++) { + for (uint32_t p = 0; p < 128; p++) { + for (uint32_t m = 0; m < modules; m++) { + generate_packet(data_out, + uram, + f, m, p, + src_mac_addr, + dest_mac_addr, + src_ipv4_addr, + dest_ipv4_addr, + bunchid + f, + exptime, + exptime * f, + debug); + } + } + } +} diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index a16f3952..e366eb37 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -95,6 +95,18 @@ void load_calibration(ap_uint<256> *d_hbm_p0, hls::stream > &host_memory_in, uint64_t in_mem_location[LOAD_CALIBRATION_BRAM_SIZE]); +void frame_generator(STREAM_512 &data_out, + ap_uint<512> *uram, + ap_uint<32> frames, + ap_uint<5> modules, + ap_uint<48> src_mac_addr, + ap_uint<48> dest_mac_addr, + ap_uint<32> src_ipv4_addr, + ap_uint<32> dest_ipv4_addr, + ap_uint<64> bunchid, + ap_uint<32> exptime, + ap_uint<32> debug); + void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, hls::stream &addr_in, hls::stream &addr_out, @@ -119,12 +131,6 @@ void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, volatile uint64_t &counter); -void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, - hls::stream &addr_in, - hls::stream &addr_out, - ap_uint<512> module_cache[RAW_MODULE_SIZE * sizeof(uint16_t) / 512 * 8], - volatile ap_uint<1> &in_cancel); - template ap_uint pack32(ap_int in[32]) { #pragma HLS INLINE ap_uint out; diff --git a/fpga/hls/internal_packet_generator.cpp b/fpga/hls/internal_packet_generator.cpp deleted file mode 100644 index 4f8b061e..00000000 --- a/fpga/hls/internal_packet_generator.cpp +++ /dev/null @@ -1,90 +0,0 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later - -#include "hls_jfjoch.h" - -void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, - hls::stream &addr_in, - hls::stream &addr_out, - ap_uint<512> *frame, - volatile ap_uint<1> &in_cancel) { -#pragma HLS INTERFACE ap_ctrl_none port=return -#pragma HLS INTERFACE register both axis port=data_in -#pragma HLS INTERFACE register both axis port=data_out -#pragma HLS INTERFACE register both axis port=addr_in -#pragma HLS INTERFACE register both axis port=addr_out -#pragma HLS INTERFACE m_axi port=frame bundle=frame depth=512 offset=off \ - max_read_burst_length=64 max_write_burst_length=2 latency=3 num_write_outstanding=2 num_read_outstanding=2 - -#pragma HLS INTERFACE ap_none register port=in_cancel - - packet_512_t packet_in; - packet_512_t packet_out; - - // Read and forward packet #0 - data_in >> packet_in; - ap_uint<5> modules = ACT_REG_NMODULES(packet_in.data); - ap_uint<64> mode = ACT_REG_MODE(packet_in.data); - ap_uint<1> internal_packet_generator = (mode & MODE_INTERNAL_PACKET_GEN) ? 1 : 0; - ap_uint<32> nframes = ACT_REG_NFRAMES(packet_in.data); - ap_uint<5> storage_cells = ACT_REG_NSTORAGE_CELLS(packet_in.data); - ap_uint<1> conversion = (mode & MODE_CONV) ? 1 : 0; - - data_out << packet_in; - axis_addr addr; - addr_in >> addr; - addr_out << addr; - - if (internal_packet_generator) { - uint32_t frame_number = 1; - uint8_t module_number = 0; - - generate_frames: - while (!in_cancel.read() && (frame_number <= nframes)) { - for (uint32_t i = 0; i < RAW_MODULE_SIZE * 2 / 64; i++) { -#pragma HLS PIPELINE II=1 - uint32_t eth_packet = i / 128; - uint32_t axis_packet = i % 128; - if (axis_packet == 0) { - axis_addr addr_x; - addr_x.eth_packet = eth_packet; - addr_x.module = module_number; - addr_x.frame_number = frame_number; - addr_x.debug = INT_PKT_GEN_DEBUG; - addr_x.timestamp = INT_PKT_GEN_TIMESTAMP; - addr_x.bunchid = INT_PKT_GEN_BUNCHID; - addr_x.exptime = INT_PKT_GEN_EXPTTIME; - addr_x.last = 0; - addr_out << addr_x; - } - packet_out.user = 0; - packet_out.id = 0; - packet_out.last = (axis_packet == 127) ? 1 : 0; - packet_out.data = frame[i]; - data_out << packet_out; - } - if (module_number == modules - 1) { - frame_number++; - module_number = 0; - } else - module_number++; - } - } - - addr_in >> addr; - - forward_packets: - while (!addr.last) { -#pragma HLS PIPELINE II=1 - data_in >> packet_in; - data_out << packet_in; - if (packet_in.last) { - addr_out << addr; - addr_in >> addr; - } - } - - addr_out << addr; - data_in >> packet_in; - data_out << packet_in; -} diff --git a/fpga/hls/load_from_hbm.cpp b/fpga/hls/load_from_hbm.cpp deleted file mode 100644 index 67a109f8..00000000 --- a/fpga/hls/load_from_hbm.cpp +++ /dev/null @@ -1,53 +0,0 @@ -// Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later - -#include "hls_jfjoch.h" - -void load_from_hbm(STREAM_512 &data_out, - hls::stream &completion_in, - hls::stream &completion_out, - hls::burst_maxi d_hbm_p0, - hls::burst_maxi d_hbm_p1, - ap_uint<32> hbm_size) { -#pragma HLS INTERFACE ap_ctrl_none port=return -#pragma HLS INTERFACE register both axis port=data_out -#pragma HLS INTERFACE register both axis port=completion_in -#pragma HLS INTERFACE register both axis port=completion_out -#pragma HLS INTERFACE register ap_none port=hbm_size - -#pragma HLS INTERFACE m_axi port=d_hbm_p0 bundle=d_hbm_p0 depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=8 -#pragma HLS INTERFACE m_axi port=d_hbm_p1 bundle=d_hbm_p1 depth=512 offset=off \ - max_read_burst_length=16 max_write_burst_length=2 latency=120 num_write_outstanding=2 num_read_outstanding=8 - - axis_completion cmpl; - - completion_in >> cmpl; - - ap_uint<32> offset_hbm_0 = 12 * (hbm_size / 32); - ap_uint<32> offset_hbm_1 = 14 * (hbm_size / 32); - - while (!cmpl.last) { - completion_out << cmpl; - for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 64; i++) { -#pragma HLS PIPELINE II=1 - if (i % 16 == 0) { - d_hbm_p0.read_request(offset_hbm_0 + cmpl.handle * RAW_MODULE_SIZE * sizeof(uint16_t) / 32 / 2 + i, 16); - d_hbm_p1.read_request(offset_hbm_1 + cmpl.handle * RAW_MODULE_SIZE * sizeof(uint16_t) / 32 / 2 + i, 16); - } - packet_512_t packet_out; - packet_out.data(255, 0) = d_hbm_p0.read(); - packet_out.data(511,256) = d_hbm_p1.read(); - if (cmpl.packet_mask[i/128] == 0) { - for (int i = 0; i < 32; i++) - packet_out.data(16*i+15,16*i) = PIXEL_OUT_LOST; - } - packet_out.keep = UINT64_MAX; - packet_out.strb = UINT64_MAX; - packet_out.last = (i == (RAW_MODULE_SIZE / 32 * 2 - 1)); - data_out << packet_out; - } - completion_in >> cmpl; - } - completion_out << cmpl; -} diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index be36695f..f2a69d78 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -146,9 +146,10 @@ xilinx.com:ip:hbm:1.0\ xilinx.com:ip:axi_bram_ctrl:4.1\ xilinx.com:ip:axis_data_fifo:2.0\ xilinx.com:ip:axis_register_slice:1.1\ +xilinx.com:ip:axis_switch:1.1\ psi.ch:hls:data_collection_fsm:1.0\ +psi.ch:hls:frame_generator:1.0\ psi.ch:hls:host_writer:1.0\ -psi.ch:hls:internal_packet_generator:1.0\ xilinx.com:ip:blk_mem_gen:8.4\ psi.ch:hls:jf_conversion:1.0\ psi.ch:hls:load_calibration:1.0\ @@ -161,7 +162,6 @@ xilinx.com:ip:axis_clock_converter:1.1\ xilinx.com:ip:util_ds_buf:2.2\ xilinx.com:ip:xdma:4.1\ psi.ch:hls:arp:1.0\ -xilinx.com:ip:axis_switch:1.1\ psi.ch:hls:ethernet:1.0\ psi.ch:hls:icmp:1.0\ psi.ch:hls:ipv4:1.0\ @@ -437,10 +437,11 @@ proc create_root_design { parentCell } { assign_bd_address -offset 0x00050000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs axi_intc_0/S_AXI/Reg] -force assign_bd_address -offset 0x00060000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/load_calibration_0/s_axi_control/Reg] -force assign_bd_address -offset 0x00070000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/axi_firewall_0/S_AXI_CTL/Control] -force + assign_bd_address -offset 0x00080000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/frame_generator_0/s_axi_control/Reg] -force assign_bd_address -offset 0x00090000 -range 0x00010000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs pcie_dma_0/xdma_0/S_AXI_LITE/CTL0] -force assign_bd_address -offset 0x000C0000 -range 0x00040000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs cms_subsystem_0/s_axi_ctrl/Mem] -force assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces pcie_dma_0/xdma_0/M_AXI_LITE] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator_0/S_AXI/Mem0] -force - assign_bd_address -offset 0x00100000 -range 0x00100000 -target_address_space [get_bd_addr_spaces jungfraujoch_0/internal_packet_generator_0/Data_m_axi_frame] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator_1/S_AXI/Mem0] -force + assign_bd_address -offset 0x00000000 -range 0x00100000 -target_address_space [get_bd_addr_spaces jungfraujoch_0/frame_generator_0/Data_m_axi_uram] [get_bd_addr_segs jungfraujoch_0/axi_bram_ctrl_internal_packet_generator_1/S_AXI/Mem0] -force assign_bd_address diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index a1214193..557e2996 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -118,16 +118,9 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { set_property -dict [ list \ CONFIG.FIFO_DEPTH {128} \ CONFIG.FIFO_MEMORY_TYPE {block} \ - ] $axis_addr_fifo_0 - - # Create instance: axis_addr_fifo_1, and set properties - set axis_addr_fifo_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_addr_fifo_1 ] - set_property -dict [ list \ - CONFIG.FIFO_DEPTH {256} \ - CONFIG.FIFO_MEMORY_TYPE {block} \ CONFIG.HAS_AEMPTY {1} \ CONFIG.HAS_AFULL {1} \ - ] $axis_addr_fifo_1 + ] $axis_addr_fifo_0 # Create instance: axis_addr_fifo_2, and set properties set axis_addr_fifo_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_addr_fifo_2 ] @@ -145,13 +138,6 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { CONFIG.FIFO_MEMORY_TYPE {ultra} \ ] $axis_data_fifo_0 - # Create instance: axis_data_fifo_1, and set properties - set axis_data_fifo_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_1 ] - set_property -dict [ list \ - CONFIG.FIFO_DEPTH {256} \ - CONFIG.FIFO_MEMORY_TYPE {block} \ - ] $axis_data_fifo_1 - # Create instance: axis_data_fifo_2, and set properties set axis_data_fifo_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_2 ] set_property -dict [ list \ @@ -213,24 +199,12 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { CONFIG.TDATA_NUM_BYTES {64} \ ] $axis_data_fifo_h2c_data - # Create instance: axis_register_slice_addr_0, and set properties - set axis_register_slice_addr_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 axis_register_slice_addr_0 ] - set_property -dict [ list \ - CONFIG.REG_CONFIG {16} \ - ] $axis_register_slice_addr_0 - # Create instance: axis_register_slice_addr_1, and set properties set axis_register_slice_addr_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 axis_register_slice_addr_1 ] set_property -dict [ list \ CONFIG.REG_CONFIG {16} \ ] $axis_register_slice_addr_1 - # Create instance: axis_register_slice_data_0, and set properties - set axis_register_slice_data_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 axis_register_slice_data_0 ] - set_property -dict [ list \ - CONFIG.REG_CONFIG {16} \ - ] $axis_register_slice_data_0 - # Create instance: axis_register_slice_data_1, and set properties set axis_register_slice_data_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 axis_register_slice_data_1 ] set_property -dict [ list \ @@ -255,6 +229,9 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { CONFIG.REG_CONFIG {16} \ ] $axis_register_slice_udp + # Create instance: axis_switch_0, and set properties + set axis_switch_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_switch:1.1 axis_switch_0 ] + # Create instance: axis_udp_addr_fifo_0, and set properties set axis_udp_addr_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_udp_addr_fifo_0 ] set_property -dict [ list \ @@ -292,12 +269,12 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { # Create instance: data_collection_fsm_0, and set properties set data_collection_fsm_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:data_collection_fsm:1.0 data_collection_fsm_0 ] + # Create instance: frame_generator_0, and set properties + set frame_generator_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:frame_generator:1.0 frame_generator_0 ] + # Create instance: host_writer_0, and set properties set host_writer_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:host_writer:1.0 host_writer_0 ] - # Create instance: internal_packet_generator_0, and set properties - set internal_packet_generator_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:internal_packet_generator:1.0 internal_packet_generator_0 ] - # Create instance: internal_packet_generator_uram, and set properties set internal_packet_generator_uram [ create_bd_cell -type ip -vlnv xilinx.com:ip:blk_mem_gen:8.4 internal_packet_generator_uram ] set_property -dict [ list \ @@ -339,7 +316,7 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { set smartconnect_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_0 ] set_property -dict [ list \ CONFIG.NUM_CLKS {1} \ - CONFIG.NUM_MI {4} \ + CONFIG.NUM_MI {5} \ CONFIG.NUM_SI {1} \ ] $smartconnect_0 @@ -357,16 +334,13 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { # Create interface connections connect_bd_intf_net -intf_net Conn2 [get_bd_intf_pins eth_out] [get_bd_intf_pins network_stack/M00_AXIS] - connect_bd_intf_net -intf_net Conn3 [get_bd_intf_pins eth_in] [get_bd_intf_pins network_stack/eth_in] connect_bd_intf_net -intf_net S_AXIS_1 [get_bd_intf_pins s_axis_h2c_data] [get_bd_intf_pins axis_data_fifo_h2c_data/S_AXIS] connect_bd_intf_net -intf_net axi_bram_ctrl_internal_packet_generator_1_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_1/BRAM_PORTA] [get_bd_intf_pins internal_packet_generator_uram/BRAM_PORTB] connect_bd_intf_net -intf_net axi_bram_ctrl_internal_packet_generator_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_0/BRAM_PORTA] [get_bd_intf_pins internal_packet_generator_uram/BRAM_PORTA] - connect_bd_intf_net -intf_net axis_addr_fifo_0_M_AXIS [get_bd_intf_pins axis_addr_fifo_0/M_AXIS] [get_bd_intf_pins internal_packet_generator_0/addr_in] - connect_bd_intf_net -intf_net axis_addr_fifo_2_M_AXIS [get_bd_intf_pins axis_addr_fifo_1/M_AXIS] [get_bd_intf_pins jf_conversion_0/addr_in] + connect_bd_intf_net -intf_net axis_addr_fifo_0_M_AXIS [get_bd_intf_pins axis_addr_fifo_0/M_AXIS] [get_bd_intf_pins jf_conversion_0/addr_in] connect_bd_intf_net -intf_net axis_addr_fifo_2_M_AXIS1 [get_bd_intf_pins axis_addr_fifo_2/M_AXIS] [get_bd_intf_pins host_writer_0/addr_in] - connect_bd_intf_net -intf_net axis_data_fifo_0_M_AXIS [get_bd_intf_pins axis_data_fifo_0/M_AXIS] [get_bd_intf_pins internal_packet_generator_0/data_in] - connect_bd_intf_net -intf_net axis_data_fifo_2_M_AXIS [get_bd_intf_pins axis_data_fifo_1/M_AXIS] [get_bd_intf_pins timer_hbm/data_in] - connect_bd_intf_net -intf_net axis_data_fifo_4_M_AXIS [get_bd_intf_pins axis_data_fifo_2/M_AXIS] [get_bd_intf_pins jf_conversion_0/data_in] + connect_bd_intf_net -intf_net axis_data_fifo_0_M_AXIS [get_bd_intf_pins axis_data_fifo_0/M_AXIS] [get_bd_intf_pins timer_hbm/data_in] + connect_bd_intf_net -intf_net axis_data_fifo_2_M_AXIS [get_bd_intf_pins axis_data_fifo_2/M_AXIS] [get_bd_intf_pins jf_conversion_0/data_in] connect_bd_intf_net -intf_net axis_data_fifo_4_M_AXIS1 [get_bd_intf_pins axis_data_fifo_3/M_AXIS] [get_bd_intf_pins timer_host/data_in] connect_bd_intf_net -intf_net axis_data_fifo_5_M_AXIS [get_bd_intf_pins axis_data_fifo_4/M_AXIS] [get_bd_intf_pins host_writer_0/data_in] connect_bd_intf_net -intf_net axis_data_fifo_c2h_cmd_M_AXIS [get_bd_intf_pins m_axis_c2h_datamover_cmd] [get_bd_intf_pins axis_data_fifo_c2h_cmd/M_AXIS] @@ -376,8 +350,6 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { connect_bd_intf_net -intf_net axis_register_slice_0_M_AXIS [get_bd_intf_pins axis_addr_fifo_2/S_AXIS] [get_bd_intf_pins axis_register_slice_addr_1/M_AXIS] connect_bd_intf_net -intf_net axis_register_slice_0_M_AXIS1 [get_bd_intf_pins axis_register_slice_data_in_0/M_AXIS] [get_bd_intf_pins load_calibration_0/host_memory_in] connect_bd_intf_net -intf_net axis_register_slice_1_M_AXIS [get_bd_intf_pins axis_data_fifo_4/S_AXIS] [get_bd_intf_pins axis_register_slice_data_1/M_AXIS] - connect_bd_intf_net -intf_net axis_register_slice_2_M_AXIS [get_bd_intf_pins axis_addr_fifo_1/S_AXIS] [get_bd_intf_pins axis_register_slice_addr_0/M_AXIS] - connect_bd_intf_net -intf_net axis_register_slice_data_0_M_AXIS [get_bd_intf_pins axis_data_fifo_1/S_AXIS] [get_bd_intf_pins axis_register_slice_data_0/M_AXIS] connect_bd_intf_net -intf_net axis_register_slice_host_mem_M_AXIS [get_bd_intf_pins axis_data_fifo_c2h_data/S_AXIS] [get_bd_intf_pins axis_register_slice_host_mem/M_AXIS] connect_bd_intf_net -intf_net axis_register_slice_udp_M_AXIS [get_bd_intf_pins axis_register_slice_udp/M_AXIS] [get_bd_intf_pins data_collection_fsm_0/eth_in] connect_bd_intf_net -intf_net axis_udp_addr_fifo_0_M_AXIS [get_bd_intf_pins axis_udp_addr_fifo_0/M_AXIS] [get_bd_intf_pins data_collection_fsm_0/addr_in] @@ -386,12 +358,13 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { connect_bd_intf_net -intf_net axis_work_request_fifo_0_M_AXIS [get_bd_intf_pins axis_work_request_fifo_0/M_AXIS] [get_bd_intf_pins host_writer_0/s_axis_work_request] connect_bd_intf_net -intf_net data_collection_fsm_0_addr_out [get_bd_intf_pins axis_addr_fifo_0/S_AXIS] [get_bd_intf_pins data_collection_fsm_0/addr_out] connect_bd_intf_net -intf_net data_collection_fsm_0_data_out [get_bd_intf_pins axis_data_fifo_0/S_AXIS] [get_bd_intf_pins data_collection_fsm_0/data_out] + connect_bd_intf_net -intf_net eth_in_1 [get_bd_intf_pins axis_switch_0/M00_AXIS] [get_bd_intf_pins network_stack/eth_in] + connect_bd_intf_net -intf_net eth_in_2 [get_bd_intf_pins eth_in] [get_bd_intf_pins axis_switch_0/S00_AXIS] + connect_bd_intf_net -intf_net frame_generator_0_data_out [get_bd_intf_pins axis_switch_0/S01_AXIS] [get_bd_intf_pins frame_generator_0/data_out] + connect_bd_intf_net -intf_net frame_generator_0_m_axi_uram [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_1/S_AXI] [get_bd_intf_pins frame_generator_0/m_axi_uram] connect_bd_intf_net -intf_net host_writer_0_datamover_out_cmd [get_bd_intf_pins axis_data_fifo_c2h_cmd/S_AXIS] [get_bd_intf_pins host_writer_0/datamover_out_cmd] connect_bd_intf_net -intf_net host_writer_0_host_memory_out [get_bd_intf_pins axis_register_slice_host_mem/S_AXIS] [get_bd_intf_pins host_writer_0/host_memory_out] connect_bd_intf_net -intf_net host_writer_0_m_axis_completion [get_bd_intf_pins axis_work_completion_fifo_0/S_AXIS] [get_bd_intf_pins host_writer_0/m_axis_completion] - connect_bd_intf_net -intf_net internal_packet_generator_0_addr_out [get_bd_intf_pins axis_register_slice_addr_0/S_AXIS] [get_bd_intf_pins internal_packet_generator_0/addr_out] - connect_bd_intf_net -intf_net internal_packet_generator_0_data_out [get_bd_intf_pins axis_register_slice_data_0/S_AXIS] [get_bd_intf_pins internal_packet_generator_0/data_out] - connect_bd_intf_net -intf_net internal_packet_generator_0_m_axi_frame [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_1/S_AXI] [get_bd_intf_pins internal_packet_generator_0/m_axi_frame] connect_bd_intf_net -intf_net jf_conversion_0_addr_out [get_bd_intf_pins axis_register_slice_addr_1/S_AXIS] [get_bd_intf_pins jf_conversion_0/addr_out] connect_bd_intf_net -intf_net jf_conversion_0_data_out [get_bd_intf_pins axis_data_fifo_3/S_AXIS] [get_bd_intf_pins jf_conversion_0/data_out] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p0 [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/S00_AXI] @@ -417,6 +390,7 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { connect_bd_intf_net -intf_net smartconnect_0_M01_AXI [get_bd_intf_pins mailbox_0/S0_AXI] [get_bd_intf_pins smartconnect_0/M01_AXI] connect_bd_intf_net -intf_net smartconnect_0_M02_AXI [get_bd_intf_pins load_calibration_0/s_axi_control] [get_bd_intf_pins smartconnect_0/M02_AXI] connect_bd_intf_net -intf_net smartconnect_0_M03_AXI [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_0/S_AXI] [get_bd_intf_pins smartconnect_0/M03_AXI] + connect_bd_intf_net -intf_net smartconnect_0_M04_AXI [get_bd_intf_pins frame_generator_0/s_axi_control] [get_bd_intf_pins smartconnect_0/M04_AXI] connect_bd_intf_net -intf_net smartconnect_1_M00_AXI [get_bd_intf_pins m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/M00_AXI] connect_bd_intf_net -intf_net smartconnect_2_M00_AXI [get_bd_intf_pins m_axi_d_hbm_p2] [get_bd_intf_pins smartconnect_2/M00_AXI] connect_bd_intf_net -intf_net timer_hbm_data_out [get_bd_intf_pins axis_data_fifo_2/S_AXIS] [get_bd_intf_pins timer_hbm/data_out] @@ -424,19 +398,19 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { # Create port connections connect_bd_net -net action_config_0_clear_counters [get_bd_pins action_config_0/clear_counters] [get_bd_pins network_stack/clear_counters] - connect_bd_net -net action_config_0_data_collection_cancel [get_bd_pins action_config_0/data_collection_cancel] [get_bd_pins data_collection_fsm_0/in_cancel] [get_bd_pins internal_packet_generator_0/in_cancel] + connect_bd_net -net action_config_0_data_collection_cancel [get_bd_pins action_config_0/data_collection_cancel] [get_bd_pins data_collection_fsm_0/in_cancel] connect_bd_net -net action_config_0_data_collection_fsm_start [get_bd_pins action_config_0/data_collection_start] [get_bd_pins data_collection_fsm_0/in_run] [get_bd_pins network_stack/data_collection_start] connect_bd_net -net action_config_0_data_collection_mode [get_bd_pins action_config_0/data_collection_mode] [get_bd_pins data_collection_fsm_0/mode] - connect_bd_net -net action_config_0_fpga_ipv4_addr [get_bd_pins action_config_0/fpga_ipv4_addr] [get_bd_pins network_stack/fpga_ipv4_addr] - connect_bd_net -net action_config_0_fpga_mac_addr [get_bd_pins action_config_0/fpga_mac_addr] [get_bd_pins network_stack/fpga_mac_addr] + connect_bd_net -net action_config_0_fpga_ipv4_addr [get_bd_pins action_config_0/fpga_ipv4_addr] [get_bd_pins frame_generator_0/src_ipv4_addr] [get_bd_pins network_stack/fpga_ipv4_addr] + connect_bd_net -net action_config_0_fpga_mac_addr [get_bd_pins action_config_0/fpga_mac_addr] [get_bd_pins frame_generator_0/src_mac_addr] [get_bd_pins network_stack/fpga_mac_addr] connect_bd_net -net action_config_0_frames_per_trigger [get_bd_pins action_config_0/nframes] [get_bd_pins data_collection_fsm_0/nframes] connect_bd_net -net action_config_0_hbm_size_bytes [get_bd_pins action_config_0/hbm_size_bytes] [get_bd_pins data_collection_fsm_0/hbm_size_bytes] [get_bd_pins load_calibration_0/hbm_size_bytes] connect_bd_net -net action_config_0_nmodules [get_bd_pins action_config_0/nmodules] [get_bd_pins data_collection_fsm_0/nmodules] connect_bd_net -net action_config_0_nstorage_cells [get_bd_pins action_config_0/nstorage_cells] [get_bd_pins data_collection_fsm_0/nstorage_cells] connect_bd_net -net action_config_0_one_over_energy [get_bd_pins action_config_0/one_over_energy] [get_bd_pins data_collection_fsm_0/one_over_energy] - connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_0/aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_0/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins internal_packet_generator_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins smartconnect_1/aclk] [get_bd_pins smartconnect_2/aclk] [get_bd_pins timer_hbm/ap_clk] [get_bd_pins timer_host/ap_clk] - connect_bd_net -net axis_addr_fifo_2_almost_empty [get_bd_pins action_config_0/calib_addr_fifo_empty] [get_bd_pins axis_addr_fifo_1/almost_empty] - connect_bd_net -net axis_addr_fifo_2_almost_full [get_bd_pins action_config_0/calib_addr_fifo_full] [get_bd_pins axis_addr_fifo_1/almost_full] + connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_switch_0/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins frame_generator_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins smartconnect_1/aclk] [get_bd_pins smartconnect_2/aclk] [get_bd_pins timer_hbm/ap_clk] [get_bd_pins timer_host/ap_clk] + connect_bd_net -net axis_addr_fifo_0_almost_empty [get_bd_pins action_config_0/calib_addr_fifo_empty] [get_bd_pins axis_addr_fifo_0/almost_empty] + connect_bd_net -net axis_addr_fifo_0_almost_full [get_bd_pins action_config_0/calib_addr_fifo_full] [get_bd_pins axis_addr_fifo_0/almost_full] connect_bd_net -net axis_addr_fifo_4_almost_empty [get_bd_pins action_config_0/last_addr_fifo_empty] [get_bd_pins axis_addr_fifo_2/almost_empty] connect_bd_net -net axis_addr_fifo_4_almost_full [get_bd_pins action_config_0/last_addr_fifo_full] [get_bd_pins axis_addr_fifo_2/almost_full] connect_bd_net -net axis_data_fifo_10_almost_empty [get_bd_pins action_config_0/last_data_fifo_empty] [get_bd_pins axis_data_fifo_4/almost_empty] @@ -477,8 +451,8 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { connect_bd_net -net network_stack_packets_sls_ap_vld [get_bd_pins action_config_0/packets_sls_valid] [get_bd_pins network_stack/packets_sls_ap_vld] connect_bd_net -net network_stack_packets_udp [get_bd_pins action_config_0/packets_udp] [get_bd_pins network_stack/packets_udp] connect_bd_net -net network_stack_packets_udp_ap_vld [get_bd_pins action_config_0/packets_udp_valid] [get_bd_pins network_stack/packets_udp_ap_vld] - connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_addr_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_0/aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_0/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] [get_bd_pins smartconnect_1/aresetn] [get_bd_pins smartconnect_2/aresetn] - connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins internal_packet_generator_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins timer_hbm/ap_rst_n] [get_bd_pins timer_host/ap_rst_n] + connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_switch_0/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] [get_bd_pins smartconnect_1/aresetn] [get_bd_pins smartconnect_2/aresetn] + connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins frame_generator_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins timer_hbm/ap_rst_n] [get_bd_pins timer_host/ap_rst_n] connect_bd_net -net timer_hbm_counter [get_bd_pins action_config_0/stalls_hbm] [get_bd_pins timer_hbm/counter] connect_bd_net -net timer_hbm_counter_ap_vld [get_bd_pins action_config_0/stalls_hbm_valid] [get_bd_pins timer_hbm/counter_ap_vld] connect_bd_net -net timer_host_counter [get_bd_pins action_config_0/stalls_host] [get_bd_pins timer_host/counter] diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index a91fe01d..bb53a7e4 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -213,6 +213,22 @@ void HLSSimulatedDevice::HLSMainThread() { ap_uint<8> err_reg; + if (cfg.mode & MODE_INTERNAL_PACKET_GEN) { + frame_generator(din_eth, + reinterpret_cast *>(internal_pkt_gen_frame.data()), + cfg.nframes + DELAY_FRAMES_STOP_AND_QUIT + 1, + cfg.nmodules, + mac_addr, + mac_addr, + ipv4_addr, + ipv4_addr, + INT_PKT_GEN_BUNCHID, + INT_PKT_GEN_EXPTTIME, + INT_PKT_GEN_DEBUG); + if (logger) + logger->Info("Packets ready {}", din_eth.size()); + } + while(!din_eth.empty()) ethernet(din_eth, ip1, arp1, mac_addr, eth_packets, clear_counters); @@ -252,7 +268,7 @@ void HLSSimulatedDevice::HLSMainThread() { // 1. Parse incoming UDP packets idle_data_collection = 0; hls_cores.emplace_back([&] { - while (idle_data_collection == 0) { + while ((idle_data_collection == 0) || (!raw0.empty())) { data_collection_fsm(raw0, raw1, addr0, addr1, run_data_collection, @@ -268,17 +284,12 @@ void HLSSimulatedDevice::HLSMainThread() { } }); - // Generate internal packets - hls_cores.emplace_back([&] { internal_packet_generator(raw1, raw2, addr1, addr2, - reinterpret_cast *>(internal_pkt_gen_frame.data()), - cancel_data_collection); }); - // Timer procedure - count how many times pedestal_corr/gain_corr is not accepting input (to help track down latency issues) - hls_cores.emplace_back([&] { timer_host(raw2, raw3, counter_hbm); }); + hls_cores.emplace_back([&] { timer_host(raw1, raw2, counter_hbm); }); // 2. Apply pedestal & gain corrections - hls_cores.emplace_back([&] { jf_conversion(raw3, converted_1, - addr2, addr3, + hls_cores.emplace_back([&] { jf_conversion(raw2, converted_1, + addr1, addr2, hbm.data(), hbm.data(), hbm.data(), @@ -297,7 +308,7 @@ void HLSSimulatedDevice::HLSMainThread() { // 3. Prepare data to write to host memory hls_cores.emplace_back([&] { - host_writer(converted_2, addr3, datamover_out.GetDataStream(), + host_writer(converted_2, addr2, datamover_out.GetDataStream(), datamover_out.GetCtrlStream(), work_request_stream, completion_stream, packets_processed, host_writer_idle, err_reg); }); @@ -340,6 +351,9 @@ void HLSSimulatedDevice::HLSMainThread() { while (!datamover_out.IsIdle()) std::this_thread::sleep_for(std::chrono::milliseconds(100)); + if (logger) + logger->Info("Packets Eth {} UDP {} SLS {} Proc {}", eth_packets, udp_packets, sls_packets, packets_processed); + idle = true; } diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index 8268a552..a390de67 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -88,14 +88,12 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_custom_frame", "[FPGA][Ful for (int image = 0; image < 4; image++) { for (int m = 0; m < nmodules; m++) { - REQUIRE(test.Counters().GetCompletion(image, m).timestamp == INT_PKT_GEN_TIMESTAMP); - REQUIRE(test.Counters().GetCompletion(image, m).bunchid == INT_PKT_GEN_BUNCHID); + REQUIRE(test.Counters().GetCompletion(image, m).timestamp == INT_PKT_GEN_EXPTTIME * image); + REQUIRE(test.Counters().GetCompletion(image, m).bunchid == INT_PKT_GEN_BUNCHID + image); REQUIRE(test.Counters().GetCompletion(image, m).exptime == INT_PKT_GEN_EXPTTIME); auto imageBuf = (uint16_t *) test.GetFrameBuffer(image, m); for (int i = 0; i < RAW_MODULE_SIZE; i++) { - if (imageBuf[i] != test_frame[i]) - std::cout << m << " " << i << " " << imageBuf[i] << std::endl; REQUIRE(imageBuf[i] == test_frame[i]); } } @@ -405,7 +403,7 @@ TEST_CASE("HLS_C_Simulation_check_convert_full_range", "[FPGA][Full]") { TEST_CASE("HLS_C_Simulation_internal_packet_generator_convert_full_range", "[FPGA][Full]") { double energy = 6.0; - + Logger logger("logger"); const uint16_t nmodules = 4; DiffractionExperiment x((DetectorGeometry(nmodules, 2, 8, 36, true))); @@ -437,6 +435,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_convert_full_range", "[FPG } HLSSimulatedDevice test(0, 64); + test.EnableLogging(&logger); REQUIRE_NOTHROW(test.InitializeCalibration(x, c)); REQUIRE_NOTHROW(test.StartAction(x)); @@ -857,7 +856,7 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { TEST_CASE("HLS_C_Simulation_internal_packet_generator_15_storage_cell_convert_G0", "[FPGA][Full]") { const uint16_t nmodules = 2; - const uint16_t ntrigger = 4; + const uint16_t ntrigger = 2; const uint16_t nstoragecells = 15; DiffractionExperiment x((DetectorGeometry(nmodules))); @@ -905,7 +904,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_15_storage_cell_convert_G0 TEST_CASE("HLS_C_Simulation_internal_packet_generator_8_storage_cell_convert_G0", "[FPGA][Full]") { const uint16_t nmodules = 2; - const uint16_t ntrigger = 4; + const uint16_t ntrigger = 2; const uint16_t nstoragecells = 8; DiffractionExperiment x((DetectorGeometry(nmodules))); From 0c471b37604517c9d60c61abebbaca56a3d12a9b Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 13 Sep 2023 20:53:55 +0200 Subject: [PATCH 211/224] FPGA: Some clean-up of frame generator --- fpga/scripts/jfjoch.tcl | 76 +++++++++++++++++++++++------------------ 1 file changed, 43 insertions(+), 33 deletions(-) diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index 557e2996..f4abe86d 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -2,6 +2,7 @@ ## SPDX-License-Identifier: CERN-OHL-S-2.0 # Hierarchical cell: jungfraujoch +# Hierarchical cell: jungfraujoch_0 proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { variable script_folder @@ -100,7 +101,7 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { set_property -dict [ list \ CONFIG.DATA_WIDTH {512} \ CONFIG.PROTOCOL {AXI4} \ - CONFIG.READ_LATENCY {1} \ + CONFIG.READ_LATENCY {3} \ CONFIG.SINGLE_PORT_BRAM {1} \ ] $axi_bram_ctrl_internal_packet_generator_0 @@ -109,7 +110,7 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { set_property -dict [ list \ CONFIG.DATA_WIDTH {512} \ CONFIG.PROTOCOL {AXI4} \ - CONFIG.READ_LATENCY {1} \ + CONFIG.READ_LATENCY {3} \ CONFIG.SINGLE_PORT_BRAM {1} \ ] $axi_bram_ctrl_internal_packet_generator_1 @@ -122,14 +123,14 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { CONFIG.HAS_AFULL {1} \ ] $axis_addr_fifo_0 - # Create instance: axis_addr_fifo_2, and set properties - set axis_addr_fifo_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_addr_fifo_2 ] + # Create instance: axis_addr_fifo_1, and set properties + set axis_addr_fifo_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_addr_fifo_1 ] set_property -dict [ list \ CONFIG.FIFO_DEPTH {256} \ CONFIG.FIFO_MEMORY_TYPE {block} \ CONFIG.HAS_AEMPTY {1} \ CONFIG.HAS_AFULL {1} \ - ] $axis_addr_fifo_2 + ] $axis_addr_fifo_1 # Create instance: axis_data_fifo_0, and set properties set axis_data_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_0 ] @@ -138,30 +139,30 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { CONFIG.FIFO_MEMORY_TYPE {ultra} \ ] $axis_data_fifo_0 + # Create instance: axis_data_fifo_1, and set properties + set axis_data_fifo_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_1 ] + set_property -dict [ list \ + CONFIG.FIFO_DEPTH {256} \ + CONFIG.FIFO_MEMORY_TYPE {block} \ + CONFIG.HAS_AEMPTY {1} \ + CONFIG.HAS_AFULL {1} \ + ] $axis_data_fifo_1 + # Create instance: axis_data_fifo_2, and set properties set axis_data_fifo_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_2 ] set_property -dict [ list \ CONFIG.FIFO_DEPTH {256} \ CONFIG.FIFO_MEMORY_TYPE {block} \ - CONFIG.HAS_AEMPTY {1} \ - CONFIG.HAS_AFULL {1} \ ] $axis_data_fifo_2 # Create instance: axis_data_fifo_3, and set properties set axis_data_fifo_3 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_3 ] - set_property -dict [ list \ - CONFIG.FIFO_DEPTH {256} \ - CONFIG.FIFO_MEMORY_TYPE {block} \ - ] $axis_data_fifo_3 - - # Create instance: axis_data_fifo_4, and set properties - set axis_data_fifo_4 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_4 ] set_property -dict [ list \ CONFIG.FIFO_DEPTH {32768} \ CONFIG.FIFO_MEMORY_TYPE {ultra} \ CONFIG.HAS_AEMPTY {1} \ CONFIG.HAS_AFULL {1} \ - ] $axis_data_fifo_4 + ] $axis_data_fifo_3 # Create instance: axis_data_fifo_c2h_cmd, and set properties set axis_data_fifo_c2h_cmd [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_data_fifo_c2h_cmd ] @@ -199,6 +200,9 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { CONFIG.TDATA_NUM_BYTES {64} \ ] $axis_data_fifo_h2c_data + # Create instance: axis_frame_generator_fifo_0, and set properties + set axis_frame_generator_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_frame_generator_fifo_0 ] + # Create instance: axis_register_slice_addr_1, and set properties set axis_register_slice_addr_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 axis_register_slice_addr_1 ] set_property -dict [ list \ @@ -231,6 +235,9 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { # Create instance: axis_switch_0, and set properties set axis_switch_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_switch:1.1 axis_switch_0 ] + set_property -dict [ list \ + CONFIG.ARB_ON_TLAST {1} \ + ] $axis_switch_0 # Create instance: axis_udp_addr_fifo_0, and set properties set axis_udp_addr_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_udp_addr_fifo_0 ] @@ -289,6 +296,8 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { CONFIG.Port_B_Clock {100} \ CONFIG.Port_B_Enable_Rate {100} \ CONFIG.Port_B_Write_Rate {50} \ + CONFIG.READ_LATENCY_A {3} \ + CONFIG.READ_LATENCY_B {3} \ CONFIG.Read_Width_B {512} \ CONFIG.Use_Byte_Write_Enable {true} \ CONFIG.Use_RSTB_Pin {true} \ @@ -338,18 +347,19 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { connect_bd_intf_net -intf_net axi_bram_ctrl_internal_packet_generator_1_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_1/BRAM_PORTA] [get_bd_intf_pins internal_packet_generator_uram/BRAM_PORTB] connect_bd_intf_net -intf_net axi_bram_ctrl_internal_packet_generator_BRAM_PORTA [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_0/BRAM_PORTA] [get_bd_intf_pins internal_packet_generator_uram/BRAM_PORTA] connect_bd_intf_net -intf_net axis_addr_fifo_0_M_AXIS [get_bd_intf_pins axis_addr_fifo_0/M_AXIS] [get_bd_intf_pins jf_conversion_0/addr_in] - connect_bd_intf_net -intf_net axis_addr_fifo_2_M_AXIS1 [get_bd_intf_pins axis_addr_fifo_2/M_AXIS] [get_bd_intf_pins host_writer_0/addr_in] + connect_bd_intf_net -intf_net axis_addr_fifo_1_M_AXIS1 [get_bd_intf_pins axis_addr_fifo_1/M_AXIS] [get_bd_intf_pins host_writer_0/addr_in] connect_bd_intf_net -intf_net axis_data_fifo_0_M_AXIS [get_bd_intf_pins axis_data_fifo_0/M_AXIS] [get_bd_intf_pins timer_hbm/data_in] - connect_bd_intf_net -intf_net axis_data_fifo_2_M_AXIS [get_bd_intf_pins axis_data_fifo_2/M_AXIS] [get_bd_intf_pins jf_conversion_0/data_in] - connect_bd_intf_net -intf_net axis_data_fifo_4_M_AXIS1 [get_bd_intf_pins axis_data_fifo_3/M_AXIS] [get_bd_intf_pins timer_host/data_in] - connect_bd_intf_net -intf_net axis_data_fifo_5_M_AXIS [get_bd_intf_pins axis_data_fifo_4/M_AXIS] [get_bd_intf_pins host_writer_0/data_in] + connect_bd_intf_net -intf_net axis_frame_generator_fifo_1_M_AXIS [get_bd_intf_pins axis_frame_generator_fifo_0/M_AXIS] [get_bd_intf_pins axis_switch_0/S01_AXIS] + connect_bd_intf_net -intf_net axis_data_fifo_1_M_AXIS [get_bd_intf_pins axis_data_fifo_1/M_AXIS] [get_bd_intf_pins jf_conversion_0/data_in] + connect_bd_intf_net -intf_net axis_data_fifo_2_M_AXIS1 [get_bd_intf_pins axis_data_fifo_2/M_AXIS] [get_bd_intf_pins timer_host/data_in] + connect_bd_intf_net -intf_net axis_data_fifo_3_M_AXIS [get_bd_intf_pins axis_data_fifo_3/M_AXIS] [get_bd_intf_pins host_writer_0/data_in] connect_bd_intf_net -intf_net axis_data_fifo_c2h_cmd_M_AXIS [get_bd_intf_pins m_axis_c2h_datamover_cmd] [get_bd_intf_pins axis_data_fifo_c2h_cmd/M_AXIS] connect_bd_intf_net -intf_net axis_data_fifo_c2h_data_M_AXIS [get_bd_intf_pins m_axis_c2h_data] [get_bd_intf_pins axis_data_fifo_c2h_data/M_AXIS] connect_bd_intf_net -intf_net axis_data_fifo_h2c_cmd_M_AXIS [get_bd_intf_pins m_axis_h2c_datamover_cmd] [get_bd_intf_pins axis_data_fifo_h2c_cmd/M_AXIS] connect_bd_intf_net -intf_net axis_data_fifo_h2c_data_M_AXIS [get_bd_intf_pins axis_data_fifo_h2c_data/M_AXIS] [get_bd_intf_pins axis_register_slice_data_in_0/S_AXIS] - connect_bd_intf_net -intf_net axis_register_slice_0_M_AXIS [get_bd_intf_pins axis_addr_fifo_2/S_AXIS] [get_bd_intf_pins axis_register_slice_addr_1/M_AXIS] - connect_bd_intf_net -intf_net axis_register_slice_0_M_AXIS1 [get_bd_intf_pins axis_register_slice_data_in_0/M_AXIS] [get_bd_intf_pins load_calibration_0/host_memory_in] - connect_bd_intf_net -intf_net axis_register_slice_1_M_AXIS [get_bd_intf_pins axis_data_fifo_4/S_AXIS] [get_bd_intf_pins axis_register_slice_data_1/M_AXIS] + connect_bd_intf_net -intf_net axis_register_slice_addr_1_M_AXIS [get_bd_intf_pins axis_addr_fifo_1/S_AXIS] [get_bd_intf_pins axis_register_slice_addr_1/M_AXIS] + connect_bd_intf_net -intf_net axis_register_slice_data_in_0_M_AXIS1 [get_bd_intf_pins axis_register_slice_data_in_0/M_AXIS] [get_bd_intf_pins load_calibration_0/host_memory_in] + connect_bd_intf_net -intf_net axis_register_slice_data_1_M_AXIS [get_bd_intf_pins axis_data_fifo_3/S_AXIS] [get_bd_intf_pins axis_register_slice_data_1/M_AXIS] connect_bd_intf_net -intf_net axis_register_slice_host_mem_M_AXIS [get_bd_intf_pins axis_data_fifo_c2h_data/S_AXIS] [get_bd_intf_pins axis_register_slice_host_mem/M_AXIS] connect_bd_intf_net -intf_net axis_register_slice_udp_M_AXIS [get_bd_intf_pins axis_register_slice_udp/M_AXIS] [get_bd_intf_pins data_collection_fsm_0/eth_in] connect_bd_intf_net -intf_net axis_udp_addr_fifo_0_M_AXIS [get_bd_intf_pins axis_udp_addr_fifo_0/M_AXIS] [get_bd_intf_pins data_collection_fsm_0/addr_in] @@ -360,13 +370,13 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { connect_bd_intf_net -intf_net data_collection_fsm_0_data_out [get_bd_intf_pins axis_data_fifo_0/S_AXIS] [get_bd_intf_pins data_collection_fsm_0/data_out] connect_bd_intf_net -intf_net eth_in_1 [get_bd_intf_pins axis_switch_0/M00_AXIS] [get_bd_intf_pins network_stack/eth_in] connect_bd_intf_net -intf_net eth_in_2 [get_bd_intf_pins eth_in] [get_bd_intf_pins axis_switch_0/S00_AXIS] - connect_bd_intf_net -intf_net frame_generator_0_data_out [get_bd_intf_pins axis_switch_0/S01_AXIS] [get_bd_intf_pins frame_generator_0/data_out] + connect_bd_intf_net -intf_net frame_generator_0_data_out [get_bd_intf_pins axis_frame_generator_fifo_0/S_AXIS] [get_bd_intf_pins frame_generator_0/data_out] connect_bd_intf_net -intf_net frame_generator_0_m_axi_uram [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_1/S_AXI] [get_bd_intf_pins frame_generator_0/m_axi_uram] connect_bd_intf_net -intf_net host_writer_0_datamover_out_cmd [get_bd_intf_pins axis_data_fifo_c2h_cmd/S_AXIS] [get_bd_intf_pins host_writer_0/datamover_out_cmd] connect_bd_intf_net -intf_net host_writer_0_host_memory_out [get_bd_intf_pins axis_register_slice_host_mem/S_AXIS] [get_bd_intf_pins host_writer_0/host_memory_out] connect_bd_intf_net -intf_net host_writer_0_m_axis_completion [get_bd_intf_pins axis_work_completion_fifo_0/S_AXIS] [get_bd_intf_pins host_writer_0/m_axis_completion] connect_bd_intf_net -intf_net jf_conversion_0_addr_out [get_bd_intf_pins axis_register_slice_addr_1/S_AXIS] [get_bd_intf_pins jf_conversion_0/addr_out] - connect_bd_intf_net -intf_net jf_conversion_0_data_out [get_bd_intf_pins axis_data_fifo_3/S_AXIS] [get_bd_intf_pins jf_conversion_0/data_out] + connect_bd_intf_net -intf_net jf_conversion_0_data_out [get_bd_intf_pins axis_data_fifo_2/S_AXIS] [get_bd_intf_pins jf_conversion_0/data_out] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p0 [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/S00_AXI] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p1 [get_bd_intf_pins m_axi_d_hbm_p1] [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p1] connect_bd_intf_net -intf_net jf_conversion_0_m_axi_d_hbm_p2 [get_bd_intf_pins jf_conversion_0/m_axi_d_hbm_p2] [get_bd_intf_pins smartconnect_2/S00_AXI] @@ -393,7 +403,7 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { connect_bd_intf_net -intf_net smartconnect_0_M04_AXI [get_bd_intf_pins frame_generator_0/s_axi_control] [get_bd_intf_pins smartconnect_0/M04_AXI] connect_bd_intf_net -intf_net smartconnect_1_M00_AXI [get_bd_intf_pins m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/M00_AXI] connect_bd_intf_net -intf_net smartconnect_2_M00_AXI [get_bd_intf_pins m_axi_d_hbm_p2] [get_bd_intf_pins smartconnect_2/M00_AXI] - connect_bd_intf_net -intf_net timer_hbm_data_out [get_bd_intf_pins axis_data_fifo_2/S_AXIS] [get_bd_intf_pins timer_hbm/data_out] + connect_bd_intf_net -intf_net timer_hbm_data_out [get_bd_intf_pins axis_data_fifo_1/S_AXIS] [get_bd_intf_pins timer_hbm/data_out] connect_bd_intf_net -intf_net timer_host_data_out [get_bd_intf_pins axis_register_slice_data_1/S_AXIS] [get_bd_intf_pins timer_host/data_out] # Create port connections @@ -408,15 +418,15 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { connect_bd_net -net action_config_0_nmodules [get_bd_pins action_config_0/nmodules] [get_bd_pins data_collection_fsm_0/nmodules] connect_bd_net -net action_config_0_nstorage_cells [get_bd_pins action_config_0/nstorage_cells] [get_bd_pins data_collection_fsm_0/nstorage_cells] connect_bd_net -net action_config_0_one_over_energy [get_bd_pins action_config_0/one_over_energy] [get_bd_pins data_collection_fsm_0/one_over_energy] - connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_4/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_switch_0/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins frame_generator_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins smartconnect_1/aclk] [get_bd_pins smartconnect_2/aclk] [get_bd_pins timer_hbm/ap_clk] [get_bd_pins timer_host/ap_clk] + connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_frame_generator_fifo_0/s_axis_aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_switch_0/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins frame_generator_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins smartconnect_1/aclk] [get_bd_pins smartconnect_2/aclk] [get_bd_pins timer_hbm/ap_clk] [get_bd_pins timer_host/ap_clk] connect_bd_net -net axis_addr_fifo_0_almost_empty [get_bd_pins action_config_0/calib_addr_fifo_empty] [get_bd_pins axis_addr_fifo_0/almost_empty] connect_bd_net -net axis_addr_fifo_0_almost_full [get_bd_pins action_config_0/calib_addr_fifo_full] [get_bd_pins axis_addr_fifo_0/almost_full] - connect_bd_net -net axis_addr_fifo_4_almost_empty [get_bd_pins action_config_0/last_addr_fifo_empty] [get_bd_pins axis_addr_fifo_2/almost_empty] - connect_bd_net -net axis_addr_fifo_4_almost_full [get_bd_pins action_config_0/last_addr_fifo_full] [get_bd_pins axis_addr_fifo_2/almost_full] - connect_bd_net -net axis_data_fifo_10_almost_empty [get_bd_pins action_config_0/last_data_fifo_empty] [get_bd_pins axis_data_fifo_4/almost_empty] - connect_bd_net -net axis_data_fifo_10_almost_full [get_bd_pins action_config_0/last_data_fifo_full] [get_bd_pins axis_data_fifo_4/almost_full] - connect_bd_net -net axis_data_fifo_4_almost_empty [get_bd_pins action_config_0/calib_data_fifo_empty] [get_bd_pins axis_data_fifo_2/almost_empty] - connect_bd_net -net axis_data_fifo_4_almost_full [get_bd_pins action_config_0/calib_data_fifo_full] [get_bd_pins axis_data_fifo_2/almost_full] + connect_bd_net -net axis_addr_fifo_4_almost_empty [get_bd_pins action_config_0/last_addr_fifo_empty] [get_bd_pins axis_addr_fifo_1/almost_empty] + connect_bd_net -net axis_addr_fifo_4_almost_full [get_bd_pins action_config_0/last_addr_fifo_full] [get_bd_pins axis_addr_fifo_1/almost_full] + connect_bd_net -net axis_data_fifo_10_almost_empty [get_bd_pins action_config_0/last_data_fifo_empty] [get_bd_pins axis_data_fifo_3/almost_empty] + connect_bd_net -net axis_data_fifo_10_almost_full [get_bd_pins action_config_0/last_data_fifo_full] [get_bd_pins axis_data_fifo_3/almost_full] + connect_bd_net -net axis_data_fifo_4_almost_empty [get_bd_pins action_config_0/calib_data_fifo_empty] [get_bd_pins axis_data_fifo_1/almost_empty] + connect_bd_net -net axis_data_fifo_4_almost_full [get_bd_pins action_config_0/calib_data_fifo_full] [get_bd_pins axis_data_fifo_1/almost_full] connect_bd_net -net axis_data_fifo_c2h_cmd_almost_empty [get_bd_pins action_config_0/c2h_cmd_fifo_empty] [get_bd_pins axis_data_fifo_c2h_cmd/almost_empty] connect_bd_net -net axis_data_fifo_c2h_cmd_almost_full [get_bd_pins action_config_0/c2h_cmd_fifo_full] [get_bd_pins axis_data_fifo_c2h_cmd/almost_full] connect_bd_net -net axis_data_fifo_c2h_data_almost_empty [get_bd_pins action_config_0/c2h_data_fifo_empty] [get_bd_pins axis_data_fifo_c2h_data/almost_empty] @@ -451,7 +461,7 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { connect_bd_net -net network_stack_packets_sls_ap_vld [get_bd_pins action_config_0/packets_sls_valid] [get_bd_pins network_stack/packets_sls_ap_vld] connect_bd_net -net network_stack_packets_udp [get_bd_pins action_config_0/packets_udp] [get_bd_pins network_stack/packets_udp] connect_bd_net -net network_stack_packets_udp_ap_vld [get_bd_pins action_config_0/packets_udp_valid] [get_bd_pins network_stack/packets_udp_ap_vld] - connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_4/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_switch_0/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] [get_bd_pins smartconnect_1/aresetn] [get_bd_pins smartconnect_2/aresetn] + connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_frame_generator_fifo_0/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_switch_0/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] [get_bd_pins smartconnect_1/aresetn] [get_bd_pins smartconnect_2/aresetn] connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins frame_generator_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins timer_hbm/ap_rst_n] [get_bd_pins timer_host/ap_rst_n] connect_bd_net -net timer_hbm_counter [get_bd_pins action_config_0/stalls_hbm] [get_bd_pins timer_hbm/counter] connect_bd_net -net timer_hbm_counter_ap_vld [get_bd_pins action_config_0/stalls_hbm_valid] [get_bd_pins timer_hbm/counter_ap_vld] From f3e85deb31ff5a8af324a5e29e7b3612e93b84f3 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 13 Sep 2023 20:55:10 +0200 Subject: [PATCH 212/224] FPGA: Increase PCIe BAR size to 16 MB --- fpga/scripts/pcie_dma.tcl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fpga/scripts/pcie_dma.tcl b/fpga/scripts/pcie_dma.tcl index 1e141532..84cfe3b5 100644 --- a/fpga/scripts/pcie_dma.tcl +++ b/fpga/scripts/pcie_dma.tcl @@ -139,7 +139,7 @@ proc create_hier_cell_pcie_dma_0 { parentCell nameHier } { CONFIG.axi_id_width {2} \ CONFIG.axil_master_64bit_en {false} \ CONFIG.axilite_master_en {true} \ - CONFIG.axilite_master_size {4} \ + CONFIG.axilite_master_size {16} \ CONFIG.axisten_freq {250} \ CONFIG.cfg_mgmt_if {false} \ CONFIG.copy_pf0 {true} \ From 0b95456d3d1b3096e28b4fb9fe85edf2126cfa1b Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 13 Sep 2023 21:44:20 +0200 Subject: [PATCH 213/224] Adapt PCIe driver and tests for the new frame generator --- common/Definitions.h | 5 ++--- fpga/pcie_driver/ActionConfig.h | 11 ++++++++++ fpga/pcie_driver/jfjoch_drv.h | 21 ++++++++++++++++---- fpga/pcie_driver/jfjoch_function.c | 32 ++++++++++++++++++++++++------ fpga/pcie_driver/jfjoch_ioctl.c | 5 +++++ fpga/pcie_driver/jfjoch_ioctl.h | 1 + receiver/FPGAAcquisitionDevice.cpp | 5 +---- receiver/FPGAAcquisitionDevice.h | 2 +- receiver/HLSSimulatedDevice.cpp | 31 +++++++++++++---------------- receiver/HLSSimulatedDevice.h | 5 +++-- receiver/PCIExpressDevice.cpp | 23 +++++++++++++++------ receiver/PCIExpressDevice.h | 2 +- tests/FPGAIntegrationTest.cpp | 4 ---- 13 files changed, 99 insertions(+), 48 deletions(-) diff --git a/common/Definitions.h b/common/Definitions.h index 0ec88938..cb311547 100644 --- a/common/Definitions.h +++ b/common/Definitions.h @@ -50,11 +50,10 @@ // For FPGA #define ACTION_TYPE 0x52324158 -#define RELEASE_LEVEL 0x003B +#define RELEASE_LEVEL 0x003C #define MODE_CONV 0x0001L -#define MODE_INTERNAL_PACKET_GEN 0x0002L -#define MODE_NONBLOCKING_ON_WR 0x0004L // Don't block acquisition if there is no WR available +#define MODE_NONBLOCKING_ON_WR 0x0002L // Don't block acquisition if there is no WR available #define TASK_NO_DATA_STREAM UINT16_MAX diff --git a/fpga/pcie_driver/ActionConfig.h b/fpga/pcie_driver/ActionConfig.h index 8a31793b..fa691569 100644 --- a/fpga/pcie_driver/ActionConfig.h +++ b/fpga/pcie_driver/ActionConfig.h @@ -69,6 +69,17 @@ struct ActionEnvParams { bool ethernet_aligned; }; + +struct FrameGeneratorConfig { + uint32_t frames; + uint32_t modules; + uint64_t dest_mac_addr; + uint32_t dest_ipv4_addr; + uint64_t bunchid; + uint32_t exptime; + uint32_t debug; +}; + #pragma pack(pop) #endif //JUNGFRAUJOCH_ACTIONCONFIG_H diff --git a/fpga/pcie_driver/jfjoch_drv.h b/fpga/pcie_driver/jfjoch_drv.h index e5d29cd0..abf097c5 100644 --- a/fpga/pcie_driver/jfjoch_drv.h +++ b/fpga/pcie_driver/jfjoch_drv.h @@ -42,11 +42,23 @@ #define CMAC_OFFSET (0x020000) #define PCIE_OFFSET (0x090000) #define INT_PKT_GEN_OFFSET (0x100000) +#define FRAME_GEN_OFFSET (0x080000) -#define ADDR_LOAD_CALIBRATION_CTRL (0x000000) -#define ADDR_LOAD_CALIBRATION_MOD (0x000010) -#define ADDR_LOAD_CALIBRATION_SC (0x000018) -#define ADDR_LOAD_CALIBRATION_MEM (0x002000) +#define ADDR_LOAD_CALIBRATION_CTRL (LOAD_CALIBRATION_OFFSET | 0x000000) +#define ADDR_LOAD_CALIBRATION_MOD (LOAD_CALIBRATION_OFFSET | 0x000010) +#define ADDR_LOAD_CALIBRATION_SC (LOAD_CALIBRATION_OFFSET | 0x000018) +#define ADDR_LOAD_CALIBRATION_MEM (LOAD_CALIBRATION_OFFSET | 0x002000) + +#define ADDR_FRAME_GEN_CTRL (FRAME_GEN_OFFSET | 0x000000) +#define ADDR_FRAME_GEN_FRAMES (FRAME_GEN_OFFSET | 0x000010) +#define ADDR_FRAME_GEN_MODULES (FRAME_GEN_OFFSET | 0x000018) +#define ADDR_FRAME_GEN_DEST_MAC_LO (FRAME_GEN_OFFSET | 0x000020) +#define ADDR_FRAME_GEN_DEST_MAC_HI (FRAME_GEN_OFFSET | 0x000024) +#define ADDR_FRAME_GEN_DEST_IPV4_ADDR (FRAME_GEN_OFFSET | 0x00002C) +#define ADDR_FRAME_GEN_BUNCHID_LO (FRAME_GEN_OFFSET | 0x000034) +#define ADDR_FRAME_GEN_BUNCHID_HI (FRAME_GEN_OFFSET | 0x000038) +#define ADDR_FRAME_GEN_EXPTIME (FRAME_GEN_OFFSET | 0x000040) +#define ADDR_FRAME_GEN_DEBUG (FRAME_GEN_OFFSET | 0x000048) #define JFJOCH_DMA_SETTINGS (XDMA_CTRL_RUN_STOP | XDMA_CTRL_IE_DESC_ALIGN_MISMATCH | XDMA_CTRL_IE_DESC_ERROR | XDMA_CTRL_IE_READ_ERROR \ | XDMA_CTRL_IE_WRITE_ERROR | XDMA_CTRL_IE_DESC_COMPLETED | XDMA_CTRL_STM_MODE_WB) @@ -113,6 +125,7 @@ void jfjoch_get_ipv4_addr(struct jfjoch_drvdata *drvdata, u32 *addr); void jfjoch_load_int_pkt_gen(struct jfjoch_drvdata *drvdata, char* output); void jfjoch_save_int_pkt_gen(struct jfjoch_drvdata *drvdata, const char* input); int jfjoch_load_calibration(struct jfjoch_drvdata *drvdata, struct ActionConfig *config); +int jfjoch_run_frame_gen(struct jfjoch_drvdata *drvdata, struct FrameGeneratorConfig *config); u64 jfjoch_read_mac_addr(struct jfjoch_drvdata *drvdata); diff --git a/fpga/pcie_driver/jfjoch_function.c b/fpga/pcie_driver/jfjoch_function.c index f5f8e451..6907bd80 100644 --- a/fpga/pcie_driver/jfjoch_function.c +++ b/fpga/pcie_driver/jfjoch_function.c @@ -297,8 +297,8 @@ int jfjoch_load_calibration(struct jfjoch_drvdata *drvdata, struct ActionConfig for (i = 0; i < cell_count; i++) { u64 addr = drvdata->bufs[i].dma_address; - iowrite32(PCI_DMA_L(addr), drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_MEM + i * 2 * 4); - iowrite32(PCI_DMA_H(addr), drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_MEM + (i * 2 + 1) * 4); + iowrite32(PCI_DMA_L(addr), drvdata->bar0 + ADDR_LOAD_CALIBRATION_MEM + i * 2 * 4); + iowrite32(PCI_DMA_H(addr), drvdata->bar0 + ADDR_LOAD_CALIBRATION_MEM + (i * 2 + 1) * 4); } // Start DMA @@ -307,13 +307,13 @@ int jfjoch_load_calibration(struct jfjoch_drvdata *drvdata, struct ActionConfig iowrite32((1 << 2), drvdata->bar0 + PCIE_OFFSET + (0<<12) + 0xC0); iowrite32(JFJOCH_DMA_SETTINGS, drvdata->bar0 + PCIE_OFFSET + (0<<12) + 0x04); - iowrite32(config->nmodules, drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_MOD); - iowrite32(config->nstorage_cells, drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_SC); - iowrite32(0x1, drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_CTRL); + iowrite32(config->nmodules, drvdata->bar0 + ADDR_LOAD_CALIBRATION_MOD); + iowrite32(config->nstorage_cells, drvdata->bar0 + ADDR_LOAD_CALIBRATION_SC); + iowrite32(0x1, drvdata->bar0 + ADDR_LOAD_CALIBRATION_CTRL); i = 0; while (i < 1000) { - if (ioread32(drvdata->bar0 + LOAD_CALIBRATION_OFFSET + ADDR_LOAD_CALIBRATION_CTRL) & (1 << 1)) + if (ioread32(drvdata->bar0 + ADDR_LOAD_CALIBRATION_CTRL) & (1 << 1)) break; msleep(10); i++; @@ -328,4 +328,24 @@ int jfjoch_load_calibration(struct jfjoch_drvdata *drvdata, struct ActionConfig } return 0; +} + +int jfjoch_run_frame_gen(struct jfjoch_drvdata *drvdata, struct FrameGeneratorConfig *config) { + struct device *const dev = &drvdata->pdev->dev; + + if (ioread32(drvdata->bar0 + ADDR_FRAME_GEN_CTRL) & 0x1) { + dev_err(dev, "Frame generator busy\n"); + return -EBUSY; + } + + iowrite32(config->frames, drvdata->bar0 + ADDR_FRAME_GEN_FRAMES); + iowrite32(config->modules, drvdata->bar0 + ADDR_FRAME_GEN_MODULES); + iowrite32(config->dest_ipv4_addr, drvdata->bar0 + ADDR_FRAME_GEN_DEST_IPV4_ADDR); + iowrite32(config->dest_mac_addr & 0xFFFFFFFF, drvdata->bar0 + ADDR_FRAME_GEN_DEST_MAC_LO); + iowrite32(config->dest_mac_addr >> 32, drvdata->bar0 + ADDR_FRAME_GEN_DEST_MAC_HI); + iowrite32(config->bunchid & 0xFFFFFFFF, drvdata->bar0 + ADDR_FRAME_GEN_BUNCHID_LO); + iowrite32(config->bunchid >> 32, drvdata->bar0 + ADDR_FRAME_GEN_BUNCHID_HI); + iowrite32(config->exptime, drvdata->bar0 + ADDR_FRAME_GEN_EXPTIME); + iowrite32(config->debug, drvdata->bar0 + ADDR_FRAME_GEN_DEBUG); + iowrite32(0x1, drvdata->bar0 + ADDR_FRAME_GEN_CTRL); } \ No newline at end of file diff --git a/fpga/pcie_driver/jfjoch_ioctl.c b/fpga/pcie_driver/jfjoch_ioctl.c index d66db572..592f36bd 100644 --- a/fpga/pcie_driver/jfjoch_ioctl.c +++ b/fpga/pcie_driver/jfjoch_ioctl.c @@ -9,6 +9,7 @@ long jfjoch_cdev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { struct ActionStatus status; struct ActionConfig config; struct ActionEnvParams env_params; + struct FrameGeneratorConfig frame_generator_config; u32 exchange[16]; int err; void *tmp = NULL; @@ -101,6 +102,10 @@ long jfjoch_cdev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { case IOCTL_JFJOCH_DEFAULT_MAC: jfjoch_read_mac_addr(drvdata); return 0; + case IOCTL_JFJOCH_RUN_FRAME_GEN: + if (copy_from_user(&frame_generator_config, (char *) arg, sizeof(struct FrameGeneratorConfig)) != 0) + return -EFAULT; + return jfjoch_run_frame_gen(drvdata, &frame_generator_config); case IOCTL_JFJOCH_SET_INT_PKT: tmp = vmalloc(INT_PKT_GEN_FRAME_SIZE_BYTES); if (tmp == NULL) diff --git a/fpga/pcie_driver/jfjoch_ioctl.h b/fpga/pcie_driver/jfjoch_ioctl.h index 5ccdfed2..6a239b28 100644 --- a/fpga/pcie_driver/jfjoch_ioctl.h +++ b/fpga/pcie_driver/jfjoch_ioctl.h @@ -36,5 +36,6 @@ #define IOCTL_JFJOCH_SET_INT_PKT _IOW(IOCTL_JFJOCH_MAGIC, 19, char *) #define IOCTL_JFJOCH_GET_INT_PKT _IOR(IOCTL_JFJOCH_MAGIC, 20, char *) #define IOCTL_JFJOCH_LOAD_CALIB _IOW(IOCTL_JFJOCH_MAGIC, 21, struct ActionConfig) +#define IOCTL_JFJOCH_RUN_FRAME_GEN _IOW(IOCTL_JFJOCH_MAGIC, 22, struct FrameGeneratorConfig) #endif //JUNGFRAUJOCH_JFJOCH_IOCTL_H diff --git a/receiver/FPGAAcquisitionDevice.cpp b/receiver/FPGAAcquisitionDevice.cpp index ee0d770c..3bf17c71 100644 --- a/receiver/FPGAAcquisitionDevice.cpp +++ b/receiver/FPGAAcquisitionDevice.cpp @@ -118,9 +118,6 @@ void FPGAAcquisitionDevice::FillActionRegister(const DiffractionExperiment& x, A if ((x.GetDetectorMode() == DetectorMode::Conversion) && x.GetConversionOnFPGA()) job.mode |= MODE_CONV; - - if (x.IsUsingInternalPacketGen()) - job.mode |= MODE_INTERNAL_PACKET_GEN; } @@ -144,7 +141,7 @@ void FPGAAcquisitionDevice::Start(const DiffractionExperiment &experiment) { throw JFJochException(JFJochExceptionCategory::AcquisitionDeviceError, "Mismatch between expected and actual values of configuration registers (#modules)"); - FPGA_StartAction(); + FPGA_StartAction(experiment); read_work_completion_future = std::async(std::launch::async, &FPGAAcquisitionDevice::ReadWorkCompletionThread, this); } diff --git a/receiver/FPGAAcquisitionDevice.h b/receiver/FPGAAcquisitionDevice.h index 23354e54..6708d733 100644 --- a/receiver/FPGAAcquisitionDevice.h +++ b/receiver/FPGAAcquisitionDevice.h @@ -11,7 +11,7 @@ class FPGAAcquisitionDevice : public AcquisitionDevice { uint16_t data_collection_id = 0; bool fpga_non_blocking_mode = true; - virtual void FPGA_StartAction() = 0; + virtual void FPGA_StartAction(const DiffractionExperiment &experiment) = 0; virtual void FPGA_EndAction() = 0; virtual void HW_WriteActionRegister(const ActionConfig *job) = 0; diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index bb53a7e4..cf535550 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -127,13 +127,26 @@ void HLSSimulatedDevice::HW_WriteActionRegister(const ActionConfig *job) { memcpy(&cfg, job, sizeof(ActionConfig)); } -void HLSSimulatedDevice::FPGA_StartAction() { +void HLSSimulatedDevice::FPGA_StartAction(const DiffractionExperiment &experiment) { if (action_thread.joinable()) action_thread.join(); run_data_collection = 1; cancel_data_collection = 0; idle = false; + if (experiment.IsUsingInternalPacketGen()) { + frame_generator(din_eth, + reinterpret_cast *>(internal_pkt_gen_frame.data()), + experiment.GetFrameNum() + DELAY_FRAMES_STOP_AND_QUIT + 1, + experiment.GetModulesNum(data_stream), + mac_addr, + mac_addr, + ipv4_addr, + ipv4_addr, + INT_PKT_GEN_BUNCHID, + INT_PKT_GEN_EXPTTIME, + INT_PKT_GEN_DEBUG); + } action_thread = std::thread(&HLSSimulatedDevice::HLSMainThread, this ); } @@ -213,22 +226,6 @@ void HLSSimulatedDevice::HLSMainThread() { ap_uint<8> err_reg; - if (cfg.mode & MODE_INTERNAL_PACKET_GEN) { - frame_generator(din_eth, - reinterpret_cast *>(internal_pkt_gen_frame.data()), - cfg.nframes + DELAY_FRAMES_STOP_AND_QUIT + 1, - cfg.nmodules, - mac_addr, - mac_addr, - ipv4_addr, - ipv4_addr, - INT_PKT_GEN_BUNCHID, - INT_PKT_GEN_EXPTTIME, - INT_PKT_GEN_DEBUG); - if (logger) - logger->Info("Packets ready {}", din_eth.size()); - } - while(!din_eth.empty()) ethernet(din_eth, ip1, arp1, mac_addr, eth_packets, clear_counters); diff --git a/receiver/HLSSimulatedDevice.h b/receiver/HLSSimulatedDevice.h index 1cb70032..5e7e93b4 100644 --- a/receiver/HLSSimulatedDevice.h +++ b/receiver/HLSSimulatedDevice.h @@ -41,14 +41,15 @@ class HLSSimulatedDevice : public FPGAAcquisitionDevice { void HW_ReadActionRegister(ActionConfig *job) override; void HW_WriteActionRegister(const ActionConfig *job) override; - void FPGA_StartAction() override; + void FPGA_StartAction(const DiffractionExperiment &experiment) override; void FPGA_EndAction() override; bool HW_IsIdle() const override; - bool HW_ReadMailbox(uint32_t values[16]); + bool HW_ReadMailbox(uint32_t values[16]) override; bool HW_SendWorkRequest(uint32_t handle) override; void HW_LoadCalibration(uint32_t modules, uint32_t storage_cells) override; void HW_GetStatus(ActionStatus *status) const override; void HLSMainThread() ; + void RunFrameGenerator(const FrameGeneratorConfig& config); public: HLSSimulatedDevice(uint16_t data_stream, size_t in_frame_buffer_size_modules, int16_t numa_node = -1); ~HLSSimulatedDevice(); diff --git a/receiver/PCIExpressDevice.cpp b/receiver/PCIExpressDevice.cpp index a074f180..654f74e2 100644 --- a/receiver/PCIExpressDevice.cpp +++ b/receiver/PCIExpressDevice.cpp @@ -92,14 +92,25 @@ bool PCIExpressDevice::HW_SendWorkRequest(uint32_t handle) { return true; } -void PCIExpressDevice::FPGA_StartAction() { - if (ioctl(fd, IOCTL_JFJOCH_SET_INT_PKT, internal_pkt_gen_frame.data()) != 0) - throw JFJochException(JFJochExceptionCategory::PCIeError, - "Failed loading internal packet generator frame", errno); +void PCIExpressDevice::FPGA_StartAction(const DiffractionExperiment &experiment) { + if (experiment.IsUsingInternalPacketGen()) { + if (ioctl(fd, IOCTL_JFJOCH_SET_INT_PKT, internal_pkt_gen_frame.data()) != 0) + throw JFJochException(JFJochExceptionCategory::PCIeError, + "Failed loading internal packet generator frame", errno); + } if (ioctl(fd, IOCTL_JFJOCH_START) != 0) - throw JFJochException(JFJochExceptionCategory::PCIeError, - "Failed starting action", errno); + throw JFJochException(JFJochExceptionCategory::PCIeError, "Failed starting action", errno); + + if (experiment.IsUsingInternalPacketGen()) { + FrameGeneratorConfig config{}; + config.frames = experiment.GetFrameNum() + DELAY_FRAMES_STOP_AND_QUIT + 1; + config.modules = experiment.GetModulesNum(data_stream); + config.dest_ipv4_addr = ipv4_addr; + config.dest_mac_addr = mac_addr; + if (ioctl(fd, IOCTL_JFJOCH_RUN_FRAME_GEN) != 0) + throw JFJochException(JFJochExceptionCategory::PCIeError, "Failed starting frame generator", errno); + } } void PCIExpressDevice::FPGA_EndAction() { diff --git a/receiver/PCIExpressDevice.h b/receiver/PCIExpressDevice.h index 8af755b5..c6ec7dc8 100644 --- a/receiver/PCIExpressDevice.h +++ b/receiver/PCIExpressDevice.h @@ -11,7 +11,7 @@ class PCIExpressDevice : public FPGAAcquisitionDevice { bool HW_ReadMailbox(uint32_t values[16]) override; bool HW_SendWorkRequest(uint32_t handle) override; - void FPGA_StartAction() override; + void FPGA_StartAction(const DiffractionExperiment &experiment) override; bool HW_IsIdle() const final; void HW_WriteActionRegister(const ActionConfig *job) override; void HW_ReadActionRegister(ActionConfig *job) override; diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index a390de67..0a862276 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -403,7 +403,6 @@ TEST_CASE("HLS_C_Simulation_check_convert_full_range", "[FPGA][Full]") { TEST_CASE("HLS_C_Simulation_internal_packet_generator_convert_full_range", "[FPGA][Full]") { double energy = 6.0; - Logger logger("logger"); const uint16_t nmodules = 4; DiffractionExperiment x((DetectorGeometry(nmodules, 2, 8, 36, true))); @@ -435,7 +434,6 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_convert_full_range", "[FPG } HLSSimulatedDevice test(0, 64); - test.EnableLogging(&logger); REQUIRE_NOTHROW(test.InitializeCalibration(x, c)); REQUIRE_NOTHROW(test.StartAction(x)); @@ -545,8 +543,6 @@ TEST_CASE("HLS_C_Simulation_check_2_trigger_convert", "[FPGA][Full]") { x.PedestalG0Frames(0).NumTriggers(2).ImagesPerTrigger(5); HLSSimulatedDevice test(0, 64); - Logger logger("bla"); - test.EnableLogging(&logger); JFCalibration c(x); REQUIRE_NOTHROW(c.Pedestal(0, 0).LoadPedestal(pedestal_g0)); From aa263a329e21e61d5221f95b7ee24ab39ade8b62 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Wed, 13 Sep 2023 21:51:40 +0200 Subject: [PATCH 214/224] Make test more repeatable by removing non-blocking mode in HLS simulation --- tests/StreamWriterTest.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tests/StreamWriterTest.cpp b/tests/StreamWriterTest.cpp index 76189913..bd7aa656 100644 --- a/tests/StreamWriterTest.cpp +++ b/tests/StreamWriterTest.cpp @@ -32,6 +32,7 @@ TEST_CASE("StreamWriterTest_ZMQ","[JFJochWriter]") { std::vector> aq_devices; for (int i = 0; i < x.GetDataStreamsNum(); i++) { auto test = new HLSSimulatedDevice(i, 64); + test->SetFPGANonBlockingMode(false); aq_devices.emplace_back(test); } @@ -99,6 +100,7 @@ TEST_CASE("JFJochWriterServiceTest_ZMQ","[JFJochWriter]") { std::vector> aq_devices; for (int i = 0; i < x.GetDataStreamsNum(); i++) { auto test = new HLSSimulatedDevice(i, 64); + test->SetFPGANonBlockingMode(false); aq_devices.emplace_back(test); } From 5d8a85071ee3537011fd0e211ccbf28a59fd00a3 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 14 Sep 2023 15:56:52 +0200 Subject: [PATCH 215/224] PCIe driver: Fix missing return value in a function --- fpga/pcie_driver/jfjoch_function.c | 1 + 1 file changed, 1 insertion(+) diff --git a/fpga/pcie_driver/jfjoch_function.c b/fpga/pcie_driver/jfjoch_function.c index 6907bd80..a6a44872 100644 --- a/fpga/pcie_driver/jfjoch_function.c +++ b/fpga/pcie_driver/jfjoch_function.c @@ -348,4 +348,5 @@ int jfjoch_run_frame_gen(struct jfjoch_drvdata *drvdata, struct FrameGeneratorCo iowrite32(config->exptime, drvdata->bar0 + ADDR_FRAME_GEN_EXPTIME); iowrite32(config->debug, drvdata->bar0 + ADDR_FRAME_GEN_DEBUG); iowrite32(0x1, drvdata->bar0 + ADDR_FRAME_GEN_CTRL); + return 0; } \ No newline at end of file From 886a84ee9f635d6408ad0c3f00ae7e63f9c1f384 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 14 Sep 2023 16:16:30 +0200 Subject: [PATCH 216/224] PCIExpressDevice: Wrong function parameter --- receiver/PCIExpressDevice.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/receiver/PCIExpressDevice.cpp b/receiver/PCIExpressDevice.cpp index 654f74e2..ee7ff878 100644 --- a/receiver/PCIExpressDevice.cpp +++ b/receiver/PCIExpressDevice.cpp @@ -108,7 +108,7 @@ void PCIExpressDevice::FPGA_StartAction(const DiffractionExperiment &experiment) config.modules = experiment.GetModulesNum(data_stream); config.dest_ipv4_addr = ipv4_addr; config.dest_mac_addr = mac_addr; - if (ioctl(fd, IOCTL_JFJOCH_RUN_FRAME_GEN) != 0) + if (ioctl(fd, IOCTL_JFJOCH_RUN_FRAME_GEN, &config) != 0) throw JFJochException(JFJochExceptionCategory::PCIeError, "Failed starting frame generator", errno); } } From 48ee2ca305603eff747cda7530abbac8dcd9df01 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 14 Sep 2023 16:31:24 +0200 Subject: [PATCH 217/224] FPGAAcquisitionDevice: Fix reporting of FIFO status --- receiver/FPGAAcquisitionDevice.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/receiver/FPGAAcquisitionDevice.cpp b/receiver/FPGAAcquisitionDevice.cpp index 3bf17c71..91e6da78 100644 --- a/receiver/FPGAAcquisitionDevice.cpp +++ b/receiver/FPGAAcquisitionDevice.cpp @@ -162,9 +162,10 @@ inline void FIFO_check(JFJochProtoBuf::FPGAStatus &fpga_status, if (std::bitset<32>(fifo_register).test(pos_empty)) fifo_status->set_value(JFJochProtoBuf::FPGAFIFOStatusEnum::EMPTY); - if (std::bitset<32>(fifo_register).test(pos_full)) + else if (std::bitset<32>(fifo_register).test(pos_full)) fifo_status->set_value(JFJochProtoBuf::FPGAFIFOStatusEnum::FULL); - fifo_status->set_value(JFJochProtoBuf::FPGAFIFOStatusEnum::PARTIAL); + else + fifo_status->set_value(JFJochProtoBuf::FPGAFIFOStatusEnum::PARTIAL); } inline void CheckHostWriterErr(JFJochProtoBuf::FPGAStatus &output, uint32_t status_register, From ab1a8fbfca849c35c072b79fa9bffda9f2cc9bcb Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 14 Sep 2023 17:48:30 +0200 Subject: [PATCH 218/224] PCIExpressDevice: Get MAC/IPv4 Address for internal packet generator via ioctl --- receiver/PCIExpressDevice.cpp | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/receiver/PCIExpressDevice.cpp b/receiver/PCIExpressDevice.cpp index ee7ff878..749ce703 100644 --- a/receiver/PCIExpressDevice.cpp +++ b/receiver/PCIExpressDevice.cpp @@ -106,8 +106,14 @@ void PCIExpressDevice::FPGA_StartAction(const DiffractionExperiment &experiment) FrameGeneratorConfig config{}; config.frames = experiment.GetFrameNum() + DELAY_FRAMES_STOP_AND_QUIT + 1; config.modules = experiment.GetModulesNum(data_stream); - config.dest_ipv4_addr = ipv4_addr; - config.dest_mac_addr = mac_addr; + + if (ioctl(fd, IOCTL_JFJOCH_GET_MAC, &config.dest_mac_addr) != 0) + throw JFJochException(JFJochExceptionCategory::PCIeError, + "Failed getting MAC address", errno); + if (ioctl(fd, IOCTL_JFJOCH_GET_IPV4, &config.dest_ipv4_addr) != 0) + throw JFJochException(JFJochExceptionCategory::PCIeError, + "Failed getting MAC address", errno); + if (ioctl(fd, IOCTL_JFJOCH_RUN_FRAME_GEN, &config) != 0) throw JFJochException(JFJochExceptionCategory::PCIeError, "Failed starting frame generator", errno); } From aee9d0e6fc048252111afa47a5dc366bb14204af Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 14 Sep 2023 17:54:33 +0200 Subject: [PATCH 219/224] jfjoch_action_test: Set IPv4 and MAC addresses --- receiver/jfjoch_action_test.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/receiver/jfjoch_action_test.cpp b/receiver/jfjoch_action_test.cpp index e8509b65..40bdcc79 100644 --- a/receiver/jfjoch_action_test.cpp +++ b/receiver/jfjoch_action_test.cpp @@ -155,6 +155,8 @@ int main(int argc, char **argv) { pcie_devices[i]->SetCustomInternalGeneratorFrame(input); pcie_devices[i]->EnableLogging(&logger); pcie_devices[i]->SetFPGANonBlockingMode(nonblocking_mode); + pcie_devices[i]->SetDefaultMAC(); + pcie_devices[i]->SetIPv4Address((i << 24) + 0x010a0a0a); aq_devices.push_back(pcie_devices[i].get()); } From 0a152f7b5a8e651b320e134e65587c33ccfbf788 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 14 Sep 2023 23:43:01 +0200 Subject: [PATCH 220/224] PCIe driver: check Ethernet aligned twice --- fpga/pcie_driver/jfjoch_function.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/fpga/pcie_driver/jfjoch_function.c b/fpga/pcie_driver/jfjoch_function.c index a6a44872..17cefe03 100644 --- a/fpga/pcie_driver/jfjoch_function.c +++ b/fpga/pcie_driver/jfjoch_function.c @@ -277,6 +277,8 @@ void jfjoch_get_env_data(struct jfjoch_drvdata *drvdata, struct ActionEnvParams env_params->hbm_0_temp_C = ioread32(drvdata->bar0 + CMS_OFFSET + ADDR_CMS_HBM_TEMP1_INS_REG); env_params->hbm_1_temp_C = ioread32(drvdata->bar0 + CMS_OFFSET + ADDR_CMS_HBM_TEMP2_INS_REG); + // Somehow it is better to ask twice + env_params->ethernet_aligned = ioread32(drvdata->bar0 + CMAC_OFFSET + 0x0204) & 0x2; env_params->ethernet_aligned = ioread32(drvdata->bar0 + CMAC_OFFSET + 0x0204) & 0x2; } From 7a026b89d049e93bc3557499f437fe4fcdd9fc42 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 14 Sep 2023 23:48:02 +0200 Subject: [PATCH 221/224] FPGAIntegrationTest: Use blocking mode for one remaining test --- tests/FPGAIntegrationTest.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index 0a862276..e6a481e4 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -961,7 +961,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_16_storage_cell_convert_G0 REQUIRE(x.GetImageNum() == ntrigger * nstoragecells); HLSSimulatedDevice test(0, ntrigger * nstoragecells); - + test.SetFPGANonBlockingMode(false); std::vector tmp(3 * RAW_MODULE_SIZE, 50); JFModuleGainCalibration gain(tmp); From 362eb62d4bc240ba484581b2e1a746141a22b329 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Thu, 14 Sep 2023 23:58:17 +0200 Subject: [PATCH 222/224] FPGA: Use own function to merge streams instead of AXI-Switch + more FIFO status saved --- fpga/hdl/action_config.v | 9 ++++++- fpga/hls/CMakeLists.txt | 7 +++-- fpga/hls/hls_jfjoch.h | 4 +++ fpga/hls/stream_merge.cpp | 46 +++++++++++++++++++++++++++++++++ fpga/scripts/bd_pcie.tcl | 3 ++- fpga/scripts/jfjoch.tcl | 42 +++++++++++++++++++----------- receiver/HLSSimulatedDevice.cpp | 11 +++++--- receiver/HLSSimulatedDevice.h | 1 + 8 files changed, 101 insertions(+), 22 deletions(-) create mode 100644 fpga/hls/stream_merge.cpp diff --git a/fpga/hdl/action_config.v b/fpga/hdl/action_config.v index becd74f9..c6ad155c 100644 --- a/fpga/hdl/action_config.v +++ b/fpga/hdl/action_config.v @@ -120,7 +120,10 @@ module action_config input last_data_fifo_full , input last_addr_fifo_empty , input last_addr_fifo_full , - + input frame_generator_fifo_empty , + input frame_generator_fifo_full , + input eth_in_fifo_empty , + input eth_in_fifo_full , input mailbox_interrupt_0 , input mailbox_interrupt_1 , @@ -580,6 +583,10 @@ always @(posedge clk) begin reg_fifo_status[21] <= h2c_data_fifo_full; reg_fifo_status[22] <= h2c_cmd_fifo_empty; reg_fifo_status[23] <= h2c_cmd_fifo_full; + reg_fifo_status[24] <= frame_generator_fifo_full; + reg_fifo_status[25] <= frame_generator_fifo_empty; + reg_fifo_status[26] <= eth_in_fifo_full; + reg_fifo_status[27] <= eth_in_fifo_empty; end end diff --git a/fpga/hls/CMakeLists.txt b/fpga/hls/CMakeLists.txt index 77ac469e..72a190e5 100644 --- a/fpga/hls/CMakeLists.txt +++ b/fpga/hls/CMakeLists.txt @@ -12,7 +12,8 @@ ADD_LIBRARY( HLSSimulation STATIC ip_header_checksum.h udp.cpp sls_detector.cpp - frame_generator.cpp) + frame_generator.cpp + stream_merge.cpp) TARGET_INCLUDE_DIRECTORIES(HLSSimulation PUBLIC ../include) TARGET_LINK_LIBRARIES(HLSSimulation CommonFunctions) @@ -44,6 +45,7 @@ MAKE_HLS_MODULE(arp.cpp arp) MAKE_HLS_MODULE(udp.cpp udp) MAKE_HLS_MODULE(sls_detector.cpp sls_detector) MAKE_HLS_MODULE(frame_generator.cpp frame_generator) +MAKE_HLS_MODULE(stream_merge.cpp stream_merge) SET (HLS_IPS psi_ch_hls_data_collection_fsm_1_0.zip psi_ch_hls_timer_host_1_0.zip @@ -56,7 +58,8 @@ SET (HLS_IPS psi_ch_hls_data_collection_fsm_1_0.zip psi_ch_hls_sls_detector_1_0.zip psi_ch_hls_icmp_1_0.zip psi_ch_hls_host_writer_1_0.zip - psi_ch_hls_frame_generator_1_0.zip) + psi_ch_hls_frame_generator_1_0.zip + psi_ch_hls_stream_merge_1_0.zip) SET (HLS_IPS ${HLS_IPS} PARENT_SCOPE) ADD_CUSTOM_TARGET(hls DEPENDS ${HLS_IPS}) diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index e366eb37..0224036a 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -131,6 +131,10 @@ void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, volatile uint64_t &counter); +void stream_merge(AXI_STREAM &input_0, + AXI_STREAM &input_1, + AXI_STREAM &output); + template ap_uint pack32(ap_int in[32]) { #pragma HLS INLINE ap_uint out; diff --git a/fpga/hls/stream_merge.cpp b/fpga/hls/stream_merge.cpp new file mode 100644 index 00000000..7653f44e --- /dev/null +++ b/fpga/hls/stream_merge.cpp @@ -0,0 +1,46 @@ +// Copyright (2019-2023) Paul Scherrer Institute +// SPDX-License-Identifier: GPL-3.0-or-later + +#include "hls_jfjoch.h" + +void stream_merge(AXI_STREAM &input_0, + AXI_STREAM &input_1, + AXI_STREAM &output) { +#pragma HLS INTERFACE ap_ctrl_none port=return +#pragma HLS INTERFACE axis register both port=input_0 +#pragma HLS INTERFACE axis register both port=input_1 +#pragma HLS INTERFACE axis register both port=output + +#pragma HLS PIPELINE II=1 style=flp + enum state {ARBITRATE, FORWARD}; + static state state = ARBITRATE; + static ap_uint<1> select_input = 0; + + packet_512_t packet_in; +#pragma HLS RESET variable=state + switch (state) { + case ARBITRATE: + if (input_0.read_nb(packet_in)) { + select_input = 0; + if (!packet_in.last) + state = FORWARD; + output.write(packet_in); + } else if (input_1.read_nb(packet_in)) { + select_input = 1; + if (!packet_in.last) + state = FORWARD; + output.write(packet_in); + } + break; + case FORWARD: + if (select_input == 0) { + input_0.read(packet_in); + } else + input_1.read(packet_in); + output.write(packet_in); + + if (packet_in.last) + state = ARBITRATE; + break; + } +} diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index f2a69d78..94280f66 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -146,7 +146,6 @@ xilinx.com:ip:hbm:1.0\ xilinx.com:ip:axi_bram_ctrl:4.1\ xilinx.com:ip:axis_data_fifo:2.0\ xilinx.com:ip:axis_register_slice:1.1\ -xilinx.com:ip:axis_switch:1.1\ psi.ch:hls:data_collection_fsm:1.0\ psi.ch:hls:frame_generator:1.0\ psi.ch:hls:host_writer:1.0\ @@ -154,6 +153,7 @@ xilinx.com:ip:blk_mem_gen:8.4\ psi.ch:hls:jf_conversion:1.0\ psi.ch:hls:load_calibration:1.0\ xilinx.com:ip:mailbox:2.1\ +psi.ch:hls:stream_merge:1.0\ psi.ch:hls:timer_host:1.0\ xilinx.com:ip:cmac_usplus:3.1\ xilinx.com:ip:util_vector_logic:2.0\ @@ -162,6 +162,7 @@ xilinx.com:ip:axis_clock_converter:1.1\ xilinx.com:ip:util_ds_buf:2.2\ xilinx.com:ip:xdma:4.1\ psi.ch:hls:arp:1.0\ +xilinx.com:ip:axis_switch:1.1\ psi.ch:hls:ethernet:1.0\ psi.ch:hls:icmp:1.0\ psi.ch:hls:ipv4:1.0\ diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index f4abe86d..f5518633 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -2,8 +2,7 @@ ## SPDX-License-Identifier: CERN-OHL-S-2.0 # Hierarchical cell: jungfraujoch -# Hierarchical cell: jungfraujoch_0 -proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { +proc create_hier_cell_jungfraujoch { parentCell nameHier } { variable script_folder @@ -200,8 +199,19 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { CONFIG.TDATA_NUM_BYTES {64} \ ] $axis_data_fifo_h2c_data + # Create instance: axis_eth_in_fifo, and set properties + set axis_eth_in_fifo [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_eth_in_fifo ] + set_property -dict [ list \ + CONFIG.HAS_AEMPTY {1} \ + CONFIG.HAS_AFULL {1} \ + ] $axis_eth_in_fifo + # Create instance: axis_frame_generator_fifo_0, and set properties set axis_frame_generator_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_frame_generator_fifo_0 ] + set_property -dict [ list \ + CONFIG.HAS_AEMPTY {1} \ + CONFIG.HAS_AFULL {1} \ + ] $axis_frame_generator_fifo_0 # Create instance: axis_register_slice_addr_1, and set properties set axis_register_slice_addr_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_register_slice:1.1 axis_register_slice_addr_1 ] @@ -233,12 +243,6 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { CONFIG.REG_CONFIG {16} \ ] $axis_register_slice_udp - # Create instance: axis_switch_0, and set properties - set axis_switch_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_switch:1.1 axis_switch_0 ] - set_property -dict [ list \ - CONFIG.ARB_ON_TLAST {1} \ - ] $axis_switch_0 - # Create instance: axis_udp_addr_fifo_0, and set properties set axis_udp_addr_fifo_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:axis_data_fifo:2.0 axis_udp_addr_fifo_0 ] set_property -dict [ list \ @@ -335,6 +339,9 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { # Create instance: smartconnect_2, and set properties set smartconnect_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_2 ] + # Create instance: stream_merge_0, and set properties + set stream_merge_0 [ create_bd_cell -type ip -vlnv psi.ch:hls:stream_merge:1.0 stream_merge_0 ] + # Create instance: timer_hbm, and set properties set timer_hbm [ create_bd_cell -type ip -vlnv psi.ch:hls:timer_host:1.0 timer_hbm ] @@ -349,7 +356,6 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { connect_bd_intf_net -intf_net axis_addr_fifo_0_M_AXIS [get_bd_intf_pins axis_addr_fifo_0/M_AXIS] [get_bd_intf_pins jf_conversion_0/addr_in] connect_bd_intf_net -intf_net axis_addr_fifo_1_M_AXIS1 [get_bd_intf_pins axis_addr_fifo_1/M_AXIS] [get_bd_intf_pins host_writer_0/addr_in] connect_bd_intf_net -intf_net axis_data_fifo_0_M_AXIS [get_bd_intf_pins axis_data_fifo_0/M_AXIS] [get_bd_intf_pins timer_hbm/data_in] - connect_bd_intf_net -intf_net axis_frame_generator_fifo_1_M_AXIS [get_bd_intf_pins axis_frame_generator_fifo_0/M_AXIS] [get_bd_intf_pins axis_switch_0/S01_AXIS] connect_bd_intf_net -intf_net axis_data_fifo_1_M_AXIS [get_bd_intf_pins axis_data_fifo_1/M_AXIS] [get_bd_intf_pins jf_conversion_0/data_in] connect_bd_intf_net -intf_net axis_data_fifo_2_M_AXIS1 [get_bd_intf_pins axis_data_fifo_2/M_AXIS] [get_bd_intf_pins timer_host/data_in] connect_bd_intf_net -intf_net axis_data_fifo_3_M_AXIS [get_bd_intf_pins axis_data_fifo_3/M_AXIS] [get_bd_intf_pins host_writer_0/data_in] @@ -357,9 +363,11 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { connect_bd_intf_net -intf_net axis_data_fifo_c2h_data_M_AXIS [get_bd_intf_pins m_axis_c2h_data] [get_bd_intf_pins axis_data_fifo_c2h_data/M_AXIS] connect_bd_intf_net -intf_net axis_data_fifo_h2c_cmd_M_AXIS [get_bd_intf_pins m_axis_h2c_datamover_cmd] [get_bd_intf_pins axis_data_fifo_h2c_cmd/M_AXIS] connect_bd_intf_net -intf_net axis_data_fifo_h2c_data_M_AXIS [get_bd_intf_pins axis_data_fifo_h2c_data/M_AXIS] [get_bd_intf_pins axis_register_slice_data_in_0/S_AXIS] + connect_bd_intf_net -intf_net axis_eth_in_fifo_M_AXIS [get_bd_intf_pins axis_eth_in_fifo/M_AXIS] [get_bd_intf_pins network_stack/eth_in] + connect_bd_intf_net -intf_net axis_frame_generator_fifo_0_M_AXIS [get_bd_intf_pins axis_frame_generator_fifo_0/M_AXIS] [get_bd_intf_pins stream_merge_0/input_0] connect_bd_intf_net -intf_net axis_register_slice_addr_1_M_AXIS [get_bd_intf_pins axis_addr_fifo_1/S_AXIS] [get_bd_intf_pins axis_register_slice_addr_1/M_AXIS] - connect_bd_intf_net -intf_net axis_register_slice_data_in_0_M_AXIS1 [get_bd_intf_pins axis_register_slice_data_in_0/M_AXIS] [get_bd_intf_pins load_calibration_0/host_memory_in] connect_bd_intf_net -intf_net axis_register_slice_data_1_M_AXIS [get_bd_intf_pins axis_data_fifo_3/S_AXIS] [get_bd_intf_pins axis_register_slice_data_1/M_AXIS] + connect_bd_intf_net -intf_net axis_register_slice_data_in_0_M_AXIS1 [get_bd_intf_pins axis_register_slice_data_in_0/M_AXIS] [get_bd_intf_pins load_calibration_0/host_memory_in] connect_bd_intf_net -intf_net axis_register_slice_host_mem_M_AXIS [get_bd_intf_pins axis_data_fifo_c2h_data/S_AXIS] [get_bd_intf_pins axis_register_slice_host_mem/M_AXIS] connect_bd_intf_net -intf_net axis_register_slice_udp_M_AXIS [get_bd_intf_pins axis_register_slice_udp/M_AXIS] [get_bd_intf_pins data_collection_fsm_0/eth_in] connect_bd_intf_net -intf_net axis_udp_addr_fifo_0_M_AXIS [get_bd_intf_pins axis_udp_addr_fifo_0/M_AXIS] [get_bd_intf_pins data_collection_fsm_0/addr_in] @@ -368,8 +376,7 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { connect_bd_intf_net -intf_net axis_work_request_fifo_0_M_AXIS [get_bd_intf_pins axis_work_request_fifo_0/M_AXIS] [get_bd_intf_pins host_writer_0/s_axis_work_request] connect_bd_intf_net -intf_net data_collection_fsm_0_addr_out [get_bd_intf_pins axis_addr_fifo_0/S_AXIS] [get_bd_intf_pins data_collection_fsm_0/addr_out] connect_bd_intf_net -intf_net data_collection_fsm_0_data_out [get_bd_intf_pins axis_data_fifo_0/S_AXIS] [get_bd_intf_pins data_collection_fsm_0/data_out] - connect_bd_intf_net -intf_net eth_in_1 [get_bd_intf_pins axis_switch_0/M00_AXIS] [get_bd_intf_pins network_stack/eth_in] - connect_bd_intf_net -intf_net eth_in_2 [get_bd_intf_pins eth_in] [get_bd_intf_pins axis_switch_0/S00_AXIS] + connect_bd_intf_net -intf_net eth_in_1 [get_bd_intf_pins eth_in] [get_bd_intf_pins stream_merge_0/input_1] connect_bd_intf_net -intf_net frame_generator_0_data_out [get_bd_intf_pins axis_frame_generator_fifo_0/S_AXIS] [get_bd_intf_pins frame_generator_0/data_out] connect_bd_intf_net -intf_net frame_generator_0_m_axi_uram [get_bd_intf_pins axi_bram_ctrl_internal_packet_generator_1/S_AXI] [get_bd_intf_pins frame_generator_0/m_axi_uram] connect_bd_intf_net -intf_net host_writer_0_datamover_out_cmd [get_bd_intf_pins axis_data_fifo_c2h_cmd/S_AXIS] [get_bd_intf_pins host_writer_0/datamover_out_cmd] @@ -403,6 +410,7 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { connect_bd_intf_net -intf_net smartconnect_0_M04_AXI [get_bd_intf_pins frame_generator_0/s_axi_control] [get_bd_intf_pins smartconnect_0/M04_AXI] connect_bd_intf_net -intf_net smartconnect_1_M00_AXI [get_bd_intf_pins m_axi_d_hbm_p0] [get_bd_intf_pins smartconnect_1/M00_AXI] connect_bd_intf_net -intf_net smartconnect_2_M00_AXI [get_bd_intf_pins m_axi_d_hbm_p2] [get_bd_intf_pins smartconnect_2/M00_AXI] + connect_bd_intf_net -intf_net stream_merge_0_output_r [get_bd_intf_pins axis_eth_in_fifo/S_AXIS] [get_bd_intf_pins stream_merge_0/output_r] connect_bd_intf_net -intf_net timer_hbm_data_out [get_bd_intf_pins axis_data_fifo_1/S_AXIS] [get_bd_intf_pins timer_hbm/data_out] connect_bd_intf_net -intf_net timer_host_data_out [get_bd_intf_pins axis_register_slice_data_1/S_AXIS] [get_bd_intf_pins timer_host/data_out] @@ -418,7 +426,7 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { connect_bd_net -net action_config_0_nmodules [get_bd_pins action_config_0/nmodules] [get_bd_pins data_collection_fsm_0/nmodules] connect_bd_net -net action_config_0_nstorage_cells [get_bd_pins action_config_0/nstorage_cells] [get_bd_pins data_collection_fsm_0/nstorage_cells] connect_bd_net -net action_config_0_one_over_energy [get_bd_pins action_config_0/one_over_energy] [get_bd_pins data_collection_fsm_0/one_over_energy] - connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_frame_generator_fifo_0/s_axis_aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_switch_0/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins frame_generator_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins smartconnect_1/aclk] [get_bd_pins smartconnect_2/aclk] [get_bd_pins timer_hbm/ap_clk] [get_bd_pins timer_host/ap_clk] + connect_bd_net -net ap_clk_1 [get_bd_pins axi_clk] [get_bd_pins action_config_0/clk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aclk] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aclk] [get_bd_pins axis_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_addr_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_0/s_axis_aclk] [get_bd_pins axis_data_fifo_1/s_axis_aclk] [get_bd_pins axis_data_fifo_2/s_axis_aclk] [get_bd_pins axis_data_fifo_3/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aclk] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aclk] [get_bd_pins axis_eth_in_fifo/s_axis_aclk] [get_bd_pins axis_frame_generator_fifo_0/s_axis_aclk] [get_bd_pins axis_register_slice_addr_1/aclk] [get_bd_pins axis_register_slice_data_1/aclk] [get_bd_pins axis_register_slice_data_in_0/aclk] [get_bd_pins axis_register_slice_host_mem/aclk] [get_bd_pins axis_register_slice_udp/aclk] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aclk] [get_bd_pins axis_udp_fifo_0/s_axis_aclk] [get_bd_pins axis_work_completion_fifo_0/s_axis_aclk] [get_bd_pins axis_work_request_fifo_0/s_axis_aclk] [get_bd_pins data_collection_fsm_0/ap_clk] [get_bd_pins frame_generator_0/ap_clk] [get_bd_pins host_writer_0/ap_clk] [get_bd_pins jf_conversion_0/ap_clk] [get_bd_pins load_calibration_0/ap_clk] [get_bd_pins mailbox_0/M1_AXIS_ACLK] [get_bd_pins mailbox_0/S0_AXI_ACLK] [get_bd_pins mailbox_0/S1_AXIS_ACLK] [get_bd_pins network_stack/axiclk] [get_bd_pins smartconnect_0/aclk] [get_bd_pins smartconnect_1/aclk] [get_bd_pins smartconnect_2/aclk] [get_bd_pins stream_merge_0/ap_clk] [get_bd_pins timer_hbm/ap_clk] [get_bd_pins timer_host/ap_clk] connect_bd_net -net axis_addr_fifo_0_almost_empty [get_bd_pins action_config_0/calib_addr_fifo_empty] [get_bd_pins axis_addr_fifo_0/almost_empty] connect_bd_net -net axis_addr_fifo_0_almost_full [get_bd_pins action_config_0/calib_addr_fifo_full] [get_bd_pins axis_addr_fifo_0/almost_full] connect_bd_net -net axis_addr_fifo_4_almost_empty [get_bd_pins action_config_0/last_addr_fifo_empty] [get_bd_pins axis_addr_fifo_1/almost_empty] @@ -435,6 +443,10 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { connect_bd_net -net axis_data_fifo_h2c_cmd_almost_full [get_bd_pins action_config_0/h2c_cmd_fifo_full] [get_bd_pins axis_data_fifo_h2c_cmd/almost_full] connect_bd_net -net axis_data_fifo_h2c_data_almost_empty [get_bd_pins action_config_0/h2c_data_fifo_empty] [get_bd_pins axis_data_fifo_h2c_data/almost_empty] connect_bd_net -net axis_data_fifo_h2c_data_almost_full [get_bd_pins action_config_0/h2c_data_fifo_full] [get_bd_pins axis_data_fifo_h2c_data/almost_full] + connect_bd_net -net axis_eth_in_fifo_almost_empty [get_bd_pins action_config_0/eth_in_fifo_empty] [get_bd_pins axis_eth_in_fifo/almost_empty] + connect_bd_net -net axis_eth_in_fifo_almost_full [get_bd_pins action_config_0/eth_in_fifo_full] [get_bd_pins axis_eth_in_fifo/almost_full] + connect_bd_net -net axis_frame_generator_fifo_0_almost_empty [get_bd_pins action_config_0/frame_generator_fifo_empty] [get_bd_pins axis_frame_generator_fifo_0/almost_empty] + connect_bd_net -net axis_frame_generator_fifo_0_almost_full [get_bd_pins action_config_0/frame_generator_fifo_full] [get_bd_pins axis_frame_generator_fifo_0/almost_full] connect_bd_net -net axis_udp_fifo_0_almost_empty [get_bd_pins action_config_0/udp_fifo_empty] [get_bd_pins axis_udp_fifo_0/almost_empty] connect_bd_net -net axis_udp_fifo_0_almost_full [get_bd_pins action_config_0/udp_fifo_full] [get_bd_pins axis_udp_fifo_0/almost_full] connect_bd_net -net axis_work_completion_fifo_0_almost_empty [get_bd_pins action_config_0/work_compl_fifo_empty] [get_bd_pins axis_work_completion_fifo_0/almost_empty] @@ -461,8 +473,8 @@ proc create_hier_cell_jungfraujoch_0 { parentCell nameHier } { connect_bd_net -net network_stack_packets_sls_ap_vld [get_bd_pins action_config_0/packets_sls_valid] [get_bd_pins network_stack/packets_sls_ap_vld] connect_bd_net -net network_stack_packets_udp [get_bd_pins action_config_0/packets_udp] [get_bd_pins network_stack/packets_udp] connect_bd_net -net network_stack_packets_udp_ap_vld [get_bd_pins action_config_0/packets_udp_valid] [get_bd_pins network_stack/packets_udp_ap_vld] - connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_frame_generator_fifo_0/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_switch_0/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] [get_bd_pins smartconnect_1/aresetn] [get_bd_pins smartconnect_2/aresetn] - connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins frame_generator_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins timer_hbm/ap_rst_n] [get_bd_pins timer_host/ap_rst_n] + connect_bd_net -net reset_axi [get_bd_pins axi_rst_n] [get_bd_pins action_config_0/resetn] [get_bd_pins axis_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_addr_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_0/s_axis_aresetn] [get_bd_pins axis_data_fifo_1/s_axis_aresetn] [get_bd_pins axis_data_fifo_2/s_axis_aresetn] [get_bd_pins axis_data_fifo_3/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_c2h_data/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_cmd/s_axis_aresetn] [get_bd_pins axis_data_fifo_h2c_data/s_axis_aresetn] [get_bd_pins axis_eth_in_fifo/s_axis_aresetn] [get_bd_pins axis_frame_generator_fifo_0/s_axis_aresetn] [get_bd_pins axis_register_slice_addr_1/aresetn] [get_bd_pins axis_register_slice_data_1/aresetn] [get_bd_pins axis_register_slice_data_in_0/aresetn] [get_bd_pins axis_register_slice_host_mem/aresetn] [get_bd_pins axis_register_slice_udp/aresetn] [get_bd_pins axis_udp_addr_fifo_0/s_axis_aresetn] [get_bd_pins axis_udp_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_completion_fifo_0/s_axis_aresetn] [get_bd_pins axis_work_request_fifo_0/s_axis_aresetn] [get_bd_pins network_stack/resetn] [get_bd_pins smartconnect_0/aresetn] [get_bd_pins smartconnect_1/aresetn] [get_bd_pins smartconnect_2/aresetn] + connect_bd_net -net reset_hls [get_bd_pins ap_rst_n] [get_bd_pins axi_bram_ctrl_internal_packet_generator_0/s_axi_aresetn] [get_bd_pins axi_bram_ctrl_internal_packet_generator_1/s_axi_aresetn] [get_bd_pins data_collection_fsm_0/ap_rst_n] [get_bd_pins frame_generator_0/ap_rst_n] [get_bd_pins host_writer_0/ap_rst_n] [get_bd_pins jf_conversion_0/ap_rst_n] [get_bd_pins load_calibration_0/ap_rst_n] [get_bd_pins mailbox_0/S0_AXI_ARESETN] [get_bd_pins network_stack/ap_rst_n] [get_bd_pins stream_merge_0/ap_rst_n] [get_bd_pins timer_hbm/ap_rst_n] [get_bd_pins timer_host/ap_rst_n] connect_bd_net -net timer_hbm_counter [get_bd_pins action_config_0/stalls_hbm] [get_bd_pins timer_hbm/counter] connect_bd_net -net timer_hbm_counter_ap_vld [get_bd_pins action_config_0/stalls_hbm_valid] [get_bd_pins timer_hbm/counter_ap_vld] connect_bd_net -net timer_host_counter [get_bd_pins action_config_0/stalls_host] [get_bd_pins timer_host/counter] diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index cf535550..edac5519 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -135,7 +135,7 @@ void HLSSimulatedDevice::FPGA_StartAction(const DiffractionExperiment &experimen cancel_data_collection = 0; idle = false; if (experiment.IsUsingInternalPacketGen()) { - frame_generator(din_eth, + frame_generator(din_frame_generator, reinterpret_cast *>(internal_pkt_gen_frame.data()), experiment.GetFrameNum() + DELAY_FRAMES_STOP_AND_QUIT + 1, experiment.GetModulesNum(data_stream), @@ -208,6 +208,8 @@ void HLSSimulatedDevice::HLSMainThread() { STREAM_512 ip1, udp1, udp2, icmp1, arp1; + STREAM_512 network0; + STREAM_512 raw0; STREAM_512 raw1; STREAM_512 raw2; @@ -226,8 +228,11 @@ void HLSSimulatedDevice::HLSMainThread() { ap_uint<8> err_reg; - while(!din_eth.empty()) - ethernet(din_eth, ip1, arp1, mac_addr, eth_packets, clear_counters); + while ((!din_eth.empty()) || (!din_frame_generator.empty())) + stream_merge(din_eth, din_frame_generator, network0); + + while(!network0.empty()) + ethernet(network0, ip1, arp1, mac_addr, eth_packets, clear_counters); while(!ip1.empty()) ipv4(ip1, udp1, icmp1, ipv4_addr); diff --git a/receiver/HLSSimulatedDevice.h b/receiver/HLSSimulatedDevice.h index 5e7e93b4..d4b814a8 100644 --- a/receiver/HLSSimulatedDevice.h +++ b/receiver/HLSSimulatedDevice.h @@ -16,6 +16,7 @@ uint16_t checksum(const uint16_t *addr, size_t count); class HLSSimulatedDevice : public FPGAAcquisitionDevice { AXI_STREAM din_eth; + AXI_STREAM din_frame_generator; AXI_STREAM dout_eth; ActionConfig cfg; From 16bbf54f2ac1676144250e5c0bf650e59544d3f0 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 15 Sep 2023 10:47:21 +0200 Subject: [PATCH 223/224] Remove open source license (for now) --- LICENSE.GPL | 674 ------------------ LICENSE.OHL-S | 289 -------- README.md | 4 +- broker/JFJochBroker.cpp | 3 +- broker/JFJochBroker.h | 3 +- broker/JFJochBrokerParser.cpp | 1 - broker/JFJochBrokerParser.h | 1 - broker/JFJochServices.cpp | 3 +- broker/JFJochServices.h | 3 +- broker/JFJochStateMachine.cpp | 3 +- broker/JFJochStateMachine.h | 3 +- broker/jfjoch_broker.cpp | 3 +- common/CUDAWrapper.cpp | 1 - common/CUDAWrapper.cu | 1 - common/CUDAWrapper.h | 1 - common/Coord.cpp | 3 +- common/Coord.h | 3 +- common/Definitions.h | 3 +- common/DetectorGeometry.cpp | 3 +- common/DetectorGeometry.h | 3 +- common/DetectorModuleGeometry.cpp | 1 - common/DetectorModuleGeometry.h | 1 - common/DetectorSetup.cpp | 1 - common/DetectorSetup.h | 1 - common/DiffractionExperiment.cpp | 3 +- common/DiffractionExperiment.h | 3 +- common/DiffractionGeometry.h | 1 - common/DiffractionSpot.cpp | 3 +- common/DiffractionSpot.h | 3 +- common/FrameTransformation.cpp | 3 +- common/FrameTransformation.h | 3 +- common/GitInfo.cpp.in | 3 +- common/GitInfo.h | 3 +- common/Histogram.h | 1 - common/ImagePusher.cpp | 3 +- common/ImagePusher.h | 3 +- common/JFJochException.h | 3 +- common/Logger.cpp | 3 +- common/Logger.h | 3 +- common/NUMAHWPolicy.cpp | 1 - common/NUMAHWPolicy.h | 1 - common/NetworkAddressConvert.cpp | 3 +- common/NetworkAddressConvert.h | 3 +- common/ROIFilter.h | 1 - common/RawToConvertedGeometry.h | 3 +- common/SpotToSave.h | 3 +- common/StatusVector.h | 3 +- common/TestImagePusher.cpp | 3 +- common/TestImagePusher.h | 3 +- common/ThreadSafeFIFO.h | 3 +- common/UnitCell.h | 3 +- common/ZMQImagePusher.cpp | 3 +- common/ZMQImagePusher.h | 3 +- common/ZMQPreviewPublisher.cpp | 3 +- common/ZMQPreviewPublisher.h | 3 +- common/ZMQWrappers.cpp | 3 +- common/ZMQWrappers.h | 3 +- common/ZeroCopyReturnValue.h | 1 - common/grpcToJson.h | 3 +- common/jsonToGrpc.h | 3 +- common/to_fixed.h | 3 +- compression/CompressionAlgorithmEnum.h | 3 +- compression/JFJochCompressor.cpp | 3 +- compression/JFJochCompressor.h | 3 +- compression/JFJochDecompress.h | 3 +- compression/JFJochZstdCompressor.cpp | 3 +- compression/JFJochZstdCompressor.h | 3 +- compression/MaxCompressedSize.cpp | 3 +- compression/MaxCompressedSize.h | 3 +- detector_control/DetectorWrapper.cpp | 3 +- detector_control/DetectorWrapper.h | 3 +- detector_control/JFJochDetector.cpp | 3 +- detector_control/JFJochDetector.h | 3 +- detector_control/jfjoch_detector.cpp | 3 +- fpga/hdl/action_config.v | 3 +- fpga/hdl/action_wrapper.v | 3 +- fpga/hdl/check_datamover_error.v | 3 +- fpga/hdl/check_eth_busy.v | 3 +- fpga/hdl/gen_xdma_descriptor.v | 3 +- fpga/hdl/refclk300to100.v | 3 +- fpga/hdl/resetn_sync.v | 3 +- fpga/hls/arp.cpp | 4 +- fpga/hls/data_collection_fsm.cpp | 4 +- fpga/hls/datamover_model.h | 3 +- fpga/hls/ethernet.cpp | 4 +- fpga/hls/frame_generator.cpp | 1 - fpga/hls/hls_jfjoch.h | 4 +- fpga/hls/host_writer.cpp | 4 +- fpga/hls/icmp.cpp | 2 +- fpga/hls/ip_header_checksum.h | 2 +- fpga/hls/ipv4.cpp | 4 +- fpga/hls/jf_conversion.cpp | 4 +- fpga/hls/load_calibration.cpp | 4 +- fpga/hls/parallel_stream.h | 3 +- fpga/hls/sls_detector.cpp | 4 +- fpga/hls/stream_merge.cpp | 1 - fpga/hls/timer.cpp | 4 +- fpga/hls/udp.cpp | 4 +- fpga/pcie_driver/ActionConfig.h | 3 +- fpga/pcie_driver/jfjoch_drv.c | 3 +- fpga/pcie_driver/jfjoch_drv.h | 3 +- fpga/pcie_driver/jfjoch_function.c | 3 +- fpga/pcie_driver/jfjoch_ioctl.c | 3 +- fpga/pcie_driver/jfjoch_ioctl.h | 3 +- fpga/pcie_driver/jfjoch_memory.c | 3 +- fpga/pcie_driver/jfjoch_miscdev.c | 3 +- fpga/pcie_driver/jfjoch_pcie_setup.c | 3 +- fpga/scripts/bd_pcie.tcl | 3 +- fpga/scripts/build_pcie_design.tcl | 3 +- fpga/scripts/hbm_u55c.tcl | 3 +- fpga/scripts/jfjoch.tcl | 3 +- fpga/scripts/mac_100g_pcie.tcl | 3 +- fpga/scripts/network_stack.tcl | 3 +- fpga/scripts/pcie_dma.tcl | 3 +- fpga/scripts/synth_and_impl.tcl | 3 +- fpga/scripts/synth_hls_function.tcl | 3 +- frame_serialize/CBORMessages.h | 1 - frame_serialize/CborErr.h | 3 +- frame_serialize/CborUtil.h | 3 +- frame_serialize/JFJochFrameDeserializer.cpp | 3 +- frame_serialize/JFJochFrameDeserializer.h | 3 +- frame_serialize/JFJochFrameSerializer.cpp | 3 +- frame_serialize/JFJochFrameSerializer.h | 3 +- .../src/components/BkgEstimatePlot.tsx | 2 +- grpc/JFJochDetectorClient.cpp | 3 +- grpc/JFJochDetectorClient.h | 3 +- grpc/JFJochReceiverClient.cpp | 3 +- grpc/JFJochReceiverClient.h | 3 +- grpc/JFJochWriterClient.cpp | 3 +- grpc/JFJochWriterClient.h | 3 +- grpc/JFJochWriterGroupClient.cpp | 3 +- grpc/JFJochWriterGroupClient.h | 3 +- grpc/gRPCServer_Template.h | 3 +- grpc/jfjoch.proto | 3 +- image_analysis/CrystalLattice.cpp | 3 +- image_analysis/CrystalLattice.h | 3 +- image_analysis/GPUImageAnalysis.cpp | 1 - image_analysis/GPUImageAnalysis.cu | 3 +- image_analysis/GPUImageAnalysis.h | 3 +- image_analysis/IndexerWrapper.cpp | 3 +- image_analysis/IndexerWrapper.h | 3 +- image_analysis/PredictSpotsOnDetector.h | 1 - image_analysis/RadialIntegration.cpp | 3 +- image_analysis/RadialIntegration.h | 3 +- image_analysis/RadialIntegrationMapping.cpp | 3 +- image_analysis/RadialIntegrationMapping.h | 3 +- image_analysis/RadialIntegrationProfile.cpp | 1 - image_analysis/RadialIntegrationProfile.h | 1 - image_analysis/StrongPixelSet.cpp | 3 +- image_analysis/StrongPixelSet.h | 3 +- jungfrau/JFCalibration.cpp | 3 +- jungfrau/JFCalibration.h | 3 +- jungfrau/JFConversion.h | 3 +- jungfrau/JFConversionFixedPoint.cpp | 3 +- jungfrau/JFConversionFixedPoint.h | 3 +- jungfrau/JFConversionFloatingPoint.cpp | 3 +- jungfrau/JFConversionFloatingPoint.h | 3 +- jungfrau/JFConversionGPU.cpp | 1 - jungfrau/JFConversionGPU.cu | 1 - jungfrau/JFConversionGPU.h | 1 - jungfrau/JFModuleGainCalibration.cpp | 3 +- jungfrau/JFModuleGainCalibration.h | 3 +- jungfrau/JFModulePedestal.cpp | 3 +- jungfrau/JFModulePedestal.h | 3 +- jungfrau/JFPedestalCalc.cpp | 3 +- jungfrau/JFPedestalCalc.h | 3 +- jungfrau/ProcessJFPacket.cpp | 3 +- jungfrau/ProcessJFPacket.h | 3 +- jungfrau/jf_packet.h | 3 +- python/jfjoch_grpc2http.py | 4 +- python/jungfraujoch.py | 4 +- python/jungfraujoch_metadata.py | 4 +- receiver/AcquisitionCounters.cpp | 3 +- receiver/AcquisitionCounters.h | 3 +- receiver/AcquisitionDevice.cpp | 3 +- receiver/AcquisitionDevice.h | 3 +- receiver/Completion.cpp | 3 +- receiver/Completion.h | 3 +- receiver/FPGAAcquisitionDevice.cpp | 1 - receiver/FPGAAcquisitionDevice.h | 1 - receiver/HLSSimulatedDevice.cpp | 3 +- receiver/HLSSimulatedDevice.h | 3 +- receiver/IBWrappers.cpp | 3 +- receiver/IBWrappers.h | 3 +- receiver/JFJochReceiver.cpp | 3 +- receiver/JFJochReceiver.h | 3 +- receiver/JFJochReceiverService.cpp | 3 +- receiver/JFJochReceiverService.h | 3 +- receiver/JFJochReceiverTest.cpp | 3 +- receiver/JFJochReceiverTest.h | 3 +- receiver/LinuxSocketDevice.cpp | 3 +- receiver/LinuxSocketDevice.h | 3 +- receiver/MlxRawEthDevice.cpp | 3 +- receiver/MlxRawEthDevice.h | 3 +- receiver/MockAcquisitionDevice.cpp | 3 +- receiver/MockAcquisitionDevice.h | 3 +- receiver/PCIExpressDevice.cpp | 3 +- receiver/PCIExpressDevice.h | 3 +- receiver/jfjoch_action_test.cpp | 3 +- receiver/jfjoch_lxsocket_test.cpp | 3 +- receiver/jfjoch_mlx_test.cpp | 3 +- .../jfjoch_pcie_cancel_data_collection.cpp | 3 +- receiver/jfjoch_pcie_clear_net_counters.cpp | 3 +- receiver/jfjoch_pcie_read_int_packet_gen.cpp | 3 +- receiver/jfjoch_pcie_set_network.cpp | 3 +- receiver/jfjoch_pcie_status.cpp | 3 +- receiver/jfjoch_receiver.cpp | 3 +- tests/AcquisitionCountersTest.cpp | 3 +- tests/ActionConfigTest.cpp | 3 +- tests/CBORTest.cpp | 3 +- tests/CoordTest.cpp | 3 +- tests/DetectorGeometryTest.cpp | 3 +- tests/DetectorSetupTest.cpp | 3 +- tests/DiffractionExperimentTest.cpp | 3 +- tests/DiffractionGeometryTest.cpp | 1 - tests/FPGAIntegrationTest.cpp | 3 +- tests/FPGANetworkTest.cpp | 3 +- tests/FPGAUnitTest.h | 3 +- tests/FrameTransformationTest.cpp | 3 +- tests/HDF5WritingTest.cpp | 3 +- tests/IndexingUnitTest.cpp | 3 +- tests/JFCalibrationTest.cpp | 3 +- tests/JFConversionTest.cpp | 3 +- tests/JFJochBrokerParserTest.cpp | 3 +- tests/JFJochBrokerTest.cpp | 3 +- tests/JFJochFullIntegrationTest.cpp | 3 +- tests/JFJochReceiverIntegrationTest.cpp | 3 +- tests/JFPedestalTest.cpp | 3 +- tests/MockAcquisitionDeviceTest.cpp | 3 +- tests/PedestalCalcTest.cpp | 3 +- tests/ProcessRawPacketTest.cpp | 3 +- tests/ROIFilterTest.cpp | 3 +- tests/RadialIntegrationTest.cpp | 3 +- tests/RawToConvertedGeometryTest.cpp | 3 +- tests/SpotAnalyzeUnitTest.cpp | 3 +- tests/SpotFinderIntegration.cpp | 3 +- tests/StatusVectorTest.cpp | 3 +- tests/StreamWriterTest.cpp | 3 +- tests/ThreadSafeFIFOSetTest.cpp | 3 +- tests/ZMQImagePusherTest.cpp | 3 +- tests/ZMQPreviewPublisherTest.cpp | 3 +- tests/ZSTDCompressorTest.cpp | 3 +- tests/gRPCServerTest.cpp | 3 +- tests/stream2.c | 1 - tools/CompressionBenchmark.cpp | 3 +- tools/DataAnalysisPerfTest.cpp | 3 +- tools/HDF5DatasetWriteTest.cpp | 3 +- tools/JFCalibrationPerfTest.cpp | 3 +- tools/PreviewTest.cpp | 3 +- tools/RadialIntDataset.cpp | 5 +- tools/RadialIntegrationCPUTest.cpp | 3 +- tools/UDPSimulator.cpp | 3 +- tools/UDPSimulator.h | 3 +- tools/jfjoch_udp_simulator.cpp | 3 +- writer/HDF5DataFile.cpp | 3 +- writer/HDF5DataFile.h | 3 +- writer/HDF5NXmx.cpp | 3 +- writer/HDF5NXmx.h | 3 +- writer/HDF5Objects.cpp | 3 +- writer/HDF5Objects.h | 3 +- writer/HDF5Sum.cpp | 3 +- writer/HDF5Writer.cpp | 3 +- writer/HDF5Writer.h | 3 +- writer/JFJochWriterService.cpp | 3 +- writer/JFJochWriterService.h | 3 +- writer/MakeDirectory.h | 3 +- writer/StreamWriter.cpp | 3 +- writer/StreamWriter.h | 3 +- writer/ZMQImagePuller.cpp | 3 +- writer/ZMQImagePuller.h | 3 +- writer/jfjoch_writer.cpp | 3 +- writer/jfjoch_writer_multi.cpp | 3 +- writer/jfjoch_writer_test.cpp | 3 +- 273 files changed, 256 insertions(+), 1476 deletions(-) delete mode 100644 LICENSE.GPL delete mode 100644 LICENSE.OHL-S diff --git a/LICENSE.GPL b/LICENSE.GPL deleted file mode 100644 index 7a3b7c2f..00000000 --- a/LICENSE.GPL +++ /dev/null @@ -1,674 +0,0 @@ - GNU GENERAL PUBLIC LICENSE - Version 3, 29 June 2007 - - Copyright (C) 2007 Free Software Foundation, Inc. - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The GNU General Public License is a free, copyleft license for -software and other kinds of works. - - The licenses for most software and other practical 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For a particular -product received by a particular user, "normally used" refers to a -typical or common use of that class of product, regardless of the status -of the particular user or of the way in which the particular user -actually uses, or expects or is expected to use, the product. A product -is a consumer product regardless of whether the product has substantial -commercial, industrial or non-consumer uses, unless such uses represent -the only significant mode of use of the product. - - "Installation Information" for a User Product means any methods, -procedures, authorization keys, or other information required to install -and execute modified versions of a covered work in that User Product from -a modified version of its Corresponding Source. The information must -suffice to ensure that the continued functioning of the modified object -code is in no case prevented or interfered with solely because -modification has been made. - - If you convey an object code work under this section in, or with, or -specifically for use in, a User Product, and the conveying occurs as -part of a transaction in which the right of possession and use of the -User Product is transferred to the recipient in perpetuity or for a -fixed term (regardless of how the transaction is characterized), the -Corresponding Source conveyed under this section must be accompanied -by the Installation Information. But this requirement does not apply -if neither you nor any third party retains the ability to install -modified object code on the User Product (for example, the work has -been installed in ROM). - - The requirement to provide Installation Information does not include a -requirement to continue to provide support service, warranty, or updates -for a work that has been modified or installed by the recipient, or for -the User Product in which it has been modified or installed. Access to a -network may be denied when the modification itself materially and -adversely affects the operation of the network or violates the rules and -protocols for communication across the network. - - Corresponding Source conveyed, and Installation Information provided, -in accord with this section must be in a format that is publicly -documented (and with an implementation available to the public in -source code form), and must require no special password or key for -unpacking, reading or copying. - - 7. Additional Terms. - - "Additional permissions" are terms that supplement the terms of this -License by making exceptions from one or more of its conditions. -Additional permissions that are applicable to the entire Program shall -be treated as though they were included in this License, to the extent -that they are valid under applicable law. If additional permissions -apply only to part of the Program, that part may be used separately -under those permissions, but the entire Program remains governed by -this License without regard to the additional permissions. - - When you convey a copy of a covered work, you may at your option -remove any additional permissions from that copy, or from any part of -it. (Additional permissions may be written to require their own -removal in certain cases when you modify the work.) You may place -additional permissions on material, added by you to a covered work, -for which you have or can give appropriate copyright permission. - - Notwithstanding any other provision of this License, for material you -add to a covered work, you may (if authorized by the copyright holders of -that material) supplement the terms of this License with terms: - - a) Disclaiming warranty or limiting liability differently from the - terms of sections 15 and 16 of this License; or - - b) Requiring preservation of specified reasonable legal notices or - author attributions in that material or in the Appropriate Legal - Notices displayed by works containing it; or - - c) Prohibiting misrepresentation of the origin of that material, or - requiring that modified versions of such material be marked in - reasonable ways as different from the original version; or - - d) Limiting the use for publicity purposes of names of licensors or - authors of the material; or - - e) Declining to grant rights under trademark law for use of some - trade names, trademarks, or service marks; or - - f) Requiring indemnification of licensors and authors of that - material by anyone who conveys the material (or modified versions of - it) with contractual assumptions of liability to the recipient, for - any liability that these contractual assumptions directly impose on - those licensors and authors. - - All other non-permissive additional terms are considered "further -restrictions" within the meaning of section 10. If the Program as you -received it, or any part of it, contains a notice stating that it is -governed by this License along with a term that is a further -restriction, you may remove that term. If a license document contains -a further restriction but permits relicensing or conveying under this -License, you may add to a covered work material governed by the terms -of that license document, provided that the further restriction does -not survive such relicensing or conveying. - - If you add terms to a covered work in accord with this section, you -must place, in the relevant source files, a statement of the -additional terms that apply to those files, or a notice indicating -where to find the applicable terms. - - Additional terms, permissive or non-permissive, may be stated in the -form of a separately written license, or stated as exceptions; -the above requirements apply either way. - - 8. Termination. - - You may not propagate or modify a covered work except as expressly -provided under this License. Any attempt otherwise to propagate or -modify it is void, and will automatically terminate your rights under -this License (including any patent licenses granted under the third -paragraph of section 11). - - However, if you cease all violation of this License, then your -license from a particular copyright holder is reinstated (a) -provisionally, unless and until the copyright holder explicitly and -finally terminates your license, and (b) permanently, if the copyright -holder fails to notify you of the violation by some reasonable means -prior to 60 days after the cessation. - - Moreover, your license from a particular copyright holder is -reinstated permanently if the copyright holder notifies you of the -violation by some reasonable means, this is the first time you have -received notice of violation of this License (for any work) from that -copyright holder, and you cure the violation prior to 30 days after -your receipt of the notice. - - Termination of your rights under this section does not terminate the -licenses of parties who have received copies or rights from you under -this License. If your rights have been terminated and not permanently -reinstated, you do not qualify to receive new licenses for the same -material under section 10. - - 9. Acceptance Not Required for Having Copies. - - You are not required to accept this License in order to receive or -run a copy of the Program. Ancillary propagation of a covered work -occurring solely as a consequence of using peer-to-peer transmission -to receive a copy likewise does not require acceptance. However, -nothing other than this License grants you permission to propagate or -modify any covered work. These actions infringe copyright if you do -not accept this License. Therefore, by modifying or propagating a -covered work, you indicate your acceptance of this License to do so. - - 10. Automatic Licensing of Downstream Recipients. - - Each time you convey a covered work, the recipient automatically -receives a license from the original licensors, to run, modify and -propagate that work, subject to this License. You are not responsible -for enforcing compliance by third parties with this License. - - An "entity transaction" is a transaction transferring control of an -organization, or substantially all assets of one, or subdividing an -organization, or merging organizations. If propagation of a covered -work results from an entity transaction, each party to that -transaction who receives a copy of the work also receives whatever -licenses to the work the party's predecessor in interest had or could -give under the previous paragraph, plus a right to possession of the -Corresponding Source of the work from the predecessor in interest, if -the predecessor has it or can get it with reasonable efforts. - - You may not impose any further restrictions on the exercise of the -rights granted or affirmed under this License. For example, you may -not impose a license fee, royalty, or other charge for exercise of -rights granted under this License, and you may not initiate litigation -(including a cross-claim or counterclaim in a lawsuit) alleging that -any patent claim is infringed by making, using, selling, offering for -sale, or importing the Program or any portion of it. - - 11. Patents. - - A "contributor" is a copyright holder who authorizes use under this -License of the Program or a work on which the Program is based. The -work thus licensed is called the contributor's "contributor version". - - A contributor's "essential patent claims" are all patent claims -owned or controlled by the contributor, whether already acquired or -hereafter acquired, that would be infringed by some manner, permitted -by this License, of making, using, or selling its contributor version, -but do not include claims that would be infringed only as a -consequence of further modification of the contributor version. For -purposes of this definition, "control" includes the right to grant -patent sublicenses in a manner consistent with the requirements of -this License. - - Each contributor grants you a non-exclusive, worldwide, royalty-free -patent license under the contributor's essential patent claims, to -make, use, sell, offer for sale, import and otherwise run, modify and -propagate the contents of its contributor version. - - In the following three paragraphs, a "patent license" is any express -agreement or commitment, however denominated, not to enforce a patent -(such as an express permission to practice a patent or covenant not to -sue for patent infringement). To "grant" such a patent license to a -party means to make such an agreement or commitment not to enforce a -patent against the party. - - If you convey a covered work, knowingly relying on a patent license, -and the Corresponding Source of the work is not available for anyone -to copy, free of charge and under the terms of this License, through a -publicly available network server or other readily accessible means, -then you must either (1) cause the Corresponding Source to be so -available, or (2) arrange to deprive yourself of the benefit of the -patent license for this particular work, or (3) arrange, in a manner -consistent with the requirements of this License, to extend the patent -license to downstream recipients. "Knowingly relying" means you have -actual knowledge that, but for the patent license, your conveying the -covered work in a country, or your recipient's use of the covered work -in a country, would infringe one or more identifiable patents in that -country that you have reason to believe are valid. - - If, pursuant to or in connection with a single transaction or -arrangement, you convey, or propagate by procuring conveyance of, a -covered work, and grant a patent license to some of the parties -receiving the covered work authorizing them to use, propagate, modify -or convey a specific copy of the covered work, then the patent license -you grant is automatically extended to all recipients of the covered -work and works based on it. - - A patent license is "discriminatory" if it does not include within -the scope of its coverage, prohibits the exercise of, or is -conditioned on the non-exercise of one or more of the rights that are -specifically granted under this License. You may not convey a covered -work if you are a party to an arrangement with a third party that is -in the business of distributing software, under which you make payment -to the third party based on the extent of your activity of conveying -the work, and under which the third party grants, to any of the -parties who would receive the covered work from you, a discriminatory -patent license (a) in connection with copies of the covered work -conveyed by you (or copies made from those copies), or (b) primarily -for and in connection with specific products or compilations that -contain the covered work, unless you entered into that arrangement, -or that patent license was granted, prior to 28 March 2007. - - Nothing in this License shall be construed as excluding or limiting -any implied license or other defenses to infringement that may -otherwise be available to you under applicable patent law. - - 12. No Surrender of Others' Freedom. - - If conditions are imposed on you (whether by court order, agreement or -otherwise) that contradict the conditions of this License, they do not -excuse you from the conditions of this License. If you cannot convey a -covered work so as to satisfy simultaneously your obligations under this -License and any other pertinent obligations, then as a consequence you may -not convey it at all. For example, if you agree to terms that obligate you -to collect a royalty for further conveying from those to whom you convey -the Program, the only way you could satisfy both those terms and this -License would be to refrain entirely from conveying the Program. - - 13. Use with the GNU Affero General Public License. - - Notwithstanding any other provision of this License, you have -permission to link or combine any covered work with a work licensed -under version 3 of the GNU Affero General Public License into a single -combined work, and to convey the resulting work. The terms of this -License will continue to apply to the part which is the covered work, -but the special requirements of the GNU Affero General Public License, -section 13, concerning interaction through a network will apply to the -combination as such. - - 14. Revised Versions of this License. - - The Free Software Foundation may publish revised and/or new versions of -the GNU General Public License from time to time. Such new versions will -be similar in spirit to the present version, but may differ in detail to -address new problems or concerns. - - Each version is given a distinguishing version number. If the -Program specifies that a certain numbered version of the GNU General -Public License "or any later version" applies to it, you have the -option of following the terms and conditions either of that numbered -version or of any later version published by the Free Software -Foundation. If the Program does not specify a version number of the -GNU General Public License, you may choose any version ever published -by the Free Software Foundation. - - If the Program specifies that a proxy can decide which future -versions of the GNU General Public License can be used, that proxy's -public statement of acceptance of a version permanently authorizes you -to choose that version for the Program. - - Later license versions may give you additional or different -permissions. However, no additional obligations are imposed on any -author or copyright holder as a result of your choosing to follow a -later version. - - 15. Disclaimer of Warranty. - - THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY -APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT -HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY -OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, -THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR -PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM -IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF -ALL NECESSARY SERVICING, REPAIR OR CORRECTION. - - 16. Limitation of Liability. - - IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING -WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS -THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY -GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE -USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF -DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD -PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), -EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF -SUCH DAMAGES. - - 17. Interpretation of Sections 15 and 16. - - If the disclaimer of warranty and limitation of liability provided -above cannot be given local legal effect according to their terms, -reviewing courts shall apply local law that most closely approximates -an absolute waiver of all civil liability in connection with the -Program, unless a warranty or assumption of liability accompanies a -copy of the Program in return for a fee. - - END OF TERMS AND CONDITIONS - - How to Apply These Terms to Your New Programs - - If you develop a new program, and you want it to be of the greatest -possible use to the public, the best way to achieve this is to make it -free software which everyone can redistribute and change under these terms. - - To do so, attach the following notices to the program. It is safest -to attach them to the start of each source file to most effectively -state the exclusion of warranty; and each file should have at least -the "copyright" line and a pointer to where the full notice is found. - - - Copyright (C) - - This program is free software: you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation, either version 3 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . - -Also add information on how to contact you by electronic and paper mail. - - If the program does terminal interaction, make it output a short -notice like this when it starts in an interactive mode: - - Copyright (C) - This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. - This is free software, and you are welcome to redistribute it - under certain conditions; type `show c' for details. - -The hypothetical commands `show w' and `show c' should show the appropriate -parts of the General Public License. Of course, your program's commands -might be different; for a GUI interface, you would use an "about box". - - You should also get your employer (if you work as a programmer) or school, -if any, to sign a "copyright disclaimer" for the program, if necessary. -For more information on this, and how to apply and follow the GNU GPL, see -. - - The GNU General Public License does not permit incorporating your program -into proprietary programs. If your program is a subroutine library, you -may consider it more useful to permit linking proprietary applications with -the library. If this is what you want to do, use the GNU Lesser General -Public License instead of this License. But first, please read -. \ No newline at end of file diff --git a/LICENSE.OHL-S b/LICENSE.OHL-S deleted file mode 100644 index dc764b43..00000000 --- a/LICENSE.OHL-S +++ /dev/null @@ -1,289 +0,0 @@ -CERN Open Hardware Licence Version 2 - Strongly Reciprocal - - -Preamble - -CERN has developed this licence to promote collaboration among -hardware designers and to provide a legal tool which supports the -freedom to use, study, modify, share and distribute hardware designs -and products based on those designs. Version 2 of the CERN Open -Hardware Licence comes in three variants: CERN-OHL-P (permissive); and -two reciprocal licences: CERN-OHL-W (weakly reciprocal) and this -licence, CERN-OHL-S (strongly reciprocal). - -The CERN-OHL-S is copyright CERN 2020. Anyone is welcome to use it, in -unmodified form only. - -Use of this Licence does not imply any endorsement by CERN of any -Licensor or their designs nor does it imply any involvement by CERN in -their development. - - -1 Definitions - - 1.1 'Licence' means this CERN-OHL-S. - - 1.2 'Compatible Licence' means - - a) any earlier version of the CERN Open Hardware licence, or - - b) any version of the CERN-OHL-S, or - - c) any licence which permits You to treat the Source to which - it applies as licensed under CERN-OHL-S provided that on - Conveyance of any such Source, or any associated Product You - treat the Source in question as being licensed under - CERN-OHL-S. - - 1.3 'Source' means information such as design materials or digital - code which can be applied to Make or test a Product or to - prepare a Product for use, Conveyance or sale, regardless of its - medium or how it is expressed. It may include Notices. - - 1.4 'Covered Source' means Source that is explicitly made available - under this Licence. - - 1.5 'Product' means any device, component, work or physical object, - whether in finished or intermediate form, arising from the use, - application or processing of Covered Source. - - 1.6 'Make' means to create or configure something, whether by - manufacture, assembly, compiling, loading or applying Covered - Source or another Product or otherwise. - - 1.7 'Available Component' means any part, sub-assembly, library or - code which: - - a) is licensed to You as Complete Source under a Compatible - Licence; or - - b) is available, at the time a Product or the Source containing - it is first Conveyed, to You and any other prospective - licensees - - i) as a physical part with sufficient rights and - information (including any configuration and - programming files and information about its - characteristics and interfaces) to enable it either to - be Made itself, or to be sourced and used to Make the - Product; or - ii) as part of the normal distribution of a tool used to - design or Make the Product. - - 1.8 'Complete Source' means the set of all Source necessary to Make - a Product, in the preferred form for making modifications, - including necessary installation and interfacing information - both for the Product, and for any included Available Components. - If the format is proprietary, it must also be made available in - a format (if the proprietary tool can create it) which is - viewable with a tool available to potential licensees and - licensed under a licence approved by the Free Software - Foundation or the Open Source Initiative. Complete Source need - not include the Source of any Available Component, provided that - You include in the Complete Source sufficient information to - enable a recipient to Make or source and use the Available - Component to Make the Product. - - 1.9 'Source Location' means a location where a Licensor has placed - Covered Source, and which that Licensor reasonably believes will - remain easily accessible for at least three years for anyone to - obtain a digital copy. - - 1.10 'Notice' means copyright, acknowledgement and trademark notices, - Source Location references, modification notices (subsection - 3.3(b)) and all notices that refer to this Licence and to the - disclaimer of warranties that are included in the Covered - Source. - - 1.11 'Licensee' or 'You' means any person exercising rights under - this Licence. - - 1.12 'Licensor' means a natural or legal person who creates or - modifies Covered Source. A person may be a Licensee and a - Licensor at the same time. - - 1.13 'Convey' means to communicate to the public or distribute. - - -2 Applicability - - 2.1 This Licence governs the use, copying, modification, Conveying - of Covered Source and Products, and the Making of Products. By - exercising any right granted under this Licence, You irrevocably - accept these terms and conditions. - - 2.2 This Licence is granted by the Licensor directly to You, and - shall apply worldwide and without limitation in time. - - 2.3 You shall not attempt to restrict by contract or otherwise the - rights granted under this Licence to other Licensees. - - 2.4 This Licence is not intended to restrict fair use, fair dealing, - or any other similar right. - - -3 Copying, Modifying and Conveying Covered Source - - 3.1 You may copy and Convey verbatim copies of Covered Source, in - any medium, provided You retain all Notices. - - 3.2 You may modify Covered Source, other than Notices, provided that - You irrevocably undertake to make that modified Covered Source - available from a Source Location should You Convey a Product in - circumstances where the recipient does not otherwise receive a - copy of the modified Covered Source. In each case subsection 3.3 - shall apply. - - You may only delete Notices if they are no longer applicable to - the corresponding Covered Source as modified by You and You may - add additional Notices applicable to Your modifications. - Including Covered Source in a larger work is modifying the - Covered Source, and the larger work becomes modified Covered - Source. - - 3.3 You may Convey modified Covered Source (with the effect that You - shall also become a Licensor) provided that You: - - a) retain Notices as required in subsection 3.2; - - b) add a Notice to the modified Covered Source stating that You - have modified it, with the date and brief description of how - You have modified it; - - c) add a Source Location Notice for the modified Covered Source - if You Convey in circumstances where the recipient does not - otherwise receive a copy of the modified Covered Source; and - - d) license the modified Covered Source under the terms and - conditions of this Licence (or, as set out in subsection - 8.3, a later version, if permitted by the licence of the - original Covered Source). Such modified Covered Source must - be licensed as a whole, but excluding Available Components - contained in it, which remain licensed under their own - applicable licences. - - -4 Making and Conveying Products - -You may Make Products, and/or Convey them, provided that You either -provide each recipient with a copy of the Complete Source or ensure -that each recipient is notified of the Source Location of the Complete -Source. That Complete Source is Covered Source, and You must -accordingly satisfy Your obligations set out in subsection 3.3. If -specified in a Notice, the Product must visibly and securely display -the Source Location on it or its packaging or documentation in the -manner specified in that Notice. - - -5 Research and Development - -You may Convey Covered Source, modified Covered Source or Products to -a legal entity carrying out development, testing or quality assurance -work on Your behalf provided that the work is performed on terms which -prevent the entity from both using the Source or Products for its own -internal purposes and Conveying the Source or Products or any -modifications to them to any person other than You. Any modifications -made by the entity shall be deemed to be made by You pursuant to -subsection 3.2. - - -6 DISCLAIMER AND LIABILITY - - 6.1 DISCLAIMER OF WARRANTY -- The Covered Source and any Products - are provided 'as is' and any express or implied warranties, - including, but not limited to, implied warranties of - merchantability, of satisfactory quality, non-infringement of - third party rights, and fitness for a particular purpose or use - are disclaimed in respect of any Source or Product to the - maximum extent permitted by law. The Licensor makes no - representation that any Source or Product does not or will not - infringe any patent, copyright, trade secret or other - proprietary right. The entire risk as to the use, quality, and - performance of any Source or Product shall be with You and not - the Licensor. This disclaimer of warranty is an essential part - of this Licence and a condition for the grant of any rights - granted under this Licence. - - 6.2 EXCLUSION AND LIMITATION OF LIABILITY -- The Licensor shall, to - the maximum extent permitted by law, have no liability for - direct, indirect, special, incidental, consequential, exemplary, - punitive or other damages of any character including, without - limitation, procurement of substitute goods or services, loss of - use, data or profits, or business interruption, however caused - and on any theory of contract, warranty, tort (including - negligence), product liability or otherwise, arising in any way - in relation to the Covered Source, modified Covered Source - and/or the Making or Conveyance of a Product, even if advised of - the possibility of such damages, and You shall hold the - Licensor(s) free and harmless from any liability, costs, - damages, fees and expenses, including claims by third parties, - in relation to such use. - - -7 Patents - - 7.1 Subject to the terms and conditions of this Licence, each - Licensor hereby grants to You a perpetual, worldwide, - non-exclusive, no-charge, royalty-free, irrevocable (except as - stated in subsections 7.2 and 8.4) patent licence to Make, have - Made, use, offer to sell, sell, import, and otherwise transfer - the Covered Source and Products, where such licence applies only - to those patent claims licensable by such Licensor that are - necessarily infringed by exercising rights under the Covered - Source as Conveyed by that Licensor. - - 7.2 If You institute patent litigation against any entity (including - a cross-claim or counterclaim in a lawsuit) alleging that the - Covered Source or a Product constitutes direct or contributory - patent infringement, or You seek any declaration that a patent - licensed to You under this Licence is invalid or unenforceable - then any rights granted to You under this Licence shall - terminate as of the date such process is initiated. - - -8 General - - 8.1 If any provisions of this Licence are or subsequently become - invalid or unenforceable for any reason, the remaining - provisions shall remain effective. - - 8.2 You shall not use any of the name (including acronyms and - abbreviations), image, or logo by which the Licensor or CERN is - known, except where needed to comply with section 3, or where - the use is otherwise allowed by law. Any such permitted use - shall be factual and shall not be made so as to suggest any kind - of endorsement or implication of involvement by the Licensor or - its personnel. - - 8.3 CERN may publish updated versions and variants of this Licence - which it considers to be in the spirit of this version, but may - differ in detail to address new problems or concerns. New - versions will be published with a unique version number and a - variant identifier specifying the variant. If the Licensor has - specified that a given variant applies to the Covered Source - without specifying a version, You may treat that Covered Source - as being released under any version of the CERN-OHL with that - variant. If no variant is specified, the Covered Source shall be - treated as being released under CERN-OHL-S. The Licensor may - also specify that the Covered Source is subject to a specific - version of the CERN-OHL or any later version in which case You - may apply this or any later version of CERN-OHL with the same - variant identifier published by CERN. - - 8.4 This Licence shall terminate with immediate effect if You fail - to comply with any of its terms and conditions. - - 8.5 However, if You cease all breaches of this Licence, then Your - Licence from any Licensor is reinstated unless such Licensor has - terminated this Licence by giving You, while You remain in - breach, a notice specifying the breach and requiring You to cure - it within 30 days, and You have failed to come into compliance - in all material respects by the end of the 30 day period. Should - You repeat the breach after receipt of a cure notice and - subsequent reinstatement, this Licence will terminate - immediately and permanently. Section 6 shall continue to apply - after any termination. - - 8.6 This Licence shall not be enforceable except by a Licensor - acting as such, and third party beneficiary rights are - specifically excluded. \ No newline at end of file diff --git a/README.md b/README.md index 1d372252..63219d37 100644 --- a/README.md +++ b/README.md @@ -6,9 +6,7 @@ Citation: F. Leonarski, M. Bruckner, C. Lopez-Cuenca, A. Mozzanica, H.-C. Stadle ## License -Software components are licensed with GNU Public License version 3. - -Hardware components are licensed with Strongly-reciprocal CERN Open Hardware Licence version 2. +Operating Jungfraujoch, as well as sharing sources code requires explicit license from PSI. ## Hardware requirements 1. JUNGFRAU detector (optimally 4M with 2 kHz enabled read-out boards) diff --git a/broker/JFJochBroker.cpp b/broker/JFJochBroker.cpp index fba68673..1e36f54f 100644 --- a/broker/JFJochBroker.cpp +++ b/broker/JFJochBroker.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFJochBroker.h" diff --git a/broker/JFJochBroker.h b/broker/JFJochBroker.h index 4d1bfdff..95efda4e 100644 --- a/broker/JFJochBroker.h +++ b/broker/JFJochBroker.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFJOCHBROKER_H #define JUNGFRAUJOCH_JFJOCHBROKER_H diff --git a/broker/JFJochBrokerParser.cpp b/broker/JFJochBrokerParser.cpp index b3d6868d..f94f906c 100644 --- a/broker/JFJochBrokerParser.cpp +++ b/broker/JFJochBrokerParser.cpp @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #include "JFJochBrokerParser.h" #include "JFJochBroker.h" diff --git a/broker/JFJochBrokerParser.h b/broker/JFJochBrokerParser.h index 8efbc1b3..b6a6f084 100644 --- a/broker/JFJochBrokerParser.h +++ b/broker/JFJochBrokerParser.h @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #ifndef JUNGFRAUJOCH_JFJOCHBROKERPARSER_H #define JUNGFRAUJOCH_JFJOCHBROKERPARSER_H diff --git a/broker/JFJochServices.cpp b/broker/JFJochServices.cpp index f4946422..2bcdf7de 100644 --- a/broker/JFJochServices.cpp +++ b/broker/JFJochServices.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFJochServices.h" #include "../common/JFJochException.h" diff --git a/broker/JFJochServices.h b/broker/JFJochServices.h index cd7b9421..e11c83d7 100644 --- a/broker/JFJochServices.h +++ b/broker/JFJochServices.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFJOCHSERVICES_H #define JUNGFRAUJOCH_JFJOCHSERVICES_H diff --git a/broker/JFJochStateMachine.cpp b/broker/JFJochStateMachine.cpp index 35d0e17c..e034955c 100644 --- a/broker/JFJochStateMachine.cpp +++ b/broker/JFJochStateMachine.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/broker/JFJochStateMachine.h b/broker/JFJochStateMachine.h index 07ff62f8..a8c6b430 100644 --- a/broker/JFJochStateMachine.h +++ b/broker/JFJochStateMachine.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFJOCHSTATEMACHINE_H #define JUNGFRAUJOCH_JFJOCHSTATEMACHINE_H diff --git a/broker/jfjoch_broker.cpp b/broker/jfjoch_broker.cpp index c67a775b..a768596c 100644 --- a/broker/jfjoch_broker.cpp +++ b/broker/jfjoch_broker.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/common/CUDAWrapper.cpp b/common/CUDAWrapper.cpp index 9b5ff35d..fd2cb331 100644 --- a/common/CUDAWrapper.cpp +++ b/common/CUDAWrapper.cpp @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #ifndef JFJOCH_USE_CUDA diff --git a/common/CUDAWrapper.cu b/common/CUDAWrapper.cu index 8a47b847..2a259f1c 100644 --- a/common/CUDAWrapper.cu +++ b/common/CUDAWrapper.cu @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #include "CUDAWrapper.h" #include "JFJochException.h" diff --git a/common/CUDAWrapper.h b/common/CUDAWrapper.h index 4297ed1f..af422548 100644 --- a/common/CUDAWrapper.h +++ b/common/CUDAWrapper.h @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #ifndef JUNGFRAUJOCH_CUDAWRAPPER_H #define JUNGFRAUJOCH_CUDAWRAPPER_H diff --git a/common/Coord.cpp b/common/Coord.cpp index a46308cb..e529c62d 100644 --- a/common/Coord.cpp +++ b/common/Coord.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "Coord.h" diff --git a/common/Coord.h b/common/Coord.h index d7ad8a05..d6e87118 100644 --- a/common/Coord.h +++ b/common/Coord.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef INDEX_COORD_H #define INDEX_COORD_H diff --git a/common/Definitions.h b/common/Definitions.h index cb311547..05263436 100644 --- a/common/Definitions.h +++ b/common/Definitions.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef DEFINITIONS_H #define DEFINITIONS_H diff --git a/common/DetectorGeometry.cpp b/common/DetectorGeometry.cpp index 14f0dfae..75730e33 100644 --- a/common/DetectorGeometry.cpp +++ b/common/DetectorGeometry.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "DetectorGeometry.h" #include "JFJochException.h" diff --git a/common/DetectorGeometry.h b/common/DetectorGeometry.h index 2cae7175..44a1d22d 100644 --- a/common/DetectorGeometry.h +++ b/common/DetectorGeometry.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_DETECTORGEOMETRY_H #define JUNGFRAUJOCH_DETECTORGEOMETRY_H diff --git a/common/DetectorModuleGeometry.cpp b/common/DetectorModuleGeometry.cpp index 0cc391d7..5240b988 100644 --- a/common/DetectorModuleGeometry.cpp +++ b/common/DetectorModuleGeometry.cpp @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #include "DetectorModuleGeometry.h" #include "JFJochException.h" diff --git a/common/DetectorModuleGeometry.h b/common/DetectorModuleGeometry.h index f10583aa..74b2eca7 100644 --- a/common/DetectorModuleGeometry.h +++ b/common/DetectorModuleGeometry.h @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #ifndef JUNGFRAUJOCH_DETECTORMODULEGEOMETRY_H #define JUNGFRAUJOCH_DETECTORMODULEGEOMETRY_H diff --git a/common/DetectorSetup.cpp b/common/DetectorSetup.cpp index e03b4e48..126911ef 100644 --- a/common/DetectorSetup.cpp +++ b/common/DetectorSetup.cpp @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #include "DetectorSetup.h" #include "JFJochException.h" diff --git a/common/DetectorSetup.h b/common/DetectorSetup.h index 47b6c8c6..60fd1456 100644 --- a/common/DetectorSetup.h +++ b/common/DetectorSetup.h @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #ifndef JUNGFRAUJOCH_DETECTORSETUP_H #define JUNGFRAUJOCH_DETECTORSETUP_H diff --git a/common/DiffractionExperiment.cpp b/common/DiffractionExperiment.cpp index b4606c66..5d4f4351 100644 --- a/common/DiffractionExperiment.cpp +++ b/common/DiffractionExperiment.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/common/DiffractionExperiment.h b/common/DiffractionExperiment.h index 20e79896..619e7a78 100644 --- a/common/DiffractionExperiment.h +++ b/common/DiffractionExperiment.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef DIFFRACTIONEXPERIMENT_H #define DIFFRACTIONEXPERIMENT_H diff --git a/common/DiffractionGeometry.h b/common/DiffractionGeometry.h index 7f341448..b89b82d1 100644 --- a/common/DiffractionGeometry.h +++ b/common/DiffractionGeometry.h @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #ifndef JUNGFRAUJOCH_DIFFRACTIONGEOMETRY_H #define JUNGFRAUJOCH_DIFFRACTIONGEOMETRY_H diff --git a/common/DiffractionSpot.cpp b/common/DiffractionSpot.cpp index 1b6cb9c6..f408777f 100644 --- a/common/DiffractionSpot.cpp +++ b/common/DiffractionSpot.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "DiffractionSpot.h" #include "DiffractionGeometry.h" diff --git a/common/DiffractionSpot.h b/common/DiffractionSpot.h index 9f56a4f8..dd138f7f 100644 --- a/common/DiffractionSpot.h +++ b/common/DiffractionSpot.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_DIFFRACTIONSPOT_H #define JUNGFRAUJOCH_DIFFRACTIONSPOT_H diff --git a/common/FrameTransformation.cpp b/common/FrameTransformation.cpp index 25ac9afe..7f412eca 100644 --- a/common/FrameTransformation.cpp +++ b/common/FrameTransformation.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/common/FrameTransformation.h b/common/FrameTransformation.h index e86eb18e..d212d9dd 100644 --- a/common/FrameTransformation.h +++ b/common/FrameTransformation.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_FRAMETRANSFORMATION_H #define JUNGFRAUJOCH_FRAMETRANSFORMATION_H diff --git a/common/GitInfo.cpp.in b/common/GitInfo.cpp.in index 63ec4475..ca5bf312 100644 --- a/common/GitInfo.cpp.in +++ b/common/GitInfo.cpp.in @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/common/GitInfo.h b/common/GitInfo.h index ff359763..fc87481f 100644 --- a/common/GitInfo.h +++ b/common/GitInfo.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_GITINFO_H #define JUNGFRAUJOCH_GITINFO_H diff --git a/common/Histogram.h b/common/Histogram.h index 7202c616..477aa646 100644 --- a/common/Histogram.h +++ b/common/Histogram.h @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #ifndef JUNGFRAUJOCH_HISTOGRAM_H #define JUNGFRAUJOCH_HISTOGRAM_H diff --git a/common/ImagePusher.cpp b/common/ImagePusher.cpp index 66926b71..a88ba5c4 100644 --- a/common/ImagePusher.cpp +++ b/common/ImagePusher.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "ImagePusher.h" diff --git a/common/ImagePusher.h b/common/ImagePusher.h index 51aaf76f..8cc4d514 100644 --- a/common/ImagePusher.h +++ b/common/ImagePusher.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_IMAGEPUSHER_H #define JUNGFRAUJOCH_IMAGEPUSHER_H diff --git a/common/JFJochException.h b/common/JFJochException.h index 329d65f5..d57f005a 100644 --- a/common/JFJochException.h +++ b/common/JFJochException.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef SLSEXCEPTION_H #define SLSEXCEPTION_H diff --git a/common/Logger.cpp b/common/Logger.cpp index 23cc0485..b426da26 100644 --- a/common/Logger.cpp +++ b/common/Logger.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "spdlog/sinks/daily_file_sink.h" #include "spdlog/sinks/stdout_color_sinks.h" diff --git a/common/Logger.h b/common/Logger.h index fea2c3fd..cf279bca 100644 --- a/common/Logger.h +++ b/common/Logger.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_LOGGER_H #define JUNGFRAUJOCH_LOGGER_H diff --git a/common/NUMAHWPolicy.cpp b/common/NUMAHWPolicy.cpp index e3127452..6aa0433a 100644 --- a/common/NUMAHWPolicy.cpp +++ b/common/NUMAHWPolicy.cpp @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #include "NUMAHWPolicy.h" diff --git a/common/NUMAHWPolicy.h b/common/NUMAHWPolicy.h index 446b66a1..7829eed4 100644 --- a/common/NUMAHWPolicy.h +++ b/common/NUMAHWPolicy.h @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #ifndef JUNGFRAUJOCH_NUMAHWPOLICY_H #define JUNGFRAUJOCH_NUMAHWPOLICY_H diff --git a/common/NetworkAddressConvert.cpp b/common/NetworkAddressConvert.cpp index c1d2570f..6e0ac0e4 100644 --- a/common/NetworkAddressConvert.cpp +++ b/common/NetworkAddressConvert.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/common/NetworkAddressConvert.h b/common/NetworkAddressConvert.h index 78854c7b..ea8da982 100644 --- a/common/NetworkAddressConvert.h +++ b/common/NetworkAddressConvert.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_NETWORKADDRESSCONVERT_H #define JUNGFRAUJOCH_NETWORKADDRESSCONVERT_H diff --git a/common/ROIFilter.h b/common/ROIFilter.h index be96f0c5..3cac8404 100644 --- a/common/ROIFilter.h +++ b/common/ROIFilter.h @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #ifndef JUNGFRAUJOCH_ROIFILTER_H #define JUNGFRAUJOCH_ROIFILTER_H diff --git a/common/RawToConvertedGeometry.h b/common/RawToConvertedGeometry.h index 310f597d..ec59d178 100644 --- a/common/RawToConvertedGeometry.h +++ b/common/RawToConvertedGeometry.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_RAWTOCONVERTEDGEOMETRY_H #define JUNGFRAUJOCH_RAWTOCONVERTEDGEOMETRY_H diff --git a/common/SpotToSave.h b/common/SpotToSave.h index 5b7dd56d..c63ff7b4 100644 --- a/common/SpotToSave.h +++ b/common/SpotToSave.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_SPOTTOSAVE_H #define JUNGFRAUJOCH_SPOTTOSAVE_H diff --git a/common/StatusVector.h b/common/StatusVector.h index 980c8a40..9f8206cd 100644 --- a/common/StatusVector.h +++ b/common/StatusVector.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_STATUSVECTOR_H #define JUNGFRAUJOCH_STATUSVECTOR_H diff --git a/common/TestImagePusher.cpp b/common/TestImagePusher.cpp index 5a449b2b..fe0aec7e 100644 --- a/common/TestImagePusher.cpp +++ b/common/TestImagePusher.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "TestImagePusher.h" #include "../tests/FPGAUnitTest.h" diff --git a/common/TestImagePusher.h b/common/TestImagePusher.h index 5102b6fa..98098c0b 100644 --- a/common/TestImagePusher.h +++ b/common/TestImagePusher.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_TESTIMAGEPUSHER_H #define JUNGFRAUJOCH_TESTIMAGEPUSHER_H diff --git a/common/ThreadSafeFIFO.h b/common/ThreadSafeFIFO.h index ca9b0841..b73dd635 100644 --- a/common/ThreadSafeFIFO.h +++ b/common/ThreadSafeFIFO.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_THREADSAFEFIFO_H #define JUNGFRAUJOCH_THREADSAFEFIFO_H diff --git a/common/UnitCell.h b/common/UnitCell.h index 011fef3f..d9cb1536 100644 --- a/common/UnitCell.h +++ b/common/UnitCell.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_UNITCELL_H #define JUNGFRAUJOCH_UNITCELL_H diff --git a/common/ZMQImagePusher.cpp b/common/ZMQImagePusher.cpp index c57339d5..f45e6d80 100644 --- a/common/ZMQImagePusher.cpp +++ b/common/ZMQImagePusher.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "ZMQImagePusher.h" #include "JFJochException.h" diff --git a/common/ZMQImagePusher.h b/common/ZMQImagePusher.h index 9d1af851..eb433cb2 100644 --- a/common/ZMQImagePusher.h +++ b/common/ZMQImagePusher.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_ZMQIMAGEPUSHER_H #define JUNGFRAUJOCH_ZMQIMAGEPUSHER_H diff --git a/common/ZMQPreviewPublisher.cpp b/common/ZMQPreviewPublisher.cpp index e116cf20..ae298f2f 100644 --- a/common/ZMQPreviewPublisher.cpp +++ b/common/ZMQPreviewPublisher.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "ZMQPreviewPublisher.h" #include "grpcToJson.h" diff --git a/common/ZMQPreviewPublisher.h b/common/ZMQPreviewPublisher.h index aea24872..004adf47 100644 --- a/common/ZMQPreviewPublisher.h +++ b/common/ZMQPreviewPublisher.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_ZMQPREVIEWPUBLISHER_H #define JUNGFRAUJOCH_ZMQPREVIEWPUBLISHER_H diff --git a/common/ZMQWrappers.cpp b/common/ZMQWrappers.cpp index f235d95a..f0d569b9 100644 --- a/common/ZMQWrappers.cpp +++ b/common/ZMQWrappers.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "ZMQWrappers.h" #include diff --git a/common/ZMQWrappers.h b/common/ZMQWrappers.h index 74877fdb..41597d29 100644 --- a/common/ZMQWrappers.h +++ b/common/ZMQWrappers.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_ZMQWRAPPERS_H #define JUNGFRAUJOCH_ZMQWRAPPERS_H diff --git a/common/ZeroCopyReturnValue.h b/common/ZeroCopyReturnValue.h index 59742d76..ce0fb672 100644 --- a/common/ZeroCopyReturnValue.h +++ b/common/ZeroCopyReturnValue.h @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #ifndef JUNGFRAUJOCH_ZEROCOPYRETURNVALUE_H #define JUNGFRAUJOCH_ZEROCOPYRETURNVALUE_H diff --git a/common/grpcToJson.h b/common/grpcToJson.h index 334a64c8..3614fdb6 100644 --- a/common/grpcToJson.h +++ b/common/grpcToJson.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_GRPCTOJSON_H #define JUNGFRAUJOCH_GRPCTOJSON_H diff --git a/common/jsonToGrpc.h b/common/jsonToGrpc.h index 1ec84a07..5e88135b 100644 --- a/common/jsonToGrpc.h +++ b/common/jsonToGrpc.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JSONTOGRPC_H #define JUNGFRAUJOCH_JSONTOGRPC_H diff --git a/common/to_fixed.h b/common/to_fixed.h index 0389a1b4..351d0638 100644 --- a/common/to_fixed.h +++ b/common/to_fixed.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_TO_FIXED_H #define JUNGFRAUJOCH_TO_FIXED_H diff --git a/compression/CompressionAlgorithmEnum.h b/compression/CompressionAlgorithmEnum.h index 10321cee..eb9c0fbf 100644 --- a/compression/CompressionAlgorithmEnum.h +++ b/compression/CompressionAlgorithmEnum.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_COMPRESSIONALGORITHMENUM_H #define JUNGFRAUJOCH_COMPRESSIONALGORITHMENUM_H diff --git a/compression/JFJochCompressor.cpp b/compression/JFJochCompressor.cpp index fcc7d8bb..b9efa8c0 100644 --- a/compression/JFJochCompressor.cpp +++ b/compression/JFJochCompressor.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFJochCompressor.h" diff --git a/compression/JFJochCompressor.h b/compression/JFJochCompressor.h index 0a2b5828..7da600a7 100644 --- a/compression/JFJochCompressor.h +++ b/compression/JFJochCompressor.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFJOCHCOMPRESSOR_H #define JUNGFRAUJOCH_JFJOCHCOMPRESSOR_H diff --git a/compression/JFJochDecompress.h b/compression/JFJochDecompress.h index b373bd72..f6424992 100644 --- a/compression/JFJochDecompress.h +++ b/compression/JFJochDecompress.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFJOCHDECOMPRESS_H #define JUNGFRAUJOCH_JFJOCHDECOMPRESS_H diff --git a/compression/JFJochZstdCompressor.cpp b/compression/JFJochZstdCompressor.cpp index 2ec156b7..8fca994a 100644 --- a/compression/JFJochZstdCompressor.cpp +++ b/compression/JFJochZstdCompressor.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFJochZstdCompressor.h" diff --git a/compression/JFJochZstdCompressor.h b/compression/JFJochZstdCompressor.h index 2775e134..28084bea 100644 --- a/compression/JFJochZstdCompressor.h +++ b/compression/JFJochZstdCompressor.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFJOCHZSTDCOMPRESSOR_H #define JUNGFRAUJOCH_JFJOCHZSTDCOMPRESSOR_H diff --git a/compression/MaxCompressedSize.cpp b/compression/MaxCompressedSize.cpp index c21132e9..0646e607 100644 --- a/compression/MaxCompressedSize.cpp +++ b/compression/MaxCompressedSize.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/compression/MaxCompressedSize.h b/compression/MaxCompressedSize.h index 52689674..6ecd3e17 100644 --- a/compression/MaxCompressedSize.h +++ b/compression/MaxCompressedSize.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_MAXCOMPRESSEDSIZE_H #define JUNGFRAUJOCH_MAXCOMPRESSEDSIZE_H diff --git a/detector_control/DetectorWrapper.cpp b/detector_control/DetectorWrapper.cpp index 94e50ae8..b434f059 100644 --- a/detector_control/DetectorWrapper.cpp +++ b/detector_control/DetectorWrapper.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/detector_control/DetectorWrapper.h b/detector_control/DetectorWrapper.h index ed8d280d..2bc09426 100644 --- a/detector_control/DetectorWrapper.h +++ b/detector_control/DetectorWrapper.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_DETECTORWRAPPER_H #define JUNGFRAUJOCH_DETECTORWRAPPER_H diff --git a/detector_control/JFJochDetector.cpp b/detector_control/JFJochDetector.cpp index 45503c8c..fa328863 100644 --- a/detector_control/JFJochDetector.cpp +++ b/detector_control/JFJochDetector.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFJochDetector.h" #include "../common/JFJochException.h" diff --git a/detector_control/JFJochDetector.h b/detector_control/JFJochDetector.h index 61e21094..4c88e4a6 100644 --- a/detector_control/JFJochDetector.h +++ b/detector_control/JFJochDetector.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef DETECTORWRAPPER_H #define DETECTORWRAPPER_H diff --git a/detector_control/jfjoch_detector.cpp b/detector_control/jfjoch_detector.cpp index 520d8849..d3f0e133 100644 --- a/detector_control/jfjoch_detector.cpp +++ b/detector_control/jfjoch_detector.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/fpga/hdl/action_config.v b/fpga/hdl/action_config.v index c6ad155c..d59f65fb 100644 --- a/fpga/hdl/action_config.v +++ b/fpga/hdl/action_config.v @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 +// Copyright (2019-2023) Paul Scherrer Institute `timescale 1ns/1ps diff --git a/fpga/hdl/action_wrapper.v b/fpga/hdl/action_wrapper.v index 7d0c118e..955e8419 100644 --- a/fpga/hdl/action_wrapper.v +++ b/fpga/hdl/action_wrapper.v @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 +// Copyright (2019-2023) Paul Scherrer Institute `timescale 1 ps / 1 ps diff --git a/fpga/hdl/check_datamover_error.v b/fpga/hdl/check_datamover_error.v index 5d98db12..11b17860 100644 --- a/fpga/hdl/check_datamover_error.v +++ b/fpga/hdl/check_datamover_error.v @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 +// Copyright (2019-2023) Paul Scherrer Institute `timescale 1ns / 1ps diff --git a/fpga/hdl/check_eth_busy.v b/fpga/hdl/check_eth_busy.v index 9f908e6f..0f9abaa5 100644 --- a/fpga/hdl/check_eth_busy.v +++ b/fpga/hdl/check_eth_busy.v @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 +// Copyright (2019-2023) Paul Scherrer Institute `timescale 1ns / 1ps diff --git a/fpga/hdl/gen_xdma_descriptor.v b/fpga/hdl/gen_xdma_descriptor.v index 14221dba..1ade4b72 100644 --- a/fpga/hdl/gen_xdma_descriptor.v +++ b/fpga/hdl/gen_xdma_descriptor.v @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 +// Copyright (2019-2023) Paul Scherrer Institute `timescale 1ns / 1ps diff --git a/fpga/hdl/refclk300to100.v b/fpga/hdl/refclk300to100.v index 7a850bce..7fc8a907 100644 --- a/fpga/hdl/refclk300to100.v +++ b/fpga/hdl/refclk300to100.v @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 +// Copyright (2019-2023) Paul Scherrer Institute `timescale 1ns / 1ps diff --git a/fpga/hdl/resetn_sync.v b/fpga/hdl/resetn_sync.v index 920363a1..9825a723 100644 --- a/fpga/hdl/resetn_sync.v +++ b/fpga/hdl/resetn_sync.v @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 +// Copyright (2019-2023) Paul Scherrer Institute `timescale 1ns / 1ps diff --git a/fpga/hls/arp.cpp b/fpga/hls/arp.cpp index 70dbd9b5..9abaa612 100644 --- a/fpga/hls/arp.cpp +++ b/fpga/hls/arp.cpp @@ -1,5 +1,5 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute + #include "hls_jfjoch.h" diff --git a/fpga/hls/data_collection_fsm.cpp b/fpga/hls/data_collection_fsm.cpp index 35251d99..a4688336 100644 --- a/fpga/hls/data_collection_fsm.cpp +++ b/fpga/hls/data_collection_fsm.cpp @@ -1,5 +1,5 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute + #include "hls_jfjoch.h" diff --git a/fpga/hls/datamover_model.h b/fpga/hls/datamover_model.h index bf16f985..f01938e5 100644 --- a/fpga/hls/datamover_model.h +++ b/fpga/hls/datamover_model.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_DATAMOVER_MODEL_H #define JUNGFRAUJOCH_DATAMOVER_MODEL_H diff --git a/fpga/hls/ethernet.cpp b/fpga/hls/ethernet.cpp index 21b5c187..2cb7719a 100644 --- a/fpga/hls/ethernet.cpp +++ b/fpga/hls/ethernet.cpp @@ -1,5 +1,5 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute + #include "hls_jfjoch.h" diff --git a/fpga/hls/frame_generator.cpp b/fpga/hls/frame_generator.cpp index db2df327..ce3e8218 100644 --- a/fpga/hls/frame_generator.cpp +++ b/fpga/hls/frame_generator.cpp @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #include "hls_jfjoch.h" #include "ip_header_checksum.h" diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index 0224036a..d8994d48 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -1,5 +1,5 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute + #ifndef JUNGFRAUJOCH_HLS_JFJOCH_H #define JUNGFRAUJOCH_HLS_JFJOCH_H diff --git a/fpga/hls/host_writer.cpp b/fpga/hls/host_writer.cpp index dd96d634..284c7b45 100644 --- a/fpga/hls/host_writer.cpp +++ b/fpga/hls/host_writer.cpp @@ -1,5 +1,5 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute + #include "hls_jfjoch.h" diff --git a/fpga/hls/icmp.cpp b/fpga/hls/icmp.cpp index 5b1e8b11..c3f81161 100755 --- a/fpga/hls/icmp.cpp +++ b/fpga/hls/icmp.cpp @@ -34,7 +34,7 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ************************************************/ // With modifications from Paul Scherrer Insitute -// SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later + #include "hls_jfjoch.h" #include "ip_header_checksum.h" diff --git a/fpga/hls/ip_header_checksum.h b/fpga/hls/ip_header_checksum.h index 53adbf04..e594c8d3 100644 --- a/fpga/hls/ip_header_checksum.h +++ b/fpga/hls/ip_header_checksum.h @@ -34,7 +34,7 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ************************************************/ // With modifications from Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later + #ifndef JUNGFRAUJOCH_IP_HEADER_CHECKSUM_H #define JUNGFRAUJOCH_IP_HEADER_CHECKSUM_H diff --git a/fpga/hls/ipv4.cpp b/fpga/hls/ipv4.cpp index 225cefdf..eab00a9e 100644 --- a/fpga/hls/ipv4.cpp +++ b/fpga/hls/ipv4.cpp @@ -1,5 +1,5 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute + #include "hls_jfjoch.h" #include "ip_header_checksum.h" diff --git a/fpga/hls/jf_conversion.cpp b/fpga/hls/jf_conversion.cpp index 48cad566..b24d80ab 100644 --- a/fpga/hls/jf_conversion.cpp +++ b/fpga/hls/jf_conversion.cpp @@ -1,5 +1,5 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute + #include "hls_jfjoch.h" diff --git a/fpga/hls/load_calibration.cpp b/fpga/hls/load_calibration.cpp index cef711d9..5b7dbb13 100644 --- a/fpga/hls/load_calibration.cpp +++ b/fpga/hls/load_calibration.cpp @@ -1,5 +1,5 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute + #include "hls_jfjoch.h" diff --git a/fpga/hls/parallel_stream.h b/fpga/hls/parallel_stream.h index edfbb741..ac50b37b 100644 --- a/fpga/hls/parallel_stream.h +++ b/fpga/hls/parallel_stream.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_PARALLEL_STREAM_H #define JUNGFRAUJOCH_PARALLEL_STREAM_H diff --git a/fpga/hls/sls_detector.cpp b/fpga/hls/sls_detector.cpp index 14a1e5f7..3707d8a7 100644 --- a/fpga/hls/sls_detector.cpp +++ b/fpga/hls/sls_detector.cpp @@ -1,5 +1,5 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute + #include "hls_jfjoch.h" diff --git a/fpga/hls/stream_merge.cpp b/fpga/hls/stream_merge.cpp index 7653f44e..688b90b3 100644 --- a/fpga/hls/stream_merge.cpp +++ b/fpga/hls/stream_merge.cpp @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #include "hls_jfjoch.h" diff --git a/fpga/hls/timer.cpp b/fpga/hls/timer.cpp index a0c6ad27..e8051a99 100644 --- a/fpga/hls/timer.cpp +++ b/fpga/hls/timer.cpp @@ -1,5 +1,5 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute + #include "hls_jfjoch.h" diff --git a/fpga/hls/udp.cpp b/fpga/hls/udp.cpp index 32250aac..9f84389c 100644 --- a/fpga/hls/udp.cpp +++ b/fpga/hls/udp.cpp @@ -1,5 +1,5 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: CERN-OHL-S-2.0 or GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute + #include "hls_jfjoch.h" diff --git a/fpga/pcie_driver/ActionConfig.h b/fpga/pcie_driver/ActionConfig.h index fa691569..f248ed5f 100644 --- a/fpga/pcie_driver/ActionConfig.h +++ b/fpga/pcie_driver/ActionConfig.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_ACTIONCONFIG_H #define JUNGFRAUJOCH_ACTIONCONFIG_H diff --git a/fpga/pcie_driver/jfjoch_drv.c b/fpga/pcie_driver/jfjoch_drv.c index bfb846d4..6d89ff70 100644 --- a/fpga/pcie_driver/jfjoch_drv.c +++ b/fpga/pcie_driver/jfjoch_drv.c @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/fpga/pcie_driver/jfjoch_drv.h b/fpga/pcie_driver/jfjoch_drv.h index abf097c5..508b84cb 100644 --- a/fpga/pcie_driver/jfjoch_drv.h +++ b/fpga/pcie_driver/jfjoch_drv.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFJOCH_DRV_H #define JUNGFRAUJOCH_JFJOCH_DRV_H diff --git a/fpga/pcie_driver/jfjoch_function.c b/fpga/pcie_driver/jfjoch_function.c index 17cefe03..29c82cbc 100644 --- a/fpga/pcie_driver/jfjoch_function.c +++ b/fpga/pcie_driver/jfjoch_function.c @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "jfjoch_drv.h" #include "../../common/Definitions.h" diff --git a/fpga/pcie_driver/jfjoch_ioctl.c b/fpga/pcie_driver/jfjoch_ioctl.c index 592f36bd..13411599 100644 --- a/fpga/pcie_driver/jfjoch_ioctl.c +++ b/fpga/pcie_driver/jfjoch_ioctl.c @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "jfjoch_drv.h" #include "jfjoch_ioctl.h" diff --git a/fpga/pcie_driver/jfjoch_ioctl.h b/fpga/pcie_driver/jfjoch_ioctl.h index 6a239b28..4d15f461 100644 --- a/fpga/pcie_driver/jfjoch_ioctl.h +++ b/fpga/pcie_driver/jfjoch_ioctl.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFJOCH_IOCTL_H #define JUNGFRAUJOCH_JFJOCH_IOCTL_H diff --git a/fpga/pcie_driver/jfjoch_memory.c b/fpga/pcie_driver/jfjoch_memory.c index 7558888d..ffbec00c 100644 --- a/fpga/pcie_driver/jfjoch_memory.c +++ b/fpga/pcie_driver/jfjoch_memory.c @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "jfjoch_drv.h" #include "../../common/Definitions.h" diff --git a/fpga/pcie_driver/jfjoch_miscdev.c b/fpga/pcie_driver/jfjoch_miscdev.c index b3bcdb02..2ccb1e5e 100644 --- a/fpga/pcie_driver/jfjoch_miscdev.c +++ b/fpga/pcie_driver/jfjoch_miscdev.c @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "jfjoch_drv.h" #include diff --git a/fpga/pcie_driver/jfjoch_pcie_setup.c b/fpga/pcie_driver/jfjoch_pcie_setup.c index 5725347e..fa57e396 100644 --- a/fpga/pcie_driver/jfjoch_pcie_setup.c +++ b/fpga/pcie_driver/jfjoch_pcie_setup.c @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "jfjoch_drv.h" #include "../../common/Definitions.h" diff --git a/fpga/scripts/bd_pcie.tcl b/fpga/scripts/bd_pcie.tcl index 94280f66..dff19983 100644 --- a/fpga/scripts/bd_pcie.tcl +++ b/fpga/scripts/bd_pcie.tcl @@ -1,5 +1,4 @@ -## Copyright (2019-2022) Paul Scherrer Institute -## SPDX-License-Identifier: CERN-OHL-S-2.0 +## Copyright (2019-2023) Paul Scherrer Institute ################################################################ # This is a generated script based on design: jfjoch_pcie diff --git a/fpga/scripts/build_pcie_design.tcl b/fpga/scripts/build_pcie_design.tcl index b53bf9b9..eb490e0d 100644 --- a/fpga/scripts/build_pcie_design.tcl +++ b/fpga/scripts/build_pcie_design.tcl @@ -1,5 +1,4 @@ -## Copyright (2019-2022) Paul Scherrer Institute -## SPDX-License-Identifier: CERN-OHL-S-2.0 +## Copyright (2019-2023) Paul Scherrer Institute set origin_dir [file dirname [file normalize [info script]]] diff --git a/fpga/scripts/hbm_u55c.tcl b/fpga/scripts/hbm_u55c.tcl index e435dfed..7a1463df 100644 --- a/fpga/scripts/hbm_u55c.tcl +++ b/fpga/scripts/hbm_u55c.tcl @@ -1,5 +1,4 @@ -## Copyright (2019-2022) Paul Scherrer Institute -## SPDX-License-Identifier: CERN-OHL-S-2.0 +## Copyright (2019-2023) Paul Scherrer Institute # Inspired on Apache License based SNAP/OC-Accel design from IBM diff --git a/fpga/scripts/jfjoch.tcl b/fpga/scripts/jfjoch.tcl index f5518633..763aafb0 100644 --- a/fpga/scripts/jfjoch.tcl +++ b/fpga/scripts/jfjoch.tcl @@ -1,5 +1,4 @@ -## Copyright (2019-2022) Paul Scherrer Institute -## SPDX-License-Identifier: CERN-OHL-S-2.0 +## Copyright (2019-2023) Paul Scherrer Institute # Hierarchical cell: jungfraujoch proc create_hier_cell_jungfraujoch { parentCell nameHier } { diff --git a/fpga/scripts/mac_100g_pcie.tcl b/fpga/scripts/mac_100g_pcie.tcl index 0a157394..8a6f64c5 100644 --- a/fpga/scripts/mac_100g_pcie.tcl +++ b/fpga/scripts/mac_100g_pcie.tcl @@ -1,5 +1,4 @@ -## Copyright (2019-2022) Paul Scherrer Institute -## SPDX-License-Identifier: CERN-OHL-S-2.0 +## Copyright (2019-2023) Paul Scherrer Institute # Hierarchical cell: mac_100g proc create_hier_cell_mac_100g { parentCell nameHier } { diff --git a/fpga/scripts/network_stack.tcl b/fpga/scripts/network_stack.tcl index fb5b842a..3fe69d9e 100644 --- a/fpga/scripts/network_stack.tcl +++ b/fpga/scripts/network_stack.tcl @@ -1,5 +1,4 @@ -## Copyright (2019-2022) Paul Scherrer Institute -## SPDX-License-Identifier: CERN-OHL-S-2.0 +## Copyright (2019-2023) Paul Scherrer Institute # Hierarchical cell: network_stack proc create_hier_cell_network_stack { parentCell nameHier } { diff --git a/fpga/scripts/pcie_dma.tcl b/fpga/scripts/pcie_dma.tcl index 84cfe3b5..ad976b87 100644 --- a/fpga/scripts/pcie_dma.tcl +++ b/fpga/scripts/pcie_dma.tcl @@ -1,5 +1,4 @@ -## Copyright (2019-2022) Paul Scherrer Institute -## SPDX-License-Identifier: CERN-OHL-S-2.0 +## Copyright (2019-2023) Paul Scherrer Institute # Hierarchical cell: pcie_dma_0 proc create_hier_cell_pcie_dma_0 { parentCell nameHier } { diff --git a/fpga/scripts/synth_and_impl.tcl b/fpga/scripts/synth_and_impl.tcl index eaa34bb6..f159d4a0 100644 --- a/fpga/scripts/synth_and_impl.tcl +++ b/fpga/scripts/synth_and_impl.tcl @@ -1,5 +1,4 @@ -## Copyright (2019-2022) Paul Scherrer Institute -## SPDX-License-Identifier: CERN-OHL-S-2.0 +## Copyright (2019-2023) Paul Scherrer Institute ## open_project $::env(VIV_PROJECT_PATH) diff --git a/fpga/scripts/synth_hls_function.tcl b/fpga/scripts/synth_hls_function.tcl index c53c2881..c940b88b 100644 --- a/fpga/scripts/synth_hls_function.tcl +++ b/fpga/scripts/synth_hls_function.tcl @@ -1,5 +1,4 @@ -## Copyright (2019-2022) Paul Scherrer Institute -## SPDX-License-Identifier: CERN-OHL-S-2.0 +## Copyright (2019-2023) Paul Scherrer Institute open_project $env(HLS_TOP_FUNCTION) -reset diff --git a/frame_serialize/CBORMessages.h b/frame_serialize/CBORMessages.h index 17bf2d7c..897aff29 100644 --- a/frame_serialize/CBORMessages.h +++ b/frame_serialize/CBORMessages.h @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #ifndef JUNGFRAUJOCH_CBORMESSAGES_H #define JUNGFRAUJOCH_CBORMESSAGES_H diff --git a/frame_serialize/CborErr.h b/frame_serialize/CborErr.h index 7a387013..d91ebf8f 100644 --- a/frame_serialize/CborErr.h +++ b/frame_serialize/CborErr.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_CBORERR_H #define JUNGFRAUJOCH_CBORERR_H diff --git a/frame_serialize/CborUtil.h b/frame_serialize/CborUtil.h index 9f5c29a0..b19656d2 100644 --- a/frame_serialize/CborUtil.h +++ b/frame_serialize/CborUtil.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_CBORUTIL_H #define JUNGFRAUJOCH_CBORUTIL_H diff --git a/frame_serialize/JFJochFrameDeserializer.cpp b/frame_serialize/JFJochFrameDeserializer.cpp index 3fafd480..78af72c6 100644 --- a/frame_serialize/JFJochFrameDeserializer.cpp +++ b/frame_serialize/JFJochFrameDeserializer.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFJochFrameDeserializer.h" #include "tinycbor/src/cbor.h" diff --git a/frame_serialize/JFJochFrameDeserializer.h b/frame_serialize/JFJochFrameDeserializer.h index bd20ab80..df79cf29 100644 --- a/frame_serialize/JFJochFrameDeserializer.h +++ b/frame_serialize/JFJochFrameDeserializer.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFJOCHFRAMEDESERIALIZER_H #define JUNGFRAUJOCH_JFJOCHFRAMEDESERIALIZER_H diff --git a/frame_serialize/JFJochFrameSerializer.cpp b/frame_serialize/JFJochFrameSerializer.cpp index ae5cf7a8..9ff86ebb 100644 --- a/frame_serialize/JFJochFrameSerializer.cpp +++ b/frame_serialize/JFJochFrameSerializer.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFJochFrameSerializer.h" #include "tinycbor/src/cbor.h" diff --git a/frame_serialize/JFJochFrameSerializer.h b/frame_serialize/JFJochFrameSerializer.h index 96a751a7..83746add 100644 --- a/frame_serialize/JFJochFrameSerializer.h +++ b/frame_serialize/JFJochFrameSerializer.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFJOCHFRAMESERIALIZER_H #define JUNGFRAUJOCH_JFJOCHFRAMESERIALIZER_H diff --git a/frontend_ui/src/components/BkgEstimatePlot.tsx b/frontend_ui/src/components/BkgEstimatePlot.tsx index 25a2b3f8..db4e459c 100644 --- a/frontend_ui/src/components/BkgEstimatePlot.tsx +++ b/frontend_ui/src/components/BkgEstimatePlot.tsx @@ -1,6 +1,6 @@ /* * Copyright (2019-2023) Paul Scherrer Institute - * SPDX-License-Identifier: GPL-3.0-or-later + * */ import Paper from "@mui/material/Paper"; diff --git a/grpc/JFJochDetectorClient.cpp b/grpc/JFJochDetectorClient.cpp index 2c8a6121..8c4b81f4 100644 --- a/grpc/JFJochDetectorClient.cpp +++ b/grpc/JFJochDetectorClient.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/grpc/JFJochDetectorClient.h b/grpc/JFJochDetectorClient.h index bdca076a..814ec97d 100644 --- a/grpc/JFJochDetectorClient.h +++ b/grpc/JFJochDetectorClient.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFJOCHDETECTORCLIENT_H #define JUNGFRAUJOCH_JFJOCHDETECTORCLIENT_H diff --git a/grpc/JFJochReceiverClient.cpp b/grpc/JFJochReceiverClient.cpp index 4294dc0b..fe72f283 100644 --- a/grpc/JFJochReceiverClient.cpp +++ b/grpc/JFJochReceiverClient.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "JFJochReceiverClient.h" diff --git a/grpc/JFJochReceiverClient.h b/grpc/JFJochReceiverClient.h index 401a6f37..a1945de6 100644 --- a/grpc/JFJochReceiverClient.h +++ b/grpc/JFJochReceiverClient.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFJOCHRECEIVERCLIENT_H #define JUNGFRAUJOCH_JFJOCHRECEIVERCLIENT_H diff --git a/grpc/JFJochWriterClient.cpp b/grpc/JFJochWriterClient.cpp index 3f6f4fbc..6403d8ae 100644 --- a/grpc/JFJochWriterClient.cpp +++ b/grpc/JFJochWriterClient.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/grpc/JFJochWriterClient.h b/grpc/JFJochWriterClient.h index e1d0b9fd..8f8658e3 100644 --- a/grpc/JFJochWriterClient.h +++ b/grpc/JFJochWriterClient.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFJOCHWRITERCLIENT_H #define JUNGFRAUJOCH_JFJOCHWRITERCLIENT_H diff --git a/grpc/JFJochWriterGroupClient.cpp b/grpc/JFJochWriterGroupClient.cpp index f3bf1bf0..4fbc2c11 100644 --- a/grpc/JFJochWriterGroupClient.cpp +++ b/grpc/JFJochWriterGroupClient.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFJochWriterGroupClient.h" diff --git a/grpc/JFJochWriterGroupClient.h b/grpc/JFJochWriterGroupClient.h index 96586ef4..6f7b57e2 100644 --- a/grpc/JFJochWriterGroupClient.h +++ b/grpc/JFJochWriterGroupClient.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFJOCHWRITERGROUPCLIENT_H #define JUNGFRAUJOCH_JFJOCHWRITERGROUPCLIENT_H diff --git a/grpc/gRPCServer_Template.h b/grpc/gRPCServer_Template.h index c481085a..85641458 100644 --- a/grpc/gRPCServer_Template.h +++ b/grpc/gRPCServer_Template.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_GRPCSERVER_TEMPLATE_H #define JUNGFRAUJOCH_GRPCSERVER_TEMPLATE_H diff --git a/grpc/jfjoch.proto b/grpc/jfjoch.proto index 465859ee..f892bec4 100644 --- a/grpc/jfjoch.proto +++ b/grpc/jfjoch.proto @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute syntax = "proto3"; diff --git a/image_analysis/CrystalLattice.cpp b/image_analysis/CrystalLattice.cpp index 1ebf46e3..22aaf337 100644 --- a/image_analysis/CrystalLattice.cpp +++ b/image_analysis/CrystalLattice.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "CrystalLattice.h" diff --git a/image_analysis/CrystalLattice.h b/image_analysis/CrystalLattice.h index 7509eb55..7895a84b 100644 --- a/image_analysis/CrystalLattice.h +++ b/image_analysis/CrystalLattice.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_CRYSTALLATTICE_H #define JUNGFRAUJOCH_CRYSTALLATTICE_H diff --git a/image_analysis/GPUImageAnalysis.cpp b/image_analysis/GPUImageAnalysis.cpp index f3f48921..a1a029ae 100644 --- a/image_analysis/GPUImageAnalysis.cpp +++ b/image_analysis/GPUImageAnalysis.cpp @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #ifndef JFJOCH_USE_CUDA diff --git a/image_analysis/GPUImageAnalysis.cu b/image_analysis/GPUImageAnalysis.cu index ba054a5d..45226352 100644 --- a/image_analysis/GPUImageAnalysis.cu +++ b/image_analysis/GPUImageAnalysis.cu @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "GPUImageAnalysis.h" #include "../common/JFJochException.h" diff --git a/image_analysis/GPUImageAnalysis.h b/image_analysis/GPUImageAnalysis.h index a0086fff..683132a4 100644 --- a/image_analysis/GPUImageAnalysis.h +++ b/image_analysis/GPUImageAnalysis.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_GPUIMAGEANALYSIS_H #define JUNGFRAUJOCH_GPUIMAGEANALYSIS_H diff --git a/image_analysis/IndexerWrapper.cpp b/image_analysis/IndexerWrapper.cpp index 1c548781..50692dac 100644 --- a/image_analysis/IndexerWrapper.cpp +++ b/image_analysis/IndexerWrapper.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "IndexerWrapper.h" diff --git a/image_analysis/IndexerWrapper.h b/image_analysis/IndexerWrapper.h index e73a9e49..e6766ac6 100644 --- a/image_analysis/IndexerWrapper.h +++ b/image_analysis/IndexerWrapper.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_INDEXERWRAPPER_H #define JUNGFRAUJOCH_INDEXERWRAPPER_H diff --git a/image_analysis/PredictSpotsOnDetector.h b/image_analysis/PredictSpotsOnDetector.h index 37c79640..c47072a9 100644 --- a/image_analysis/PredictSpotsOnDetector.h +++ b/image_analysis/PredictSpotsOnDetector.h @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #ifndef JUNGFRAUJOCH_PREDICTSPOTSONDETECTOR_H #define JUNGFRAUJOCH_PREDICTSPOTSONDETECTOR_H diff --git a/image_analysis/RadialIntegration.cpp b/image_analysis/RadialIntegration.cpp index 8502cb27..7b92b2b2 100644 --- a/image_analysis/RadialIntegration.cpp +++ b/image_analysis/RadialIntegration.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "RadialIntegration.h" #include "../common/JFJochException.h" diff --git a/image_analysis/RadialIntegration.h b/image_analysis/RadialIntegration.h index 47e4bd41..6843559f 100644 --- a/image_analysis/RadialIntegration.h +++ b/image_analysis/RadialIntegration.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_RADIALINTEGRATION_H #define JUNGFRAUJOCH_RADIALINTEGRATION_H diff --git a/image_analysis/RadialIntegrationMapping.cpp b/image_analysis/RadialIntegrationMapping.cpp index 2c65c887..ac98f06d 100644 --- a/image_analysis/RadialIntegrationMapping.cpp +++ b/image_analysis/RadialIntegrationMapping.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/image_analysis/RadialIntegrationMapping.h b/image_analysis/RadialIntegrationMapping.h index fb948591..12076f68 100644 --- a/image_analysis/RadialIntegrationMapping.h +++ b/image_analysis/RadialIntegrationMapping.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_RADIALINTEGRATIONMAPPING_H #define JUNGFRAUJOCH_RADIALINTEGRATIONMAPPING_H diff --git a/image_analysis/RadialIntegrationProfile.cpp b/image_analysis/RadialIntegrationProfile.cpp index ae435368..599ead54 100644 --- a/image_analysis/RadialIntegrationProfile.cpp +++ b/image_analysis/RadialIntegrationProfile.cpp @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #include "RadialIntegrationProfile.h" #include "../common/JFJochException.h" diff --git a/image_analysis/RadialIntegrationProfile.h b/image_analysis/RadialIntegrationProfile.h index 64b41900..75dcec40 100644 --- a/image_analysis/RadialIntegrationProfile.h +++ b/image_analysis/RadialIntegrationProfile.h @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #ifndef JUNGFRAUJOCH_RADIALINTEGRATIONPROFILE_H #define JUNGFRAUJOCH_RADIALINTEGRATIONPROFILE_H diff --git a/image_analysis/StrongPixelSet.cpp b/image_analysis/StrongPixelSet.cpp index 34fe8513..880e6372 100644 --- a/image_analysis/StrongPixelSet.cpp +++ b/image_analysis/StrongPixelSet.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "StrongPixelSet.h" diff --git a/image_analysis/StrongPixelSet.h b/image_analysis/StrongPixelSet.h index 745fa06b..a78f310a 100644 --- a/image_analysis/StrongPixelSet.h +++ b/image_analysis/StrongPixelSet.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_STRONGPIXELSET_H #define JUNGFRAUJOCH_STRONGPIXELSET_H diff --git a/jungfrau/JFCalibration.cpp b/jungfrau/JFCalibration.cpp index 13a0f754..865070af 100644 --- a/jungfrau/JFCalibration.cpp +++ b/jungfrau/JFCalibration.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFCalibration.h" diff --git a/jungfrau/JFCalibration.h b/jungfrau/JFCalibration.h index 3f44e015..8f5b1c06 100644 --- a/jungfrau/JFCalibration.h +++ b/jungfrau/JFCalibration.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFCALIBRATION_H #define JUNGFRAUJOCH_JFCALIBRATION_H diff --git a/jungfrau/JFConversion.h b/jungfrau/JFConversion.h index 65ced286..79046bbb 100644 --- a/jungfrau/JFConversion.h +++ b/jungfrau/JFConversion.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFCONVERSION_H #define JUNGFRAUJOCH_JFCONVERSION_H diff --git a/jungfrau/JFConversionFixedPoint.cpp b/jungfrau/JFConversionFixedPoint.cpp index dc218d23..7d431c22 100644 --- a/jungfrau/JFConversionFixedPoint.cpp +++ b/jungfrau/JFConversionFixedPoint.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFConversionFixedPoint.h" #include "../common/RawToConvertedGeometry.h" diff --git a/jungfrau/JFConversionFixedPoint.h b/jungfrau/JFConversionFixedPoint.h index 779924d3..ae171114 100644 --- a/jungfrau/JFConversionFixedPoint.h +++ b/jungfrau/JFConversionFixedPoint.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFConversion.h" diff --git a/jungfrau/JFConversionFloatingPoint.cpp b/jungfrau/JFConversionFloatingPoint.cpp index 0aca9882..5cb677bb 100644 --- a/jungfrau/JFConversionFloatingPoint.cpp +++ b/jungfrau/JFConversionFloatingPoint.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFConversionFloatingPoint.h" #include "../common/RawToConvertedGeometry.h" diff --git a/jungfrau/JFConversionFloatingPoint.h b/jungfrau/JFConversionFloatingPoint.h index 6f798919..b5c262db 100644 --- a/jungfrau/JFConversionFloatingPoint.h +++ b/jungfrau/JFConversionFloatingPoint.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFCONVERSIONFLOATINGPOINT_H #define JUNGFRAUJOCH_JFCONVERSIONFLOATINGPOINT_H diff --git a/jungfrau/JFConversionGPU.cpp b/jungfrau/JFConversionGPU.cpp index 695a27b0..c7fecc5e 100644 --- a/jungfrau/JFConversionGPU.cpp +++ b/jungfrau/JFConversionGPU.cpp @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #ifndef JFJOCH_USE_CUDA diff --git a/jungfrau/JFConversionGPU.cu b/jungfrau/JFConversionGPU.cu index c8980fb9..b079c8c9 100644 --- a/jungfrau/JFConversionGPU.cu +++ b/jungfrau/JFConversionGPU.cu @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #include "JFConversionGPU.h" #include "../common/JFJochException.h" diff --git a/jungfrau/JFConversionGPU.h b/jungfrau/JFConversionGPU.h index 9e5d4eb1..23fa8187 100644 --- a/jungfrau/JFConversionGPU.h +++ b/jungfrau/JFConversionGPU.h @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #ifndef JUNGFRAUJOCH_JFCONVERSIONGPU_CUH #define JUNGFRAUJOCH_JFCONVERSIONGPU_CUH diff --git a/jungfrau/JFModuleGainCalibration.cpp b/jungfrau/JFModuleGainCalibration.cpp index 76f53992..b30c78cd 100644 --- a/jungfrau/JFModuleGainCalibration.cpp +++ b/jungfrau/JFModuleGainCalibration.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFModuleGainCalibration.h" diff --git a/jungfrau/JFModuleGainCalibration.h b/jungfrau/JFModuleGainCalibration.h index 00e66f7e..c60f3f39 100644 --- a/jungfrau/JFModuleGainCalibration.h +++ b/jungfrau/JFModuleGainCalibration.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFMODULEGAINCALIBRATION_H #define JUNGFRAUJOCH_JFMODULEGAINCALIBRATION_H diff --git a/jungfrau/JFModulePedestal.cpp b/jungfrau/JFModulePedestal.cpp index 36fb7bf0..9dfa72a1 100644 --- a/jungfrau/JFModulePedestal.cpp +++ b/jungfrau/JFModulePedestal.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFModulePedestal.h" diff --git a/jungfrau/JFModulePedestal.h b/jungfrau/JFModulePedestal.h index 2b097343..7c136e9c 100644 --- a/jungfrau/JFModulePedestal.h +++ b/jungfrau/JFModulePedestal.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFMODULEPEDESTAL_H #define JUNGFRAUJOCH_JFMODULEPEDESTAL_H diff --git a/jungfrau/JFPedestalCalc.cpp b/jungfrau/JFPedestalCalc.cpp index 09c959c5..dc7a57f1 100644 --- a/jungfrau/JFPedestalCalc.cpp +++ b/jungfrau/JFPedestalCalc.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFPedestalCalc.h" #include "../common/JFJochException.h" diff --git a/jungfrau/JFPedestalCalc.h b/jungfrau/JFPedestalCalc.h index 0c7fc73c..c08a1f22 100644 --- a/jungfrau/JFPedestalCalc.h +++ b/jungfrau/JFPedestalCalc.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFPEDESTALCALC_H #define JUNGFRAUJOCH_JFPEDESTALCALC_H diff --git a/jungfrau/ProcessJFPacket.cpp b/jungfrau/ProcessJFPacket.cpp index 21655801..00c41b2e 100644 --- a/jungfrau/ProcessJFPacket.cpp +++ b/jungfrau/ProcessJFPacket.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/jungfrau/ProcessJFPacket.h b/jungfrau/ProcessJFPacket.h index cfb77a67..9fb316c2 100644 --- a/jungfrau/ProcessJFPacket.h +++ b/jungfrau/ProcessJFPacket.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_PROCESSJFPACKET_H #define JUNGFRAUJOCH_PROCESSJFPACKET_H diff --git a/jungfrau/jf_packet.h b/jungfrau/jf_packet.h index 4a8e0e58..71ccb618 100644 --- a/jungfrau/jf_packet.h +++ b/jungfrau/jf_packet.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JF_PACKET_H #define JUNGFRAUJOCH_JF_PACKET_H diff --git a/python/jfjoch_grpc2http.py b/python/jfjoch_grpc2http.py index f97eb410..2edefaa6 100644 --- a/python/jfjoch_grpc2http.py +++ b/python/jfjoch_grpc2http.py @@ -1,5 +1,5 @@ -# Copyright (2019-2022) Paul Scherrer Institute -# SPDX-License-Identifier: GPL-3.0-or-later +# Copyright (2019-2023) Paul Scherrer Institute +# from io import BytesIO diff --git a/python/jungfraujoch.py b/python/jungfraujoch.py index 91f4cc18..80c4fec7 100644 --- a/python/jungfraujoch.py +++ b/python/jungfraujoch.py @@ -1,5 +1,5 @@ -# Copyright (2019-2022) Paul Scherrer Institute -# SPDX-License-Identifier: GPL-3.0-or-later +# Copyright (2019-2023) Paul Scherrer Institute +# import requests diff --git a/python/jungfraujoch_metadata.py b/python/jungfraujoch_metadata.py index c6afd720..6c4c7522 100644 --- a/python/jungfraujoch_metadata.py +++ b/python/jungfraujoch_metadata.py @@ -1,5 +1,5 @@ -# Copyright (2019-2022) Paul Scherrer Institute -# SPDX-License-Identifier: GPL-3.0-or-later +# Copyright (2019-2023) Paul Scherrer Institute +# import h5py import sys diff --git a/receiver/AcquisitionCounters.cpp b/receiver/AcquisitionCounters.cpp index 1ad29e56..b26dbb94 100644 --- a/receiver/AcquisitionCounters.cpp +++ b/receiver/AcquisitionCounters.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/receiver/AcquisitionCounters.h b/receiver/AcquisitionCounters.h index 18fca3b8..4400ec15 100644 --- a/receiver/AcquisitionCounters.h +++ b/receiver/AcquisitionCounters.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_ACQUISITIONCOUNTERS_H #define JUNGFRAUJOCH_ACQUISITIONCOUNTERS_H diff --git a/receiver/AcquisitionDevice.cpp b/receiver/AcquisitionDevice.cpp index a2b805e2..95c1217e 100644 --- a/receiver/AcquisitionDevice.cpp +++ b/receiver/AcquisitionDevice.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifdef JFJOCH_USE_NUMA #include diff --git a/receiver/AcquisitionDevice.h b/receiver/AcquisitionDevice.h index e77f4b3f..4a41d078 100644 --- a/receiver/AcquisitionDevice.h +++ b/receiver/AcquisitionDevice.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_ACQUISITIONDEVICE_H #define JUNGFRAUJOCH_ACQUISITIONDEVICE_H diff --git a/receiver/Completion.cpp b/receiver/Completion.cpp index 5a93145e..dfea0249 100644 --- a/receiver/Completion.cpp +++ b/receiver/Completion.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/receiver/Completion.h b/receiver/Completion.h index 114002b1..66ce8170 100644 --- a/receiver/Completion.h +++ b/receiver/Completion.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_COMPLETION_H #define JUNGFRAUJOCH_COMPLETION_H diff --git a/receiver/FPGAAcquisitionDevice.cpp b/receiver/FPGAAcquisitionDevice.cpp index 91e6da78..9f9eddb8 100644 --- a/receiver/FPGAAcquisitionDevice.cpp +++ b/receiver/FPGAAcquisitionDevice.cpp @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #include "FPGAAcquisitionDevice.h" #include diff --git a/receiver/FPGAAcquisitionDevice.h b/receiver/FPGAAcquisitionDevice.h index 6708d733..0826d1ed 100644 --- a/receiver/FPGAAcquisitionDevice.h +++ b/receiver/FPGAAcquisitionDevice.h @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #ifndef JUNGFRAUJOCH_FPGAACQUISITIONDEVICE_H #define JUNGFRAUJOCH_FPGAACQUISITIONDEVICE_H diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index edac5519..53127bd9 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "HLSSimulatedDevice.h" diff --git a/receiver/HLSSimulatedDevice.h b/receiver/HLSSimulatedDevice.h index d4b814a8..7f323bc6 100644 --- a/receiver/HLSSimulatedDevice.h +++ b/receiver/HLSSimulatedDevice.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_HLSSIMULATEDDEVICE_H #define JUNGFRAUJOCH_HLSSIMULATEDDEVICE_H diff --git a/receiver/IBWrappers.cpp b/receiver/IBWrappers.cpp index 07b55a7c..89843163 100644 --- a/receiver/IBWrappers.cpp +++ b/receiver/IBWrappers.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifdef JFJOCH_USE_IBVERBS diff --git a/receiver/IBWrappers.h b/receiver/IBWrappers.h index 902b0777..99b9e692 100644 --- a/receiver/IBWrappers.h +++ b/receiver/IBWrappers.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifdef JFJOCH_USE_IBVERBS #ifndef JUNGFRAUJOCH_IBWRAPPERS_H diff --git a/receiver/JFJochReceiver.cpp b/receiver/JFJochReceiver.cpp index 0c9cae83..7e4c6715 100644 --- a/receiver/JFJochReceiver.cpp +++ b/receiver/JFJochReceiver.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFJochReceiver.h" diff --git a/receiver/JFJochReceiver.h b/receiver/JFJochReceiver.h index 53f556f9..680e25cf 100644 --- a/receiver/JFJochReceiver.h +++ b/receiver/JFJochReceiver.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFJOCHRECEIVER_H #define JUNGFRAUJOCH_JFJOCHRECEIVER_H diff --git a/receiver/JFJochReceiverService.cpp b/receiver/JFJochReceiverService.cpp index 2116605a..6eed1ecf 100644 --- a/receiver/JFJochReceiverService.cpp +++ b/receiver/JFJochReceiverService.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFJochReceiverService.h" diff --git a/receiver/JFJochReceiverService.h b/receiver/JFJochReceiverService.h index 6b5f6092..da4581b7 100644 --- a/receiver/JFJochReceiverService.h +++ b/receiver/JFJochReceiverService.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFJOCHRECEIVERSERVICE_H #define JUNGFRAUJOCH_JFJOCHRECEIVERSERVICE_H diff --git a/receiver/JFJochReceiverTest.cpp b/receiver/JFJochReceiverTest.cpp index 62f6659f..c73de6ac 100644 --- a/receiver/JFJochReceiverTest.cpp +++ b/receiver/JFJochReceiverTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFJochReceiverTest.h" #include "JFJochReceiverService.h" diff --git a/receiver/JFJochReceiverTest.h b/receiver/JFJochReceiverTest.h index f36aaa5b..23280ecb 100644 --- a/receiver/JFJochReceiverTest.h +++ b/receiver/JFJochReceiverTest.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFJochReceiver.h" diff --git a/receiver/LinuxSocketDevice.cpp b/receiver/LinuxSocketDevice.cpp index 75de133c..033c57fe 100644 --- a/receiver/LinuxSocketDevice.cpp +++ b/receiver/LinuxSocketDevice.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "LinuxSocketDevice.h" diff --git a/receiver/LinuxSocketDevice.h b/receiver/LinuxSocketDevice.h index c8f7efbf..02ab1516 100644 --- a/receiver/LinuxSocketDevice.h +++ b/receiver/LinuxSocketDevice.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_LINUXSOCKETDEVICE_H #define JUNGFRAUJOCH_LINUXSOCKETDEVICE_H diff --git a/receiver/MlxRawEthDevice.cpp b/receiver/MlxRawEthDevice.cpp index c729d285..835f57c1 100644 --- a/receiver/MlxRawEthDevice.cpp +++ b/receiver/MlxRawEthDevice.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifdef JFJOCH_USE_IBVERBS #include "MlxRawEthDevice.h" diff --git a/receiver/MlxRawEthDevice.h b/receiver/MlxRawEthDevice.h index 0c0a8e69..8de9d6a6 100644 --- a/receiver/MlxRawEthDevice.h +++ b/receiver/MlxRawEthDevice.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifdef JFJOCH_USE_IBVERBS diff --git a/receiver/MockAcquisitionDevice.cpp b/receiver/MockAcquisitionDevice.cpp index 9eb9d713..79cd7411 100644 --- a/receiver/MockAcquisitionDevice.cpp +++ b/receiver/MockAcquisitionDevice.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "MockAcquisitionDevice.h" #include "../common/JFJochException.h" diff --git a/receiver/MockAcquisitionDevice.h b/receiver/MockAcquisitionDevice.h index 68431f5a..045fe81a 100644 --- a/receiver/MockAcquisitionDevice.h +++ b/receiver/MockAcquisitionDevice.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_MOCKACQUISITIONDEVICE_H #define JUNGFRAUJOCH_MOCKACQUISITIONDEVICE_H diff --git a/receiver/PCIExpressDevice.cpp b/receiver/PCIExpressDevice.cpp index 749ce703..90c0925d 100644 --- a/receiver/PCIExpressDevice.cpp +++ b/receiver/PCIExpressDevice.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/receiver/PCIExpressDevice.h b/receiver/PCIExpressDevice.h index c6ec7dc8..511f28cc 100644 --- a/receiver/PCIExpressDevice.h +++ b/receiver/PCIExpressDevice.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_PCIEXPRESSDEVICE_H #define JUNGFRAUJOCH_PCIEXPRESSDEVICE_H diff --git a/receiver/jfjoch_action_test.cpp b/receiver/jfjoch_action_test.cpp index 40bdcc79..5c4980a4 100644 --- a/receiver/jfjoch_action_test.cpp +++ b/receiver/jfjoch_action_test.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/receiver/jfjoch_lxsocket_test.cpp b/receiver/jfjoch_lxsocket_test.cpp index 650552bc..a1eb4cba 100644 --- a/receiver/jfjoch_lxsocket_test.cpp +++ b/receiver/jfjoch_lxsocket_test.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "LinuxSocketDevice.h" #include "../common/NetworkAddressConvert.h" diff --git a/receiver/jfjoch_mlx_test.cpp b/receiver/jfjoch_mlx_test.cpp index 899127f5..7733c9b3 100644 --- a/receiver/jfjoch_mlx_test.cpp +++ b/receiver/jfjoch_mlx_test.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "MlxRawEthDevice.h" #include "../common/NetworkAddressConvert.h" diff --git a/receiver/jfjoch_pcie_cancel_data_collection.cpp b/receiver/jfjoch_pcie_cancel_data_collection.cpp index 3d2e1a3c..0a578299 100644 --- a/receiver/jfjoch_pcie_cancel_data_collection.cpp +++ b/receiver/jfjoch_pcie_cancel_data_collection.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/receiver/jfjoch_pcie_clear_net_counters.cpp b/receiver/jfjoch_pcie_clear_net_counters.cpp index f0ef230f..ea6692fd 100644 --- a/receiver/jfjoch_pcie_clear_net_counters.cpp +++ b/receiver/jfjoch_pcie_clear_net_counters.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/receiver/jfjoch_pcie_read_int_packet_gen.cpp b/receiver/jfjoch_pcie_read_int_packet_gen.cpp index c8130fe6..7a2fbfc3 100644 --- a/receiver/jfjoch_pcie_read_int_packet_gen.cpp +++ b/receiver/jfjoch_pcie_read_int_packet_gen.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/receiver/jfjoch_pcie_set_network.cpp b/receiver/jfjoch_pcie_set_network.cpp index 98427d57..bc8c38e3 100644 --- a/receiver/jfjoch_pcie_set_network.cpp +++ b/receiver/jfjoch_pcie_set_network.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "../common/Logger.h" #include "../common/JFJochException.h" diff --git a/receiver/jfjoch_pcie_status.cpp b/receiver/jfjoch_pcie_status.cpp index 0f92ef37..7a159b72 100644 --- a/receiver/jfjoch_pcie_status.cpp +++ b/receiver/jfjoch_pcie_status.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/receiver/jfjoch_receiver.cpp b/receiver/jfjoch_receiver.cpp index a20994f8..6d8271fa 100644 --- a/receiver/jfjoch_receiver.cpp +++ b/receiver/jfjoch_receiver.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "nlohmann/json.hpp" #include diff --git a/tests/AcquisitionCountersTest.cpp b/tests/AcquisitionCountersTest.cpp index ce23faca..453e0620 100644 --- a/tests/AcquisitionCountersTest.cpp +++ b/tests/AcquisitionCountersTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "../receiver/AcquisitionCounters.h" diff --git a/tests/ActionConfigTest.cpp b/tests/ActionConfigTest.cpp index 12532120..bf2ba30d 100644 --- a/tests/ActionConfigTest.cpp +++ b/tests/ActionConfigTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "../common/Definitions.h" diff --git a/tests/CBORTest.cpp b/tests/CBORTest.cpp index 06b4551e..0720dfab 100644 --- a/tests/CBORTest.cpp +++ b/tests/CBORTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/tests/CoordTest.cpp b/tests/CoordTest.cpp index 38514727..3ff31b1a 100644 --- a/tests/CoordTest.cpp +++ b/tests/CoordTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "../common/Coord.h" diff --git a/tests/DetectorGeometryTest.cpp b/tests/DetectorGeometryTest.cpp index 5f8d4b75..a41bc93e 100644 --- a/tests/DetectorGeometryTest.cpp +++ b/tests/DetectorGeometryTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "../common/DetectorGeometry.h" diff --git a/tests/DetectorSetupTest.cpp b/tests/DetectorSetupTest.cpp index 50cd3fff..fc1d14e9 100644 --- a/tests/DetectorSetupTest.cpp +++ b/tests/DetectorSetupTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "../common/DetectorSetup.h" diff --git a/tests/DiffractionExperimentTest.cpp b/tests/DiffractionExperimentTest.cpp index 88b0aa38..1a9616b1 100644 --- a/tests/DiffractionExperimentTest.cpp +++ b/tests/DiffractionExperimentTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #define CATCH_CONFIG_MAIN #include diff --git a/tests/DiffractionGeometryTest.cpp b/tests/DiffractionGeometryTest.cpp index a014290e..f8af967e 100644 --- a/tests/DiffractionGeometryTest.cpp +++ b/tests/DiffractionGeometryTest.cpp @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later #include #include "../common/DiffractionGeometry.h" diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index e6a481e4..eb0d135e 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/tests/FPGANetworkTest.cpp b/tests/FPGANetworkTest.cpp index 2c701ec2..3e494eaa 100644 --- a/tests/FPGANetworkTest.cpp +++ b/tests/FPGANetworkTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/tests/FPGAUnitTest.h b/tests/FPGAUnitTest.h index 03d81cc8..4b2262ea 100644 --- a/tests/FPGAUnitTest.h +++ b/tests/FPGAUnitTest.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef FPGAUNITTEST_H #define FPGAUNITTEST_H diff --git a/tests/FrameTransformationTest.cpp b/tests/FrameTransformationTest.cpp index bf7c94f9..94c04fd4 100644 --- a/tests/FrameTransformationTest.cpp +++ b/tests/FrameTransformationTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/tests/HDF5WritingTest.cpp b/tests/HDF5WritingTest.cpp index 04d7901f..7198119b 100644 --- a/tests/HDF5WritingTest.cpp +++ b/tests/HDF5WritingTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/tests/IndexingUnitTest.cpp b/tests/IndexingUnitTest.cpp index 01243b71..790241d1 100644 --- a/tests/IndexingUnitTest.cpp +++ b/tests/IndexingUnitTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "../writer/HDF5Objects.h" diff --git a/tests/JFCalibrationTest.cpp b/tests/JFCalibrationTest.cpp index 55b86165..2f93d9e8 100644 --- a/tests/JFCalibrationTest.cpp +++ b/tests/JFCalibrationTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "catch2/catch.hpp" #include diff --git a/tests/JFConversionTest.cpp b/tests/JFConversionTest.cpp index 6b448578..4beaf223 100644 --- a/tests/JFConversionTest.cpp +++ b/tests/JFConversionTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/tests/JFJochBrokerParserTest.cpp b/tests/JFJochBrokerParserTest.cpp index 5b1d90b0..765543e6 100644 --- a/tests/JFJochBrokerParserTest.cpp +++ b/tests/JFJochBrokerParserTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "../broker/JFJochBrokerParser.h" diff --git a/tests/JFJochBrokerTest.cpp b/tests/JFJochBrokerTest.cpp index 27ac5fc1..d37864bb 100644 --- a/tests/JFJochBrokerTest.cpp +++ b/tests/JFJochBrokerTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "../broker/JFJochStateMachine.h" diff --git a/tests/JFJochFullIntegrationTest.cpp b/tests/JFJochFullIntegrationTest.cpp index 2f72b76c..676b2265 100644 --- a/tests/JFJochFullIntegrationTest.cpp +++ b/tests/JFJochFullIntegrationTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/tests/JFJochReceiverIntegrationTest.cpp b/tests/JFJochReceiverIntegrationTest.cpp index c3868160..6a5925a2 100644 --- a/tests/JFJochReceiverIntegrationTest.cpp +++ b/tests/JFJochReceiverIntegrationTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/tests/JFPedestalTest.cpp b/tests/JFPedestalTest.cpp index 4e638610..0c5a36e3 100644 --- a/tests/JFPedestalTest.cpp +++ b/tests/JFPedestalTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/tests/MockAcquisitionDeviceTest.cpp b/tests/MockAcquisitionDeviceTest.cpp index 9f0dff6a..bfaa210f 100644 --- a/tests/MockAcquisitionDeviceTest.cpp +++ b/tests/MockAcquisitionDeviceTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "../receiver/MockAcquisitionDevice.h" diff --git a/tests/PedestalCalcTest.cpp b/tests/PedestalCalcTest.cpp index 3c7a23dd..9d9846ea 100644 --- a/tests/PedestalCalcTest.cpp +++ b/tests/PedestalCalcTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "../jungfrau/JFPedestalCalc.h" diff --git a/tests/ProcessRawPacketTest.cpp b/tests/ProcessRawPacketTest.cpp index 16f415c2..9e47a5c8 100644 --- a/tests/ProcessRawPacketTest.cpp +++ b/tests/ProcessRawPacketTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/tests/ROIFilterTest.cpp b/tests/ROIFilterTest.cpp index 9a8270f4..3ad620b9 100644 --- a/tests/ROIFilterTest.cpp +++ b/tests/ROIFilterTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/tests/RadialIntegrationTest.cpp b/tests/RadialIntegrationTest.cpp index 02e8e91b..963ab7fa 100644 --- a/tests/RadialIntegrationTest.cpp +++ b/tests/RadialIntegrationTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/tests/RawToConvertedGeometryTest.cpp b/tests/RawToConvertedGeometryTest.cpp index 46ccd27f..cebec8c2 100644 --- a/tests/RawToConvertedGeometryTest.cpp +++ b/tests/RawToConvertedGeometryTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/tests/SpotAnalyzeUnitTest.cpp b/tests/SpotAnalyzeUnitTest.cpp index 694948e3..cea1ac58 100644 --- a/tests/SpotAnalyzeUnitTest.cpp +++ b/tests/SpotAnalyzeUnitTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "../image_analysis/StrongPixelSet.h" diff --git a/tests/SpotFinderIntegration.cpp b/tests/SpotFinderIntegration.cpp index 3dd32629..354dfe73 100644 --- a/tests/SpotFinderIntegration.cpp +++ b/tests/SpotFinderIntegration.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/tests/StatusVectorTest.cpp b/tests/StatusVectorTest.cpp index 05afa186..efb6f949 100644 --- a/tests/StatusVectorTest.cpp +++ b/tests/StatusVectorTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "../common/StatusVector.h" diff --git a/tests/StreamWriterTest.cpp b/tests/StreamWriterTest.cpp index bd7aa656..91722497 100644 --- a/tests/StreamWriterTest.cpp +++ b/tests/StreamWriterTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/tests/ThreadSafeFIFOSetTest.cpp b/tests/ThreadSafeFIFOSetTest.cpp index 51dac368..7f03ec01 100644 --- a/tests/ThreadSafeFIFOSetTest.cpp +++ b/tests/ThreadSafeFIFOSetTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include <../common/ThreadSafeFIFO.h> diff --git a/tests/ZMQImagePusherTest.cpp b/tests/ZMQImagePusherTest.cpp index 0a4efc90..93b46772 100644 --- a/tests/ZMQImagePusherTest.cpp +++ b/tests/ZMQImagePusherTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "../writer/ZMQImagePuller.h" diff --git a/tests/ZMQPreviewPublisherTest.cpp b/tests/ZMQPreviewPublisherTest.cpp index 1652ed05..6986a70d 100644 --- a/tests/ZMQPreviewPublisherTest.cpp +++ b/tests/ZMQPreviewPublisherTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "../common/ZMQPreviewPublisher.h" diff --git a/tests/ZSTDCompressorTest.cpp b/tests/ZSTDCompressorTest.cpp index 47215120..3fa76ae7 100644 --- a/tests/ZSTDCompressorTest.cpp +++ b/tests/ZSTDCompressorTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/tests/gRPCServerTest.cpp b/tests/gRPCServerTest.cpp index 3a1b664a..6b22038b 100644 --- a/tests/gRPCServerTest.cpp +++ b/tests/gRPCServerTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/tests/stream2.c b/tests/stream2.c index 7940c19e..a16e16b2 100644 --- a/tests/stream2.c +++ b/tests/stream2.c @@ -1,5 +1,4 @@ // Copyright (2019-2023) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later // DECTRIS proprietary license diff --git a/tools/CompressionBenchmark.cpp b/tools/CompressionBenchmark.cpp index 5bb92f83..08339715 100644 --- a/tools/CompressionBenchmark.cpp +++ b/tools/CompressionBenchmark.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/tools/DataAnalysisPerfTest.cpp b/tools/DataAnalysisPerfTest.cpp index 499bde6d..8f9852b6 100644 --- a/tools/DataAnalysisPerfTest.cpp +++ b/tools/DataAnalysisPerfTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/tools/HDF5DatasetWriteTest.cpp b/tools/HDF5DatasetWriteTest.cpp index 8554efa3..7aabe0be 100644 --- a/tools/HDF5DatasetWriteTest.cpp +++ b/tools/HDF5DatasetWriteTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/tools/JFCalibrationPerfTest.cpp b/tools/JFCalibrationPerfTest.cpp index 6793441d..6405a9b3 100644 --- a/tools/JFCalibrationPerfTest.cpp +++ b/tools/JFCalibrationPerfTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/tools/PreviewTest.cpp b/tools/PreviewTest.cpp index 03d2ce84..e767a6ff 100644 --- a/tools/PreviewTest.cpp +++ b/tools/PreviewTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "../common/ZMQPreviewPublisher.h" #include "../writer/HDF5Objects.h" diff --git a/tools/RadialIntDataset.cpp b/tools/RadialIntDataset.cpp index e68e4496..956d5ef2 100644 --- a/tools/RadialIntDataset.cpp +++ b/tools/RadialIntDataset.cpp @@ -1,10 +1,7 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include -// Copyright (2019-2021) Paul Scherrer Institute - #include #include #include "../writer/HDF5Objects.h" diff --git a/tools/RadialIntegrationCPUTest.cpp b/tools/RadialIntegrationCPUTest.cpp index f75693e8..15408fca 100644 --- a/tools/RadialIntegrationCPUTest.cpp +++ b/tools/RadialIntegrationCPUTest.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/tools/UDPSimulator.cpp b/tools/UDPSimulator.cpp index 1419154d..38deae23 100644 --- a/tools/UDPSimulator.cpp +++ b/tools/UDPSimulator.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "UDPSimulator.h" #include diff --git a/tools/UDPSimulator.h b/tools/UDPSimulator.h index 95751bf2..791a569e 100644 --- a/tools/UDPSimulator.h +++ b/tools/UDPSimulator.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_UDPSIMULATOR_H #define JUNGFRAUJOCH_UDPSIMULATOR_H diff --git a/tools/jfjoch_udp_simulator.cpp b/tools/jfjoch_udp_simulator.cpp index 60068d7a..64defe9d 100644 --- a/tools/jfjoch_udp_simulator.cpp +++ b/tools/jfjoch_udp_simulator.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "UDPSimulator.h" diff --git a/writer/HDF5DataFile.cpp b/writer/HDF5DataFile.cpp index a4241faa..ce76b2e4 100644 --- a/writer/HDF5DataFile.cpp +++ b/writer/HDF5DataFile.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "HDF5DataFile.h" #include "../compression/JFJochCompressor.h" diff --git a/writer/HDF5DataFile.h b/writer/HDF5DataFile.h index 18924b9d..13548b9a 100644 --- a/writer/HDF5DataFile.h +++ b/writer/HDF5DataFile.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef HDF5DATAFILE_H #define HDF5DATAFILE_H diff --git a/writer/HDF5NXmx.cpp b/writer/HDF5NXmx.cpp index 3afeed4d..2e326259 100644 --- a/writer/HDF5NXmx.cpp +++ b/writer/HDF5NXmx.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "HDF5NXmx.h" diff --git a/writer/HDF5NXmx.h b/writer/HDF5NXmx.h index 19c80771..580897bd 100644 --- a/writer/HDF5NXmx.h +++ b/writer/HDF5NXmx.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_HDF5NXMX_H #define JUNGFRAUJOCH_HDF5NXMX_H diff --git a/writer/HDF5Objects.cpp b/writer/HDF5Objects.cpp index 23899ed9..f7aa4938 100644 --- a/writer/HDF5Objects.cpp +++ b/writer/HDF5Objects.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/writer/HDF5Objects.h b/writer/HDF5Objects.h index 424c9e88..d23849e6 100644 --- a/writer/HDF5Objects.h +++ b/writer/HDF5Objects.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_HDF5OBJECTS_H #define JUNGFRAUJOCH_HDF5OBJECTS_H diff --git a/writer/HDF5Sum.cpp b/writer/HDF5Sum.cpp index 4e229bb2..c28a9cd7 100644 --- a/writer/HDF5Sum.cpp +++ b/writer/HDF5Sum.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include diff --git a/writer/HDF5Writer.cpp b/writer/HDF5Writer.cpp index cc779066..63102cb9 100644 --- a/writer/HDF5Writer.cpp +++ b/writer/HDF5Writer.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "HDF5Writer.h" #include "HDF5NXmx.h" diff --git a/writer/HDF5Writer.h b/writer/HDF5Writer.h index d23d78f3..ed39191f 100644 --- a/writer/HDF5Writer.h +++ b/writer/HDF5Writer.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_HDF5WRITER_H #define JUNGFRAUJOCH_HDF5WRITER_H diff --git a/writer/JFJochWriterService.cpp b/writer/JFJochWriterService.cpp index 1abc43f8..5633c325 100644 --- a/writer/JFJochWriterService.cpp +++ b/writer/JFJochWriterService.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "JFJochWriterService.h" diff --git a/writer/JFJochWriterService.h b/writer/JFJochWriterService.h index f67863b4..802ac2aa 100644 --- a/writer/JFJochWriterService.h +++ b/writer/JFJochWriterService.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_JFJOCHWRITERSERVICE_H #define JUNGFRAUJOCH_JFJOCHWRITERSERVICE_H diff --git a/writer/MakeDirectory.h b/writer/MakeDirectory.h index 9eaa8546..efa5419c 100644 --- a/writer/MakeDirectory.h +++ b/writer/MakeDirectory.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_MAKEDIRECTORY_H #define JUNGFRAUJOCH_MAKEDIRECTORY_H diff --git a/writer/StreamWriter.cpp b/writer/StreamWriter.cpp index f63dfe0d..d4e0709d 100644 --- a/writer/StreamWriter.cpp +++ b/writer/StreamWriter.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include "../common/JFJochException.h" #include "StreamWriter.h" diff --git a/writer/StreamWriter.h b/writer/StreamWriter.h index e85c36e9..7fc18c3c 100644 --- a/writer/StreamWriter.h +++ b/writer/StreamWriter.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_STREAMWRITER_H #define JUNGFRAUJOCH_STREAMWRITER_H diff --git a/writer/ZMQImagePuller.cpp b/writer/ZMQImagePuller.cpp index b783ce94..12db14fa 100644 --- a/writer/ZMQImagePuller.cpp +++ b/writer/ZMQImagePuller.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include "ZMQImagePuller.h" diff --git a/writer/ZMQImagePuller.h b/writer/ZMQImagePuller.h index 6ad5851a..1db85b98 100644 --- a/writer/ZMQImagePuller.h +++ b/writer/ZMQImagePuller.h @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #ifndef JUNGFRAUJOCH_ZMQIMAGEPULLER_H #define JUNGFRAUJOCH_ZMQIMAGEPULLER_H diff --git a/writer/jfjoch_writer.cpp b/writer/jfjoch_writer.cpp index c77e99af..021e81c3 100644 --- a/writer/jfjoch_writer.cpp +++ b/writer/jfjoch_writer.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/writer/jfjoch_writer_multi.cpp b/writer/jfjoch_writer_multi.cpp index 6476d09a..9f45b91e 100644 --- a/writer/jfjoch_writer_multi.cpp +++ b/writer/jfjoch_writer_multi.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include diff --git a/writer/jfjoch_writer_test.cpp b/writer/jfjoch_writer_test.cpp index 14a2fc8f..afa6c352 100644 --- a/writer/jfjoch_writer_test.cpp +++ b/writer/jfjoch_writer_test.cpp @@ -1,5 +1,4 @@ -// Copyright (2019-2022) Paul Scherrer Institute -// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (2019-2023) Paul Scherrer Institute #include #include From 90cd9602e2fb64b6036f2a4d7e9a1e3db70bde12 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 15 Sep 2023 12:21:31 +0200 Subject: [PATCH 224/224] Update slsDetectorPackage to 7.0.2 Signed-off-by: Filip Leonarski --- detector_control/slsDetectorPackage | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/detector_control/slsDetectorPackage b/detector_control/slsDetectorPackage index 77c558a7..f761046b 160000 --- a/detector_control/slsDetectorPackage +++ b/detector_control/slsDetectorPackage @@ -1 +1 @@ -Subproject commit 77c558a7be56ff1e7391e35ed4c01dc3a36412a1 +Subproject commit f761046bfc1aa8d3fc4e52730fedfe206b1c79a7