v1.0.0-rc.72
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@@ -43,6 +43,37 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator", "[FPGA][Full]") {
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REQUIRE(test.GetExpectedDescriptorsPerModule() == DMA_DESCRIPTORS_PER_MODULE);
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}
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TEST_CASE("HLS_C_Simulation_internal_packet_generator_data_stream", "[FPGA][Full]") {
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Logger logger(Catch::getResultCapture().getCurrentTestName());
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const uint16_t nmodules = 4;
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DiffractionExperiment x(DetJF(nmodules));
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x.DataStreams(4);
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x.Mode(DetectorMode::Raw);
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x.UseInternalPacketGenerator(true).ImagesPerTrigger(4).PedestalG0Frames(0);
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HLSSimulatedDevice test(3, 64);
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std::vector<uint16_t> ref_data(RAW_MODULE_SIZE);
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for (int i = 0; i < RAW_MODULE_SIZE; i++)
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ref_data[i] = i % 65536;
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test.SetInternalGeneratorFrame(ref_data.data(), 0);
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REQUIRE_NOTHROW(test.StartAction(x));
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REQUIRE_NOTHROW(test.WaitForActionComplete());
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REQUIRE(test.GetBytesReceived() == 128 * nmodules * JUNGFRAU_PACKET_SIZE_BYTES);
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for (int image = 0; image < 4; image++) {
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auto imageBuf = (uint16_t *) test.GetDeviceOutput(image, 0)->pixels;
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for (int i = 0; i < RAW_MODULE_SIZE; i++)
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REQUIRE(imageBuf[i] == i % 65536);
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}
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REQUIRE(test.GetExpectedDescriptorsPerModule() == DMA_DESCRIPTORS_PER_MODULE);
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}
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TEST_CASE("HLS_C_Simulation_internal_packet_generator_custom_frame", "[FPGA][Full]") {
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Logger logger(Catch::getResultCapture().getCurrentTestName());
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