FPGA: Save to HBM operates in parallel to host writer

receiver/HLSSimulatedDevice.cpp

@@ -217,12 +217,16 @@ void HLSSimulatedDevice::HLSMainThread() {
     STREAM_512 converted_1;
     STREAM_512 converted_2;
     STREAM_512 converted_3;
+    STREAM_512 converted_4;
+    STREAM_512 converted_5;
 
     hls::stream<ap_uint<ADDR_STREAM_WIDTH> > addr0;
     hls::stream<ap_uint<ADDR_STREAM_WIDTH> > addr1;
     hls::stream<ap_uint<ADDR_STREAM_WIDTH> > addr2;
     hls::stream<ap_uint<ADDR_STREAM_WIDTH> > addr3;
     hls::stream<ap_uint<ADDR_STREAM_WIDTH> > addr4;
+    hls::stream<ap_uint<ADDR_STREAM_WIDTH> > addr5;
+    hls::stream<ap_uint<ADDR_STREAM_WIDTH> > addr6;
 
     hls::stream<ap_uint<UDP_METADATA_STREAM_WIDTH> > udp_metadata;
     ap_uint<1> idle_data_collection;
@@ -308,25 +312,29 @@ void HLSSimulatedDevice::HLSMainThread() {
     // Timer procedure - count how many times write_data is not accepting input (to help track down latency issues)
     hls_cores.emplace_back([&] { timer_host(converted_1, converted_2, counter_host); });
 
-    STREAM_512 save_to_hbm_completion;
+    // Temporary - split streams so data can be written to both HBM and internal memory
+    hls_cores.emplace_back([&] { writer_split(converted_2, converted_3, converted_4,
+                                              addr3, addr4, addr5); });
+
+    hls::stream<ap_uint<32> > save_to_hbm_completion;
     ap_uint<8> save_to_hbm_err_reg;
     uint64_t save_to_hbm_packets_processed;
     ap_uint<1> save_to_hbm_idle;
 
-    hls_cores.emplace_back([&] { save_to_hbm(converted_2, addr3, converted_3, addr4,
+    // 3. Write images to HBM
+    hls_cores.emplace_back([&] { save_to_hbm(converted_3, addr4, save_to_hbm_completion,
                                              (hbm256_t *) (hbm_memory[12].data()),
                                              (hbm256_t *) (hbm_memory[13].data()),
                                              (hbm256_t *) (hbm_memory[14].data()),
                                              (hbm256_t *) (hbm_memory[15].data()),
-                                                  save_to_hbm_completion,
-                                                  save_to_hbm_packets_processed,
-                                                  save_to_hbm_idle,
-                                                  save_to_hbm_err_reg,
-                                                  16); });
+                                             save_to_hbm_packets_processed,
+                                             save_to_hbm_idle,
+                                             save_to_hbm_err_reg,
+                                             16); });
 
-    // 3. Prepare data to write to host memory
+    // 4. Prepare data to write to host memory
     hls_cores.emplace_back([&] {
-        host_writer(converted_3, addr4, datamover_out.GetDataStream(),
+        host_writer(converted_4, addr5, datamover_out.GetDataStream(),
                     datamover_out.GetCtrlStream(), work_request_stream, completion_stream,
                     packets_processed, host_writer_idle, err_reg); });
 
@@ -348,6 +356,9 @@ void HLSSimulatedDevice::HLSMainThread() {
     if (!addr4.empty())
         throw std::runtime_error("Addr4 queue not empty");
 
+    if (!addr5.empty())
+        throw std::runtime_error("Addr5 queue not empty");
+
     if (!raw1.empty())
         throw std::runtime_error("Raw1 queue not empty");
 
@@ -372,6 +383,9 @@ void HLSSimulatedDevice::HLSMainThread() {
     if (!converted_3.empty())
         throw std::runtime_error("Converted_3 queue not empty");
 
+    if (!converted_4.empty())
+        throw std::runtime_error("Converted_4 queue not empty");
+
     if (!datamover_in.GetDataStream().empty())
         throw std::runtime_error("Datamover queue is not empty");