From 9497d84f3c0ec35a793a33ae55cb5e91da98d5ac Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Fri, 2 Jun 2023 21:59:24 +0200 Subject: [PATCH] FPGA: Small rewrite of the internal_packet_generator --- receiver/hls/internal_packet_generator.cpp | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/receiver/hls/internal_packet_generator.cpp b/receiver/hls/internal_packet_generator.cpp index 13c5f4e6..65f0316b 100644 --- a/receiver/hls/internal_packet_generator.cpp +++ b/receiver/hls/internal_packet_generator.cpp @@ -57,10 +57,9 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, if (internal_packet_generator) { uint32_t frame_number = 1; uint8_t module_number = 0; - ap_uint<1> cancel = in_cancel; - generate_frames: - while (!cancel && (frame_number <= nframes)) { + generate_frames: + while (!in_cancel.read() && (frame_number <= nframes)) { for (uint32_t i = 0; i < RAW_MODULE_SIZE * 2 / 64; i++) { #pragma HLS PIPELINE II=1 uint32_t eth_packet = i / 128; @@ -79,7 +78,6 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, module_number = 0; } else module_number++; - cancel = in_cancel; } }