From 8635724ca3e2dd56b63a6cd46ae974f44095df7e Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 21 Nov 2023 15:20:12 +0100 Subject: [PATCH] Move FPGA register map from Definitions.h to jfjoch_drv.h --- common/Definitions.h | 52 +---------------------------------- fpga/pcie_driver/jfjoch_drv.h | 52 +++++++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+), 51 deletions(-) diff --git a/common/Definitions.h b/common/Definitions.h index 1b618bd1..b6c6a317 100644 --- a/common/Definitions.h +++ b/common/Definitions.h @@ -69,59 +69,9 @@ #define LOAD_CALIBRATION_DEST_CALIB 0 #define LOAD_CALIBRATION_DEST_INTEGRATION 1 #define LOAD_CALIBRATION_DEST_FRAME_GEN 2 + // FPGA register map -#define ADDR_CTRL_REGISTER 0x0000 -#define ADDR_GIT_SHA1 0x000C -#define ADDR_ACTION_TYPE 0x0010 -#define ADDR_RELEASE_LEVEL 0x0014 - -#define ADDR_MAX_MODULES_FPGA 0x0020 -#define ADDR_MODS_INT_PKT_GEN 0x0024 -#define ADDR_STALLS_HOST_LO 0x0028 -#define ADDR_STALLS_HOST_HI 0x002C -#define ADDR_STALLS_HBM_LO 0x0030 -#define ADDR_STALLS_HBM_HI 0x0034 -#define ADDR_FIFO_STATUS 0x0038 - -#define ADDR_PACKETS_PROC_LO 0x0040 -#define ADDR_PACKETS_PROC_HI 0x0044 -#define ADDR_PACKETS_ETH_LO 0x0048 -#define ADDR_PACKETS_ETH_HI 0x004C -#define ADDR_PACKETS_ICMP_LO 0x0050 -#define ADDR_PACKETS_ICMP_HI 0x0054 -#define ADDR_PACKETS_UDP_LO 0x0058 -#define ADDR_PACKETS_UDP_HI 0x005C -#define ADDR_PACKETS_SLS_LO 0x0060 -#define ADDR_PACKETS_SLS_HI 0x0064 -#define ADDR_PACKETS_ERR_LEN 0x0068 -#define ADDR_PACKETS_ERR_ETH 0x006C - -#define ADDR_MAC_ADDR_LO 0x0080 -#define ADDR_MAC_ADDR_HI 0x0084 -#define ADDR_IPV4_ADDR 0x0088 -#define ADDR_NMODULES 0x008C -#define ADDR_DATA_COL_MODE 0x0090 -#define ADDR_ONE_OVER_ENERGY 0x0094 -#define ADDR_NFRAMES 0x0098 -#define ADDR_NSTORAGE_CELLS 0x009C - -#define ADDR_SPOT_FINDER_THRESHOLD 0x0100 -#define ADDR_SPOT_FINDER_SNR 0x0104 - -#define ADDR_MAILBOX_WRDATA 0x00 -#define ADDR_MAILBOX_RDDATA 0x08 -#define ADDR_MAILBOX_STATUS 0x10 -#define ADDR_MAILBOX_SIT 0x18 -#define ADDR_MAILBOX_RIT 0x1C - -#define MAILBOX_EMPTY (1 << 0) -#define MAILBOX_FULL (1 << 1) -#define MAILBOX_STA (1 << 2) -#define MAILBOX_RTA (1 << 3) - -#define CTRL_REGISTER_IDLE (1<<1u) - #define HANDLE_START (UINT32_MAX - 1) #define HANDLE_SKIP_FRAME (UINT32_MAX - 2) #define HANDLE_END (UINT32_MAX ) diff --git a/fpga/pcie_driver/jfjoch_drv.h b/fpga/pcie_driver/jfjoch_drv.h index aaa0051d..368b0db2 100644 --- a/fpga/pcie_driver/jfjoch_drv.h +++ b/fpga/pcie_driver/jfjoch_drv.h @@ -43,6 +43,58 @@ #define PCIE_OFFSET (0x090000) #define FRAME_GEN_OFFSET (0x080000) + +#define ADDR_CTRL_REGISTER 0x0000 +#define ADDR_GIT_SHA1 0x000C +#define ADDR_ACTION_TYPE 0x0010 +#define ADDR_RELEASE_LEVEL 0x0014 + +#define ADDR_MAX_MODULES_FPGA 0x0020 +#define ADDR_MODS_INT_PKT_GEN 0x0024 +#define ADDR_STALLS_HOST_LO 0x0028 +#define ADDR_STALLS_HOST_HI 0x002C +#define ADDR_STALLS_HBM_LO 0x0030 +#define ADDR_STALLS_HBM_HI 0x0034 +#define ADDR_FIFO_STATUS 0x0038 + +#define ADDR_PACKETS_PROC_LO 0x0040 +#define ADDR_PACKETS_PROC_HI 0x0044 +#define ADDR_PACKETS_ETH_LO 0x0048 +#define ADDR_PACKETS_ETH_HI 0x004C +#define ADDR_PACKETS_ICMP_LO 0x0050 +#define ADDR_PACKETS_ICMP_HI 0x0054 +#define ADDR_PACKETS_UDP_LO 0x0058 +#define ADDR_PACKETS_UDP_HI 0x005C +#define ADDR_PACKETS_SLS_LO 0x0060 +#define ADDR_PACKETS_SLS_HI 0x0064 +#define ADDR_PACKETS_ERR_LEN 0x0068 +#define ADDR_PACKETS_ERR_ETH 0x006C + +#define ADDR_MAC_ADDR_LO 0x0080 +#define ADDR_MAC_ADDR_HI 0x0084 +#define ADDR_IPV4_ADDR 0x0088 +#define ADDR_NMODULES 0x008C +#define ADDR_DATA_COL_MODE 0x0090 +#define ADDR_ONE_OVER_ENERGY 0x0094 +#define ADDR_NFRAMES 0x0098 +#define ADDR_NSTORAGE_CELLS 0x009C + +#define ADDR_SPOT_FINDER_THRESHOLD 0x0100 +#define ADDR_SPOT_FINDER_SNR 0x0104 + +#define ADDR_MAILBOX_WRDATA 0x00 +#define ADDR_MAILBOX_RDDATA 0x08 +#define ADDR_MAILBOX_STATUS 0x10 +#define ADDR_MAILBOX_SIT 0x18 +#define ADDR_MAILBOX_RIT 0x1C + +#define MAILBOX_EMPTY (1 << 0) +#define MAILBOX_FULL (1 << 1) +#define MAILBOX_STA (1 << 2) +#define MAILBOX_RTA (1 << 3) + +#define CTRL_REGISTER_IDLE (1<<1u) + #define ADDR_LOAD_CALIBRATION_CTRL (LOAD_CALIBRATION_OFFSET | 0x000000) #define ADDR_LOAD_CALIBRATION_RETURN (LOAD_CALIBRATION_OFFSET | 0x000010) #define ADDR_LOAD_CALIBRATION_MOD (LOAD_CALIBRATION_OFFSET | 0x000018)