From 67473bcac10a0660fa9ad3eeb45bb67486a2d430 Mon Sep 17 00:00:00 2001 From: Filip Leonarski Date: Tue, 19 Sep 2023 19:46:48 +0200 Subject: [PATCH] FPGA: Fix frame generator empty/full signal --- fpga/hdl/action_config.v | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/fpga/hdl/action_config.v b/fpga/hdl/action_config.v index d59f65fb..2ccccf1c 100644 --- a/fpga/hdl/action_config.v +++ b/fpga/hdl/action_config.v @@ -582,8 +582,8 @@ always @(posedge clk) begin reg_fifo_status[21] <= h2c_data_fifo_full; reg_fifo_status[22] <= h2c_cmd_fifo_empty; reg_fifo_status[23] <= h2c_cmd_fifo_full; - reg_fifo_status[24] <= frame_generator_fifo_full; - reg_fifo_status[25] <= frame_generator_fifo_empty; + reg_fifo_status[24] <= frame_generator_fifo_empty; + reg_fifo_status[25] <= frame_generator_fifo_full; reg_fifo_status[26] <= eth_in_fifo_full; reg_fifo_status[27] <= eth_in_fifo_empty; end