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FPGA + receiver + detector: Use column ID to decode detector half-module number

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This commit is contained in:
leonarski_f
2023-04-15 11:08:32 +02:00
parent 56251545b0
commit 653b82d6c3
12 changed files with 92 additions and 78 deletions
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9
tests/ProcessRawPacketTest.cpp
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@@ -40,19 +40,22 @@ TEST_CASE("ProcessRawPacketTest") {
datagram.framenum = 1;
datagram.bunchid = 84;
datagram.data[0] = 6789;
process.ProcessPacket(&datagram, experiment.GetSrcIPv4Address(0, 4));
datagram.xCoord = 4;
process.ProcessPacket(&datagram);
datagram.packetnum = 36;
datagram.framenum = 2;
datagram.bunchid = 84;
datagram.data[0] = 6345;
process.ProcessPacket(&datagram, experiment.GetSrcIPv4Address(0, 5));
datagram.xCoord = 5;
process.ProcessPacket(&datagram);
datagram.packetnum = 16;
datagram.framenum = 3;
datagram.bunchid = 84;
datagram.data[0] = 6346;
process.ProcessPacket(&datagram, experiment.GetSrcIPv4Address(1,7));
datagram.xCoord = 7;
process.ProcessPacket(&datagram);
REQUIRE(process.GetCounter() == 3);
}